)]}'
{
  "commit": "60690e495c3d6ead778bc25c44e925c5fd66173f",
  "tree": "6a925353c765fba384e74e9d084d29903431caa3",
  "parents": [
    "2642cd4bb5308083ac44023f670519350ca96cf4"
  ],
  "author": {
    "name": "Artem Serov",
    "email": "artem.serov@linaro.org",
    "time": "Mon Apr 27 21:09:59 2020 +0100"
  },
  "committer": {
    "name": "Ulyana Trafimovich",
    "email": "skvadrik@google.com",
    "time": "Fri Jul 10 08:22:20 2020 +0000"
  },
  "message": "ART: Improve two SIMD tests.\n\nAdds tests to ensure:\n a) FP and SIMD registers are spilled correctly.\n b) VecReplicateScalar correctly handles immediates.\n\nTest: 655-checker-simd-arm-opt, 623-checker-loop-regressions.\nChange-Id: If7ce70fd21292ae909ddb5bc78eb85dbe98207be\n",
  "tree_diff": [
    {
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      "old_mode": 33188,
      "old_path": "test/623-checker-loop-regressions/src/Main.java",
      "new_id": "62f8d5cd97afdd5e06954314ca1e6f35c30ff5b4",
      "new_mode": 33188,
      "new_path": "test/623-checker-loop-regressions/src/Main.java"
    },
    {
      "type": "modify",
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      "old_mode": 33188,
      "old_path": "test/655-checker-simd-arm-opt/src/Main.java",
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      "new_mode": 33188,
      "new_path": "test/655-checker-simd-arm-opt/src/Main.java"
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  ]
}