Avoid unaligned accesses (SIGBUG/BUS_ADRALN) in IRT.
Pointers in IrtEntry aren't currently aligned under 64 bit builds. But
unaligned atomic stores (store exclusive) do not work on arm64 (causes
SIGBUG/BUS_ADRALN). Fix CC collector crashes caused by this.
Bug: 12687968
Change-Id: I1d2f5376778a9a1e5cfea876f1f57d7a88ad5445
diff --git a/runtime/indirect_reference_table.h b/runtime/indirect_reference_table.h
index 7f7870a..576a604 100644
--- a/runtime/indirect_reference_table.h
+++ b/runtime/indirect_reference_table.h
@@ -197,7 +197,7 @@
// Contains multiple entries but only one active one, this helps us detect use after free errors
// since the serial stored in the indirect ref wont match.
static const size_t kIRTPrevCount = kIsDebugBuild ? 7 : 3;
-class PACKED(4) IrtEntry {
+class IrtEntry {
public:
void Add(mirror::Object* obj) SHARED_LOCKS_REQUIRED(Locks::mutator_lock_) {
++serial_;
@@ -218,6 +218,8 @@
uint32_t serial_;
GcRoot<mirror::Object> references_[kIRTPrevCount];
};
+static_assert(sizeof(IrtEntry) == (1 + kIRTPrevCount) * sizeof(uintptr_t),
+ "Unexpected sizeof(IrtEntry)");
class IrtIterator {
public: