)]}' { "log": [ { "commit": "0ebe0d83138bba1996e9c8007969b5381d972b32", "tree": "a5ee66ebc5b587ade97e56ac8fc7d832fbbed4af", "parents": [ "e1e347dace0ded83774999bb26c37527dcdb1d5a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 21 22:50:39 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 25 15:45:01 2017 +0100" }, "message": "ART: Introduce compiler data type.\n\nReplace most uses of the runtime\u0027s Primitive in compiler\nwith a new class DataType. This prepares for introducing\nnew types, such as Uint8, that the runtime does not need\nto know about.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nBug: 23964345\nChange-Id: Iec2ad82454eec678fffcd8279a9746b90feb9b0c\n" }, { "commit": "d8dbc8da0e5cc6b5c2176ce2d3877e6194d72c0c", "tree": "af6e9fb02471d75ebdea46190a0aa3e9dbdb892d", "parents": [ "93780a60090356921b844dbefdc13442c9f18b52" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Sep 20 13:37:47 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Sep 20 15:55:10 2017 +0100" }, "message": "Refactor compiled_method.h .\n\nMove LinkerPatch to compiler/linker/linker_patch.h .\nMove SrcMapElem to compiler/debug/src_map_elem.h .\nIntroduce compiled_method-inl.h to reduce the number\nof `#include`s in compiled_method.h .\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nChange-Id: Id211cdf94a63ad265bf4709f1a5e06dffbe30f64\n" }, { "commit": "09659c22dc2f2c85a0ade965d1fc5160944b8692", "tree": "66fd5729395d27569c4d9d255a5ce9b44cb000bf", "parents": [ "4d159807a4854caa6396b708a38bbd6fa49d736f" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Sep 18 18:23:32 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Sep 19 10:26:51 2017 -0700" }, "message": "ART: Remove heap poisoning from globals.h\n\nRemove mostly-unused include and move it to its users.\n\nTest: m\nChange-Id: Ibb40f919db64a490290c6e18cf1123aaf44199fc\n" }, { "commit": "fc8b422c286501346b5b797420fb616aaa5e952a", "tree": "61c857a895cdad9ce387a899f92824701259df32", "parents": [ "7090dfe84f78b1928fcbdfd664d0dd9ea52633ff" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Sun Sep 17 13:44:24 2017 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Sep 18 10:57:06 2017 -0700" }, "message": "Clean up AtomicDexRefMap\n\nMake ClassReference, TypeReference, and MethodReference extend\nDexFileReference. This enables using all of these types as the key\nfor AtomicDexRefMap.\n\nTest: test-art-host\nBug: 63851220\nBug: 63756964\n\nChange-Id: Ida3c94cadb53272cb5057e5cebc5971c1ab4d366\n" }, { "commit": "94ec2db21332ee1dcdbbf254b99a9a999a304fe0", "tree": "6ced7e596731b61f95a3693f336527f55ea3cf3a", "parents": [ "6cfbdbc359ec5414d3e49f70d28f8c0e65b98d63" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Sep 06 17:21:03 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 11 15:12:51 2017 +0100" }, "message": "Use mmapped boot image class table for PIC app HLoadClass.\n\nImplement new HLoadClass load kind for boot image classes\nreferenced by PIC-compiled apps (i.e. prebuilts) that uses\nPC-relative load from a boot image ClassTable mmapped into\nthe apps .bss. This reduces the size of the PIC prebuilts\nthat reference boot image classes compared to the kBssEntry\nas we can completely avoid the slow path and stack map\nunless we need to do the class initialization check.\n\nPrebuilt services.odex for aosp_angler-userdebug (arm64):\n - before: 20312800\n - after: 19775352 (-525KiB)\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: testrunner.py --host --pictest\nTest: testrunner.py --target on Nexus 6P.\nTest: testrunner.py --target --pictest on Nexus 6P.\nTest: Nexus 6P boots.\nBug: 31951624\nChange-Id: I13adb19a1fa7d095a72a41f09daa6101876e77a8\n" }, { "commit": "6cfbdbc359ec5414d3e49f70d28f8c0e65b98d63", "tree": "f92b309ddc43c2254b6067346a653170fbbf7316", "parents": [ "0f3c7003e08a42a4ed8c9f8dfffb1bee1118de59" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jul 25 13:26:39 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 07 17:52:35 2017 +0100" }, "message": "Use mmapped boot image intern table for PIC app HLoadString.\n\nImplement new HLoadString load kind for boot image strings\nreferenced by PIC-compiled apps (i.e. prebuilts) that uses\nPC-relative load from a boot image InternTable mmapped into\nthe apps .bss. This reduces the size of the PIC prebuilts\nthat reference boot image strings compared to the kBssEntry\nas we can completely avoid the slow path and stack map.\n\nWe separate the InternedStrings and ClassTable sections of\nthe boot image (.art) file from the rest, aligning the\nstart of the InternedStrings section to a page boundary.\nThis may actually increase the size of the boot image file\nby a page but it also allows mprotecting() these tables as\nread-only. The ClassTable section is included in\nanticipation of a similar load kind for HLoadClass.\n\nPrebuilt services.odex for aosp_angler-userdebug (arm64):\n - before: 20862776\n - after: 20308512 (-541KiB)\nNote that 92KiB savings could have been achieved by simply\navoiding the read barrier, similar to the HLoadClass flag\nIsInBootImage(). Such flag is now unnecessary.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: testrunner.py --host --pictest\nTest: testrunner.py --target on Nexus 6P.\nTest: testrunner.py --target --pictest on Nexus 6P.\nTest: Nexus 6P boots.\nBug: 31951624\nChange-Id: I5f2bf1fc0bb36a8483244317cfdfa69e192ef6c5\n" }, { "commit": "5011149cbb1dddf7161ef294b8ed265862ae6d91", "tree": "e420ba6336d69308e73ead7ff7984d4c08e7bcf8", "parents": [ "65ee0f086581a8fbaa18473e8bac7ff9372cff0a", "2dec927e60395210946e5b9dbaa03111dad2466a" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Aug 18 11:59:14 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Aug 18 11:59:14 2017 +0000" }, "message": "Merge \"MIPS64: Implement HSelect\"" }, { "commit": "2dec927e60395210946e5b9dbaa03111dad2466a", "tree": "2c983497c7dc23c02f08f6c302ee99a2cb992a9b", "parents": [ "4a9ab7d61f3933cbe26f01d7dc5bda1e65dcd567" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Wed Aug 02 11:41:26 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Thu Aug 03 07:34:07 2017 +0200" }, "message": "MIPS64: Implement HSelect\n\nTest: mma test-art-host-gtest\nTest: mma test-art-target-gtest in QEMU (MIPS64R6)\nTest: ./testrunner.py --target --optimizing in QEMU (MIPS64R6)\n\nChange-Id: I633fc479e0ca61b7d49b4c36fbe5db9a94da535d\n" }, { "commit": "0cab65610a6a984a94ef4c3f232fe0273e78d95b", "tree": "669fa607f4cd9ad8eef9223bb124fb72265a06b3", "parents": [ "2e53f8f69f8c4175085e337445ec42aa045a2f7f" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Jul 25 15:19:36 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sun Jul 30 20:09:26 2017 -0700" }, "message": "MIPS: Eliminate hard-coded offsets in branches\n\nThe bulk of the change is in the assemblers and their\ntests.\n\nThe main goal is to introduce \"bare\" branches to labels\n(as opposed to the existing bare branches with relative\noffsets, whose direct use we want to eliminate).\nThese branches\u0027 delay/forbidden slots are filled\nmanually and these branches do not promote to long (the\nbranch target must be within reach of the individual\nbranch instruction).\n\nThe secondary goal is to add more branch tests (mainly\nfor bare vs non-bare branches and a few extra) and\nrefactor and reorganize the branch test code a bit.\n\nThe third goal is to improve idiom recognition in the\ndisassembler, including branch idioms and a few others.\n\nFurther details:\n- introduce bare branches (R2 and R6) to labels, making\n R2 branches available for use on R6\n- make use of the above in the code generators\n- align beqz/bnez with their GNU assembler encoding to\n simplify and shorten the test code\n- update the CFI test because of the above\n- add trivial tests for bare and non-bare branches\n (addressing existing debt as well)\n- add MIPS32R6 tests for long beqc/beqzc/bc (debt)\n- add MIPS64R6 long beqzc test (debt)\n- group branch tests together\n- group constant/literal/address-loading tests together\n- make the disassembler recognize:\n - b/beqz/bnez (beq/bne with $zero reg)\n - nal (bltzal with $zero reg)\n - bal/bgezal (bal \u003d bgezal with $zero reg)\n - move (or with $zero reg)\n - li (ori/addiu with $zero reg)\n - dli (daddiu with $zero reg)\n- disassemble 16-bit immediate operands (in andi, ori,\n xori, li, dli) as signed or unsigned as appropriate\n- drop unused instructions (bltzl, bltzall, addi) from\n the disassembler as there are no plans to use them\n\nTest: test-art-host-gtest\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-gtest\nTest: testrunner.py --target --optimizing\nTest: same tests as above on CI20\nTest: booted MIPS32R2 in QEMU\n\nChange-Id: I62b74a6c00ce0651528114806ba24a59ba564a73\n" }, { "commit": "4147fcc43c2ee019a06e55384985e3eaf82dcb8c", "tree": "11ec92efbfddf7736bbc74ed35fcfb3756bfcfb0", "parents": [ "e8f48da635c4d07bbe431e5819da8e1fad91a8ef" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sat Jun 17 19:57:27 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Jul 19 15:03:10 2017 -0700" }, "message": "MIPS: Reduce Baker read barrier code size overhead\n\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-gtest\nTest: testrunner.py --target --optimizing\nTest: same tests as above on CI20\nTest: booted MIPS32 and MIPS64 in QEMU with poisoning\n in configurations:\n - with Baker read barrier thunks\n - without Baker read barrier thunks\n - ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\n\nChange-Id: I79f320bf8862a04215c76cfeff3118ebc87f7ef2\n" }, { "commit": "854df416f12c48b52239fe163ab8a7fcac4cddd3", "tree": "f5cf247f1e71a5242c797b8fab99ded21839267d", "parents": [ "e63a91111d13f33028c2988ded53a4659140ca2e" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Tue Jun 27 14:41:39 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Thu Jul 13 10:17:07 2017 +0200" }, "message": "MIPS: TLAB allocation entrypoints\n\nAdd fast paths for TLAB allocation entrypoints for MIPS32 and MIPS64.\nAlso improve rosalloc entrypoints.\n\nNote: All tests are executed on CI20 (MIPS32R2) and in QEMU (MIPS32R6\n and MIPS64R6), with and without ART_TEST_DEBUG_GC\u003dtrue.\n\nTest: ./testrunner.py --optimizing --target\nTest: mma test-art-target-gtest\nTest: mma test-art-host-gtest\n\nChange-Id: I92195d2d318b26a19afc5ac46a1844b13b2d5191\n" }, { "commit": "97c46466aea25ab63a99b3d1afc558f0d9f55abb", "tree": "afd225f51d28a77329bc2590a025400e088f260c", "parents": [ "00cca3a275562d110a8b35094b9b12fac37f67ab" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu May 11 14:04:03 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jul 11 17:43:27 2017 +0100" }, "message": "Introduce a Marking Register in ARM64 code generation.\n\nWhen generating code for ARM64, maintain the status of\nThread::Current()-\u003eGetIsGcMarking() in register X20,\ndubbed MR (Marking Register), and check the value of that\nregister (instead of loading and checking a read barrier\nmarking entrypoint) in read barriers.\n\nTest: m test-art-target\nTest: m test-art-target with tree built with ART_USE_READ_BARRIER\u003dfalse\nTest: ARM64 device boot test\nBug: 37707231\nChange-Id: Ibe9bc5c99a2176b0a0476e9e9ad7fcc9f745017b\n" }, { "commit": "ca8c2951ea25e8f93eea9decc70d81937b4361dd", "tree": "72c811abe58895b4972cd88ee267c8ca66155fd1", "parents": [ "2e0a7e5047fde08ddd220aaa1a0e64d44ecbb420" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Mon May 29 11:31:46 2017 +0200" }, "committer": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Thu Jul 06 14:06:33 2017 +0200" }, "message": "MIPS32: Saves 128-bit vector registers along SuspendCheckSlowPath\n\nWe need to save 128 bits of data. This is only done for vector\nregisters that are live, so overhead is not too big.\n\nTest: mma test-art-host-gtest\nTest: ./testrunner.py --optimizing --target in QEMU (MIPS)\nChange-Id: I0f792e9c98011be3e24d5fad35a8244faafcb9a0\n" }, { "commit": "5fa5c04ca39fb9c46bfef0e0807a18d0cd9a4ba7", "tree": "f902c5dad2486b8372c31989ac9b917715231fa8", "parents": [ "83b140474aa1759739c8ee4464bf226c4fa0f6d7" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Thu Jun 01 21:07:52 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Thu Jun 08 14:39:57 2017 -0700" }, "message": "MIPS: Shorten .bss string/class loads\n\nThis is a follow-up to\nhttps://android-review.googlesource.com/#/c/384033/.\n\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: testrunner.py --target --optimizing\nTest: same tests as above on CI20\nTest: booted MIPS32R2 and MIPS64 in QEMU in configurations:\n ART_USE_READ_BARRIER\u003dfalse,\n ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\n\nChange-Id: I4cb2f4ded13c0d9fc960c7eac55396f7931c1e38\n" }, { "commit": "0eb882bfc5d260e8014c26adfda11602065aa5d8", "tree": "e66dbebfb1e9a254c20954a2f2f98541aebfd5af", "parents": [ "b5f5d746ac3f2c3088292395603cb1470e7749d2" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon May 15 13:39:18 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jun 07 15:39:24 2017 +0100" }, "message": "Use ArtMethod* .bss entries for HInvokeStaticOrDirect.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: testrunner.py --target\nTest: Nexus 6P boots.\nTest: Build aosp_mips64-userdebug.\nBug: 30627598\nChange-Id: I0e54fdd2e91e983d475b7a04d40815ba89ae3d4f\n" }, { "commit": "3c8a91250b3e4e87548ec16bf1ab1ea46dbb84a4", "tree": "b5da100b358d1335eab403372e4f616c5c2d607c", "parents": [ "0a87f31513e5f9da27856af054d2241452898b22", "e7197bf7d58c705a048e13e241d7ca320502cd40" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jun 07 10:38:10 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jun 07 10:38:11 2017 +0000" }, "message": "Merge \"Replace invoke kind kDexCacheViaMethod with kRuntimeCall.\"" }, { "commit": "e7197bf7d58c705a048e13e241d7ca320502cd40", "tree": "496032b40145660b40002b9d5b7a78f1c2eeb44f", "parents": [ "4ee8e291a7d5b7b98f35f495eb97705836910871" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 02 17:00:23 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jun 06 15:26:42 2017 +0100" }, "message": "Replace invoke kind kDexCacheViaMethod with kRuntimeCall.\n\nIn preparation for replacing the dex cache method array\nwith a hash-based array, get rid of one unnecessary use.\nThis method load kind is currently used only on mips for\nirreducible loops and OSR, so this should have no impact\non x86/x86-64/arm/arm64.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: Repeat the above tests with manually changing\n kDexCachePcRelative to kRuntimeCall in sharpening.cc.\n (Ignore failures in 552-checker-sharpening.)\nBug: 30627598\nChange-Id: Ifce42645f2dcc350bbb88c2f4642e88fc5f98152\n" }, { "commit": "36a5d0c3c46a75381f303a0a468eaefe1ac3c982", "tree": "94ea290524323aedc1f0d00e233ab84207507aa2", "parents": [ "0a50965275df2da590c49a7a955e6ff5a7c7d2ae", "19680d3655433e98582983ed0a6d44d6b4822951" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Jun 05 16:59:25 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jun 05 16:59:28 2017 +0000" }, "message": "Merge \"MIPS64: ART Vectorizer\"" }, { "commit": "847e6ce98b4b822fd94c631975763845978ebaa3", "tree": "760e26dea1597d8219d8c515317d978b0213cdc1", "parents": [ "cff1b21b3e19c5d3a2d726fdb60dacd7de2a6f0d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 02 13:55:07 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 02 14:03:28 2017 +0100" }, "message": "Rename kDexCacheViaMethod to kRuntimeCall for HLoadClass/String.\n\nThe old name does not reflect the actual code anymore.\n\nTest: testrunner.py --host\nChange-Id: I2e13cf727bba9d901c4d3fc821bb526d38a775b8\n" }, { "commit": "19680d3655433e98582983ed0a6d44d6b4822951", "tree": "15113506e75b1480c5c1d3cfdf9df4480f30eae8", "parents": [ "0a5ace58e973da278049f837bf2cdbaf7b44849c" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Thu May 11 10:38:36 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Mon May 29 17:57:39 2017 +0200" }, "message": "MIPS64: ART Vectorizer\n\nMIPS64 implementation which uses MSA extension. Also extended all\nrelevant checker tests to test MIPS64 implementation.\n\nTest: booted MIPS64R6 in QEMU\nTest: ./testrunner.py --target --optimizing -j1 in QEMU\n\nChange-Id: I8b8a2f601076bca1925e21213db8ed1d41d79b52\n" }, { "commit": "6597946d29be9108e2cc51223553d3db9290a3d9", "tree": "cea6647a45cc59fa1423751179e647124f269990", "parents": [ "a654e0378a8d0bb149362399917e4da2959e6991" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri May 19 17:25:12 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon May 22 18:35:05 2017 +0100" }, "message": "Use PC-relative pointer to boot image methods.\n\nIn preparation for adding ArtMethod entries to the .bss\nsection, add direct PC-relative pointers to methods so that\nthe number of needed .bss entries for boot image is small.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: testrunner.py --target on Nexus 6P\nTest: Nexus 6P boots.\nTest: Build aosp_mips64-userdebug\nBug: 30627598\nChange-Id: Ia89f5f9975b741ddac2816e1570077ba4b4c020f\n" }, { "commit": "764d454d1d51448deb81f6e8d2d7d317c7f4d1b4", "tree": "029f9e65cfe7e953df55b7af45e099924ffdbbac", "parents": [ "7974468d32b817be1d49dfcf513605f646c481bc" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 16 10:31:41 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 16 15:08:55 2017 +0100" }, "message": "Remove LoadString/Class kind kBootImageLinkTimeAddress.\n\nWe no longer support non-PIC boot image compilation.\n\nAlso clean up some obsolete code for method patches\nand make JIT correctly report itself as non-PIC.\n\nTest: testrunner.py --host\nTest: testrunner.py --target\nBug: 33192586\nChange-Id: I593289c5c1b0e88b82b86a933038be97bbb15ad2\n" }, { "commit": "f4e23a8a671e27065bf1cbef7e41403de166f321", "tree": "d25d31f7c1c53f4baf746baafa76b891596c5d49", "parents": [ "d6705a0586377f1b0d7d14d3abe2b270bb0adb18" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Tue May 09 15:43:45 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Fri May 12 15:08:27 2017 +0200" }, "message": "MIPS: Drop unnecessary code for R6 (NAN2008)\n\nThe latest MIPS64R6 emulator supports NAN2008 standard (it correctly\nsets FCSR.NAN2008 to 1 as it is required from R6). Because of that,\nmany workarounds can be removed.\n\nThis simplifies code generator and intrinsics.\n\nTest: ./testrunner.py --target --optimizing in QEMU for MIPS64R6\nTest: ./testrunner.py --target --optimizing in QEMU for MIPS32R6\nTest: ./testrunner.py --target --optimizing in QEMU for MIPS32R2\n\nChange-Id: Ib5335835b61f55690ff574bca580ea8f809657bb\n" }, { "commit": "63529dd46f4a38f9c35c549399480c725beee884", "tree": "6d67e0788607f788910a503b10000d990463ce47", "parents": [ "f4afd9f34035a67f4f845fc8c273589da7a09adc", "d8b6a53074be7d6b98c651ed8d2127f089da39a6" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu May 11 16:15:45 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 11 16:15:47 2017 +0000" }, "message": "Merge \"MIPS64: Saves 128-bit vector registers along SuspendCheckSlowPath\"" }, { "commit": "7d157fcaaae137cc98dbfb872aa1bdc0105a898f", "tree": "2b7d8affda23908e5bfbfaad446079db2ef1ee09", "parents": [ "58d7ddc678e5bcd2364c24c4bdc8a3cfbcfc5358" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 10 16:29:23 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 11 11:14:54 2017 +0100" }, "message": "Clean up some uses of \"auto\".\n\nMake actual types more explicit, either by replacing \"auto\"\nwith actual type or by assigning std::pair\u003c\u003e elements of\nan \"auto\" variable to typed variables. Avoid binding const\nreferences to temporaries. Avoid copying a container.\n\nTest: m test-art-host-gtest\nChange-Id: I1a59f9ba1ee15950cacfc5853bd010c1726de603\n" }, { "commit": "4e92c3ce7ef354620a785553bbada554fca83a67", "tree": "42029deff4d3ba7f89b5fdbf79ff410da575f431", "parents": [ "549844e9ccf432d1396b19af890eedb602b8ba04" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon May 08 09:34:26 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed May 10 09:27:33 2017 +0100" }, "message": "Add runtime reasons for deopt.\n\nCurrently to help investigate. Also:\n1) Log when deoptimization happens (which method and what reason)\n2) Trace when deoptimization happens (to make it visible in systrace)\n\nbug:37655083\nTest: test-art-host test-art-target\nChange-Id: I0c2d87b40db09e8e475cf97a7c784a034c585e97\n" }, { "commit": "d8b6a53074be7d6b98c651ed8d2127f089da39a6", "tree": "f0780307647818a97f041e62d31cc27fa4cc971a", "parents": [ "81c50bf31d9f9e35890404a2baf93f2c1e061ad9" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Thu Apr 20 11:42:30 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Mon May 08 13:05:20 2017 +0200" }, "message": "MIPS64: Saves 128-bit vector registers along SuspendCheckSlowPath\n\nWe need to save 128 bits of data. This is only done for vector\nregisters that are live, so overhead is not too big.\n\nTest: mma test-art-host-gtest\nTest: ./testrunner.py --optimizing --target in QEMU (MIPS64)\n\nChange-Id: I2cdfeb8056dc5ef35c92f589d8c0399c41d913b2\n" }, { "commit": "f3fb1fc453c253a075050910a558c89c1330b5af", "tree": "ca758f050dc3a892e360af094f36fde056e40fef", "parents": [ "9459127abb57b0892d3ddeb1e30ac0bf28c93761", "c61c0761150340263160b568d8a952e9a3d80d56" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu May 04 14:46:32 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 04 14:46:33 2017 +0000" }, "message": "Merge \"MIPS: Change remaining entrypoints to save everything.\"" }, { "commit": "d01745ef88bfd25df574a885d90a1a7785db5f5b", "tree": "058eb1593dbb0fe8a8e26b901909bec8aa01d474", "parents": [ "a57c334075b193de9690fff97acf6c1b1d1283fc" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Wed Apr 05 16:40:31 2017 -0700" }, "committer": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Tue May 02 09:45:45 2017 -0700" }, "message": "optimizing: constructor fence redundancy elimination - remove dmb after LSE\n\nPart one of a few upcoming CLs to optimize constructor fences.\n\nThis improves load-store-elimination; all singleton objects that are not\nreturned will have their associated constructor fence removed.\n\nIf the allocation is removed, so is the fence. Even if allocation is not\nremoved, fences can sometimes be removed.\n\nThis change is enabled by tracking the \"this\" object associated with the\nconstructor fence as an input. Fence inputs are considered weak; they do not keep\nthe \"this\" object alive; if the instructions for \"this\" are all deleted,\nthe fence can also be deleted.\n\nBug: 36656456\nTest: art/test.py --host \u0026\u0026 art/test.py --target\nChange-Id: I05659ab07e20d6e2ecd4be051b722726776f4ab1\n" }, { "commit": "c61c0761150340263160b568d8a952e9a3d80d56", "tree": "105418862af2193d590fc5da868e4c72da7d6e6a", "parents": [ "a57c334075b193de9690fff97acf6c1b1d1283fc" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Mon Apr 10 13:54:23 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sun Apr 30 15:30:58 2017 -0700" }, "message": "MIPS: Change remaining entrypoints to save everything.\n\nThis also fixes two issues:\n1. Missing restore of the callee-clobbered gp register on\n MIPS32\n2. Incorrect DCHECK causing test 916-obsolete-jit to fail\n on MIPS32 in the ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\n configuration\n\nTest: booted MIPS32R2 in QEMU\nTest: test-art-target-gtest\nTest: testrunner.py --target --optimizing\nTest: booted MIPS64 (with 2nd arch MIPS32R2) in QEMU\nTest: same tests as above for both MIPS32R6 and MIPS64R6\nTest: repeat all of the above in two configurations:\n ART_READ_BARRIER_TYPE\u003dTABLELOOKUP,\n ART_USE_READ_BARRIER\u003dfalse.\n\nChange-Id: I06a3c24579242a632ec8c373c233217d558a8401\n" }, { "commit": "cd0295d81b6d53bbade117a0531b2453e8cb7c7f", "tree": "eceada4e7329ce8fc2e993f414f515c186b81f10", "parents": [ "ef6787bd892b55588ebb2835cc3a3bc4e9e08d04" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Fri Mar 31 15:26:54 2017 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Mon Apr 10 10:19:30 2017 -0700" }, "message": "MIPS: Use Lsa/Dlsa when possible.\n\nFor MIPS32R6 replace instances of \"sll/addu\" to calculate the\naddress of an item in an array with \"lsa\". For other versions of\nMIPS32 use the \"sll/addu\" sequence. Encapsulate this logic in an\nassembler method to eliminate having a lot of statements like\n\"if (IsR6()) { ... } else { ... }\" scattered throughout the code.\n\nMIPS64 always supports R6. This means that all instances of\n\"dsll/daddu\" used to calculate the address of an item in an array\ncan be replaced by \"dlsa\" so there is no need to encapsulate\nconditional logic in a special method. The code can just emit\n\"dlsa\" directly.\n\nTest: mma -j2 ART_TEST_OPTIMIZING\u003dtrue test-art-target-run-test\nTested on MIPS32, and MIPS64 QEMU.\nTest: \"make test-art-target-gtest32\" on CI20 board.\nTest: \"cd art; test/testrunner/testrunner.py --target --optimizing --32\"\n on CI20 board.\n\nChange-Id: Ibe5facc1bc2a6a7a6584e23d3a48e163ae38077d\n" }, { "commit": "1595815c2a914a78df7dfb6f0082f47d4e82bb36", "tree": "8fd53c3c91158b33e744e43cc655b2e2a180a3fc", "parents": [ "4ba18fdfc2581a2328ab745c2707e3ed375d9e64" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Thu Feb 09 19:08:30 2017 -0800" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Mar 28 23:35:34 2017 -0700" }, "message": "MIPS: Implement read barriers.\n\nThis is the core functionality. Further improvements\nwill be done separately.\n\nThis also adds/moves memory barriers where they belong and\nremoves the UnsafeGetLongVolatile and UnsafePutLongVolatile\nMIPS32 intrinsics as they need to load/store a pair of\nregisters atomically, which is not supported directly by\nthe CPU.\n\nTest: booted MIPS32R2 in QEMU\nTest: test-art-target-run-test\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: \"testrunner.py --target --optimizing -j1\"\nTest: same MIPS64 boot/test with ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\nTest: \"testrunner.py --target --optimizing --32 -j2\" on CI20\nTest: same CI20 test with ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\n\nChange-Id: I0ff91525fefba3ec1cc019f50316478a888acced\n" }, { "commit": "e104d6e48fba004658f94a81ffd1211b6d2a5bff", "tree": "f3e1d464610c52c73647a2397053d16f7dcaab75", "parents": [ "bfb438a330e887b7e63e659a890098eb05420a10" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Mar 21 20:16:05 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Thu Mar 23 13:27:57 2017 -0700" }, "message": "MIPS64: Improve method entry/exit code\n\nImprovements:\n- the stack frame is (de)allocated in one step instead of two\n- the return address register, RA, is restored early for better\n instruction scheduling\n- eliminate unused delay slot\n\nTest: test-art-host-gtest\nTest: booted MIPS64 (with 2nd arch MIPS32R2) in QEMU\n\nChange-Id: I55172bd167ed1baced82bc1d542213b93b13c2ce\n" }, { "commit": "aa313b1dfadd8ea9d9830b4bd02f5917bca8534b", "tree": "7b8b3117091762d338cfd9f4b92b62cf7f341456", "parents": [ "f83f3f6ecb1153d96cc8007e8a0d1e35af4d3f38", "c9905a6f5908022d74b7a8f4f8fa9240743fdeaa" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Mar 16 11:51:30 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Mar 16 11:51:31 2017 +0000" }, "message": "Merge \"MIPS64: Inline polymorphic method calls.\"" }, { "commit": "c9905a6f5908022d74b7a8f4f8fa9240743fdeaa", "tree": "4882b5eeb7bc424e7fb26cb6ddc7ec4ad08b34ea", "parents": [ "8ae7a8f8bbe3677594a89836431e2cc31f267fb6" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Mon Mar 13 17:06:18 2017 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Tue Mar 14 09:48:16 2017 -0700" }, "message": "MIPS64: Inline polymorphic method calls.\n\nTest: 566-polymorphic-inlining\nTest: Boot MIPS64R6 QEMU\n\nChange-Id: I92ca53ebd173c0b3a5d5910678b78bc114502b93\n" }, { "commit": "ba89c34e94a82f0a6904dcc62caa6aa7bb14c12c", "tree": "a10992eabb2aade0c97e283038873a6c36d05132", "parents": [ "224f6ab7620ddbc20a338e56ccf9952d86b08b51" ], "author": { "name": "Tijana Jakovljevic", "email": "tijana.jakovljevic@imgtec.com", "time": "Fri Mar 10 13:36:08 2017 +0100" }, "committer": { "name": "Tijana Jakovljevic", "email": "tijana.jakovljevic@imgtec.com", "time": "Tue Mar 14 07:40:59 2017 +0100" }, "message": "MIPS64: Improve storing of constants in fields and array elements\n\nTest: booted MIPS64 in QEMU\nTest: mma test-art-target-run-test\nTest: mma test-art-host-gtest-assembler_mips64_test\n\nChange-Id: I8e0002166174eebea1309358eb9d96f34eee3225\n" }, { "commit": "68fdd5a22024f70a65159bcb8929296fc93b807d", "tree": "d0d5256fde2f91b61bde97d0632436cabb0b23db", "parents": [ "02a4d7ff633e67d0a5113f0fc742116dcdc5b7f6", "c52f3034b06c03632e937aff07d46c2bdcadfef5" ], "author": { "name": "Richard Uhler", "email": "ruhler@google.com", "time": "Thu Mar 09 08:33:03 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Mar 09 08:33:04 2017 +0000" }, "message": "Merge \"Remove --include-patch-information option from dex2oat.\"" }, { "commit": "f02253d12be42a5b980791265f0eb61d875396e3", "tree": "1f908e9a9523658bf2e244b90508852e1885a222", "parents": [ "d419beb312816edbf2186c12b15321d11c29996d", "66b69ad6d1a2ddd38bf533a3c887c5cdaf512634" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Mar 08 23:58:25 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Mar 08 23:58:25 2017 +0000" }, "message": "Merge \"MIPS: Optimize code generation of check-cast and instance-of.\"" }, { "commit": "c52f3034b06c03632e937aff07d46c2bdcadfef5", "tree": "031e4d1b2ca0961014e57e4987d80d7aa2c435b0", "parents": [ "ef81e988d0eb4db390e576aac346701b2d820916" ], "author": { "name": "Richard Uhler", "email": "ruhler@google.com", "time": "Thu Mar 02 13:45:45 2017 +0000" }, "committer": { "name": "Richard Uhler", "email": "ruhler@google.com", "time": "Wed Mar 08 10:55:17 2017 +0000" }, "message": "Remove --include-patch-information option from dex2oat.\n\nBecause we no longer support running patchoat on npic oat files, which\nmeans the included patch information is unused .\n\nBug: 33192586\nTest: m test-art-host\n\nChange-Id: I9e100c4e47dc24d91cd74226c84025e961d30f67\n" }, { "commit": "87425ed396e42bec87adc562fb4a623c0e451b53", "tree": "48f916fdfbf99f245ae7ad0cb31d51a880d4016d", "parents": [ "acd764a6f196a6704553d3db66fc3e2281879637" ], "author": { "name": "Tijana Jakovljevic", "email": "tijana.jakovljevic@imgtec.com", "time": "Tue Mar 07 09:43:31 2017 +0100" }, "committer": { "name": "Tijana Jakovljevic", "email": "tijana.jakovljevic@imgtec.com", "time": "Tue Mar 07 10:28:09 2017 +0100" }, "message": "MIPS64: Removal of unnecessary null check\n\nUnintentionally left in https://android-review.googlesource.com/#/c/321427/.\n\nTest: booted MIPS64 in QEMU\nChange-Id: Idf9c7301f1881ca4cd427a3ef4beffae6022f339\n" }, { "commit": "5743386b4d161f3884275c66b0783bd3cc3a8050", "tree": "6794f8047586e7bc02702cc560bca51d1ab5bcc3", "parents": [ "425b5d23e2c60d295471817a75b1b554481c5334" ], "author": { "name": "Tijana Jakovljevic", "email": "tijana.jakovljevic@imgtec.com", "time": "Tue Jan 17 16:59:03 2017 +0100" }, "committer": { "name": "Tijana Jakovljevic", "email": "tijana.jakovljevic@imgtec.com", "time": "Fri Mar 03 09:36:43 2017 +0100" }, "message": "MIPS64: Refactor implicit null checks in array/field get/set\n\nRationale: on MIPS64 64-bit loads and stores may be performed\nas pairs of 32-bit loads/stores. Implicit null checks must be\nassociated with the first 32-bit load/store in a pair and not\nthe last. This change ensures proper association of said checks\n(a few were done after the last 32-bit load/store in a pair)\nand lays ground for further improvements in array/field get/set.\n\nAdditionally ported to MIPS32.\n\nTest: mma test-art-target-run-test in QEMU\nTest: mma test-art-host-gtest\n\nChange-Id: If2612df62c21522959e69c637a36cc4ea962a32e\n" }, { "commit": "66b69ad6d1a2ddd38bf533a3c887c5cdaf512634", "tree": "d4462b96af0f0f2b28207dc6533a2b83e9b5e434", "parents": [ "fddc19338d9fdee24c4e10b758db1a6997004e2e" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Fri Feb 24 00:51:44 2017 -0800" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Mar 01 12:25:19 2017 -0800" }, "message": "MIPS: Optimize code generation of check-cast and instance-of.\n\nThis is in preparation for read barrier support.\n\nTest: test-art-host-gtest\nTest: booted MIPS32R2 in QEMU\nTest: test-art-target\nTest: booted MIPS64 (with 2nd arch MIPS32R2) in QEMU\nTest: test-art-target (MIPS64R6 only)\n\nNote: built with ART_HEAP_POISONING\u003dtrue.\n\nChange-Id: I072ad41944a5ef390c81458c0ba49a71684cb2a9\n" }, { "commit": "c061de1236e98fdd34d0214a9bbcc0e2149ff226", "tree": "31f6644cf080613d8493db8f510810a89cc6a718", "parents": [ "4c9c57054578022d9ab8442264fbc661769f97f5" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Feb 14 13:27:23 2017 -0800" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Feb 22 14:10:59 2017 -0800" }, "message": "MIPS: Implement heap poisoning in ART\u0027s Optimizing compiler.\n\nThis is in preparation for read barrier support.\n\nBug: 12687968\n\nTest: test-art-host-gtest\nTest: booted MIPS32R2 in QEMU\nTest: test-art-target\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target (both MIPS64R6 and MIPS32R6)\n\nNote: built with ART_HEAP_POISONING\u003dtrue.\n\nChange-Id: I0e6e04ff8de2fc8ca6126388409fa218e6920734\n" }, { "commit": "f94fa81e20d00929ef52707cd577353b95d40284", "tree": "cb79d0e0610775a41f0511b4cacfe87136bbba60", "parents": [ "806ac631e53f12061cb0ae7640aa9cd0dd79243d" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Fri Feb 10 17:48:52 2017 +0100" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Mon Feb 13 09:05:26 2017 +0000" }, "message": "String Compression for MIPS32 and MIPS64\n\nChanges on intrinsics and Code Generation on MIPS32 and MIPS64 for\nstring compression feature.\n\nTesting is done with STRING_COMPRESSION_ENABLED \u003d true (in libcore),\nmirror::kUseStringCompression \u003d true and STRING_COMPRESSION_FEATURE set\nto 1.\n\nTest: booted MIPS32 and MIPS64 in QEMU\nTest: mma test-art-target-run-test on CI20 (MIPS32R2)\nTest: mma test-art-target-run-test in QEMU (MIPS64R6)\n\nChange-Id: If50a6b6c0792bfa34d4fdff6bf2c7542211d2689\n" }, { "commit": "fe076a51b0498c2771341cc09a77db15b437328f", "tree": "6f6e0c250e2ecc450567f90a7792f51f8d6b3384", "parents": [ "8781fe65fe41d971173bb2d05afe0dc00b5c08ce", "83c8e27a292e6e002fb3b3def75cf6d8653378e8" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Feb 06 08:27:55 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Feb 06 08:27:56 2017 +0000" }, "message": "Merge \"Code refactoring around sharpening HLoadClass.\"" }, { "commit": "83c8e27a292e6e002fb3b3def75cf6d8653378e8", "tree": "f49ff5c239f318a0290a0d1e0a5b4d9a1ee1d2ba", "parents": [ "357dcb73934356239292c46d6fbedba734da5e00" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jan 31 14:36:37 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Feb 03 15:12:46 2017 +0000" }, "message": "Code refactoring around sharpening HLoadClass.\n\nEven if the class is not accessible through the dex cache, we\ncan access it by other means (eg boot class, jit table). So rewrite\nstatic field access instruction builder to not bail out if a class\ncannot be accessed through the dex cache.\n\nbug:34966607\n\ntest: test-art-host test-art-target\nChange-Id: I88e4e09951a002b480eb8f271726b56f981291bd\n" }, { "commit": "627c1a0e573b4512e68f097771d7fdd4d8c7f7de", "tree": "5e9590d470e32e205f862d694cebd95da5cf0a97", "parents": [ "318797a758f81e7f8a0b440129238b9b5eb1b74e" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Mon Jan 30 19:28:14 2017 -0800" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Feb 01 15:29:43 2017 -0800" }, "message": "MIPS: Support kJitTableAddress kinds of string/class loads.\n\nAlso remove a few stale comments.\n\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: \"make -j1 ART_TEST_DEFAULT_COMPILER\u003dfalse ART_TEST_OPTIMIZING\u003dfalse\n ART_TEST_INTERPRETER\u003dfalse ART_TEST_JIT\u003dtrue\n test-art-target-run-test\"\nTest: booted MIPS32R2 in QEMU\n\nChange-Id: I8914b8e6594e030f8137e7fface1ae20b6d6b971\n" }, { "commit": "6b892cd757db7e163b54c8a0ef5ba777b1a4772c", "tree": "b0e65b596158ef9207983305517ae66ab5f87b67", "parents": [ "e38436063fb4baf88152344b465eeeb1b7f6dce5" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Jan 03 17:11:38 2017 -0800" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Mon Jan 30 09:05:44 2017 -0800" }, "message": "MIPS32R6: Improve PC-relative string/class loads and invokes.\n\nUse PC-relative addressing on MIPS32R6 instead of\nHMipsDexCacheArraysBase and allow such PC-relative\naddressing in presence of irreducible loops.\n\nAlso save a couple of instructions when handling\nstring and class loads from bss.\n\nTest: test-art-host-gtest\nTest: booted MIPS32R2 in QEMU\nTest: \"make -j1 ART_TEST_DEFAULT_COMPILER\u003dfalse ART_TEST_OPTIMIZING\u003dtrue\n ART_TEST_INTERPRETER\u003dfalse ART_TEST_JIT\u003dfalse\n ART_TEST_PIC_TEST\u003dtrue test-art-target-run-test\"\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: \"make -j1 ART_TEST_DEFAULT_COMPILER\u003dfalse ART_TEST_OPTIMIZING\u003dtrue\n ART_TEST_INTERPRETER\u003dfalse ART_TEST_JIT\u003dfalse\n ART_TEST_PIC_TEST\u003dtrue test-art-target-run-test32\"\n\nChange-Id: I5d0fcbf271541294a3d4479987d52e2aaff084d9\n" }, { "commit": "a2f526f889be06f96ea59624c9dfb1223b3839f3", "tree": "769f517e6664de0e89abeadf07a39d5410fcee42", "parents": [ "64e50021845b1ad9d8851596e8aaddf18be217c2" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Thu Jan 19 14:48:48 2017 -0800" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Fri Jan 20 15:47:06 2017 -0800" }, "message": "Compressed native PC for stack maps\n\nCompress native PC based on instruction alignment. This reduces the\nsize of stack maps, boot.oat is 0.4% smaller for arm64.\n\nTest: test-art-host, test-art-target, N6P booting\n\nChange-Id: I2b70eecabda88b06fa80a85688fd992070d54278\n" }, { "commit": "e761bccf9f0d884cc4d4ec104568cef968296492", "tree": "05a2d20d61c0e91270df2747f0c242433b5ce62b", "parents": [ "b0355130e38034db6b904783a00f74a3524e1881" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 19 08:59:37 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 19 09:32:17 2017 +0000" }, "message": "Revert \"Revert \"Load the array class in the compiler for allocations.\"\"\n\nThis reverts commit fee255039e30c1c3dfc70c426c3d176221c3cdf9.\n\nChange-Id: I02b45f9a659d872feeb35df40b42c1be9878413a\n" }, { "commit": "fee255039e30c1c3dfc70c426c3d176221c3cdf9", "tree": "8207b72cc76513fed9f7b3c01aaa32cd54a87f1c", "parents": [ "cc99df230feb46ba717252f002d0cc2da6828421" ], "author": { "name": "Hiroshi Yamauchi", "email": "yamauchi@google.com", "time": "Thu Jan 19 02:11:15 2017 +0000" }, "committer": { "name": "Hiroshi Yamauchi", "email": "yamauchi@google.com", "time": "Thu Jan 19 02:11:15 2017 +0000" }, "message": "Revert \"Load the array class in the compiler for allocations.\"\n\nlibcore test fails.\n\nThis reverts commit cc99df230feb46ba717252f002d0cc2da6828421.\n\nChange-Id: I5bac595acd2b240886062e8c1f11f9095ff6a9ed\n" }, { "commit": "cc99df230feb46ba717252f002d0cc2da6828421", "tree": "73ac045673e150fa367a8da4d46874f28e928491", "parents": [ "4507fdcb70bd570d5f3968061bf991f0a1233a93" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jan 17 23:00:24 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jan 18 15:16:32 2017 +0000" }, "message": "Load the array class in the compiler for allocations.\n\nRemoving one other dependency for needing to pass\nthe current method, and having dex_cache_resolved_types_\nin ArtMethod.\n\noat file increase:\n- x64: 0.25%\n- arm32: 0.30%\n- x86: 0.28%\n\ntest: test-art-host, test-art-target\nChange-Id: Ibca4fa00d3e31954db2ccb1f65a584b8c67cb230\n" }, { "commit": "dcc7ab628c9d59bfab203ab752ff7e11bfd60181", "tree": "b37f3f978c06d4205145eab948d51f86560f64b0", "parents": [ "9748d3d2094c1d3c443a350cf12b9d77b4c4d1e3", "5247c08fb186a5a2ac02226827cf6b994f41a681" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jan 17 10:25:57 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jan 17 10:25:57 2017 +0000" }, "message": "Merge \"Put the resolved class in HLoadClass.\"" }, { "commit": "e037a736be43c1e8ba9340dcbf1d17722356a37b", "tree": "f0bc7b4a78d04376b042046afbfd0677d766b523", "parents": [ "db54cc42859a8cc24ed1cda7f9b2f64b27dcb34a", "5d37c152f21a0807459c6f53bc25e2d84f56d259" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jan 17 09:16:31 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jan 17 09:16:31 2017 +0000" }, "message": "Merge \"Put inlined ArtMethod pointer in stack maps.\"" }, { "commit": "5247c08fb186a5a2ac02226827cf6b994f41a681", "tree": "8b1305f9fb918024302382b8e8aa43962098e9fa", "parents": [ "0d478f289f0e33f19693d135f1d562b57427ed32" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jan 13 14:17:29 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 16 23:42:09 2017 +0000" }, "message": "Put the resolved class in HLoadClass.\n\nTo avoid repeated lookups in sharpening/rtp/inlining.\n\nTest: test-art-host test-art-target\nChange-Id: I08d0da36a4bb061cdaa490ea2af3a3217a875bbe\n" }, { "commit": "5d37c152f21a0807459c6f53bc25e2d84f56d259", "tree": "7d8cbce0a55f258150a047def70244f79afc866d", "parents": [ "aa89a4c6fca095904521842c018399f1e3501a45" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 12 13:25:19 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 16 22:56:56 2017 +0000" }, "message": "Put inlined ArtMethod pointer in stack maps.\n\nCurrently done for JIT. Can be extended for AOT and inlined boot\nimage methods.\n\nAlso refactor the lookup of a inlined method at runtime to not\nrely on the dex cache, but look at the class loader tables.\n\nbug: 30933338\ntest: test-art-host, test-art-target\nChange-Id: I58bd4d763b82ab8ca3023742835ac388671d1794\n" }, { "commit": "1998cd02603197f2acdc0734397a6d48b2f59b80", "tree": "aa639c7ec96f71d7aaf5d0c865a8a133dbc457c3", "parents": [ "6bec91c7d4670905cd67440991ec76fd54d0f000" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jan 13 13:02:58 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jan 16 13:39:24 2017 +0000" }, "message": "Implement HLoadClass/kBssEntry for boot image.\n\nTest: m test-art-host\nTest: m test-art-host with CC\nTest: m test-art-target on Nexus 9\nTest: Nexus 9 boots.\nTest: Build aosp_mips64-eng\nBug: 30627598\nChange-Id: I168f24dedd5fb54a1e4215ecafb947ffb0dc3280\n" }, { "commit": "6bec91c7d4670905cd67440991ec76fd54d0f000", "tree": "05f4ba288e629270773c65b34b71be7bae5e92ff", "parents": [ "4155998a2f5c7a252a6611e3926943e931ea280a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jan 09 15:03:12 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jan 16 12:09:53 2017 +0000" }, "message": "Store resolved types for AOT code in .bss.\n\nTest: m test-art-host\nTest: m test-art-target on Nexus 9.\nTest: Nexus 9 boots.\nTest: Build aosp_mips64-eng.\nBug: 30627598\nBug: 34193123\nChange-Id: I8ec60a98eb488cb46ae3ea56341f5709dad4f623\n" }, { "commit": "4155998a2f5c7a252a6611e3926943e931ea280a", "tree": "3495370417d54a9bf7d0acedeefe89bd511062e0", "parents": [ "48886c2ee655a16224870fee52dc8721a52babcf" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jan 06 14:04:23 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jan 16 12:09:53 2017 +0000" }, "message": "Make runtime call on main for HLoadClass/kDexCacheViaMethod.\n\nRemove dependency of the compiled code on types dex cache\narray in preparation for changing to a hash-based array.\n\nTest: m test-art-host\nTest: m test-art-target on Nexus 9\nBug: 30627598\nChange-Id: I3c426ed762c12eb9eb4bb61ea9a23a0659abf0a2\n" }, { "commit": "48886c2ee655a16224870fee52dc8721a52babcf", "tree": "debc8b7d9c99a83e2c056c47a8e0718be00c12c3", "parents": [ "58207cfd229d9f0b39fc634cff489dac83e1c010" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jan 06 11:45:47 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jan 16 12:09:53 2017 +0000" }, "message": "Remove HLoadClass::LoadKind::kDexCachePcRelative.\n\nTest: m test-art-host\nTest: m test-art-target-run-test-552-checker-sharpening\nBug: 30627598\nChange-Id: Ic809b0f3a8ed0bd4dc7ab67aa64866f9cdff9bdb\n" }, { "commit": "ac141397dc29189ad2b2df41f8d4312246beec60", "tree": "a2f481463a14695bf9327fd2f549878ecf30c77b", "parents": [ "5c9f90c5ecf2ff6f93ada0f7b18b46d866c59ea1" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Fri Jan 13 11:53:47 2017 +0000" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Sun Jan 15 15:18:07 2017 +0000" }, "message": "Revert \"Revert \"ART: Compiler support for invoke-polymorphic.\"\"\n\nThis reverts commit 0fb5af1c8287b1ec85c55c306a1c43820c38a337.\n\nThis takes us back to the original change and attempts to fix the\nissues encountered:\n\n- Adds transition record push/pop around artInvokePolymorphic.\n- Changes X86/X64 relocations for MacSDK.\n- Implements MIPS entrypoint for art_quick_invoke_polymorphic.\n- Corrects size of returned reference in art_quick_invoke_polymorphic\n on ARM.\n\nBug: 30550796,33191393\nTest: art/test/run-test 953\nTest: m test-art-run-test\n\nChange-Id: Ib6b93e00b37b9d4ab743a3470ab3d77fe857cda8\n" }, { "commit": "0d3998b5ff619364acf47bec0b541e7a49bd6fe7", "tree": "a4763c0660372f6311b612c09267cbbc2fe71e89", "parents": [ "aa89a4c6fca095904521842c018399f1e3501a45" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 12 15:35:12 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 12 16:51:12 2017 +0000" }, "message": "Revert \"Revert \"Make object allocation entrypoints only take a class.\"\"\n\nThis reverts commit f7aaacd97881c6924b8212c7f8fe4a4c8721ef53.\n\nChange-Id: I6756cd1e6110bb45231f62f5e388f16c044cb145\n" }, { "commit": "c8144cdad955b77988a48777cfbdc6fd2e8c1916", "tree": "354e00610ec25279a8c4b77e8b685e380815813f", "parents": [ "d1a277954284c4dd4b5b14fd4e58f1854daed848", "f7aaacd97881c6924b8212c7f8fe4a4c8721ef53" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Jan 12 06:19:22 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jan 12 06:19:23 2017 +0000" }, "message": "Merge \"Revert \"Make object allocation entrypoints only take a class.\"\"" }, { "commit": "f7aaacd97881c6924b8212c7f8fe4a4c8721ef53", "tree": "780209ac8e992fa63307062977f672aa5bb55d9e", "parents": [ "2b615ba29c4dfcf54aaf44955f2eac60f5080b2e" ], "author": { "name": "Hiroshi Yamauchi", "email": "yamauchi@google.com", "time": "Thu Jan 12 02:58:38 2017 +0000" }, "committer": { "name": "Hiroshi Yamauchi", "email": "yamauchi@google.com", "time": "Thu Jan 12 02:58:38 2017 +0000" }, "message": "Revert \"Make object allocation entrypoints only take a class.\"\n\n960-default-smali64 is failing.\n\nThis reverts commit 2b615ba29c4dfcf54aaf44955f2eac60f5080b2e.\n\nChange-Id: Iebb8ee5a917fa84c5f01660ce432798524d078ef\n" }, { "commit": "dcf52765ab5886abdd85a4436fa0358b2a31341d", "tree": "b68ee975792a5bf488ed93cfbe09a37f80008288", "parents": [ "a28ddf5140cd1f4a2ae93dbf8be2f200b1552003", "0fb5af1c8287b1ec85c55c306a1c43820c38a337" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Wed Jan 11 19:18:51 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jan 11 19:18:51 2017 +0000" }, "message": "Merge \"Revert \"ART: Compiler support for invoke-polymorphic.\"\"" }, { "commit": "0fb5af1c8287b1ec85c55c306a1c43820c38a337", "tree": "66239e7f745fae54e1630e91fb44a859bff615d6", "parents": [ "02e3092f8d98f339588e48691db77f227b48ac1e" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Wed Jan 11 18:58:15 2017 +0000" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Wed Jan 11 19:17:33 2017 +0000" }, "message": "Revert \"ART: Compiler support for invoke-polymorphic.\"\n\nThis reverts commit 02e3092f8d98f339588e48691db77f227b48ac1e.\n\nReasons for revert:\n\n- Breaks MIPS/MIPS64 build.\n- Fails under GCStress test on x64.\n- Different x64 build configuration doesn\u0027t like relocation.\n\nChange-Id: I512555b38165d05f8a07e8aed528f00302061001\n" }, { "commit": "79f9928fc9e0a88430f3329069bfb2f9a0d37f0c", "tree": "e3142e4829c808c3df1059f3b05c0b3a37193ce9", "parents": [ "716eb25353390f699778a79d69006a5b8d8289c2", "02e3092f8d98f339588e48691db77f227b48ac1e" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Jan 11 18:08:03 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jan 11 18:08:04 2017 +0000" }, "message": "Merge \"ART: Compiler support for invoke-polymorphic.\"" }, { "commit": "02e3092f8d98f339588e48691db77f227b48ac1e", "tree": "127dd23346206b0547b7c6453a776253252b3c6e", "parents": [ "bc7d0deda4549f314e68ee3e0e6afd68c4a8fd06" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Thu Dec 01 10:33:51 2016 +0000" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Wed Jan 11 16:26:43 2017 +0000" }, "message": "ART: Compiler support for invoke-polymorphic.\n\nAdds basic support to invoke method handles in compiled code.\n\nEnables method verification for methods containing invoke-polymorphic.\n\nAdds k45cc/k45rc output to Instruction::DumpString() which\nwas found to be missing when enabling verification.\n\nInclude stack traces in test 957-methodhandle-transforms for\nfailures so they can be easily identified.\n\nBug: 30550796,33191393\nTest: art/test/run-test 953\nTest: m test-art-run-test\nChange-Id: Ic9a96ea24906087597d96ad8159a5bc349d06950\n" }, { "commit": "db47a144d816e0976c5b4c00461b80b07ce97c60", "tree": "628ffda55e75f18889161b684ac2b4e578d562b7", "parents": [ "f62455a422baf040d901db964bdd3c6e18185c13", "f0acfe7a812a332122011832074142718c278dae" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jan 11 14:05:08 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jan 11 14:05:09 2017 +0000" }, "message": "Merge \"Keep resolved String in HLoadString.\"" }, { "commit": "2b615ba29c4dfcf54aaf44955f2eac60f5080b2e", "tree": "0a2fe5f9243645a054d4aa094bff5a69cc1abb88", "parents": [ "c9a060f2688599d4a402ee6234db46c2e9b7463f" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jan 06 14:40:07 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jan 11 10:34:10 2017 +0000" }, "message": "Make object allocation entrypoints only take a class.\n\nChange motivated by:\n- Dex cache compression: having the allocation fast path do a\n dex cache lookup will be too expensive. So instead, rely on the\n compiler having direct access to the class (either through BSS for\n AOT, or JIT tables for JIT).\n- Inlining: the entrypoints relied on the caller of the allocation to\n have the same dex cache as the outer method (stored at the bottom of\n the stack). This meant we could not inline methods from a different\n dex file that do allocations. By avoiding the dex cache lookup in\n the entrypoint, we can now remove this restriction.\n\nCode expansion on average for Docs/Gms/FB/Framework (go/lem numbers):\n- Around 0.8% on arm64\n- Around 1% for x64, arm\n- Around 1.5% on x86\n\nTest: test-art-host, test-art-target, ART_USE_READ_BARRIER\u003dtrue/false\nTest: test-art-host, test-art-target, ART_DEFAULT_GC_TYPE\u003dSS ART_USE_TLAB\u003dtrue\n\nChange-Id: I41f3748bb4d251996aaf6a90fae4c50176f9295f\n" }, { "commit": "f0acfe7a812a332122011832074142718c278dae", "tree": "49c4fc481cebd03323aaf0109066859165508303", "parents": [ "91db41f315f6c2366b7098c531224bee01170364" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 09 20:54:52 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jan 10 21:26:23 2017 +0000" }, "message": "Keep resolved String in HLoadString.\n\nFor the following reasons:\n- Avoids needing to do a lookup again in CodeGenerator::EmitJitRoots.\n- Fixes races where we the string was GC\u0027ed before CodeGenerator::EmitJitRoots.\n- Makes it possible to do GVN on the same string but defined in different\n dex files.\n\nTest: test-art-host, test-art-target\nChange-Id: If2b5d3079f7555427b1b96ab04546b3373fcf921\n" }, { "commit": "f67dadb5550ee2bd9db0b7b0b75d8c44ddf170d2", "tree": "44f61f9bd0a674cae29c42e6dff72d4ff14189d0", "parents": [ "cda4b75615f5f11c101ff846a05affda405b101b", "0960ac5a5a255bb3e8418e185914243aeef54a7c" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Jan 05 17:37:56 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jan 05 17:37:57 2017 +0000" }, "message": "Merge \"MIPS64: Implement table-based packed switch\"" }, { "commit": "6fc063cd8a399ffd70e0f077f58f1d65a15e9136", "tree": "a85f2c149956e1ddb90bc32950f5553cc0e0456a", "parents": [ "4ca40e89aa514a4424b9ee177719b3b212d174d9", "992bdb951a1632ab6b864e403f011c4cef40763b" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Jan 04 11:47:50 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jan 04 11:47:51 2017 +0000" }, "message": "Merge \"MIPS64: Drop redundant sign-extensions in integer conversions\"" }, { "commit": "7ee9ee9921683fd95c409f596bf981f055bbbe6f", "tree": "c0fe13bfc20cc76d6f9d45e8d852cbed68341edc", "parents": [ "059802455e80a92a0fac780246968588bb0cf88b", "db3deee6da91fb2407e56b3684b2787a1bb59753" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Jan 04 11:30:15 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jan 04 11:30:15 2017 +0000" }, "message": "Merge \"MIPS64: Improve integer comparison with constants\"" }, { "commit": "4375819125bce2132cde663ba5024e33d7bd2681", "tree": "3457bce20da8c048d988c16e92ad54d4d09c50d1", "parents": [ "6a14c622700e088173ba909799c1e1785aeb4b34" ], "author": { "name": "Tijana Jakovljevic", "email": "tijana.jakovljevic@imgtec.com", "time": "Fri Dec 30 09:23:01 2016 +0100" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Fri Dec 30 09:53:12 2016 +0100" }, "message": "MIPS64: Implement branchless HCondition for floats\n\nTest: mma test-art-target-run-test64 in QEMU\n\nChange-Id: I595b5b7ddf9ebb19e872ed85f2e4098a835d9214\n" }, { "commit": "992bdb951a1632ab6b864e403f011c4cef40763b", "tree": "6a589b3b8b508e81832a8b1c00a2ffecf49b6d47", "parents": [ "6a14c622700e088173ba909799c1e1785aeb4b34" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Wed Dec 28 16:21:48 2016 +0100" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Wed Dec 28 16:23:30 2016 +0100" }, "message": "MIPS64: Drop redundant sign-extensions in integer conversions\n\nTest: mma test-art-target-run-test64 in QEMU\n\nChange-Id: I1dc7923d89528964771ddca288c5016d729cfb05\n" }, { "commit": "db3deee6da91fb2407e56b3684b2787a1bb59753", "tree": "1a2faaf22b7bc253361af8adb67f305a30b3ef33", "parents": [ "6a14c622700e088173ba909799c1e1785aeb4b34" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Wed Dec 28 14:33:21 2016 +0100" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Wed Dec 28 14:34:38 2016 +0100" }, "message": "MIPS64: Improve integer comparison with constants\n\nTest: mma test-art-target-run-test64 in QEMU\n\nChange-Id: Ib29855a3e268e0333602f47185c520c6cfb16b59\n" }, { "commit": "0960ac5a5a255bb3e8418e185914243aeef54a7c", "tree": "7163af0759328285dce0e3a5af13bd5b0cc042c0", "parents": [ "07001c8540718117b91e8137804fa94d35cbb37a" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Dec 20 17:24:59 2016 -0800" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Dec 21 16:01:49 2016 -0800" }, "message": "MIPS64: Implement table-based packed switch\n\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-run-test-optimizing (MIPS64R6) in QEMU\nTest: test-art-host-gtest\n\nChange-Id: I333dca43fca57ae7e6021bb84585487c889417c3\n" }, { "commit": "c1a42cf3873be202c8c0ca3c4e67500b470ab075", "tree": "f2bffbd14e1f9d5429dd8514d19be4fa6dfa392f", "parents": [ "06ce6d4359ed897f1d1b39be4e748f0c4f3ca2ff" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Sun Dec 18 15:52:36 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 20 13:29:45 2016 +0000" }, "message": "Remove soon to be obsolete call kinds for direct calls.\n\nAnd remove CompilerDriver::GetCodeAndMethodForDirectCall in\npreparation of removing non-PIC prebuild and non-PIC on-device\nboot image compilation.\n\nTest: test-art-host test-art-target\nbug:33192586\nChange-Id: Ic48e3e8b9d7605dd0e66f31d458a182198ba9578\n" }, { "commit": "f63f569eeefe3907c48a175494a2a0ba351b641a", "tree": "c2ba1621cbcd77571378b8261ec6d47c754953aa", "parents": [ "2c43590dc2bb7fb4a3a015b1b65543bb8705ffe8" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Dec 13 17:43:11 2016 -0800" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Mon Dec 19 14:47:16 2016 -0800" }, "message": "MIPS64: Improve string and class loads.\n\nThis adds most kinds of string/class loads.\nJIT string/class loads are TBD separately.\n\nThis also fixes Mips64Assembler::LoadLabelAddress()\n(adding a constant to a 64-bit address must be done\nusing daddiu, not addiu).\n\nTest: test-art-host-gtest\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: \"make -j1 ART_TEST_DEFAULT_COMPILER\u003dfalse ART_TEST_OPTIMIZING\u003dtrue\n ART_TEST_INTERPRETER\u003dfalse ART_TEST_JIT\u003dfalse\n ART_TEST_PIC_TEST\u003dtrue test-art-target-run-test64\"\n\nChange-Id: I1f94ece4cd202382c11167e1ed958e9d08d92822\n" }, { "commit": "3f92bdea524fb1f1c70dab07bba082b4b1ac4699", "tree": "8277b2bea114d7241c36f94afec52200fe7d20fd", "parents": [ "b70b66e70137f7a61f8d605acf04e75ad56910f2", "c641842008b449890d2a63ed34a240ed7c7aa75d" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Dec 14 12:00:51 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Dec 14 12:00:52 2016 +0000" }, "message": "Merge \"Implement VisitShouldDeoptimizeFlag for MIPS/MIPS64\"" }, { "commit": "c641842008b449890d2a63ed34a240ed7c7aa75d", "tree": "66c0e16eead7ea0c64029c205aea56c724bb5dc1", "parents": [ "a248587487ad23eaccd6a5877d97c7735120118e" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Mon Dec 05 16:31:55 2016 +0100" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Wed Dec 14 10:22:48 2016 +0100" }, "message": "Implement VisitShouldDeoptimizeFlag for MIPS/MIPS64\n\nThis is follow-up change for I18bf716a601b6413b46312e925a6ad9e4008efa4.\n\nTest: mma ART_TEST_JIT\u003dtrue test-art-target-run-test-jit on CI20 and QEMU\n\nChange-Id: I750814ae740a4549f1a2af11be7ae4318ae26a2f\n" }, { "commit": "19f6c696bbb7a17d8ac521b316c40f9cbef32151", "tree": "6ce87f3ba9f224efc0036d3ab99e4272c48eeddb", "parents": [ "aea9ffece7eb32f3884a4ad0553e1df4d90fd9e4" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Nov 30 19:19:55 2016 -0800" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Dec 13 14:07:16 2016 -0800" }, "message": "MIPS64: Improve method invocation.\n\nImprovements include:\n- support for all kinds of method loads and static/direct calls\n- 32-bit and 64-bit literals for the above and future work\n- shorter instruction sequences for recursive static/direct calls\nAlso:\n- include the MIPS64 dinsu instruction (missed earlier) and minor\n clean-up in the disassembler\n- properly prefix constant names with \u0027k\u0027 in relative patcher tests\n\nTest: test-art-host-gtest\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: \"make -j1 ART_TEST_DEFAULT_COMPILER\u003dfalse ART_TEST_OPTIMIZING\u003dtrue\n ART_TEST_INTERPRETER\u003dfalse ART_TEST_JIT\u003dfalse\n ART_TEST_PIC_TEST\u003dtrue test-art-target-run-test64\"\n\nChange-Id: I19876fa5316b68531af7dfddfce90d2068433116\n" }, { "commit": "063fc772b5b8aed7d769cd7cccb6ddc7619326ee", "tree": "bc165781989087a998721991504e589a7d5b0926", "parents": [ "48d08a4233ee4450b0d5073d41445f9dd1f17191" ], "author": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Tue Aug 02 11:02:54 2016 -0700" }, "committer": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Thu Dec 01 11:15:47 2016 -0800" }, "message": "Class Hierarchy Analysis (CHA)\n\nThe class linker now tracks whether a method has a single implementation\nand if so, the JIT compiler will try to devirtualize a virtual call for\nthe method into a direct call. If the single-implementation assumption\nis violated due to additional class linking, compiled code that makes the\nassumption is invalidated. Deoptimization is triggered for compiled code\nlive on stack. Instead of patching return pc\u0027s on stack, a CHA guard is\nadded which checks a hidden should_deoptimize flag for deoptimization.\nThis approach limits the number of deoptimization points.\n\nThis CL does not devirtualize abstract/interface method invocation.\n\nSlides on CHA:\nhttps://docs.google.com/a/google.com/presentation/d/1Ax6cabP1vM44aLOaJU3B26n5fTE9w5YU-1CRevIDsBc/edit?usp\u003dsharing\n\nChange-Id: I18bf716a601b6413b46312e925a6ad9e4008efa4\nTest: ART_TEST_JIT\u003dtrue m test-art-host/target-run-test test-art-host-gtest\n" }, { "commit": "8a0128a5ca0784f6d2b4ca27907e8967a74bc4c5", "tree": "0dec75200282ae5e49785395e97bd4e6459f1c09", "parents": [ "60438b46090d22bb9b978196f5aa53fab3b89759" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Nov 28 07:38:35 2016 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Nov 29 11:11:46 2016 -0800" }, "message": "ART: Add dex::StringIndex\n\nAdd abstraction for uint32_t string index.\n\nTest: m test-art-host\nChange-Id: I917c2881702fe3df112c713f06980f2278ced7ed\n" }, { "commit": "a5b09a67034e57a6e10231dd4bd92f4cb50b824c", "tree": "304be738f4fa528b7ad2676103eecc84c79eaeeb", "parents": [ "dac7ad17c78387d15d7aefae0f852dddf5f37e34" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Nov 17 15:21:22 2016 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Nov 21 10:57:00 2016 -0800" }, "message": "ART: Add dex::TypeIndex\n\nAdd abstraction for uint16_t type index.\n\nTest: m test-art-host\nChange-Id: I47708741c7c579cbbe59ab723c1e31c5fe71f83a\n" }, { "commit": "9fd8c60cdff7b28a89bb97fd90ae9d0f37cf8f8b", "tree": "630b6f23441a26e4b5d9434900993a710635c9e9", "parents": [ "26c8f54be31ccf99540906746b17fc8bba1bab9a" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Nov 14 14:38:53 2016 -0800" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Tue Nov 15 13:02:24 2016 -0800" }, "message": "Pass object instead of class to instanceof entrypoint\n\nReduces code size. Also avoid read barrier for kArrayCheck case.\n\nBug: 32577579\n\nTest: test-art-host, test-art-target CC\n\nChange-Id: Ia890f656fe166b2d39c522b63a8a6469404134ae\n" }, { "commit": "b99f4d6463e7cb5654af3893ed7b3113665df658", "tree": "1bacc6a2bd01426c921e2f83f39bb63f9d9d8048", "parents": [ "67381d6298edf18760b0c9b3d16572dc3894e551" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Nov 07 16:17:26 2016 -0800" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Tue Nov 08 12:46:59 2016 -0800" }, "message": "Change check cast entrypoint to check instance of\n\nReduces code size since we do not need to reload class before\ncalling slow path.\n\nTODO: Delete read barriers in the check cast code since the slow\npath will retry with the proper read barriers if the check fails.\n\nBug: 12687968\nBug: 29516974\n\nTest: test-art-host + test-art-target with CC\n\nChange-Id: Ia4eb9bbe3fe2d2016e44523cf0451210828d7b88\n" }, { "commit": "96eeb4e2bb21afe8783d62e06b91fd1aef682dbb", "tree": "097907f294206c45a03c4b63bf986b9e144116af", "parents": [ "e2ced0db78b89b778cd1c9ef4ace5dec7dbc66b0" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 12 22:03:31 2016 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 12 22:27:38 2016 +0100" }, "message": "Update HInstruction::NeedsCurrentMethod.\n\nHLoadString and HLoadClass when sharpened may not need it\nanymore. Instead just rely on the HCurrentMethod being the\nSSA dependency of those instructions.\n\nAlso save storing the current method in the stack if the\ngraph actually doesn\u0027t need it.\n\ntest: m test-art-host test-art-target\nChange-Id: I235d8275230637cbbd38fc0d2f9b822f6d2a9c1e\n" }, { "commit": "da079bba8403733cac9bb7415b038ffd77e62403", "tree": "3bfed6ea39483bda20c0059763c30aee2e6e5791", "parents": [ "a1d66b9050aeecd7e698c51155f0dbc0198a6822" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 26 17:56:07 2016 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Sep 27 10:30:34 2016 +0100" }, "message": "Cleanup String.\u003cinit\u003e handling.\n\nMove everything to one place (currently well_known_classes.cc, but\nno strong preference) and define a macro to easily handle the list\nof affected methods.\n\ntest: m test-art-host\ntest: m test-art-target\nChange-Id: Ib8372d130d5458516a1f1ae31014afc76037fc34\n" }, { "commit": "5e4e11e171f90d9a3ea178fc8e72aac909de55d5", "tree": "53314d1139ac797d55258f39097ecfb5cef45920", "parents": [ "ca8bad9136d1389deeebc8652fb17063388de6b2" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 22 13:17:41 2016 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Sep 23 09:08:00 2016 +0100" }, "message": "Clean-up sharpening and compiler driver.\n\nRemove dependency on compiler driver for sharpening\nand dex2dex (the methods called on the compiler driver were\ndoing unnecessary work), and remove the now unused methods\nin compiler driver.\n\nAlso remove test that is now invalid, as sharpening always\nsucceeds.\n\ntest: m test-art-host m test-art-target\nChange-Id: I54e91c6839bd5b0b86182f2f43ba5d2c112ef908\n" }, { "commit": "804b03ffb9b9dc6cc3153e004c2cd38667508b13", "tree": "91c7fd54b5000e041bf9d3d5b233dabce1fad614", "parents": [ "80eb0bc2757274816a014a2997848d288c9ee553" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Sep 14 16:26:36 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 20 14:55:44 2016 +0100" }, "message": "Change remaining slow path throw entrypoints to save everything.\n\nChange DivZeroCheck, BoundsCheck and explicit NullCheck\nslow path entrypoints to conform to kSaveEverything.\n\nOn Nexus 9, AOSP ToT, the boot.oat size reduction is\n prebuilt multi-part boot image:\n - 32-bit boot.oat: -12KiB (-0.04%)\n - 64-bit boot.oat: -24KiB (-0.06%)\n on-device built single boot image:\n - 32-bit boot.oat: -8KiB (-0.03%)\n - 64-bit boot.oat: -16KiB (-0.04%)\n\nTest: Run ART test suite including gcstress on host and Nexus 9.\nTest: Manually disable implicit null checks and test as above.\nChange-Id: If82a8082ea9ae571c5d03b5e545e67fcefafb163\n" }, { "commit": "91a6516103b8bf8bb75c3a2840cbdec7521e74a7", "tree": "d93043f578bfa5b8d76e8c175e6441b378c4a7b2", "parents": [ "6a4abc633fa8580b06056ec6f80ced8ce7511277" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Mon Sep 19 13:54:30 2016 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Mon Sep 19 13:54:30 2016 +0100" }, "message": "Remove the `CanTriggerGC` side-effects on a few instructions.\n\nThe side-effect was specified for these instructions as they call\nruntime. We now have a list of entrypoints that we know cannot trigger\nGC. We can avoid requiring the side-effect for those.\n\nTest: Run ART test suite on Nexus 5X and host.\n\nChange-Id: I0e0e6a4d701ce6c75aff486cb0d1bc7fe2e8dda4\n" }, { "commit": "3b7537bfc5a6b7ccb18b3970d8edf14b72464af7", "tree": "49996e22e36a64ea862e7b173e9626d862a4d595", "parents": [ "c11d1b42828475ea1e7319fc3eb9402edc5b1c13" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 13 11:56:01 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Sep 14 10:42:08 2016 +0100" }, "message": "Revert \"Revert \"Use implicit null checks inside try blocks.\"\"\n\nFix implicit checks in try blocks to emit stack maps.\nFix arm64 null expection from signal entrypoint to call\nthe runtime handler instead or simply jumping there.\n\nOn Nexus 9, AOSP ToT, the boot.oat size reduction is\n prebuilt multi-part boot image:\n - 32-bit boot.oat: -448KiB (-1.3%)\n - 64-bit boot.oat: -528KiB (-1.2%)\n on-device built single boot image:\n - 32-bit boot.oat: -448KiB (-1.4%)\n - 64-bit boot.oat: -528KiB (-1.3%)\nNote that the oat files no longer contain dex files which\nhave been moved to vdex, so the percentages are not directly\ncomparable with the those reported in the original commit.\n\nTest: Run ART test suite including gc-stress on host and Nexus 9.\nBug: 30212852\nBug: 31468464\n\nThis reverts commit 0719b5b9b458cb3eb9f0823f0dacdfe1a71214dd.\n\nChange-Id: If8a9da8c11adf2aad203e93b6684ce16ed776285\n" }, { "commit": "0719b5b9b458cb3eb9f0823f0dacdfe1a71214dd", "tree": "cf0844758239b6ec41fa070e4fb4b4fbcbb9e506", "parents": [ "7aa7560683626c7893011271c241b3265ded1dc3" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 12 22:05:33 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 12 22:05:33 2016 +0000" }, "message": "Revert \"Use implicit null checks inside try blocks.\"\n\nFails gcstress tests.\n\nThis reverts commit 7aa7560683626c7893011271c241b3265ded1dc3.\n\nChange-Id: I4f5c89048b9ffddbafa02f3001e329ff87058ca2\n" }, { "commit": "7aa7560683626c7893011271c241b3265ded1dc3", "tree": "8c9839456149d2320995764ebab5d227a6dea8e7", "parents": [ "ae6ba1fd36ef6cd6520354fa874cf9cc2fc5877b" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Sep 07 15:09:21 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 12 14:52:17 2016 +0100" }, "message": "Use implicit null checks inside try blocks.\n\nMake implicit null check entrypoint save all registers, use\nplatform-specific approach to still pass the fault address.\nAllow implicit null checks in try blocks.\n\nOn Nexus 9, AOSP ToT, the boot.oat size reduction is\n prebuilt multi-part boot image:\n - 32-bit boot.oat: -452KiB (-0.7%)\n - 64-bit boot.oat: -482KiB (-0.7%)\n on-device built single boot image:\n - 32-bit boot.oat: -444KiB (-0.7%)\n - 64-bit boot.oat: -488KiB (-0.7%)\n\nTest: Run ART test suite on host and Nexus 9.\nTest: Build aosp_mips64-eng.\nChange-Id: I279f3ab57e2e2f338131c5cac45c51b673bdca19\n" }, { "commit": "239d6eaff0cbb5c4c0139f7053a012758799f186", "tree": "8de26b30a2dfd94f849a38c8901437facbbc53b3", "parents": [ "9d185da3bef8caf015d3dbf4ad79c520af7ce3b1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 05 10:44:04 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 06 17:37:41 2016 +0100" }, "message": "Change deoptimize entrypoint to save everything.\n\nAnd implement FPU register retrieval from stack on x86.\n\nOn Nexus 9, AOSP ToT, the boot.oat size reduction is\n prebuilt multi-part boot image:\n - 32-bit boot.oat: -20KiB (-0.03%)\n - 64-bit boot.oat: -45KiB (-0.06%)\n on-device built single boot image:\n - 32-bit boot.oat: -24KiB (-0.04%)\n - 64-bit boot.oat: -36KiB (-0.05%)\n\nTest: Run ART test suite on host and Nexus 9.\nBug: 30212852\nChange-Id: I5d98e2a24363136d73dfec6100ab02f8eb101911\n" }, { "commit": "86dc59ebe25cfe36d4edb39c2b7b2653f079448b", "tree": "446d80551ab72701914ed08ac18fcaeffd6555b1", "parents": [ "b0f443217306b8a307f73d35cb27c1cac2e1c360", "70e97462116a47ef2e582ea29a037847debcc029" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon Sep 05 18:12:13 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Sep 05 18:12:13 2016 +0000" }, "message": "Merge \"Avoid excessive spill slots for slow paths.\"" }, { "commit": "70e97462116a47ef2e582ea29a037847debcc029", "tree": "ee587e35b9b9483c35875ccc8ddea139978ca823", "parents": [ "521691ae4dfad47cf6b46858347fa5fa32fd7bcc" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 09 11:04:26 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 05 17:27:41 2016 +0100" }, "message": "Avoid excessive spill slots for slow paths.\n\nReducing the frame size makes stack maps smaller as we need\nfewer bits for stack masks and some dex register locations\nmay use short location kind rather than long. On Nexus 9,\nAOSP ToT, the boot.oat size reduction is\n prebuilt multi-part boot image:\n - 32-bit boot.oat: -416KiB (-0.6%)\n - 64-bit boot.oat: -635KiB (-0.9%)\n prebuilt multi-part boot image with read barrier:\n - 32-bit boot.oat: -483KiB (-0.7%)\n - 64-bit boot.oat: -703KiB (-0.9%)\n on-device built single boot image:\n - 32-bit boot.oat: -380KiB (-0.6%)\n - 64-bit boot.oat: -632KiB (-0.9%)\n on-device built single boot image with read barrier:\n - 32-bit boot.oat: -448KiB (-0.6%)\n - 64-bit boot.oat: -692KiB (-0.9%)\n\nThe other benefit is that at runtime, threads may need fewer\npages for their stacks, reducing overall memory usage.\n\nWe defer the calculation of the maximum spill size from\nthe main register allocator (linear scan or graph coloring)\nto the RegisterAllocationResolver and do it based on the\nlive registers at slow path safepoints. The old notion of\nan artificial slow path safepoint interval is removed as\nit is no longer needed.\n\nTest: Run ART test suite on host and Nexus 9.\nBug: 30212852\nChange-Id: I40b3d114e278e2c5807982904fa49bf6642c6275\n" }, { "commit": "fc734088e6656a918b6c75094eb942a22bd799e8", "tree": "c31e8677df68e72fdc40aef798d09bd485f736b5", "parents": [ "fca16663334e5838790631d8eac95f4ffdb0cc2e" ], "author": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Tue Jul 19 17:18:07 2016 +0100" }, "committer": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Wed Aug 31 17:22:59 2016 +0100" }, "message": "Extend the InvokeRuntime() changes to mips64.\n\nChange-Id: I3f825746053b9288ca31ab5e823d6a1648dfd894\n" } ], "next": "bf44e0e5281de91f2e38a9378b94ef8c50ad9b23" }