)]}' { "log": [ { "commit": "50706437d8216e41f0fea1e413cda7891324d397", "tree": "23c7c5d1198b8cdde6261198626cfe443eab59ba", "parents": [ "badee9820fcf5dca5f8c46c3215ae1779ee7736e" ], "author": { "name": "Matthew Gharrity", "email": "gharrma@google.com", "time": "Tue Jun 14 11:31:04 2016 -0700" }, "committer": { "name": "Matthew Gharrity", "email": "gharrma@google.com", "time": "Wed Jun 15 09:08:35 2016 -0700" }, "message": "Refactor GetIMTIndex\n\nThis allows us to more easily maintain and experiment with\ninterface method table indexing and hashing.\n\nChange-Id: I719920fae7490dcedcda7c1c36db225c2b8b16df\n" }, { "commit": "badee9820fcf5dca5f8c46c3215ae1779ee7736e", "tree": "982948a67a88a1f9a734c935f919f8d307969f48", "parents": [ "614968198625a6693666bdc1e5609e2f663f5638" ], "author": { "name": "Nelli Kim", "email": "nelli.kim@samsung.com", "time": "Fri May 13 13:08:53 2016 +0300" }, "committer": { "name": "Matthew Gharrity", "email": "gharrma@google.com", "time": "Tue Jun 14 10:05:47 2016 -0700" }, "message": "Optimize IMT\n\n* Remove IMT for classes which do not implement interfaces\n* Remove IMT for array classes\n* Share same IMT\n\nSaved memory (measured on hammerhead):\nboot.art:\nTotal number of classes: 3854\nNumber of affected classes: 1637\nSaved memory: 409kB\n\nChrome (excluding classes in boot.art):\nTotal number of classes: 2409\nNumber of affected classes: 1259\nSaved memory: 314kB\n\nGoogle Maps (excluding classes in boot.art):\nTotal number of classes: 6988\nNumber of affected classes: 2574\nSaved memory: 643kB\n\nPerformance regression on benchmarks/InvokeInterface.java benchmark\n(measured timeCall10Interface)\n1st launch: 9.6%\n2nd launch: 6.8%\n\nChange-Id: If07e45390014a6ee8f3c1c4ca095b43046f0871f\n" }, { "commit": "372f10e5b0b34e2bb6e2b79aeba6c441e14afd1f", "tree": "1f29c2467c8909ef0e0147f37f176caa1bcd2ccc", "parents": [ "1b66fdf3f33c72dfdda4d31f6f17b6a0d8607402" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 17 16:30:10 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jun 02 19:04:20 2016 +0100" }, "message": "Refactor handling of input records.\n\nIntroduce HInstruction::GetInputRecords(), a new virtual\nfunction that returns an ArrayRef\u003c\u003e to all input records.\nImplement all other functions dealing with input records as\nwrappers around GetInputRecords(). Rewrite functions that\npreviously used multiple virtual calls to deal with input\nrecords, especially in loops, to prefetch the ArrayRef\u003c\u003e\nonly once for each instruction. Besides avoiding all the\nextra calls, this also allows the compiler (clang++) to\nperform additional optimizations.\n\nThis speeds up the Nexus 5 boot image compilation by ~0.5s\n(4% of \"Compile Dex File\", 2% of dex2oat time) on AOSP ToT.\n\nChange-Id: Id8ebe0fb9405e38d918972a11bd724146e4ca578\n" }, { "commit": "3c7787fb2e197934a0e87329644384445b1d062f", "tree": "5942b3faa6b23abdccb98a2f9b9a13fa75ca6d36", "parents": [ "80fd43eead361bd3b61d646e5c8efcdd0720304d", "fba39972d99701c80bf3beb7451aca508d67593c" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue May 24 18:19:35 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue May 24 18:19:35 2016 +0000" }, "message": "Merge \"Fix misc-macro-parentheses warnings.\"" }, { "commit": "288c7a8664e516d7486ab85267050e676e84cc39", "tree": "8c117fcb348daf29477e1eb1338de9bc3c1dc706", "parents": [ "fbb0323d801cd14fb04eb4af7e88792d7cca8de3" ], "author": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Mon May 16 11:53:15 2016 +0600" }, "committer": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Mon May 16 13:32:43 2016 +0600" }, "message": "Revert \"Revert \"ART: Reference.getReferent intrinsic for x86 and x86_64\"\"\n\nThis reverts commit 0997d24e67d78f2146ebae2888eda0d7d254789a.\n\nART_HEAP_POISONING\u003dtrue mode is fixed.\n\nChange-Id: I83f6d5c101ea6a86802753f81b3e4348a263fb21\nSigned-off-by: Serguei Katkov \u003cserguei.i.katkov@intel.com\u003e\n" }, { "commit": "fba39972d99701c80bf3beb7451aca508d67593c", "tree": "0d80ecb6997290140503926b08a72e7418915526", "parents": [ "718d4e269810c17d03df909c84b2f7bbd4f61fb9" ], "author": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Wed May 11 11:26:48 2016 -0700" }, "committer": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Fri May 13 10:38:56 2016 -0700" }, "message": "Fix misc-macro-parentheses warnings.\n\n* Add parentheses to fix warnings.\n* Use NOLINT to suppress wrong clang-tidy warnings.\n\nBug: 28705665\nChange-Id: Icc8bc9b59583dee0ea17ab83e0ff0383b8599c3e\n" }, { "commit": "628f2017fcc64352a2297a802c10ea7100fbd74b", "tree": "982bf345d7b937755bd9f82ff66d139c1cce79ba", "parents": [ "893a1d36aec93fabb85ea4a6d4f45019046a6b74", "0997d24e67d78f2146ebae2888eda0d7d254789a" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri May 13 09:30:18 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri May 13 09:30:18 2016 +0000" }, "message": "Merge \"Revert \"ART: Reference.getReferent intrinsic for x86 and x86_64\"\"" }, { "commit": "0997d24e67d78f2146ebae2888eda0d7d254789a", "tree": "8b521397c856259c9049b52d86e40bfd2c84f0f4", "parents": [ "afdc97ebcb4e58afb7cf54d846d30314e6499d83" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri May 13 09:29:01 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri May 13 09:29:01 2016 +0000" }, "message": "Revert \"ART: Reference.getReferent intrinsic for x86 and x86_64\"\n\nFails heap poisoning configuration.\n\nThis reverts commit afdc97ebcb4e58afb7cf54d846d30314e6499d83.\n\nChange-Id: I50e53756a2b85059b89cfb8950f8c9e2b032743c\n" }, { "commit": "4478ae4fcb3337f094815d40273ec0ba32a2d7af", "tree": "0ace818ca85307a33e439b42e362ed180b54178f", "parents": [ "af4bcdf49e014ededa9e71e425dac761697dac8d", "afdc97ebcb4e58afb7cf54d846d30314e6499d83" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu May 12 15:28:38 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 12 15:28:38 2016 +0000" }, "message": "Merge \"ART: Reference.getReferent intrinsic for x86 and x86_64\"" }, { "commit": "afdc97ebcb4e58afb7cf54d846d30314e6499d83", "tree": "bd7db3f73405d3d302f9f5021ffe2d424a7e8153", "parents": [ "3b62593ba55f6bdb37ca84f64930654ff4f09464" ], "author": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Thu May 05 13:42:59 2016 +0600" }, "committer": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Tue May 10 11:35:08 2016 +0600" }, "message": "ART: Reference.getReferent intrinsic for x86 and x86_64\n\nChange-Id: I7a7ac9244847dd80d9fa4e4b5ebc5bf451c628ff\nSigned-off-by: Serguei Katkov \u003cserguei.i.katkov@intel.com\u003e\n" }, { "commit": "dce016eab87302f02b0bd903dd2cd86ae512df2d", "tree": "3af3c0e6b9d845e611b560484882e6b438ef439a", "parents": [ "a246510965fc57ec51d1b202649304535adfe9f3" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Apr 28 13:10:02 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon May 09 20:40:32 2016 +0100" }, "message": "Intrinsify String.length() and String.isEmpty() as HIR.\n\nUse HArrayLength for String.length() in anticipation of\nchanging the String.charAt() to HBoundsCheck+HArrayGet to\nallow the existing BCE to seamlessly work for strings.\nUse HArrayLength+HEqual for String.isEmpty().\n\nWe previously relied on inlining but we now want to apply\nthe new intrinsics even when we do not inline, i.e. when\ncompiling debuggable (as is currently the case for boot\nimage) or when we hit inlining limits, i.e. depth, size,\nor the number of accumulated dex registers.\n\nBug: 28330359\nChange-Id: Iab9d2f6d2967bdd930a72eb461f27efe8f37c103\n" }, { "commit": "ffc87076dda9878cb2cc098149bae441d38b9268", "tree": "e587208d6a8e62532792add3e1ace6b4e6d73e0f", "parents": [ "97cbc9206e9adc473a90650ebdb5d620f517ff04" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Apr 20 14:22:09 2016 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Apr 28 16:15:04 2016 +0100" }, "message": "Split profile recording from jit compilation\n\nWe still use ProfileInfo objects to record profile information. That\ngives us the flexibility to add the inline caches in the future and the\nconvenience of the already implemented GC.\n\nIf UseJIT is false and SaveProfilingInfo true, we will only record the\nProfileInfo and never launch compilation tasks.\n\nBug: 27916886\n\n(cherry picked from commit e5de54cfab5f14ba0b8ff25d8d60901c7021943f)\n\nChange-Id: I68afc181d71447895fb12346c1806e99bcab1de2\n" }, { "commit": "9d944d143c2065272ac3f8e1ce6688377042e295", "tree": "4a4e9652c16edfc1b02d1af70a92b952a3f71f29", "parents": [ "e6d96771a2c9934c8ba6efe1689a1d1b5c54a6f7" ], "author": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Fri Apr 15 16:50:25 2016 +0600" }, "committer": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Tue Apr 26 18:21:35 2016 +0600" }, "message": "ART: Eliminate unlikely code from hot path in x86 div/rem\n\nDivision and Remainder when numerator is zero is not\nusual case so remove the check for this case from hot path.\n\nChange-Id: Ie575af0fedb5045d4ed74292a61a8378f82d39ae\nSigned-off-by: Serguei Katkov \u003cserguei.i.katkov@intel.com\u003e\n" }, { "commit": "2efce70e4204e1a52769c63dac43c9d4af105751", "tree": "d812f91e3ca3d64c42d7e0d876b4559e62616406", "parents": [ "70c0f4e15797902e248e8b7aa0e013fe6d426c71", "7aa04a145e2e0d2949a1a1c7fd4c72d08d698587" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Apr 21 19:36:23 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Apr 21 19:36:24 2016 +0000" }, "message": "Merge \"X86/X86_64: Switch to locked add from mfence\"" }, { "commit": "93205e395f777c1dd81d3f164cf9a4aec4bde45f", "tree": "1d08efd9b7bca9fe23df9ae9489c5dd575d3c6df", "parents": [ "6990775e323cd9164d6cc10955a047b9d9f15f32" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 13 11:59:46 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 13 17:50:16 2016 +0100" }, "message": "Move Assemblers to the Arena.\n\nAnd clean up some APIs to return std::unique_ptr\u003c\u003e instead\nof raw pointers that don\u0027t communicate ownership.\n\nChange-Id: I3017302307a0253d661240750298802fb0d9585e\n" }, { "commit": "7aa04a145e2e0d2949a1a1c7fd4c72d08d698587", "tree": "631554549d4b4dbde438fa0e6e636832427fe6c5", "parents": [ "4009bc645e3358d3150b7f94dd90a2c939f0fa51" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed Jan 27 22:39:07 2016 -0500" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Apr 12 17:25:51 2016 -0400" }, "message": "X86/X86_64: Switch to locked add from mfence\n\nI finally received the answers about the performance of locked add vs.\nmfence for Java memory semantics. Locked add has been faster than\nmfence for all processors since the Pentium 4. Accordingly, I have made\nthe synchronization use locked add at all times, removing it from an\ninstruction set feature.\n\nAlso add support in the optimizing compiler for barrier type\nkNTStoreStore, which is used after non-temporal moves.\n\nChange-Id: Ib47c2fd64c2ff2128ad677f1f39c73444afb8e94\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "dee58d6bb6d567fcd0c4f39d8d690c3acaf0e432", "tree": "5a2f20546ca3c1544c44bee560062580e22dc79c", "parents": [ "391e155a6936a05bd39b171031ec21d2dee62133" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Apr 07 09:54:26 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Apr 07 16:03:16 2016 +0000" }, "message": "Revert \"Revert \"Refactor HGraphBuilder and SsaBuilder to remove HLocals\"\"\n\nThis patch merges the instruction-building phases from HGraphBuilder\nand SsaBuilder into a single HInstructionBuilder class. As a result,\nit is not necessary to generate HLocal, HLoadLocal and HStoreLocal\ninstructions any more, as the builder produces SSA form directly.\n\nSaves 5-15% of arena-allocated memory (see bug for more data):\n GMS 20.46MB \u003d\u003e 19.26MB (-5.86%)\n Maps 24.12MB \u003d\u003e 21.47MB (-10.98%)\n YouTube 28.60MB \u003d\u003e 26.01MB (-9.05%)\n\nThis CL fixed an issue with parsing quickened instructions.\n\nBug: 27894376\nBug: 27998571\nBug: 27995065\n\nChange-Id: I20dbe1bf2d0fe296377478db98cb86cba695e694\n" }, { "commit": "40ecb12f8eeb97b810e11f895278abbf7988ed4d", "tree": "54d999605c0eaf3b4d311f83f8162684506f4a31", "parents": [ "5827507da8efdaf4536c70dfdc54407c28e37852" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 06 17:33:41 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 06 17:33:41 2016 +0100" }, "message": "Optimizing: Fix codegens for MethodLoadKind::kDexCacheViaMethod.\n\nUse the original method index instead of the target method\nindex because the target method may point to a different dex\nfile.\n\nNo regression test: this currently happens only if the\ncodegen uses the kDexCacheViaMethod as a fallback for\nanother load kind and we aim to avoid that fallback, so it\nwould be difficult to write a reliable regression test. We\ncould try and exploit current fallbacks for irreducible\nloops on x86 and arm but those fallbacks will eventually\ndisappear anyway.\n\nBug: 28036230\nChange-Id: I4cc9e046480d3d60a7fb521f0ca6a98914625cdc\n" }, { "commit": "60328910cad396589474f8513391ba733d19390b", "tree": "01702f6df5c39925b354a3152dd04289e7d97062", "parents": [ "e3ff7b293be2a6791fe9d135d660c0cffe4bd73f" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Apr 04 17:47:42 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Apr 04 17:47:42 2016 +0000" }, "message": "Revert \"Refactor HGraphBuilder and SsaBuilder to remove HLocals\"\n\nBug: 27995065\nThis reverts commit e3ff7b293be2a6791fe9d135d660c0cffe4bd73f.\n\nChange-Id: I5363c7ce18f47fd422c15eed5423a345a57249d8\n" }, { "commit": "e3ff7b293be2a6791fe9d135d660c0cffe4bd73f", "tree": "d578d27cb78e6d2caef683cd8ac94c9a9752b192", "parents": [ "86ea7eeabe30c98bbe1651a51d03cb89776724e7" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Mar 02 16:48:20 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Apr 04 11:21:30 2016 +0100" }, "message": "Refactor HGraphBuilder and SsaBuilder to remove HLocals\n\nThis patch merges the instruction-building phases from HGraphBuilder\nand SsaBuilder into a single HInstructionBuilder class. As a result,\nit is not necessary to generate HLocal, HLoadLocal and HStoreLocal\ninstructions any more, as the builder produces SSA form directly.\n\nSaves 5-15% of arena-allocated memory (see bug for more data):\n GMS 20.46MB \u003d\u003e 19.26MB (-5.86%)\n Maps 24.12MB \u003d\u003e 21.47MB (-10.98%)\n YouTube 28.60MB \u003d\u003e 26.01MB (-9.05%)\n\nBug: 27894376\nChange-Id: Iefe28d40600c169c5d306fd2c77034ae19476d90\n" }, { "commit": "cac5a7e871f1f346b317894359ad06fa7bd67fba", "tree": "2df7d4892216a7c976dfe848c9893cb5eb8fa6a5", "parents": [ "6f51d7756a9c66007fe7666b19399e1f60ff6092" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Feb 22 10:39:50 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Mar 29 19:27:40 2016 +0100" }, "message": "Optimizing: Improve const-string code generation.\n\nFor strings in the boot image, use either direct pointers\nor pc-relative addresses. For other strings, use PC-relative\naccess to the dex cache arrays for AOT and direct address of\nthe string\u0027s dex cache slot for JIT.\n\nFor aosp_flounder-userdebug:\n - 32-bit boot.oat: -692KiB (-0.9%)\n - 64-bit boot.oat: -948KiB (-1.1%)\n - 32-bit dalvik cache total: -900KiB (-0.9%)\n - 64-bit dalvik cache total: -3672KiB (-1.5%)\n (contains more files than the 32-bit dalvik cache)\nFor aosp_flounder-userdebug forced to compile PIC:\n - 32-bit boot.oat: -380KiB (-0.5%)\n - 64-bit boot.oat: -928KiB (-1.0%)\n - 32-bit dalvik cache total: -468KiB (-0.4%)\n - 64-bit dalvik cache total: -1928KiB (-0.8%)\n (contains more files than the 32-bit dalvik cache)\n\nBug: 26884697\nChange-Id: Iec7266ce67e6fedc107be78fab2e742a8dab2696\n" }, { "commit": "0ced281ae6216c29f57ca0f8b7388a722e8da97b", "tree": "b7f8273bb117c8ec8f8546ed937a8c0a96d2e5de", "parents": [ "843a65556616183a36792bbcc1632c6d8d0e78b2", "1a65388f1d86bb232c2e44fecb44cebe13105d2e" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Mar 24 10:25:51 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Mar 24 10:25:51 2016 +0000" }, "message": "Merge \"Clean up art::HConstant predicates.\"" }, { "commit": "5b5b9319ff970979ed47d41a41283e4faeffb602", "tree": "e7795abf120cf512627786fd6302efd34535724b", "parents": [ "0c25da0276f5b6f6119793ae9d45d1bca8172c2b" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Mar 22 14:57:31 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Mar 22 14:57:31 2016 +0000" }, "message": "Fix and improve shift and rotate operations.\n\n- Define maximum int and long shift \u0026 rotate distances as\n int32_t constants, as shift \u0026 rotate distances are 32-bit\n integer values.\n- Consider the (long, long) inputs case as invalid for\n static evaluation of shift \u0026 rotate rotations.\n- Add more checks in shift \u0026 rotate operations constructors\n as well as in art::GraphChecker.\n\nChange-Id: I754b326c3a341c9cc567d1720b327dad6fcbf9d6\n" }, { "commit": "1a65388f1d86bb232c2e44fecb44cebe13105d2e", "tree": "515e3000b3ad6d195101f20f33f3c9498e536593", "parents": [ "f808e8a0cc218c2b98023ef0e91f3c5b74ad2962" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 18 18:05:57 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 18 18:05:57 2016 +0000" }, "message": "Clean up art::HConstant predicates.\n\n- Make the difference between arithmetic zero and zero-bit\n pattern non ambiguous.\n- Introduce Boolean predicates in art::HIntConstant for when\n they are used as Booleans.\n- Introduce aritmetic positive and negative zero predicates\n for floating-point constants.\n\nBug: 27639313\nChange-Id: Ia04ecc6f6aa7450136028c5362ed429760c883bd\n" }, { "commit": "38ceb62339514a8012695673b9e1110d13546f02", "tree": "9505047a0de423a270bd40cd13308f3fe5ce8557", "parents": [ "b1aff6c7f248632028b6a62a17f02675007c9ce3", "22c4922c6b31e154a6814c4abe9015d9ba156911" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 18 16:16:41 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Mar 18 16:16:41 2016 +0000" }, "message": "Merge \"Ensure art::HRor support boolean, byte, short and char inputs.\"" }, { "commit": "22c4922c6b31e154a6814c4abe9015d9ba156911", "tree": "8e871f67e327322d24d0c2e4588b165005414077", "parents": [ "0205b58a0d7a9ce5832393857c19c086c78996e9" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 18 14:04:28 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 18 14:04:28 2016 +0000" }, "message": "Ensure art::HRor support boolean, byte, short and char inputs.\n\nAlso extend tests covering the IntegerRotateLeft,\nLongRotateLeft, IntegerRotateRight and LongRotateRight\nintrinsics and their translation into an art::HRor\ninstruction.\n\nBug: 27682579\nChange-Id: I89f6ea6a7315659a172482bf09875cfb7e7422a1\n" }, { "commit": "e943c3b831dc0da4a6b09e940ae25c3285850e96", "tree": "b4756bbc16f49d50087a881b40722657451e6eac", "parents": [ "7c06aef061fa176331b77a88c1ff2c6ae401a5f0", "d28f4a00933a4a3b8d5e9db73b8532924d0f989d" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Mar 18 12:37:03 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Mar 18 12:37:03 2016 +0000" }, "message": "Merge \"Generate native debug stackmaps before calls as well.\"" }, { "commit": "d28f4a00933a4a3b8d5e9db73b8532924d0f989d", "tree": "1205844a68ee9e2c502f8ecbfd2d5cf96acd4190", "parents": [ "fbc61e19578d281d05728bcd120e1ace57c2fbd8" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Mar 14 17:14:24 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Mar 17 16:58:55 2016 +0000" }, "message": "Generate native debug stackmaps before calls as well.\n\nThe debugger looks up PC of the call instruction, so the runtime\u0027s\nstackmap is not sufficient since it is at PC after the instruction.\n\nChange-Id: I0dd06c0b52e8079ea5d064ea10beb12c93584092\n" }, { "commit": "0397163516fb882589c5be734439dedfe4d271fb", "tree": "2a9ffbf2cb65aa28e8ec5d298f97d81c16d2408f", "parents": [ "0205b58a0d7a9ce5832393857c19c086c78996e9" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Mar 17 10:44:24 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Mar 17 13:24:10 2016 +0000" }, "message": "Fix load store elimination bug in the presence of null[i].\n\nDue to the dex specification, we can be in a state where\ntwo array get with the same dex register inputs are typed\ndifferently.\n\nbug:27683874\n\nChange-Id: Ia821fd32e86c306093372249e7686332a7584263\n" }, { "commit": "a5c4a4060edd03eda017abebc85f24cffb083ba7", "tree": "85f69512d33c19d82e172a490a241f3a17d66560", "parents": [ "713c519db15aaa8d6f33b744fd28adddb97a07c2" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Mar 15 15:02:50 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Mar 16 16:49:36 2016 +0000" }, "message": "Make art::HCompare support boolean, byte, short and char inputs.\n\nAlso extend tests covering the IntegerSignum, LongSignum,\nIntegerCompare and LongCompare intrinsics and their\ntranslation into an art::HCompare instruction.\n\nBug: 27629913\nChange-Id: I0afc75ee6e82602b01ec348bbb36a08e8abb8bb8\n" }, { "commit": "914d71ead70bb6f2084b2ed39a9fd58fd014f67d", "tree": "50f30d6e47d18aa6c3ccec9f05727b4898268b20", "parents": [ "1583e624d4c970d8e571b265b9a8f08402d91f82", "2ae48182573da7087bffc2873730bc758ec29696" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Mar 16 14:40:08 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Mar 16 14:40:08 2016 +0000" }, "message": "Merge \"Clean up NullCheck generation and record stats about it.\"" }, { "commit": "2ae48182573da7087bffc2873730bc758ec29696", "tree": "d6955329ad876aefd477f7ef8905b070b9ab95dd", "parents": [ "6915898b28cea6c9836ca1be6814d87e89cc6d76" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Mar 16 14:05:09 2016 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Mar 16 14:10:27 2016 +0000" }, "message": "Clean up NullCheck generation and record stats about it.\n\nThis removes redundant code from the generators and allows for easier\nstat recording.\n\nChange-Id: Iccd4368f9e9d87a6fecb863dee4e2145c97851c4\n" }, { "commit": "e5671618d19489ad0781ec0d204c7765317170cf", "tree": "317d451ebf639f89e91d4c1e482d950579da0a0f", "parents": [ "d35f4a2eacf9ee9c9d75bb0c00eec7ae31ad1949" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Mar 16 11:03:54 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Mar 16 11:14:20 2016 +0000" }, "message": "Accept boolean as an input of HDivZeroCheck.\n\nAll our arithmetic operations accept it.\n\nbug:27624718\nChange-Id: I1f6bb95dc77ecb3fb2fcabb35a93b31c524bfa0a\n" }, { "commit": "a1de9188a05afdecca8cd04ecc4fefbac8b9880f", "tree": "a671c8aef814ccf194e5c3950a551f2711516c53", "parents": [ "950d063395c7cecbbe372fd607468018d661a35c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Feb 25 11:37:38 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Feb 26 16:01:59 2016 +0000" }, "message": "Optimizing: Reduce memory usage of HInstructions.\n\nPack narrow fields and flags into a single 32-bit field.\n\nChange-Id: Ib2f7abf987caee0339018d21f0d498f8db63542d\n" }, { "commit": "9cd6d378bd573cdc14d049d32bdd22a97fa4d84a", "tree": "be293c89806b919143b7dcd203bae14f5f4eaf04", "parents": [ "0e02ee9efbf1dbdde05d2b10f7307bbe191c52f5" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Feb 09 15:24:47 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Feb 24 10:25:29 2016 +0000" }, "message": "Associate slow paths with the instruction that they belong to.\n\nAlmost all slow paths already know the instruction they belong to,\nthis CL just moves the knowledge to the base class as well.\n\nThis is needed to be be able to get the corresponding dex pc for\nslow path, which allows us generate better native line numbers,\nwhich in turn fixes some native debugging stepping issues.\n\nChange-Id: I568dbe78a7cea6a43a4a71a014b3ad135782c270\n" }, { "commit": "0e02ee9efbf1dbdde05d2b10f7307bbe191c52f5", "tree": "19c9c3e25a8db4e5b53890fd72193383b5bb73e5", "parents": [ "72ca09cc2dd350adb932ef4a50eff668cca99c5e", "c7098ff991bb4e00a800d315d1c36f52a9cb0149" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Feb 24 10:23:50 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Feb 24 10:23:50 2016 +0000" }, "message": "Merge \"Remove HNativeDebugInfo from start of basic blocks.\"" }, { "commit": "c7098ff991bb4e00a800d315d1c36f52a9cb0149", "tree": "3a150e927bc7f4894f5b148ec6f5a2b796cdd80d", "parents": [ "5322e55ab9a15996a197456ca39d9c77488cd5c1" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Feb 09 14:30:11 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Feb 24 10:21:57 2016 +0000" }, "message": "Remove HNativeDebugInfo from start of basic blocks.\n\nWe do not require full environment at the start of basic block.\nThe dex pc contained in basic block is sufficient for line mapping.\n\nChange-Id: I5ba9e5f5acbc4a783ad544769f9a73bb33e2bafa\n" }, { "commit": "442643920a6c539e98aad76594e99b932b5631ba", "tree": "ecbe2d8109125de2031af7ac4e0f4fc03a3b6d12", "parents": [ "0723a61dd00fcc7072d82407e0d4a40a8b141d43", "0c5b18edd1308975804ccf29a02a130a7b6f7fa7" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Feb 17 11:06:40 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Feb 17 11:06:40 2016 +0000" }, "message": "Merge \"Support CMOV for x86 Select\"" }, { "commit": "8659e8462553fa95ec1470fb86324f6ad540bf77", "tree": "169e56f8ecf97590cc0d63e8ede939240897e420", "parents": [ "7eca244e79480f2ecea341598524a53273959c2b" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Feb 16 10:41:46 2016 -0500" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Feb 16 10:41:46 2016 -0500" }, "message": "X86: Allow long compares to stack operands\n\nThere is no need to force the RHS stack operand into a register for a\nlong comparison.\n\nChange-Id: Ie86851a54ec2dc9a9f61443e59219a8994dc01bb\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "0c5b18edd1308975804ccf29a02a130a7b6f7fa7", "tree": "58f60a2f93973460f1602f007ffdb2c6d7c577bf", "parents": [ "7eca244e79480f2ecea341598524a53273959c2b" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Sat Feb 06 13:58:35 2016 -0500" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Feb 16 10:10:44 2016 -0500" }, "message": "Support CMOV for x86 Select\n\nIf possible, generate CMOV to implement HSelect. Tricky cases are a\nlong or FP condition (no single CC generated), FP inputs (no FP CMOV)\nand when the condition is a boolean or not emitted at the use site.\nIn these cases, keep using the existing HSelect code.\n\nChange-Id: I4ff1e152b8ef126fbbabeb3316e9e2b6a6b74aeb\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "b52bbde2870e5ab5d126612961dcb3da8e5236ee", "tree": "3a58d251d8667e7c8447199a799fecba9bd5f918", "parents": [ "1b0755299928221a1dcc5db383bf8fc378d29b60" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Feb 12 12:06:05 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Feb 15 15:06:44 2016 +0000" }, "message": "Optimizing: Simplify consecutive type conversions.\n\nMerge two consecutive type conversions to one if the result\nof such merged conversion is guaranteed to be the same and\nremove all implicit conversions, not just conversions to the\nsame type. Improve codegens to handle conversions from long\nto integral types smaller than int.\n\nThis will make it easier to simplify `(byte) (x \u0026 0xffL)` to\n`(byte) x` where the conversion from long to byte is done by\ntwo dex instructions, long-to-int and in int-to-byte.\n\nBug: 23965701\nChange-Id: I833f193556671136ad2cd3f5b31cdfbc2d99c19d\n" }, { "commit": "6e332529c33be4d7dae5dad3609a839f4c0d3bfc", "tree": "cedd2e1beb170fd5821136fe974e3f34adfcddc2", "parents": [ "d3caabd4f85f86dd744da432993e12935d843a83" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Feb 02 16:15:27 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Feb 12 15:17:50 2016 +0000" }, "message": "ART: Remove HTemporary\n\nChange-Id: I21b984224370a9ce7a4a13a9652503cfb03c5f03\n" }, { "commit": "a19616e3363276e7f2c471eb2839fb16f1d43f27", "tree": "ad3e7fd0f53229e95fb0443586fc30eedabe6967", "parents": [ "9fba3f67a0792ad5eeb495e489d11a87211c318f" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Feb 01 18:57:58 2016 -0800" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Feb 05 09:26:21 2016 -0800" }, "message": "Implemented compare/signum intrinsics as HCompare\n(with all code generation for all)\n\nRationale:\nAt HIR level, many more optimizations are possible, while ultimately\ngenerated code can take advantage of full semantics.\n\nChange-Id: I6e2ee0311784e5e336847346f7f3c4faef4fd17e\n" }, { "commit": "2f10a5fb8c236a6786928f0323bd312c3ee9a4cc", "tree": "0dc51717b1f5d9b2c20898c5283467d4feb220e2", "parents": [ "a20748aceb63396c5e09366968bbc71308f745df" ], "author": { "name": "Mark P Mendell", "email": "mark.p.mendell@intel.com", "time": "Mon Jan 25 14:47:50 2016 +0000" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Thu Feb 04 12:59:22 2016 -0500" }, "message": "Revert \"Revert \"X86: Use the constant area for more operations.\"\"\n\nThis reverts commit cf8d1bb97e193e02b430d707d3b669565fababb4.\n\nHandle the case of an intrinsic where CurrentMethod is still an input.\nThis will be the case when there are unresolved classes in the\nhierarchy.\n\nAdd a test case to confirm that we don\u0027t crash when handling Math.abs,\nwhich wants to add a pointer to the constant area for the bitmask to be\nused to remove the sign bit.\n\nEnhance 565-checker-condition-liveness to check for the case of deeply\nnested EmitAtUseSite chains.\n\nChange-Id: I022e8b96a32f5bf464331d0c318c56b9d0ac3c9a\n" }, { "commit": "7770a3e080db3fb26e0754dc5afd05eb73aae2a7", "tree": "e7eb4be8e179b684550c0a77dd2a194a1b809693", "parents": [ "b72923dd4d6e1636163047c960395ed9879e31fc" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Feb 03 10:13:41 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Feb 03 10:13:41 2016 +0000" }, "message": "Assume fp operations can also take a constant on x86.\n\nBecause irreducible loops disable the constant pool optimization\non x86, we need to handle cases where a fp operation gets one.\n\nChange-Id: I43387f31aa2589d02112953baa62fd0994d0a6d7\n" }, { "commit": "9ff1de06d6ed1da36f7e976224a2d13e5e9882bf", "tree": "9121c384f3e0375fccfa4ca9f71c7d86baf38904", "parents": [ "bee600ff66e3e233274faa1391890ff424a8244e", "a42363f79832a6e14f348514664dc6dc3edf9da2" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 28 16:09:16 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jan 28 16:09:16 2016 +0000" }, "message": "Merge \"Implement first kind of polymorphic inlining.\"" }, { "commit": "a42363f79832a6e14f348514664dc6dc3edf9da2", "tree": "bcd43acdf9903a704b566af00b5c740786284b7b", "parents": [ "9cea9139033a4d04437ebc5542e9466fd67137fe" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Dec 17 14:57:09 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 28 15:55:46 2016 +0000" }, "message": "Implement first kind of polymorphic inlining.\n\nAdd HClassTableGet to fetch an ArtMethod from the vtable or imt,\nand compare it to the only method the profiling saw.\n\nChange-Id: I76afd3689178f10e3be048aa3ac9a97c6f63295d\n" }, { "commit": "74eb1b264691c4eb399d0858015a7fc13c476ac6", "tree": "0b6fc4f3003d50bf6c388601013cdfc606e53859", "parents": [ "75fd2a8ab9b4aff59308034da26eb4986d10fa9e" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Dec 14 11:44:01 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 28 15:50:27 2016 +0000" }, "message": "ART: Implement HSelect\n\nThis patch adds a new HIR instruction to Optimizing. HSelect returns\none of two inputs based on the outcome of a condition.\n\nThis is only initial implementation which:\n - defines the new instruction,\n - repurposes BooleanSimplifier to emit it,\n - extends InstructionSimplifier to statically resolve it,\n - updates existing code and tests accordingly.\n\nCode generators currently emit fallback if/then/else code and will be\nupdated in follow-up CLs to use platform-specific conditional moves\nwhen possible.\n\nChange-Id: Ib61b17146487ebe6b55350c2b589f0b971dcaaee\n" }, { "commit": "b3e773eea39a156b3eacf915ba84e3af1a5c14fa", "tree": "6c0d3a748d7b445a0d776ed306c7add43a0e1dd3", "parents": [ "05aeb408f292d8d94af1646a94bc69faf77f0b46" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Jan 26 11:28:37 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 28 15:48:00 2016 +0000" }, "message": "ART: Implement support for instruction inlining\n\nOptimizing HIR contains \u0027non-materialized\u0027 instructions which are\nemitted at their use sites rather than their defining sites. This\nwas not properly handled by the liveness analysis which did not\nadjust the use positions of the inputs of such instructions.\nDespite the analysis being incorrect, the current use cases never\nproduce incorrect code.\n\nThis patch generalizes the concept of inlined instructions and\nupdates liveness analysis to set the compute use positions correctly.\n\nChange-Id: Id703c154b20ab861241ae5c715a150385d3ff621\n" }, { "commit": "cf8d1bb97e193e02b430d707d3b669565fababb4", "tree": "dcdf5e9baaa89b82515652d5abffa2712bc9b3ca", "parents": [ "dc00454f0b9a134f01f79b419200f4044c2af5c6" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 25 09:43:30 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 25 09:43:30 2016 +0000" }, "message": "Revert \"X86: Use the constant area for more operations.\"\n\nHits a DCHECK:\n\ndex2oatd F 19461 20411 art/compiler/optimizing/pc_relative_fixups_x86.cc:196] Check failed: !invoke_static_or_direct-\u003eHasCurrentMethodInput() \n\n\nThis reverts commit dc00454f0b9a134f01f79b419200f4044c2af5c6.\n\nChange-Id: Idfcacf12eb9e1dd7e68d95e880fda0f76f90e9ed\n" }, { "commit": "dc00454f0b9a134f01f79b419200f4044c2af5c6", "tree": "49a787e2b617ce5bc69aa2dc4b71653c68ee0375", "parents": [ "2d0582b6c96cf16e18df50158494e32eeede0a95" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri Oct 30 09:45:03 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri Jan 22 14:54:15 2016 -0500" }, "message": "X86: Use the constant area for more operations.\n\nAllow FP HNeg to use the constant area to hold the constant to flip the\nsign bit.\n\nEnhance some math intrinsics to allow the use of the constant\narea: Abs{Float,Double}, {Min,Max}{FloatFloat,DoubleDouble}.\n\nAllow compares of floats/doubles to constants using the constant area.\n\nThese eliminate almost all uses of loading constants from the stack.\n\nChange-Id: Ic4b831565825cbe9f0801b1b53c1013be7c87ae4\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "95e7ffc28ea4d6deba356e636b16120ae49b62e2", "tree": "f365f762a4ff46042871b86b96c112d6f1c8d624", "parents": [ "c24b8df48be848af1f4cb54e9caef2b7d6afe680" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 22 11:57:25 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 22 11:57:25 2016 +0000" }, "message": "Improve documentation and assertions of read barrier instrumentation.\n\nFor ARM, x86, x86-64 back ends. The case of the ARM64 back\nend is already handled in\nhttps://android-review.googlesource.com/#/c/197870/.\n\nBug: 12687968\nChange-Id: I6df1128cc100cbdb89020876e1a54de719508be3\n" }, { "commit": "e3f43ac79e50a4693ea4d46acf5cffca64910cee", "tree": "848caf115a3251ffc3c9fc60290549a52765801a", "parents": [ "17ccfff2de292fd2b4a78aef87d79b662381f920" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jan 19 15:07:47 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jan 19 15:07:47 2016 +0000" }, "message": "Some read barrier clean-up in Optimizing.\n\nThese changes make the read barrier compiler instrumentation\ncode more uniform among the ARM, ARM64, x86 and x86-64 back\nends.\n\nBug: 12687968\nChange-Id: I6b1c0cf2bc22ed6cd6b14754136bef4a2a036ea5\n" }, { "commit": "58282f4510961317b8d5a364a6f740a78926716f", "tree": "5d97c0db9fe01dd6e8df2357ef11f614abb853e8", "parents": [ "b8bb9f6d0b59be125066f604f134155f8998f5ae" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 14 12:45:10 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Jan 18 16:39:30 2016 +0000" }, "message": "ART: Remove Baseline compiler\n\nWe don\u0027t need Baseline any more and it hasn\u0027t been maintained for\na while anyway. Let\u0027s remove it.\n\nChange-Id: I442ed26855527be2df3c79935403a25b1ee55df6\n" }, { "commit": "28943466954ca5d6f586bb5496f7f3f0f85fe87a", "tree": "56a4f7427addf50aba847ea944ec24396c7e848f", "parents": [ "68c56ae9ccdb6e348501456e374ae65e74f6270c", "6de1938e562b0d06e462512dd806166e754035ea" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jan 15 09:19:12 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jan 15 09:19:12 2016 +0000" }, "message": "Merge \"ART: Remove incorrect HFakeString optimization\"" }, { "commit": "947cb4f5582d1f57270b48d3c47ea95e7f9085b5", "tree": "6f6aed8f8cca3177b06521a8db6ca845d18623ad", "parents": [ "7b4199a5fa9f151fbf3af2a34f26d04215a1016c", "15bd22849ee6a1ffb3fb3630f686c2870bdf1bbc" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 14 21:25:16 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jan 14 21:25:16 2016 +0000" }, "message": "Merge \"Implement irreducible loop support in optimizing.\"" }, { "commit": "6de1938e562b0d06e462512dd806166e754035ea", "tree": "f9df086a73860c20768d17ff7bc5be4139567941", "parents": [ "f5b84ee14a3bc578f799a39dca1ae512b49356ea" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jan 08 17:37:10 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 14 16:22:13 2016 +0000" }, "message": "ART: Remove incorrect HFakeString optimization\n\nSimplification of HFakeString assumes that it cannot be used until\nString.\u003cinit\u003e is called which is not true and causes different\nbehaviour between the compiler and the interpreter. This patch\nremoves the optimization together with the HFakeString instruction.\n\nInstead, HNewInstance is generated and an empty String allocated\nuntil it is replaced with the result of the StringFactory call. This\nis consistent with the behaviour of the interpreter but is too\nconservative. A follow-up CL will attempt to optimize out the initial\nallocation when possible.\n\nBug: 26457745\nBug: 26486014\n\nChange-Id: I7139e37ed00a880715bfc234896a930fde670c44\n" }, { "commit": "15bd22849ee6a1ffb3fb3630f686c2870bdf1bbc", "tree": "a261601589163faa4538bcf1c9d156e8ec4a42b3", "parents": [ "5b7b5ddb515828c93f0c2aec67aa513c32d0de22" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jan 05 15:55:41 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 14 15:00:20 2016 +0000" }, "message": "Implement irreducible loop support in optimizing.\n\nSo we don\u0027t fallback to the interpreter in the presence of\nirreducible loops.\n\nImplications:\n- A loop pre-header does not necessarily dominate a loop header.\n- Non-constant redundant phis will be kept in loop headers, to\n satisfy our linear scan register allocation algorithm.\n- while-graph optimizations, such as gvn, licm, lse, and dce\n need to know when they are dealing with irreducible loops.\n\nChange-Id: I2cea8934ce0b40162d215353497c7f77d6c9137e\n" }, { "commit": "42249c3602c3d0243396ee3627ffb5906aa77c1e", "tree": "1e822a21c87331246cbde3923eac88fa315fa2cc", "parents": [ "922698ded1e80cad1ecce4c2172a88c76a216373" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Jan 07 15:33:50 2016 -0800" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Jan 12 16:39:20 2016 -0800" }, "message": "Reduce code size by sharing slow paths.\n\nRationale:\nSharing identical slow path code reduces code size.\n\nBackground:\nCurrently, slow paths with the same dex-pc, same physical register\nspilling code, and identical stack maps are shared (making this\nonly useful for deopt slow paths). The newly introduced mechanism\nis sufficiently general to allow future improvements by e.g.\nallowing different dex-pc (by passing this to runtime) or even\nthe kind of slow paths (by passing runtime addresses to the slowpath).\n\nChange-Id: I819615c47b4fd98440a241f681f93e4fc22d12e0\n" }, { "commit": "8566a91502db625ff9428a3c2418714488ecd5d9", "tree": "fc3ade71413203fd053d06b98210f263084e34c9", "parents": [ "20b6863769357d798464a65c5ee5dfd64464d400", "b7070a2db8b0b7eca14f01f932be305be64ded57" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Jan 11 14:47:37 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jan 11 14:47:37 2016 +0000" }, "message": "Merge \"Generate Nops to ensure that debug stack maps have distinct PC.\"" }, { "commit": "f871d466a1f20a6906d4d22f878f1f93d73ccf69", "tree": "9c46d31d371eb03a5d56cb7aceb5a5a625ae0fd3", "parents": [ "6f68ad42bb6b22e7cf8337f76953fda44ca89405", "68f6289fbc1b14ed814722c023b3f343c1e59a79" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 11 14:20:52 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jan 11 14:20:52 2016 +0000" }, "message": "Merge \"Don\u0027t use std::abs on INT_MIN/LONG_MIN, it\u0027s undefined.\"" }, { "commit": "b7070a2db8b0b7eca14f01f932be305be64ded57", "tree": "06ba87d56a708712fb206e23d3abd55f21934373", "parents": [ "ae6f23c83e1c8dcfbc4f74186ea1a37f1044414b" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Jan 08 18:13:53 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Jan 11 12:22:17 2016 +0000" }, "message": "Generate Nops to ensure that debug stack maps have distinct PC.\n\nChange-Id: I5740ec958a20d236634b66df0e675382ed5c16fc\n" }, { "commit": "68f6289fbc1b14ed814722c023b3f343c1e59a79", "tree": "86bf0f10e1368871e567145a0d70087cb8f74a4f", "parents": [ "b7371a5517f78f61759f7e6124f2d957d974d9cd" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 04 08:39:49 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 11 11:36:48 2016 +0000" }, "message": "Don\u0027t use std::abs on INT_MIN/LONG_MIN, it\u0027s undefined.\n\nbug:25494265\n\nChange-Id: I560a3a589b92440020285f9adfdf7c9efb06217c\n" }, { "commit": "152408f8c2188a7ed950cad04883b2f67dc74e84", "tree": "0fd24e0023060d1eb58eeb0b94e31a2311eefe16", "parents": [ "4bb356123b13ec5f41ea80158766df676ae08679" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Thu Dec 31 12:28:50 2015 -0500" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Thu Dec 31 12:28:50 2015 -0500" }, "message": "X86: templatize GenerateTestAndBranch and friends\n\nAllow the use of NearLabel as well as Label. This will be used by the\nHSelect patch.\n\nReplace a couple of Label(s) with NearLabel(s) as well.\n\nChange-Id: I8e674c89e691bcdbccf4a5cdc07ad13b29ec21dd\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "0cf4493166ff28518c8eafa2d0463f6e817cce75", "tree": "6d207db3fb655bbd692f2b01fa963c603619bd0e", "parents": [ "d674bf7ba2a209790cea8ef8d935480ef515c9e1" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Dec 09 14:09:59 2015 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Dec 23 13:19:16 2015 +0000" }, "message": "Generate more stack maps during native debugging.\n\nGenerate extra stack map at the start of each java statement.\nThe stack maps are later translated to DWARF which allows\nLLDB to set breakpoints and view local variables.\n\nChange-Id: If00ab875513308e4a1399d1e12e0fe8934a6f0c3\n" }, { "commit": "5f7b58ea1adfc0639dd605b65f59198d3763f801", "tree": "04556e673cdd3967cc967ff79931eab49e523956", "parents": [ "1201804d1813d7db0accead9721d67c40b3de564" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Nov 23 19:49:34 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Dec 23 09:59:07 2015 +0000" }, "message": "Rewrite HInstruction::Is/As\u003ctype\u003e().\n\nMake Is\u003ctype\u003e() and As\u003ctype\u003e() non-virtual for concrete\ninstruction types, relying on GetKind(), and mark GetKind()\nas PURE to improve optimization opportunities. This reduces\nthe number of relocations in libart-compiler.so\u0027s .rel.dyn\nsection by ~4K, or ~44%, and in .data.rel.ro by ~18K, or\n~65%. The file is 96KiB smaller for Nexus 5, including 8KiB\nreduction of the .text section.\n\nUnfortunately, the g++/clang++ __attribute__((pure)) is not\nstrong enough to avoid duplicated virtual calls and we would\nneed the C++ [[pure]] attribute proposed in n3744 instead.\nTo work around this deficiency, we introduce an extra\nnon-virtual indirection for GetKind(), so that the compiler\ncan optimize common expressions such as\n instruction-\u003eIsAdd() || instruction-\u003eIsSub()\nor\n instruction-\u003eIsAdd() \u0026\u0026 instruction-\u003eAsAdd()-\u003e...\nwhich contain two virtual calls to GetKind() after inlining.\n\nChange-Id: I83787de0671a5cb9f5b0a5f4a536cef239d5b401\n" }, { "commit": "570a920d0a4a01e159a1be46609ff3db4aedc221", "tree": "d959ea022b6ef33d4c9aefef0f02756384e2769d", "parents": [ "fae1db92d8433d0f75258c190bcf2c940731f036", "17077d888a6752a2e5f8161eee1b2c3285783d12" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Dec 17 23:28:06 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Dec 17 23:28:06 2015 +0000" }, "message": "Merge \"Revert \"Revert \"X86: Use locked add rather than mfence\"\"\"" }, { "commit": "14c4e90f67e71430dade7d4f20920e6352be386e", "tree": "2d376e0d6f833bb87348faae12ad7ed3bf15b95b", "parents": [ "6132a3884a912a704010f22ea2991f3d9d432af2", "f3e0ee27f46aa6434b900ab33f12cd3157578234" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 16:46:19 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Dec 17 16:46:19 2015 +0000" }, "message": "Merge \"Revert \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"\"" }, { "commit": "f3e0ee27f46aa6434b900ab33f12cd3157578234", "tree": "83d5a75bf26238ff1789569de62e4b72fb348119", "parents": [ "b4c137630fd2226ad07dfd178ab15725374220f1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 15:23:13 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 15:23:13 2015 +0000" }, "message": "Revert \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"\n\nThis reverts commit b4c137630fd2226ad07dfd178ab15725374220f1.\n\nThe underlying issue was fixed by https://android-review.googlesource.com/188271 .\n\nBug: 26121945\nChange-Id: I58b08eb1a9f0a5c861f8cda93522af64bcf63920\n" }, { "commit": "17077d888a6752a2e5f8161eee1b2c3285783d12", "tree": "15b869f7ed0a8273814b628cd277a6d5d779b24d", "parents": [ "d16bb3f0dc17d77db7022150d0710fcbb8b6fd9d" ], "author": { "name": "Mark P Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed Dec 16 19:15:59 2015 +0000" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed Dec 16 20:17:48 2015 -0500" }, "message": "Revert \"Revert \"X86: Use locked add rather than mfence\"\"\n\nThis reverts commit 0da3b9117706760e8722029f407da6d0297cc943.\n\nFix a compilation failure that slipped in somehow.\n\nChange-Id: Ide8681cdc921febb296ea47aa282cc195f154049\n" }, { "commit": "1c70f18dce7705ff70147ddebf65a97f66df8d5c", "tree": "7fa76545c1b91499b86f840cdb8c53050e9c761c", "parents": [ "1f312652e138e05328b9c4c738d3ecbab2d09ae9", "0da3b9117706760e8722029f407da6d0297cc943" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Dec 16 19:11:38 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Dec 16 19:11:38 2015 +0000" }, "message": "Merge \"Revert \"X86: Use locked add rather than mfence\"\"" }, { "commit": "0da3b9117706760e8722029f407da6d0297cc943", "tree": "84ad42399e1055f3596d7df6f786d9f7b8605ee3", "parents": [ "7b3e4f99b25c31048a33a08688557b133ad345ab" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Dec 16 19:06:17 2015 +0000" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Dec 16 19:06:17 2015 +0000" }, "message": "Revert \"X86: Use locked add rather than mfence\"\n\nThis reverts commit 7b3e4f99b25c31048a33a08688557b133ad345ab.\n\nReason: build error on sdk (linux) in git_mirror-aosp-master-with-vendor , please fix first\n\nart/compiler/optimizing/code_generator_x86_64.cc:4032:7: error: use of\nundeclared identifier \u0027codegen_\u0027\n codegen_-\u003eMemoryFence();\n\nChange-Id: I91f8542cfd944b7425d1981c35872dcdcb901e18\n" }, { "commit": "c3ca1e6543ef5e717183c059e68ac34597be7022", "tree": "ee7032d33c1dc8962a767d81321a142e9f4d173d", "parents": [ "9ddcbf69cfa807790e324f7f54e1931bc66d0f5c", "7b3e4f99b25c31048a33a08688557b133ad345ab" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Dec 16 18:47:07 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Dec 16 18:47:07 2015 +0000" }, "message": "Merge \"X86: Use locked add rather than mfence\"" }, { "commit": "d7d35383838c369a4a1ff5aa21e952f941718c48", "tree": "7d36f56c834e2b561ebc0359b9d11ad03d150cb2", "parents": [ "6b75bc08e8e2e5516a23350418bacef2cf982bd9", "b4c137630fd2226ad07dfd178ab15725374220f1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 16 12:31:14 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Dec 16 12:31:14 2015 +0000" }, "message": "Merge \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"" }, { "commit": "b4c137630fd2226ad07dfd178ab15725374220f1", "tree": "6f319089980073ffb2c20d36e367a944daa525c4", "parents": [ "59f054d98f519a3efa992b1c688eb97bdd8bbf55" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 16 12:06:39 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 16 12:07:01 2015 +0000" }, "message": "Revert \"ART: Reduce the instructions generated by packed switch.\"\n\nThis reverts commit 59f054d98f519a3efa992b1c688eb97bdd8bbf55.\n\nbug:26121945\n\nChange-Id: I8a5ad7ef1f1de8d44787c27528fa3f7f5c2e9cd3\n" }, { "commit": "7b3e4f99b25c31048a33a08688557b133ad345ab", "tree": "446ce2d9b4684120c35fad9c097ea2f760f0797c", "parents": [ "089ff4886aa9b5e7cec04d2ef5cdeb9d68e5dc43" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Thu Nov 19 14:08:40 2015 -0500" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Dec 15 15:48:39 2015 -0500" }, "message": "X86: Use locked add rather than mfence\n\nJava semantics for memory ordering can be satisfied using\n lock addl $0,0(SP)\nrather than mfence. The locked add synchronizes the memory caches, but\ndoesn\u0027t affect device memory.\n\nTiming on a micro benchmark with a mfence or lock add $0,0(sp) in a loop\nwith 600000000 iterations:\ntime ./mfence\nreal 0m5.411s\nuser 0m5.408s\nsys 0m0.000s\n\ntime ./locked_add\nreal 0m3.552s\nuser 0m3.550s\nsys 0m0.000s\n\nImplement this as an instruction-set-feature lock_add. This is off by\ndefault (uses mfence), and enabled for atom \u0026 silvermont variants.\nGeneration of mfence can be forced by a parameter to MemoryFence.\n\nChange-Id: I5cb4fded61f4cbbd7b7db42a1b6902e43e458911\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "7c1559a06041c9c299d5ab514d54b2102f204a84", "tree": "c50b54bf82f457f44dbf0741947d836749d4a96a", "parents": [ "7cd230c8f74a227ea04f1dd93c8d855aa81fc1fe" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Dec 15 10:55:36 2015 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Dec 15 11:45:56 2015 +0000" }, "message": "x86 Baker\u0027s read barrier fast path implementation.\n\nIntroduce an x86 fast path implementation in Optimizing for\nBaker\u0027s read barriers (for both heap reference loads and GC\nroot loads). The marking phase of the read barrier is\nperformed by a slow path, invoking a new runtime entry point\n(artReadBarrierMark).\n\nOther read barrier algorithms continue to use the original\nslow path based implementation, which has been renamed as\nGenerateReadBarrierSlow/GenerateReadBarrierForRootSlow.\n\nBug: 12687968\nChange-Id: Ie610c4befc19ff22378a8cba38b422dcacb54320\n" }, { "commit": "58dcb021c3bd45718d0103844f4e6d55754e6501", "tree": "b5ca917081eff52a98331b1234335069ead8bede", "parents": [ "66278646b5b332142d1474703ac7d945dfbf7c78", "40a04bf64e5837fa48aceaffe970c9984c94084a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Dec 11 16:14:56 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Dec 11 16:14:56 2015 +0000" }, "message": "Merge \"Replace rotate patterns and invokes with HRor IR.\"" }, { "commit": "40a04bf64e5837fa48aceaffe970c9984c94084a", "tree": "27aeff3b9492b396050155734d81aba3c57ffbb7", "parents": [ "763fd2d3d131898cad6295a19ae9a30e22ce5f2a" ], "author": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Fri Dec 11 09:50:36 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Dec 11 16:13:44 2015 +0000" }, "message": "Replace rotate patterns and invokes with HRor IR.\n\nReplace constant and register version bitfield rotate patterns, and\nrotateRight/Left intrinsic invokes, with new HRor IR.\n\nWhere k is constant and r is a register, with the UShr and Shl on\neither side of a |, +, or ^, the following patterns are replaced:\n\n x \u003e\u003e\u003e #k OP x \u003c\u003c #(reg_size - k)\n x \u003e\u003e\u003e #k OP x \u003c\u003c #-k\n\n x \u003e\u003e\u003e r OP x \u003c\u003c (#reg_size - r)\n x \u003e\u003e\u003e (#reg_size - r) OP x \u003c\u003c r\n\n x \u003e\u003e\u003e r OP x \u003c\u003c -r\n x \u003e\u003e\u003e -r OP x \u003c\u003c r\n\nImplemented for ARM/ARM64 \u0026 X86/X86_64.\n\nTests changed to not be inlined to prevent optimization from folding\nthem out. Additional tests added for constant rotate amounts.\n\nChange-Id: I5847d104c0a0348e5792be6c5072ce5090ca2c34\n" }, { "commit": "917d01680714b2295f109f8fea0aa06764a30b70", "tree": "1da1b936fcc2318dced0d0aa9d2f987af1a05169", "parents": [ "d48015603a54b820d287d92709825765159615f0" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 24 18:25:35 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Dec 10 16:48:06 2015 +0000" }, "message": "Don\u0027t generate a slow path for strings in the dex cache.\n\nChange-Id: I1d258f1a89bf0ec7c7ddd134be9215d480f0b09a\n" }, { "commit": "59f054d98f519a3efa992b1c688eb97bdd8bbf55", "tree": "83d5a75bf26238ff1789569de62e4b72fb348119", "parents": [ "763fd2d3d131898cad6295a19ae9a30e22ce5f2a" ], "author": { "name": "Zheng Xu", "email": "zheng.xu@linaro.org", "time": "Mon Dec 07 17:17:03 2015 +0800" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Dec 08 13:14:10 2015 -0500" }, "message": "ART: Reduce the instructions generated by packed switch.\n\nImplement Vladimir Marko\u0027s suggestion. The new compare/jump series\nreduce the number of instructions from (2*n+1) to (1.5*n+3).\n\nGenerate normal compare/jump series when numEntries \u003c\u003d 3.\nGenerate optimal compare/jump series when numEntries \u003c\u003d threshold.\nGenerate jump tables otherwise.\n\nChange-Id: I425547b6787057c7fa84e71f17c145b63b208633\n" }, { "commit": "e523423a053af5cb55837f07ceae9ff2fd581712", "tree": "6c2d9c570bf0d9a0e2cd056e052c0be618b03fc5", "parents": [ "08a84acc7adb1bb076595eb961bd4667896e5075" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 02 09:06:11 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 02 13:01:25 2015 +0000" }, "message": "Revert \"Revert \"Don\u0027t use the compiler driver for method resolution.\"\"\n\nThis reverts commit c88ef3a10c474045a3476a02ae75d07ddd3230b7.\n\nChange-Id: I0ed88a48b313a8d28bc39fae40631123aadb13ef\n" }, { "commit": "1cfe7fd885fc21292dfe74b554c38b07304cb10e", "tree": "5a809d58debfe5265bb40c2ae71f67a0532dd974", "parents": [ "8b3609b4daacfd6d823fe9d9052955db2202aa0f", "c88ef3a10c474045a3476a02ae75d07ddd3230b7" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 16:28:28 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Dec 01 16:28:28 2015 +0000" }, "message": "Merge \"Revert \"Don\u0027t use the compiler driver for method resolution.\"\"" }, { "commit": "c88ef3a10c474045a3476a02ae75d07ddd3230b7", "tree": "cd23e1e0a3cea10cc9a9ae8269a01f75ada8ef0e", "parents": [ "4db0bf9c4db6a09716c3388b7d2f88d534470339" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 16:28:10 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 16:28:10 2015 +0000" }, "message": "Revert \"Don\u0027t use the compiler driver for method resolution.\"\n\nFails 425 in debuggable mode.\n\nThis reverts commit 4db0bf9c4db6a09716c3388b7d2f88d534470339.\n\nChange-Id: I346df8f75674564fc4fb241c60f23e250fc7f0a7\n" }, { "commit": "753e8c43e1e68cade83e42f8111745d5c6f14f90", "tree": "8ed2ef769ee068f0c7620fc03b8d0b39cedee84a", "parents": [ "b1aa617639c01c0dffaafd1641e0304ad179b6a2", "4db0bf9c4db6a09716c3388b7d2f88d534470339" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 14:24:03 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Dec 01 14:24:03 2015 +0000" }, "message": "Merge \"Don\u0027t use the compiler driver for method resolution.\"" }, { "commit": "4db0bf9c4db6a09716c3388b7d2f88d534470339", "tree": "71feab1b20d4d773f881e0afc26dfcd236c177d1", "parents": [ "d1744d449cf2b56af7e0896b3729fac2a414e3af" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Nov 23 09:35:04 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 14:23:01 2015 +0000" }, "message": "Don\u0027t use the compiler driver for method resolution.\n\nThe compiler driver makes assumptions that don\u0027t hold for\nthe optimizing compiler, and will for example always go to\nslow path for an invoke-super when there\u0027s no verified method.\n\nAlso fix GenerateInvokeVirtual in the presence of intrinsics.\n\nNext change will address some of the TODOs in sharpening.cc.\n\nChange-Id: I2b0e543ee9b9bebcadb2d26de29e850c59ad58b9\n" }, { "commit": "b4536b7de576b20c74c612406c5d3132998075ef", "tree": "5265c07b51b4d79b2fd64c63d9b78d38b7601a8f", "parents": [ "883ef45b5d5a2e4005914c7b339881900976b6e7" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Nov 24 13:45:23 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Dec 01 11:38:03 2015 +0000" }, "message": "Optimizing/ARM: Implement kDexCachePcRelative dispatch.\n\nChange-Id: I0fe2da50a30a3f62bec8ea01688dd1fec84b1831\n" }, { "commit": "42e372e5a34d0fef88007bc5f40dd0fc7c03b58b", "tree": "434618ad8deec85313335b6ca63c6519639b4959", "parents": [ "95f7bbcd991fbfaead438a2866354714eb32af38" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 24 15:48:56 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 24 17:57:26 2015 +0000" }, "message": "Optimize HLoadClass when we know the class is in the cache.\n\nChange-Id: Iaa74591eed0f2eabc9ba9f9988681d9582faa320\n" }, { "commit": "888d067a67640e7d9fc349b0451dfe845acad562", "tree": "6fdbf0027e06b2f140ec9396b8a6d650a15c4e84", "parents": [ "51a354c747c8a76a4716a49a1f70bfd975d63787" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Nov 23 18:53:50 2015 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Nov 24 11:40:13 2015 +0000" }, "message": "Revamp art::CheckEntrypointTypes uses.\n\nChange-Id: I6e13e594539e766ed94524ac3282cec292ba91da\n" }, { "commit": "4f6b0b551ee549af12fce75c8379f5137fe4cfad", "tree": "0d6fb6de8fb262d6a1d4b8f802b59da59362d441", "parents": [ "0c32fdeaeda2a1e388e280da12662d1d18c834a2" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Nov 23 19:29:22 2015 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Nov 23 19:29:22 2015 +0000" }, "message": "Clean up read barrier related comments in Optimizing.\n\nBug: 12687968\nChange-Id: Idf2e371e01e10d9d32c95b150735e2c96244232e\n" }, { "commit": "01b88a2c8903954ca72067bab93471b2c6aca135", "tree": "0dbbc998527471123a96abb3f6b568c9329b1da2", "parents": [ "be0c2d91027929682fa754ae21943f52b4e111b7", "729645a937eb9f04a311b3c22471dcf3ebe9bcec" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Nov 23 08:51:44 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Nov 23 08:51:44 2015 +0000" }, "message": "Merge \"Explicitly add HLoadClass/HClinitCheck for HNewInstance.\"" }, { "commit": "729645a937eb9f04a311b3c22471dcf3ebe9bcec", "tree": "100c5d843a4d436b166d52e7a463ef6b283abc8c", "parents": [ "d846a2cc45aae5b1c84b5ac51cdd37a22b8447ff" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 19 13:29:02 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Nov 20 22:19:02 2015 +0000" }, "message": "Explicitly add HLoadClass/HClinitCheck for HNewInstance.\n\nbug:25735083\nbug:25173758\n\nChange-Id: Ie81cfa4fa9c47cc025edb291cdedd7af209a03db\n" }, { "commit": "c53c0797a78a89d637e4230503cc1feb27e855a8", "tree": "194d9215590abf283d2b278adf39462d3b704c1b", "parents": [ "ee7d4a3d574d8789fb0d1860eba284ae5099f10d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 19 15:48:33 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 19 16:08:12 2015 +0000" }, "message": "Clean up the special input in HInvokeStaticOrDirect.\n\nChange-Id: I4042aefbdac1a8c236d00e2e7145349a64f6486b\n" }, { "commit": "0debae7bc89eb05f7a2bf7dccd223318fad7c88d", "tree": "3da9656dc77d271b12c1b02793e7d713ae3da790", "parents": [ "991842a5273d20695dd5f35eb9a9e28c386c5b4b" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Nov 12 18:37:00 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Nov 17 15:12:00 2015 +0000" }, "message": "ART: Refactor GenerateTestAndBranch\n\nEach code generator implements a method for generating condition\nevaluation and branching to arbitrary labels. This patch refactors\nit for better clarity but also to generate fewer jumps when the true\nbranch is the fallthrough successor.\n\nThis is preliminary work for implementing HSelect.\n\nChange-Id: Iaa545a5ecbacb761c5aa241fa69140cf6eb5952f\n" }, { "commit": "0d5a281c671444bfa75d63caf1427a8c0e6e1177", "tree": "fd9bbe0f1c581bcc7c05bbfb2643ffe0b1fb014e", "parents": [ "dd4cbcc924c8ba2a578914a4a366996693bdcd74" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Nov 13 10:07:31 2015 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Sun Nov 15 12:16:41 2015 +0000" }, "message": "x86/x86-64 read barrier support for concurrent GC in Optimizing.\n\nThis first implementation uses slow paths to instrument heap\nreference loads and GC root loads for the concurrent copying\ncollector, respectively calling the artReadBarrierSlow and\nartReadBarrierForRootSlow (new) runtime entry points.\n\nNotes:\n- This implementation does not instrument HInvokeVirtual\n nor HInvokeInterface instructions (for class reference\n loads), as the corresponding read barriers are not stricly\n required with the current concurrent copying collector.\n- Intrinsics which may eventually call (on slow path) are\n disabled when read barriers are enabled, as the current\n slow path infrastructure does not support this case.\n- When read barriers are enabled, the code generated for a\n HArraySet instruction always go into the array set slow\n path for object arrays (delegating the operation to the\n runtime), as we are lacking a mechanism to keep a\n temporary register live accross a runtime call (needed for\n the instrumentation of type checking code, which requires\n two successive read barriers).\n\nBug: 12687968\nChange-Id: I14cd6107233c326389120336f93955b28ffbb329\n" }, { "commit": "cff81076cbb4bbe3841942f14326f4401fa3c8df", "tree": "f0a85a6059ff289ccb4b6e43b2b9b3924d481a31", "parents": [ "fe0ec35c68d57205bd8fe13bd195ae0b5a3ed180", "0f7dca4ca0be8d2f8776794d35edf8b51b5bc997" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 12 15:20:08 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 12 15:20:08 2015 +0000" }, "message": "Merge \"Optimizing/X86: PC-relative dex cache array addressing.\"" }, { "commit": "0f7dca4ca0be8d2f8776794d35edf8b51b5bc997", "tree": "cb2d99a0e9b7c50eb853a64b477268baaa77c11b", "parents": [ "ce0f43b97ffb5e4d14c5df6607d8efb46a5dc9d2" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Nov 02 14:36:43 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 12 10:43:47 2015 +0000" }, "message": "Optimizing/X86: PC-relative dex cache array addressing.\n\nAdd PC-relative dex cache array addressing for X86 and use\nit for better invoke-static/-direct dispatch. Also delay\nthe initialization to the PC-relative base until needed.\n\nChange-Id: Ib8634d5edce4920cd70172fd13211809cf6948d1\n" }, { "commit": "13c86fdd2238ef158594182b31040533e1c92965", "tree": "e25633ef5157e63090aeff10654ada3bc624ec2e", "parents": [ "c85f88b4c145015401d6849c83d9061bd998861f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Nov 11 12:37:46 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Nov 11 16:33:27 2015 +0000" }, "message": "Optimizing: Clean up constant location handling.\n\nLocations builder should use ConstantLocation() when the\ncode generator relies on a location to be constant. Code\ngenerator should interrogate locations, not inputs, about\nbeing const.\n\nChange-Id: Ic35bb84aa9f83e0977b151a0430aca6c88f19cf0\n" }, { "commit": "814893712135ada93d60776e2677b80fa6dfa7a8", "tree": "9d96264e89c2b3341dc78e07cb2bbb676d9e3f77", "parents": [ "5348137d15483f7aeaf03f5116b8d6e01b5c1bac" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed Nov 04 11:30:41 2015 -0500" }, "committer": { "name": "Mark P Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri Nov 06 13:39:23 2015 +0000" }, "message": "Improve X86 handling of constants to Field/Array Set\n\nAnTuTu 5.6 f.v.b() function on X86 showed several places where FP\nconstants were created using the stack, one in an inner loop.\n\nChange ArraySet and *FieldSet to allow constants, and then generate\ninteger constant moves, rather than forcing the constant to be\nmaterialized into a register. This will also help with register\npressure.\n\nChange-Id: Ibebe2fed748a1bbeca47c36e9536b9b2357fc3cb\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "b8b97695d178337736b61609220613b92f344d45", "tree": "8b412373d1f21cac78168e284e36977a7fab0875", "parents": [ "b24301b06b31b463f7e92ebc9a8f75839e54b746" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri May 22 16:58:19 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Thu Nov 05 10:44:24 2015 -0500" }, "message": "Fix conditional jump over jmp (X86/X86-64/ARM32)\n\nOptimize the code generation for \u0027if\u0027 statements to jump to the\n\u0027false\u0027 block if the next block to be generated is the \u0027true\u0027 block.\n\nAdd an X86-64 test for this case.\n\nNote that ARM64 \u0026 MIPS64 have not been updated.\n\nChange-Id: Iebb1352feb9d3bd0142d8b0621a2e3069a708ea7\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" } ], "next": "dc151b2346bb8a4fdeed0c06e54c2fca21d59b5d" }