)]}'
{
  "log": [
    {
      "commit": "19c5419d21376dd69404736b998fbbb9da54af56",
      "tree": "1e15b39f7c6662b2939bbaa7f34560fcea72e7b4",
      "parents": [
        "c46e708aa0bd7a007f0de8db1cad8ef49166ca10"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Nov 04 13:44:09 2016 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Nov 04 16:43:41 2016 +0000"
      },
      "message": "Revert \"Revert \"Enable IntermediateAddress for primitive arrays with read barriers.\"\"\n\nThis reverts commit 4a3aa578eff94eb10450fae1772deb7cb8ddc6a6.\n\nThe failing assertion (see b/30762467):\n\n08-09 11:32:46.767  1654  1656 F dex2oatd: art/compiler/optimizing/register_allocation_resolver.cc:325] Check failed: interval-\u003eGetDefinedBy()-\u003eIsActualObject() IntermediateAddress@InstanceFieldGet\n\nthat motivated the initial revert has been removed by a\nprevious CL (commit\n70e97462116a47ef2e582ea29a037847debcc029,\nhttps://android-review.googlesource.com/#/c/254920/).\n\nTest: ART host and target (ARM, ARM64) tests with `ART_USE_READ_BARRIER\u003dtrue`.\nBug: 26601270\nBug: 12687968\nChange-Id: I09cae0c6c38ca403924153e9f0eb0cc3ff4540e7\n"
    },
    {
      "commit": "91a6516103b8bf8bb75c3a2840cbdec7521e74a7",
      "tree": "d93043f578bfa5b8d76e8c175e6441b378c4a7b2",
      "parents": [
        "6a4abc633fa8580b06056ec6f80ced8ce7511277"
      ],
      "author": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@linaro.org",
        "time": "Mon Sep 19 13:54:30 2016 +0100"
      },
      "committer": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@linaro.org",
        "time": "Mon Sep 19 13:54:30 2016 +0100"
      },
      "message": "Remove the `CanTriggerGC` side-effects on a few instructions.\n\nThe side-effect was specified for these instructions as they call\nruntime. We now have a list of entrypoints that we know cannot trigger\nGC. We can avoid requiring the side-effect for those.\n\nTest: Run ART test suite on Nexus 5X and host.\n\nChange-Id: I0e0e6a4d701ce6c75aff486cb0d1bc7fe2e8dda4\n"
    },
    {
      "commit": "5319d3cca5a9b8e9e3f59421818272b966575172",
      "tree": "a90bd83b7e69bbff0be601088bb1c764125d8cf6",
      "parents": [
        "9cff32df754c428ef69ddb61e7600abfd4c75266"
      ],
      "author": {
        "name": "Wojciech Staszkiewicz",
        "email": "staszkiewicz@google.com",
        "time": "Mon Aug 01 17:48:59 2016 -0700"
      },
      "committer": {
        "name": "Wojciech Staszkiewicz",
        "email": "staszkiewicz@google.com",
        "time": "Mon Aug 08 11:24:26 2016 -0700"
      },
      "message": "Implement running user defined list of passes\n\nThis change introduces new dex2oat switch --run-passes\u003d. This switch\naccepts path to a text file with names of passes to run.\nCompiler will run optimization passes specified in the file rather\nthen the default ones.\n\nThere is no verification implemented on the compiler side. It is user\u0027s\nresponsibility to provide a list of passes that leads to successful\ngeneration of correct code. Care should be taken to prepare a list\nthat satisfies all dependencies between optimizations.\n\nWe only take control of the optional optimizations. Codegen (builder),\nand all passes required for register allocation will run unaffected\nby this mechanism.\n\nChange-Id: Ic3694e53515fefcc5ce6f28d9371776b5afcbb4f\n"
    },
    {
      "commit": "328429ff48d06e2cad4ebdd3568ab06de916a10a",
      "tree": "6290ac8afc3e93488382727f6765f548a2cfff04",
      "parents": [
        "79e73245140f4115039a7284b3797d701f368fe6"
      ],
      "author": {
        "name": "Artem Serov",
        "email": "artem.serov@linaro.org",
        "time": "Wed Jul 06 16:23:04 2016 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Jul 21 09:16:43 2016 +0000"
      },
      "message": "ARM: Port instr simplification of array accesses.\n\nAfter changing the addressing mode for array accesses (in\nhttps://android-review.googlesource.com/248406) the \u0027add\u0027\ninstruction that calculates the base address for the array can be\nshared across accesses to the same array.\n\nBefore https://android-review.googlesource.com/248406:\n    add IP, r[Array], r[Index0], LSL #2\n    ldr r0, [IP, #12]\n    add IP, r[Array], r[Index1], LSL #2\n    ldr r0, [IP, #12]\n\nBefore this CL:\n    add IP. r[Array], #12\n    ldr r0, [IP, r[Index0], LSL #2]\n    add IP. r[Array], #12\n    ldr r0, [IP, r[Index1], LSL #2]\n\nAfter this CL:\n    add IP. r[Array], #12\n    ldr r0, [IP, r[Index0], LSL #2]\n    ldr r0, [IP, r[Index1], LSL #2]\n\nLink to the original optimization:\n    https://android-review.googlesource.com/#/c/127310/\n\nTest: Run ART test suite on Nexus 6.\nChange-Id: Iee26f9a0a7ca46abb90e3f60d19d22dc8dee4d8f\n"
    },
    {
      "commit": "e6dbf48d7a549e58a3d798bbbdc391e4d091b432",
      "tree": "e9edbb884c0143a38e0b32350119999bc11b4dee",
      "parents": [
        "45513eb694fe55cf02ca6e8f0884621a6c3f6268"
      ],
      "author": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@linaro.org",
        "time": "Mon Oct 19 10:10:41 2015 +0100"
      },
      "committer": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@linaro.org",
        "time": "Mon Oct 19 10:10:41 2015 +0100"
      },
      "message": "ARM64: Instruction simplification for array accesses.\n\nHArrayGet and HArraySet with variable indexes generate two\ninstructions on arm64, like\n\n    add temp, obj, #data_offset\n    ldr out, [temp, index LSL #shift_amount]\n\nWhen we have multiple accesses to the same array, the initial `add`\ninstruction is redundant.\n\nThis patch introduces the first instruction simplification in the\narm64-specific instruction simplification pass. It splits HArrayGet\nand HArraySet using the new arm64-specific IR HIntermediateAddress.\nAfter that we run GVN again to squash the multiple occurrences of\nHIntermediateAddress.\n\nChange-Id: I2e3d12fbb07fed07b2cb2f3f47f99f5a032f8312\n"
    }
  ]
}