)]}' { "log": [ { "commit": "19a19cffd197a28ae4c9c3e59eff6352fd392241", "tree": "265b971afd0e33afc8986317aea2f5a6fe817aec", "parents": [ "7c049c1f34220b0dc1a7f68f3b30f388bae7bdb9" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 22 16:07:05 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 29 13:01:48 2014 +0000" }, "message": "Add support for static fields in optimizing compiler.\n\nChange-Id: Id2f010589e2bd6faf42c05bb33abf6816ebe9fa9\n" }, { "commit": "7c049c1f34220b0dc1a7f68f3b30f388bae7bdb9", "tree": "3f37c8ee266916adc6486a6b5c7674bf0e13da0e", "parents": [ "be29639a910daaa5bdb0c32be1e03477cf12babb", "fb311f8a0d0eafd535f8d25d262dcea35a8feaa4" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Oct 29 11:06:45 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Oct 29 11:06:46 2014 +0000" }, "message": "Merge \"Remove useless suspend points from arm/arm64 AGET/APUT.\"" }, { "commit": "7c4954d429626a6ceafbf05be41bf5f840894e44", "tree": "9d4a088cc2e259235819f105a21e5a3d58bd0139", "parents": [ "4816ecfc1b2d544685ec5edcdeaad6870f6bfd7e" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 28 16:57:40 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 28 17:53:33 2014 +0000" }, "message": "[optimizing compiler] Add division for floats and doubles\n\nbackends: x86, x86_64, arm.\n\nAlso:\n- ordered instructions based on their name.\n- add missing kNoOutputOverlap to add/sub/mul.\n\nChange-Id: Ie47cde3b15ac74e7a1660c67a2eed1d7871f0ad0\n" }, { "commit": "fb311f8a0d0eafd535f8d25d262dcea35a8feaa4", "tree": "bc8a176f80dbb91adb8c66953aaf56829595f9ec", "parents": [ "4816ecfc1b2d544685ec5edcdeaad6870f6bfd7e" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Oct 28 17:51:22 2014 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Oct 28 17:51:22 2014 +0000" }, "message": "Remove useless suspend points from arm/arm64 AGET/APUT.\n\nChange-Id: Ib17da0c02599b943cb62582a8a25f187272d423b\n" }, { "commit": "4816ecfc1b2d544685ec5edcdeaad6870f6bfd7e", "tree": "81af9c148bf1ac0806e193ac1958deb3bf4c7a9a", "parents": [ "d3271e8a48768ed53bfa2515474b57245e7d9a41", "705664321a5cc1418255172f92d7d7195cf60a7b" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 28 11:21:22 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Oct 28 11:21:22 2014 +0000" }, "message": "Merge \"Add long bitwise not instruction in the optimizing compiler.\"" }, { "commit": "46774767fcf7780d1455e755729198648d08742e", "tree": "09a5d87ff0acbc7eb1fa94ec901ba10009178f03", "parents": [ "11bd683f6dbebe2f3d02fa383fc9dbc69a83ace8" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Wed Oct 22 11:37:02 2014 -0700" }, "committer": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Mon Oct 27 20:19:37 2014 -0700" }, "message": "ART: Add support for patching and loading OAT files compiled with PIC\n\n* Images (.art) compiled with pic now have a new field added.\n* isDexOptNeeded will now skip patch-ing for apps compiled PIC\n* First-boot patching now only copies boot.art, boot.oat is linked\n\nAs a result, all system preopted dex files (with --compile-pic) no\nlonger take up any space in /data/dalvik-cache/\u003cisa\u003e.\n\nBug: 18035729\nChange-Id: Ie1acad81a0fd8b2f24e1f3f07a06e6fdb548be62\n" }, { "commit": "2d2621a1463d2f3f03fa73503fa42e43657cdcfc", "tree": "1f7cf393693d72db5c186f99b04ac511958c6418", "parents": [ "ac293277b69882105810fabd6c53f55de58823fe" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Thu Oct 23 16:48:06 2014 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Oct 27 16:49:43 2014 -0700" }, "message": "Optimize method linking\n\nAdded more inlining, removed imt array allocation and replaced it\nwith a handle scope. Removed some un-necessary handle scopes.\n\nAdded logic to base interface method tables from the superclass so\nthat we dont need to reconstruct for every interface (large win).\n\nFacebook launch Dalvik KK MR2:\nTotalTime: 3165\nTotalTime: 3652\nTotalTime: 3143\nTotalTime: 3298\nTotalTime: 3212\nTotalTime: 3211\n\nFacebook launch TOT before:\nWaitTime: 3702\nWaitTime: 3616\nWaitTime: 3616\nWaitTime: 3687\nWaitTime: 3742\nWaitTime: 3767\n\nAfter optimizations:\nWaitTime: 2903\nWaitTime: 2953\nWaitTime: 2918\nWaitTime: 2940\nWaitTime: 2879\nWaitTime: 2792\n\nLinkInterfaceMethods no longer one of the hottest methods, new list:\n4.73% art::ClassLinker::LinkVirtualMethods(art::Thread*, art::Handle\u003cart::mirror::Class\u003e)\n3.07% art::DexFile::FindClassDef(char const*) const\n2.94% art::mirror::Class::FindDeclaredStaticField(art::mirror::DexCache const*, unsigned int)\n2.90% art::DexFile::FindStringId(char const*) const\n\nBug: 18054905\nBug: 16828525\n\n(cherry picked from commit 1fb463e42cf1d67595cff66d19c0f99e3046f4c4)\n\nChange-Id: I27cc70178fd3655fbe5a3178887fcba189d21321\n" }, { "commit": "4985fdf030e8e78f1c05266e989534cb26812bff", "tree": "f11c8a1118be3109ab6e2292b35bcd2ad4f061a2", "parents": [ "2deace28b16d3161ccd6a85a2c577e83f4b25364", "66c6d7bdfdd535e6ecf4461bba3804f1a7794fcd" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 27 18:10:02 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 27 18:10:02 2014 +0000" }, "message": "Merge \"Rewrite class initialization check elimination.\"" }, { "commit": "705664321a5cc1418255172f92d7d7195cf60a7b", "tree": "bdb7a60edff3e13c9bb6658d9ba20d3541a9c50d", "parents": [ "2deace28b16d3161ccd6a85a2c577e83f4b25364" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 24 16:20:17 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 27 17:33:47 2014 +0000" }, "message": "Add long bitwise not instruction in the optimizing compiler.\n\n- Add support for the not-long (long integer one\u0027s\n complement negation) instruction in the optimizing\n compiler.\n- Add a 64-bit NOT instruction (notq) to the x86-64\n assembler.\n- Generate ARM, x86 and x86-64 code for long HNot nodes.\n- Gather not-related tests in test/416-optimizing-arith-not.\n\nChange-Id: I2d5b75e9875664d6032d04f8401b2bbb84506948\n" }, { "commit": "1ba0f596e9e4ddd778ab431237d11baa85594eba", "tree": "c1d51616adf4d98aab3ebccf47ad5146635cb87f", "parents": [ "1ef3495abfa2a858b3cc7a1844383c8e7dff0b60" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 27 15:14:55 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 27 17:20:35 2014 +0000" }, "message": "Support hard float on arm in optimizing compiler.\n\nAlso bump oat version, needed after latest hard float switch.\n\nChange-Id: Idf5acfb36c07e74acff00edab998419a3c6b2965\n" }, { "commit": "66c6d7bdfdd535e6ecf4461bba3804f1a7794fcd", "tree": "178908b5c657241305f99aa44949427c18d1900a", "parents": [ "1ef3495abfa2a858b3cc7a1844383c8e7dff0b60" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 16 15:41:48 2014 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 27 10:04:25 2014 +0000" }, "message": "Rewrite class initialization check elimination.\n\nSplit the notion of type being in dex cache away from the\nclass being initialized. Include static invokes in the class\ninitialization elimination pass.\n\nChange-Id: Ie3760d8fd55b987f9507f32ef51456a57d79e3fb\n" }, { "commit": "1ef3495abfa2a858b3cc7a1844383c8e7dff0b60", "tree": "5e3ccf9388de6522360f19510530e72ebc9651bc", "parents": [ "07cce74751e9d1d818c860c83f678c69de90b1fb", "a4426cff8a81e6af05aa8cc44c162110ccf2d397" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 27 09:44:31 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 27 09:44:33 2014 +0000" }, "message": "Merge \"Quick: Fix wide Phi detection in GVN, clean up INVOKEs.\"" }, { "commit": "3e3364e267117462894e0c3b7d9b413b25d28057", "tree": "b5f96ac99323be3e210156de8d97a61af7e1a19c", "parents": [ "c57a66d5aadfd682c63e34ec1b1f304260f8c333", "2c4257be8191c5eefde744e8965fcefc80a0a97d" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Sat Oct 25 00:14:26 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Sat Oct 25 00:14:26 2014 +0000" }, "message": "Merge \"Tidy logging code not using UNIMPLEMENTED.\"" }, { "commit": "5667fdbb6e441dee7534ade18b628ed396daf593", "tree": "a06fe0a79b3465571556d13f509daf1f664fc614", "parents": [ "b62ff579cd870b0bf213765b07d7b404d15ece7b" ], "author": { "name": "Zheng Xu", "email": "zheng.xu@arm.com", "time": "Thu Oct 23 18:29:55 2014 +0800" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Fri Oct 24 16:27:22 2014 -0700" }, "message": "ARM: Use hardfp calling convention between java to java call.\n\nThis patch default to use hardfp calling convention. Softfp can be enabled\nby setting kArm32QuickCodeUseSoftFloat to true.\n\nWe get about -1 ~ +5% performance improvement with different benchmark\ntests. Hopefully, we should be able to get more performance by address the left\nTODOs, as some part of the code takes the original assumption which is not\noptimal.\n\nDONE:\n1. Interpreter to quick code\n2. Quick code to interpreter\n3. Transition assembly and callee-saves\n4. Trampoline(generic jni, resolution, invoke with access check and etc.)\n5. Pass fp arg reg following aapcs(gpr and stack do not follow aapcs)\n6. Quick helper assembly routines to handle ABI differences\n7. Quick code method entry\n8. Quick code method invocation\n9. JNI compiler\n\nTODO:\n10. Rework ArgMap, FlushIn, GenDalvikArgs and affected common code.\n11. Rework CallRuntimeHelperXXX().\n\nChange-Id: I9965d8a007f4829f2560b63bcbbde271bdcf6ec2\n" }, { "commit": "b62ff579cd870b0bf213765b07d7b404d15ece7b", "tree": "e2156d8b5c61f2c3b58617a52583e2c5d0397f91", "parents": [ "c6c9e5d4511f2b23cab09f9d6f535f96fe33cb9b", "5c5676b26a08454b3f0133783778991bbe5dd681" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Fri Oct 24 22:26:23 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 24 22:26:24 2014 +0000" }, "message": "Merge \"ART: Add div/rem zero check elimination flag\"" }, { "commit": "8fe0e35c546921a3576411948efffb3c813ef686", "tree": "96cfa612a25dcf567d84d76f13c145339c17d73b", "parents": [ "98c271d517bc4d25fc6879b4b8e35ea93885d9e2" ], "author": { "name": "Stephen Kyle", "email": "stephen.kyle@arm.com", "time": "Thu Oct 16 15:02:42 2014 +0100" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Fri Oct 24 14:40:22 2014 -0700" }, "message": "ART: Prevent float inference back to SSA in-regs.\n\n.method public static getInt(I)I\n .registers 2\n const/4 v0, 0x0\n if-ne v0, v0, :after\n float-to-int v0, v0\n :exit\n add-int/2addr v0, v1\n return v0\n :after\n move v1, v0\n goto :exit\n.end method\n\nIn this code sample, v1 is the single parameter to this method. In one\nof the phi-nodes inserted between :exit and add-int/2addr, v1\u0027s two\nincoming SSA regs are:\n - the initial def of v1 as a parameter\n - the v1 def\u0027d at move v1, v0.\nDuring type inference, because the 2nd def is a float (because of the\nearlier float-to-int v0, v0) this will change the type of the 1st def to a\nfloat as well, which is incorrect since the first parameter is known to be\nnon-float.\n\nThis fix checks during phi-node type-inference if an SSA reg that is the\ninitial def of a parameter vreg is about to be set as float when it was\nnot previously, and skips the inference if so.\n\nIn this case, when using a hard-float ABI, having the in-reg v1 set as\nfloat causes FlushIns() to read the argument to the method from an FP reg,\nwhen the argument will be passed in a core reg by any caller.\n\nAlso included is a smali test for this bug: compare difference between\n./run-test --64 800\n./run-test --64 --interpreter 800\nwhen the vreg_analysis patch has not been applied.\n(Requires 64-bit because 32-bit ARM currently does not use hard-float.)\n\ngetInt(I)I should return its argument, but it returns an incorrect\nvalue.\n\nChange-Id: I1d4b5be6a931fe853279e89dd820820f29823da1\nSigned-off-by: Stephen Kyle \u003cstephen.kyle@arm.com\u003e\n" }, { "commit": "2c4257be8191c5eefde744e8965fcefc80a0a97d", "tree": "9db3e1f1c60f2df29638ba3ce9d5d5bb8b26ca2c", "parents": [ "98c271d517bc4d25fc6879b4b8e35ea93885d9e2" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Fri Oct 24 14:20:06 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Fri Oct 24 14:23:42 2014 -0700" }, "message": "Tidy logging code not using UNIMPLEMENTED.\n\nChange-Id: I7a79c1671a6ff8b2040887133b3e0925ef9a3cfe\n" }, { "commit": "b5de00f1c8f53e6552f1778702673c6274a98bb3", "tree": "bdfa7c685c8244b783ddb51b065fdf145f2c28a3", "parents": [ "64727aeef8f4243f2058a19a43a937248a60dae1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 24 15:43:49 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 24 16:10:51 2014 +0100" }, "message": "Fix encoding of imul in x86_64 assembler.\n\nChange-Id: I5b97f5698ed8ec9d0759d0e1eba8be29119c16c5\n" }, { "commit": "64727aeef8f4243f2058a19a43a937248a60dae1", "tree": "9bf09ff29bb49d4be382e49822300668913f18e5", "parents": [ "8bde036ebd74ce94477e65077bed6dea9c29616b", "2e07b4f0a84a7968b4690c2b1be2e2f75cc6fa8e" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 24 10:48:38 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 24 10:48:39 2014 +0000" }, "message": "Merge \"Revert \"Revert \"Implement long negate instruction in the optimizing compiler.\"\"\"" }, { "commit": "32da24bb26885a9877adcef5b53f283d44b622d2", "tree": "eae9d56de1bb0c156f5ea310b83a7aa7027515e2", "parents": [ "02567379e7099682345fd59d45a23e17711c9ddd", "8d6ae524ed5d2fed1f9e789d6de9764d374afa43" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 24 10:44:50 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 24 10:44:51 2014 +0000" }, "message": "Merge \"Fix wrong unsigned to signed conversions.\"" }, { "commit": "2e07b4f0a84a7968b4690c2b1be2e2f75cc6fa8e", "tree": "2fc5c75594b2cf8be1d6bd295d36c627af1651fe", "parents": [ "02567379e7099682345fd59d45a23e17711c9ddd" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 18:12:09 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 24 11:22:59 2014 +0100" }, "message": "Revert \"Revert \"Implement long negate instruction in the optimizing compiler.\"\"\n\nThis reverts commit 30ca3d847fe72cfa33e1b2473100ea2d8bea4517.\n\nChange-Id: I188ca8d460d55d3a9966bcf31e0588575afa77d2\n" }, { "commit": "8d6ae524ed5d2fed1f9e789d6de9764d374afa43", "tree": "3283f899900f19ecca8540b680755f44d5d70d1c", "parents": [ "46fdec13b6dcaf932aa9fb1338f32df01aa0d959" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 23 18:32:13 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 23 18:32:13 2014 +0100" }, "message": "Fix wrong unsigned to signed conversions.\n\nThe HIntConstant node takes an int32_t, so we have to keep things signed.\n\nChange-Id: Ib3fa50e87f99118d320cbb381f619d5be9287530\n" }, { "commit": "b4e1a4d3156528d3e2b863f08c24793310a5b6bc", "tree": "e4725e899495329639e01ca816f9436f71b75407", "parents": [ "be8c0217c858dcabc13cefecdeced8610e3e9d6f", "927307433af0a9322e8ba77eda37168512a73683" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 23 17:28:50 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 23 17:28:50 2014 +0000" }, "message": "Merge \"ART: Add basic tests for materialized conditions.\"" }, { "commit": "30ca3d847fe72cfa33e1b2473100ea2d8bea4517", "tree": "a66582c2cb6026be2f59ba66ff437429b67bbe44", "parents": [ "46fdec13b6dcaf932aa9fb1338f32df01aa0d959" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 18:07:44 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 18:07:44 2014 +0100" }, "message": "Revert \"Implement long negate instruction in the optimizing compiler.\"\n\nThis reverts commit 66ce173a40eff4392e9949ede169ccf3108be2db.\n" }, { "commit": "927307433af0a9322e8ba77eda37168512a73683", "tree": "6166be9b846cb8a639121e6977abda177e7ffb01", "parents": [ "46fdec13b6dcaf932aa9fb1338f32df01aa0d959" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@arm.com", "time": "Wed Oct 01 12:55:56 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 23 17:36:52 2014 +0100" }, "message": "ART: Add basic tests for materialized conditions.\n\nChange-Id: I4acef30cc6a48b5fe07d55db6b9cf0d093b326ee\n" }, { "commit": "a4426cff8a81e6af05aa8cc44c162110ccf2d397", "tree": "66545e7d173808b5f0182c35b58eae78484f7341", "parents": [ "b08f4dcf90215ed49e0b796ab3e609bd605be8ba" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Oct 22 17:15:53 2014 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 23 17:17:09 2014 +0100" }, "message": "Quick: Fix wide Phi detection in GVN, clean up INVOKEs.\n\nThe detection of a wide Phi has been incorrectly looking at\nthe current LVN\u0027s wide sreg value map but we only intersect\nlive values and thus very often lose the information. This\nresults in failure to identify identical values, i.e.\npotential missed optimizations. It also caused the bloating\nof the global value map with values we would not use.\n\nRewrite the wide Phi detection to use the first merged LVN\u0027s\nnotion of wide sreg. For this to work we also need to use\nthe method\u0027s shorty to mark wide arguments.\n\nAlso clean up INVOKEs\u0027 processing to avoid another source\nof bloating the global value map.\n\nBug: 16398693\nChange-Id: I76718af7d62a8c6883ef43e4f47058f7eaf479e1\n" }, { "commit": "66ce173a40eff4392e9949ede169ccf3108be2db", "tree": "552bc6275388c3bc6ecd4f549ffcd1422c020f82", "parents": [ "e2b2cbf8bffdf9ee3ece487fde9ac78652b4abaf" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 16:38:33 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 17:08:48 2014 +0100" }, "message": "Implement long negate instruction in the optimizing compiler.\n\n- Add support for the neg-long (long integer two\u0027s\n complement negate) instruction in the optimizing compiler.\n- Add a 64-bit NEG instruction (negq) to the x86-64\n assembler.\n- Generate ARM, x86 and x86-64 code for integer HNeg nodes.\n- Put neg-related tests into test/415-optimizing-arith-neg.\n\nChange-Id: I1fbe9611e134408a6b8745d1df20ab6ffa5e50f2\n" }, { "commit": "096cc029451f4d48a79361ec206b6a7f3f58dd7c", "tree": "cf6b316e3a9500355fbb32b89befddcdde8a1e72", "parents": [ "46de37a6a314368cc5fc52743095e48a864ed9b5" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 17:01:13 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 17:01:13 2014 +0100" }, "message": "[optimizing compiler] Handle SUB_FLOAT/DOUBLE nodes\n\nAlso add 414-optimizing-arith-sub to\nTEST_ART_BROKEN_OPTIMIZING_ARM64_RUN_TESTS.\n\nChange-Id: Ia1b7ff7857bc0e488b9b8ed8a36efb1a3a9bad36\n" }, { "commit": "1135168a1a9e2a6493657be8c5e91d67e5f224a7", "tree": "02d16c2aaaf0d0a3a31e47e9b219509b4840b3d6", "parents": [ "e833b110876fa8fe34a08f06d2521c74488180bb" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 15:38:15 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 16:25:09 2014 +0100" }, "message": "[optimizing compiler] Add float/double subtraction\n\n- for arm, x86, x86_64\n- add tests\n- a bit of clean up\n\nChange-Id: I3761b0d908aca3e3c5d60da481fafb423ff7c9b9\n" }, { "commit": "5319defdf502fc4569316473846b83180ec08035", "tree": "909c6b29f065c79c8368a283946947cbb582d1c7", "parents": [ "37a7188810e865a1ee0a7bdc2d01d62c1f1ea49e" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@arm.com", "time": "Thu Oct 23 10:03:10 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 23 13:44:42 2014 +0100" }, "message": "ART: optimizing compiler: initial support for ARM64.\n\nThe ARM64 port uses VIXL for code generation, to which it defers work\nlike label binding and branch resolving, register type coherency\nchecking, and immediate values handling.\n\nChange-Id: I0a44508c0c991f472a63e67b3469cdd878fe1a68\nSigned-off-by: Serban Constantinescu \u003cserban.constantinescu@arm.com\u003e\nSigned-off-by: Alexandre Rames \u003calexandre.rames@arm.com\u003e\n" }, { "commit": "039b6e2fd3bfadbd1ee8583002f673d6ccba5b7e", "tree": "1c42d51799207bb7c4ced079fce4878274fa8e81", "parents": [ "1e4dc259b4242c1a03415b5b5f4aed7a23e53f79" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 12:32:11 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 12:47:38 2014 +0100" }, "message": "Remove obsolete TODOs from codegen tests\n\nThe features are already exercised by the art test 411-optimizing-arith.\n\nChange-Id: Id008931e0ed8206ced11ecc85a80a7e4aef3e68e\n" }, { "commit": "1122c7fc277130814dd1d47b5e8be3ac35b1a5fc", "tree": "06e7b8f42b392fa7077d0612da94d4696e3c6a6e", "parents": [ "fd9e95619d94608687af201bb296b807716cc7c3", "1cc5f251df558b0e22cea5000626365eb644c727" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 09:17:41 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 23 09:17:42 2014 +0000" }, "message": "Merge \"Implement int bit-wise not operation in the optimizing compiler.\"" }, { "commit": "1cc5f251df558b0e22cea5000626365eb644c727", "tree": "5e65a32366261646edce02283a185928adba79b5", "parents": [ "b08f4dcf90215ed49e0b796ab3e609bd605be8ba" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 22 18:06:21 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 10:12:06 2014 +0100" }, "message": "Implement int bit-wise not operation in the optimizing compiler.\n\n- Add support for the not-int (integer one\u0027s complement\n negate) instruction in the optimizing compiler.\n- Extend the HNot control-flow graph node type and make it\n inherit from HUnaryOperation.\n- Generate ARM, x86 and x86-64 code for integer HNeg nodes.\n- Exercise these additions in the codegen_test gtest, as there\n is not direct way to assess the support of not-int from a\n Java source. Indeed, compiling a Java expression such as\n `~a\u0027 using javac and then dx generates an xor-int/lit8 Dex\n instruction instead of the expected not-int Dex instruction.\n This is probably because the Java bytecode has an `ixor\u0027\n instruction, but there\u0027s not instruction directly\n corresponding to a bit-wise not operation.\n\nChange-Id: I223aed75c4dac5785e04d99da0d22e8d699aee2b\n" }, { "commit": "cf7f19135f0e273f7b0136315633c2abfc715343", "tree": "ffa4d9efd9c45f4b6789acc1f534bb9327052b7e", "parents": [ "aea6888b056be21adf762e066c7f33b8939b8a06" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Wed Oct 22 22:06:39 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Wed Oct 22 22:21:57 2014 -0700" }, "message": "C++11 related clean-up of DISALLOW_..\n\nMove DISALLOW_COPY_AND_ASSIGN to delete functions. By no having declarations\nwith no definitions this prompts better warning messages so deal with these\nby correcting the code.\nAdd a DISALLOW_ALLOCATION and use for ValueObject and mirror::Object.\nMake X86 assembly operand types ValueObjects to fix compilation errors.\nTidy the use of iostream and ostream.\nAvoid making cutils a dependency via mutex-inl.h for tests that link against\nlibart. Push tracing dependencies into appropriate files and mutex.cc.\nx86 32-bit host symbols size is increased for libarttest, avoid copying this\nin run-test 115 by using symlinks and remove this test\u0027s higher than normal\nulimit.\nFix the RunningOnValgrind test in RosAllocSpace to not use GetHeap as it\nreturns NULL when the heap is under construction by Runtime.\n\nChange-Id: Ia246f7ac0c11f73072b30d70566a196e9b78472b\n" }, { "commit": "aea6888b056be21adf762e066c7f33b8939b8a06", "tree": "bfa17655ed3060b41e1cfd1583e590e9d9042f0a", "parents": [ "b08f4dcf90215ed49e0b796ab3e609bd605be8ba", "c7dd295a4e0cc1d15c0c96088e55a85389bade74" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Wed Oct 22 19:10:23 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Oct 22 19:10:24 2014 +0000" }, "message": "Merge \"Tidy up logging.\"" }, { "commit": "c7dd295a4e0cc1d15c0c96088e55a85389bade74", "tree": "0c08a2236bc9ba5d9a4dc75d4dd0ed2d76f8f1c6", "parents": [ "94e5af8602150efa95bde35cc9be9891ddf30135" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Tue Oct 21 23:31:19 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Wed Oct 22 12:06:23 2014 -0700" }, "message": "Tidy up logging.\n\nMove gVerboseMethods to CompilerOptions. Now \"--verbose-methods\u003d\" option to\ndex2oat rather than runtime argument \"-verbose-methods:\".\nMove ToStr and Dumpable out of logging.h, move LogMessageData into logging.cc\nexcept for a forward declaration.\nRemove ConstDumpable as Dump methods are all const (and make this so if not\ncurrently true).\nMake LogSeverity an enum and improve compile time assertions and type checking.\nRemove log_severity.h that\u0027s only used in logging.h.\nWith system headers gone from logging.h, go add to .cc files missing system\nheader includes.\nAlso, make operator new in ValueObject private for compile time instantiation\nchecking.\n\nChange-Id: I3228f614500ccc9b14b49c72b9821c8b0db3d641\n" }, { "commit": "b08f4dcf90215ed49e0b796ab3e609bd605be8ba", "tree": "1af9f0e4af680137992a6bc9aabb7b9965d9613e", "parents": [ "98c171127c55cfd339458d96a2d3b7b8912474c1", "a65c1dbb8d3511da6c0804f8063c453f744629c2" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Oct 22 15:22:43 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Oct 22 15:22:43 2014 +0000" }, "message": "Merge \"X86 Long Min/Max: Avoid calling SRegToVReg with -1\"" }, { "commit": "48dee04f4e4214b0fdd8acd0587ef6b08d3d2456", "tree": "aa50172b03bce73ba8d3ef535696c7684d047445", "parents": [ "b5bfa96ff20e86316961327dec5c859239dab6a0" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Oct 22 15:54:12 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Oct 22 15:54:12 2014 +0100" }, "message": "Minor fix in codegen tests.\n\nChange-Id: I9b843536353d4f820b969895d5f75ee9b679aff0\n" }, { "commit": "b5bfa96ff20e86316961327dec5c859239dab6a0", "tree": "c37c4260f59a5eb79b33e3a81142eefc7bc49390", "parents": [ "46bf5e0759e80bbe69130d6731a95fd07e10507c" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 21 18:02:24 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Oct 22 15:20:25 2014 +0100" }, "message": "Add multiplication for floats/doubles in optimizing compiler\n\nChange-Id: I61de8ce1d9e37e30db62e776979b3f22dc643894\n" }, { "commit": "a3d05a40de076aabf12ea284c67c99ff28b43dbf", "tree": "acbe183e7637a333bdaaf0910731b053f2be0f26", "parents": [ "2da28f2a9e79a09a4044521dc4d00320fcdcd041" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 20 17:41:32 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 22 13:49:47 2014 +0000" }, "message": "Implement array creation related DEX instructions.\n\nImplement new-array, filled-new-array, and fill-array-data.\n\nChange-Id: I405560d66777a57d881e384265322617ac5d3ce3\n" }, { "commit": "a65c1dbb8d3511da6c0804f8063c453f744629c2", "tree": "bf8d22524d37c9150dcb66049d029d6ec8223310", "parents": [ "6207b2b0c299798fd5213bb3d6c05e5b978747e8" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Oct 21 17:44:32 2014 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed Oct 22 09:20:32 2014 -0400" }, "message": "X86 Long Min/Max: Avoid calling SRegToVReg with -1\n\nIt is possible that the result of a call to min/max can\u0027t be combined\nwith the following move. In that case, the destination will use the\ndefault long return value (EAX/EDX), with a s_reg_low value of -1.\nA debug compiler will assert fail in that case.\n\nFix: A result with no s_reg_low must be unused. Just return with no\ncode generated, like X86 GenInlinedAbsFloat().\n\nSeen compiling GmsCore.apk on the host with a debug backend.\n\nChange-Id: I8006e822e8dcb2112d86e4047bb2e3037ba6fece\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "965ac7e0e6b83dc8bfe3f27305d7029d2febac79", "tree": "876ca908761e59807eecdb668902a38e03a7e55f", "parents": [ "70f4b9929048e71c4231d7976080be6277c3374b", "b762d2ebf9dc604561d9915c96b377235c94960c" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 22 09:16:53 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Oct 22 09:16:54 2014 +0000" }, "message": "Merge \"Various fixes related to integer negate operations.\"" }, { "commit": "b762d2ebf9dc604561d9915c96b377235c94960c", "tree": "aa6060b282db511651908d232a6b16ecbb22b755", "parents": [ "4ff20eba94a2519e5bac57b5f92e04741ea90141" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 22 10:11:06 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 22 10:11:06 2014 +0100" }, "message": "Various fixes related to integer negate operations.\n\n- Emit an RSB instruction for HNeg nodes in the ARM code\n generator instead of RSBS, as we do not need to update the\n condition code flags in this case.\n- Simply punt when trying to statically evaluate a long\n unary operation, instead of aborting.\n- Move a test case to the right place.\n\nChange-Id: I35eb8dea58ed35258d4d8df77181159c3ab07b6f\n" }, { "commit": "1f897b98e19a9b0192a373ee9d3c2fcb4a9463f4", "tree": "d857ca02dec553b30a6fd8d5d39ca88b2ece95ab", "parents": [ "4ff20eba94a2519e5bac57b5f92e04741ea90141" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 17:14:05 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 17:14:05 2014 +0100" }, "message": "Fix register_allocator_test after reg alloc changes.\n\nChange-Id: Ieaf5daf35efaff6685720a93a442cd7a152f1567\n" }, { "commit": "c8147a76ed2f440f38329dc08ff889d393b5c535", "tree": "bc5b83636edd6c7c6fb170dd8bddc776deefe43f", "parents": [ "8d2c23e0a2d1b449448675e0ba822953cee52b18" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 16:06:20 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 16:51:50 2014 +0100" }, "message": "Fix off by one errors in linear scan register allocator.\n\nChange-Id: I65eea3cc125e12106a7160d30cb91c5d173bd405\n" }, { "commit": "8d2c23e0a2d1b449448675e0ba822953cee52b18", "tree": "4c4862774c2af16316e8909285051d607d5f16d9", "parents": [ "f62819347a8416b42070bf8e5ec64e2eac2fee8d", "102cbed1e52b7c5f09458b44903fe97bb3e14d5f" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 15:05:44 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Oct 21 15:05:45 2014 +0000" }, "message": "Merge \"Implement register allocator for floating point registers.\"" }, { "commit": "102cbed1e52b7c5f09458b44903fe97bb3e14d5f", "tree": "cb0a433c8f284021298c8a0c4dd0da97ca9d198a", "parents": [ "07f5c5edb7ef24ac35364e6ef9a8107a44e6564e" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 15 18:31:05 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 16:03:51 2014 +0100" }, "message": "Implement register allocator for floating point registers.\n\nAlso:\n- Fix misuses of emitting the rex prefix in the x86_64 assembler.\n- Fix movaps code generation in the x86_64 assembler.\n\nChange-Id: Ib6dcf6e7c4a9c43368cfc46b02ba50f69ae69cbe\n" }, { "commit": "f62819347a8416b42070bf8e5ec64e2eac2fee8d", "tree": "a2b5bc49dbc2bb9128aa165289edbae7f98d1018", "parents": [ "a21bf6e7f64f142f371707c9a06aefdb1d383b5a", "a4a3f407edb824d09588f4dbb5111f3a74c160a9" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Tue Oct 21 14:57:14 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Oct 21 14:57:15 2014 +0000" }, "message": "Merge \"Enable generic JNI for x86 and ARM when interpret-only.\"" }, { "commit": "a4a3f407edb824d09588f4dbb5111f3a74c160a9", "tree": "dc128cf8b733e4aa71182c767f30948b7043c954", "parents": [ "e6798a8340fa4a02bf7719f8c45b04635ff4e9dd" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Mon Oct 20 18:10:34 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Tue Oct 21 07:48:40 2014 -0700" }, "message": "Enable generic JNI for x86 and ARM when interpret-only.\n\nChange-Id: I006ce1ce74acd0f0d53d380e28e409d24d772ea3\n" }, { "commit": "07f5c5edb7ef24ac35364e6ef9a8107a44e6564e", "tree": "5d185a5e8c9b9b07e2ec8a9d0048dd12e0df4eff", "parents": [ "fdc31730353f0b3d3064cdf8b6aacabea26eb4f7", "9240d6a2baa9ed1e18ee08744b461fe49a1ee269" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 21 13:34:59 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Oct 21 13:34:59 2014 +0000" }, "message": "Merge \"Constant folding on unary operations in the optimizing compiler.\"" }, { "commit": "fdc31730353f0b3d3064cdf8b6aacabea26eb4f7", "tree": "26a7a5f64a5e82c10ba7536952bbb9841f6b3a54", "parents": [ "41aae699515430c10ab662945657d98c0febd578", "88cb1755e1d6acaed0f66ce65d7a2a4465053342" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 21 13:28:20 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Oct 21 13:28:21 2014 +0000" }, "message": "Merge \"Implement int negate instruction in the optimizing compiler.\"" }, { "commit": "9240d6a2baa9ed1e18ee08744b461fe49a1ee269", "tree": "0adc27979a1c30defa16de4142b1d54fac6f93dc", "parents": [ "88cb1755e1d6acaed0f66ce65d7a2a4465053342" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 20 16:47:04 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 21 13:48:41 2014 +0100" }, "message": "Constant folding on unary operations in the optimizing compiler.\n\nChange-Id: I4b77afa2a89f5ad2eedd4d6c0c6c382585419349\n" }, { "commit": "88cb1755e1d6acaed0f66ce65d7a2a4465053342", "tree": "6ffdd07aa75a38eae9376bd95d0991a789cd624c", "parents": [ "1e642b5e5b2958ffc1653f5f42f2d091bbd8549e" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 20 16:36:47 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 21 13:48:32 2014 +0100" }, "message": "Implement int negate instruction in the optimizing compiler.\n\n- Add support for the neg-int (integer two\u0027s complement\n negate) instruction in the optimizing compiler.\n- Add a HNeg node type for control-flow graphs and an\n intermediate HUnaryOperation base class.\n- Generate ARM, x86 and x86-64 code for integer HNeg nodes.\n\nChange-Id: I72fd3e1e5311a75c38a8cb665a9211a20325a42e\n" }, { "commit": "8e3964b766652a0478e8e0e303e8556c997675f1", "tree": "ebae22017d3d3c872642cbc56610f67ff32a861d", "parents": [ "5830247c351a1c40f37666584d6c390f32c31957" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 17 11:06:38 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 11:47:54 2014 +0100" }, "message": "Remove the notion of dies at entry.\n\n- Instead, explicitly say that the output does not overlap.\n- Inputs that must be in a fixed register do die at entry,\n as we know they have a location that others can not take.\n- There is also no need to differentiate between an input move\n and a connecting sibling move - those can be put in the\n same parallel move instruction.\n\nChange-Id: I1b2b2827906601f822b59fb9d6a21d48e43bae27\n" }, { "commit": "1d8cdbc5202378a5f1a4b3a1fba610675ed4dcd5", "tree": "6a1b0f49aee5a97b513bd0becc734d284aa7fb65", "parents": [ "1c1786f193323d3bd706463894001117f3471595" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Mon Sep 22 22:51:09 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Mon Oct 20 16:01:28 2014 -0700" }, "message": "Refactor quick entrypoints\n\nRemove FinishCalleeSaveFrameSetup.\nAssembly routines write down anchor into TLS as well as placing runtime\nmethod in callee save frame.\nSimplify artSet64InstanceFromCode by not computing the referrer from the\nstack in the C++ code.\nMove assembly offset tests next to constant declaration and tidy arch_test.\n\nChange-Id: Iededeebc05e54a1e2bb7bb3572b8ba012cffa1c8\n" }, { "commit": "1e642b5e5b2958ffc1653f5f42f2d091bbd8549e", "tree": "db47f70ec77ed5389a69c62cf88f9f4e4e5590f5", "parents": [ "570d5dd11b4dbf003e628d3f1890649a02365c02", "6c82d40eb142771086f5531998de2273ba5cc08c" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 20 09:37:45 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 20 09:37:46 2014 +0000" }, "message": "Merge \"Have HInstruction::StrictlyDominates compute strict dominance.\"" }, { "commit": "570d5dd11b4dbf003e628d3f1890649a02365c02", "tree": "07e1a46ea8d0b36947cbcc8cb7c1fb49cffbf414", "parents": [ "8946e41dcce414dc3359c23d93e001f91d186612", "75be28332b278cff9039b54bfb228ac72f539ccc" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 20 09:34:08 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 20 09:34:09 2014 +0000" }, "message": "Merge \"Revert \"Revert \"Introduce a class to implement optimization passes.\"\"\"" }, { "commit": "e09c0fc7ce4b522f8b3e981572d6fa4954b95878", "tree": "72317cdc0a2189892317218d4adbcaafc96dadcf", "parents": [ "c6b5c6ce846257b86a49ee4bb78eeada0143c9f3", "37c92df53979f9f6ab83155ab9521d554d717161" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 17 17:03:56 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 17 17:03:57 2014 +0000" }, "message": "Merge \"Rename arm64 `Register` to `XRegister`.\"" }, { "commit": "c6b5c6ce846257b86a49ee4bb78eeada0143c9f3", "tree": "a4527da1479611071fe30267d890ca6f206e848e", "parents": [ "0008a6fac0843bf8b86cfed76872d4a935bc7a9b", "a304f97c97d38af73afe6b49259ac4faf0902123" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 17 16:53:05 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 17 16:53:06 2014 +0000" }, "message": "Merge \"Rework arm64 register codes and fix Arm64ManagedRegister tests.\"" }, { "commit": "6c82d40eb142771086f5531998de2273ba5cc08c", "tree": "31eb699ae915d2c58603417eff8a4b71f585070a", "parents": [ "75be28332b278cff9039b54bfb228ac72f539ccc" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 13 16:10:27 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 17 17:11:44 2014 +0100" }, "message": "Have HInstruction::StrictlyDominates compute strict dominance.\n\nChange-Id: I3a4fa133268615fb4ce54a0bcb43e0c2458cc865\n" }, { "commit": "75be28332b278cff9039b54bfb228ac72f539ccc", "tree": "a01829ba0412d0f6637a833b41694f0d757d8f43", "parents": [ "ffb078ee815a38123581e706099a3bed65a6cb24" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 17 17:02:00 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 17 17:11:43 2014 +0100" }, "message": "Revert \"Revert \"Introduce a class to implement optimization passes.\"\"\n\nThis reverts commit 1ddbf6d4b37979a9f11a203c12befd5ae8b65df4.\n\nChange-Id: I110a14668d1564ee0604dc958b91394b40da89fc\n" }, { "commit": "415ac88a6471792a28cf2b457fe4ba9dc099396e", "tree": "1a83ac3a5f224568af19fc4bf148d352a1a4e49c", "parents": [ "02e7d4e802248574cee7224fea3352b6e558e4ee" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 30 18:09:14 2014 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Oct 17 15:16:08 2014 +0100" }, "message": "Quick: In GVN, apply modifications early if outside loop.\n\nTo improve GVN performance, apply modifications to blocks\noutside loops during the initial convergence phase. During\nthe post processing phase, apply modifications only to the\nblocks belonging to loops.\n\nAlso clean up the check whether to run the LVN and add the\ncapability to limit the maximum number of nested loops we\nallow the GVN to process.\n\nChange-Id: Ie7f1254f91a442397c06a325d5d314d8f58e5012\n" }, { "commit": "37c92df53979f9f6ab83155ab9521d554d717161", "tree": "fe9ba081a00719b104184f1f3307b88648e5ead9", "parents": [ "a304f97c97d38af73afe6b49259ac4faf0902123" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@arm.com", "time": "Fri Oct 17 14:35:27 2014 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@arm.com", "time": "Fri Oct 17 14:35:27 2014 +0100" }, "message": "Rename arm64 `Register` to `XRegister`.\n\nThis will avoid naming conflicts in the arm64 port of\nthe optimizing compiler.\n\nChange-Id: Ie736ddd2ddbd2e299058256de28bad5d41c57d6f\n" }, { "commit": "a304f97c97d38af73afe6b49259ac4faf0902123", "tree": "24057389d7adafc7a3634ce446f35977319a15df", "parents": [ "02e7d4e802248574cee7224fea3352b6e558e4ee" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@arm.com", "time": "Fri Oct 17 14:35:27 2014 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@arm.com", "time": "Fri Oct 17 14:35:27 2014 +0100" }, "message": "Rework arm64 register codes and fix Arm64ManagedRegister tests.\n\nChange-Id: I81ce3bc8a212c9c35be3a41b182ada87b32391ec\n" }, { "commit": "34bacdf7eb46c0ffbf24ba7aa14a904bc9176fb2", "tree": "e8ed8e40c5f7896a9ac01bf7dcc2e56f40cfc804", "parents": [ "7f758228f7904d2f65f06bfbd2b8ecbb8e8c6a9d" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 07 20:23:36 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Oct 17 11:46:45 2014 +0100" }, "message": "Add multiplication for integral types\n\nThis also fixes an issue where we could allocate a pair register even if\none of its parts was already blocked.\n\nChange-Id: I4869175933409add2a56f1ccfb369c3d3dd3cb01\n" }, { "commit": "0b5d8511993145a9eeb978172944704dc621dbe9", "tree": "035c08bc2c3979d436f56b8e32840e583d84796d", "parents": [ "dddb8d891adad3f55308a725658134b6c9f5559b", "d4c4d953035d4418126d36517e402f411d6a87f3" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Fri Oct 17 04:37:54 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 17 04:37:55 2014 +0000" }, "message": "Merge \"Some code clean-up.\"" }, { "commit": "d4c4d953035d4418126d36517e402f411d6a87f3", "tree": "735aacf812bbac7c1ae7c0788c1ca6f58cfa82ee", "parents": [ "6f3dbbadf4ce66982eb3d400e0a74cb73eb034f3" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Thu Oct 16 20:31:53 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Thu Oct 16 21:30:37 2014 -0700" }, "message": "Some code clean-up.\n\nChange-Id: I4b745fd5298cd61c793e3b57514b48347bd66c0e\n" }, { "commit": "dddb8d891adad3f55308a725658134b6c9f5559b", "tree": "b1747dff4f90b9454b48dd6143ccf1ff84c6b4c7", "parents": [ "b3f18cf7466f85e15c6b7f005f544867a4d6847a", "d6dee676acdd1ab0aa4e5ba6834ee7c40a6dd8ab" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Fri Oct 17 03:13:06 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 17 03:13:06 2014 +0000" }, "message": "Merge \"dex2oat: Add a --compile-pic option\"" }, { "commit": "b3f18cf7466f85e15c6b7f005f544867a4d6847a", "tree": "62035f08dc38038b74c9796118ae0bab0e7608fb", "parents": [ "cb142101f29a4f1e097f03a220db3da6d4bd679f", "6f3dbbadf4ce66982eb3d400e0a74cb73eb034f3" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Fri Oct 17 02:29:32 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 17 02:29:32 2014 +0000" }, "message": "Merge \"Make ART compile with GCC -O0 again.\"" }, { "commit": "6f3dbbadf4ce66982eb3d400e0a74cb73eb034f3", "tree": "f7a20779e4d665f948c5fbcd26dac0071dafb8d4", "parents": [ "2df6840f68dd18d7dd8dbf53f8b6181bbfdc4fc4" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Tue Oct 14 17:41:57 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Thu Oct 16 19:27:28 2014 -0700" }, "message": "Make ART compile with GCC -O0 again.\n\nTidy up InstructionSetFeatures so that it has a type hierarchy dependent on\narchitecture.\nAdd to instruction_set_test to warn when InstructionSetFeatures don\u0027t agree\nwith ones from system properties, AT_HWCAP and /proc/cpuinfo.\nClean-up class linker entry point logic to not return entry points but to\ntest whether the passed code is the particular entrypoint. This works around\nimage trampolines that replicate entrypoints.\nBug: 17993736\n\nChange-Id: I5f4b49e88c3b02a79f9bee04f83395146ed7be23\n" }, { "commit": "d6dee676acdd1ab0aa4e5ba6834ee7c40a6dd8ab", "tree": "727a86edd5ecbcdf60639b5dff5490e9573b5b56", "parents": [ "58e51f38e2304a08aa9ec380383e0b3614f96a96" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Thu Oct 16 18:36:16 2014 -0700" }, "committer": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Thu Oct 16 18:36:16 2014 -0700" }, "message": "dex2oat: Add a --compile-pic option\n\nChange-Id: I80e03613e3b6ac079bcbc7e068bbaae760c364c9\n" }, { "commit": "4ffed256cfae742e36ee735f806137f0d4a2f4b6", "tree": "06732435d32de36c56bf25dea3f1606bf8e45123", "parents": [ "9ab7816aec7264d79750e93021ab8714822a038f", "aa7b8a329561c6e1f05938ddc5e9c4be795cd8a5" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 16 18:02:25 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 16 18:02:26 2014 +0000" }, "message": "Merge \"Quick: Avoid node iteration for passes that don\u0027t need it.\"" }, { "commit": "9ab7816aec7264d79750e93021ab8714822a038f", "tree": "c0639b1942b01af7fc8f2effbeb4151c49adbe1a", "parents": [ "dc43794b146283b2ba588db83d1fac1f8a3af6d3", "a78e66a2c0fb1ce75e3a4edaf0d70c0d1647dbad" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 16 18:01:00 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 16 18:01:01 2014 +0000" }, "message": "Merge \"Quick: Handle kMirOpNullCheck in LVN/GVN.\"" }, { "commit": "dc43794b146283b2ba588db83d1fac1f8a3af6d3", "tree": "7b6befbdfe47071ebfde5b627edae339fe9ab6f3", "parents": [ "ec2ea6ff6e3d7816df889454866a28b58ce6e6f5", "92a73aef279be78e3c2b04db1713076183933436" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 16 14:20:58 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 16 14:20:59 2014 +0000" }, "message": "Merge \"Don\u0027t use assembler classes in code_generator.h.\"" }, { "commit": "92a73aef279be78e3c2b04db1713076183933436", "tree": "e73b214fb7d740588f5d065b2e4ff3eb8c527e34", "parents": [ "5c5efc253507eb43265997c9afcd778f72b6cef4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 16 11:12:52 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 16 15:17:44 2014 +0100" }, "message": "Don\u0027t use assembler classes in code_generator.h.\n\nThe arm64 backend uses its own assembler and does not share\nthe same classes as the other backends. To avoid conflicts\nor unnecessary mappings, just don\u0027t use those classes in the\nshared part of the code generator.\n\nChange-Id: I9e5fa40c1021d2e83a4ef14c52cd1ccd03f2f73d\n" }, { "commit": "ec2ea6ff6e3d7816df889454866a28b58ce6e6f5", "tree": "41ec0fcacce25807fbc28965fb5e93d6c176c55e", "parents": [ "c15c4066233b644f3086eef80007a7cf878d4867", "633021e6ff6b9a57a374a994e74cfd69275ce100" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 16 13:26:29 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 16 13:26:29 2014 +0000" }, "message": "Merge \"Implement default traversals in CFG \u0026 SSA graph checkers.\"" }, { "commit": "c15c4066233b644f3086eef80007a7cf878d4867", "tree": "b3829f1cc439ce50024eab22cedf7a25eb42b0f9", "parents": [ "dd36b42837b78876eabe86b136474490e3d016cc", "a8069ce1c3caa4f9b1651988986f3732152c186d" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 16 13:12:56 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 16 13:12:57 2014 +0000" }, "message": "Merge \"Improve art::SSAChecker::VisitInstruction.\"" }, { "commit": "dd36b42837b78876eabe86b136474490e3d016cc", "tree": "f23efd27c5f30665c4d826be374b0b8d0aab72d3", "parents": [ "1604027a8a87fc100aa3b8899ad710c2f313ca45", "e161a2a60c0325793f04be42a0f05228955ecfdd" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 16 12:59:34 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 16 12:59:35 2014 +0000" }, "message": "Merge \"Do not remove NullChecks \u0026 BoundsChecks in HDeadCodeElimination.\"" }, { "commit": "1604027a8a87fc100aa3b8899ad710c2f313ca45", "tree": "713e558fd08a9b086e68ab500452d35c0a01e241", "parents": [ "f1eb10024d616c15af3b0cd81acabe59131be918", "3a3fd0f8d3981691aa2331077a8fae5feee08dd1" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 16 12:51:34 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 16 12:51:35 2014 +0000" }, "message": "Merge \"Turn constant conditional jumps into unconditional jumps.\"" }, { "commit": "a78e66a2c0fb1ce75e3a4edaf0d70c0d1647dbad", "tree": "03dbbf020e60a01feb2be07f2a678d86d825f82c", "parents": [ "f1eb10024d616c15af3b0cd81acabe59131be918" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 16 13:38:44 2014 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 16 13:38:44 2014 +0100" }, "message": "Quick: Handle kMirOpNullCheck in LVN/GVN.\n\nChange-Id: I0274e98cc61ccd1dbe0bd3e50deeb7d62bd1cb22\n" }, { "commit": "312eb25273dc0e2f8880d80f00c5b0998febaf7b", "tree": "17e5320af33efc462a38fe907e5b526dec39c388", "parents": [ "7baa6f8783b12bb4b159ed4648145be5912215f2" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Oct 07 15:01:57 2014 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Oct 15 18:44:33 2014 +0100" }, "message": "Quick: Improve the BBCombine pass.\n\nEliminate exception edges for insns that cannot throw even\nwhen inside a try-block. Run the BBCombine pass before the\nSSA transformation to reduce the compilation time.\n\nBug: 16398693\nChange-Id: I8e91df593e316c994679b9d482b0ae20700b9499\n" }, { "commit": "7baa6f8783b12bb4b159ed4648145be5912215f2", "tree": "bb8bca51183039dcf5f375efebe3534503e29735", "parents": [ "5c5efc253507eb43265997c9afcd778f72b6cef4" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 09 18:01:24 2014 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Oct 15 17:11:24 2014 +0100" }, "message": "Rewrite null check elimination to work on dalvik regs.\n\nAnd move the null check and class init check elimination\nbefore the SSA transformation. The new pass ordering is in\nanticipation of subsequent changes. (An improved class init\ncheck elimination can benefit special method inlining. An\nimproved block combination pass before SSA transformation\ncan improve compilation time.)\n\nAlso add tests for the NCE.\n\nChange-Id: Ie4fb1880e06334a703295aef454b437d58a3e878\n" }, { "commit": "aa7b8a329561c6e1f05938ddc5e9c4be795cd8a5", "tree": "ddef401bac18e2ae346647651f77a64b08d18f9f", "parents": [ "2df6840f68dd18d7dd8dbf53f8b6181bbfdc4fc4" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Oct 15 11:35:44 2014 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Oct 15 11:35:44 2014 +0100" }, "message": "Quick: Avoid node iteration for passes that don\u0027t need it.\n\nChange-Id: Ic1f6796a29ba861cee37a31193e07b497b84eb3f\n" }, { "commit": "423b137214debfa066522763a8e78511d300c8c9", "tree": "0415a50a74aea055e5b22022a8e3a5868816ee12", "parents": [ "2df6840f68dd18d7dd8dbf53f8b6181bbfdc4fc4" ], "author": { "name": "Yevgeny Rouban", "email": "yevgeny.y.rouban@intel.com", "time": "Wed Oct 15 17:32:25 2014 +0700" }, "committer": { "name": "Yevgeny Rouban", "email": "yevgeny.y.rouban@intel.com", "time": "Wed Oct 15 17:32:25 2014 +0700" }, "message": "ART: NullCheckElimination should converge with MIR_IGNORE_NULL_CHECK\n\nIf the MIRGraph::EliminateNullChecksAndInferTypes() function managed\nto prove that some regs are non-null then it sets the flag\nMIR_IGNORE_NULL_CHECK and resets this flag for all the other regs.\nIf some previous optimizations have already set MIR_IGNORE_NULL_CHECK\nthen it can be reset by EliminateNullChecksAndInferTypes. This way\nNullCheckElimination discards some optimization efforts.\nOptimization passes should not reset MIR_IGNORE_NULL_CHECK unless\nthey 100% sure NullCheck is needed.\n\nThis patch makes the NCE_TypeInference pass merge its own\ncalculated MIR_IGNORE_NULL_CHECK with the one came from previous\noptimizations. Technically NCE_TypeInference calculates the flag\nin a temporary MIR_MARK-th bit by preserving MIR_IGNORE_NULL_CHECK.\nThen at the end of NCE pass MIR_MARK is or-ed with\nMIR_IGNORE_NULL_CHECK.\n\nChange-Id: Ib26997c70ecf2c158f61496dee9b1fe45c812096\nSigned-off-by: Yevgeny Rouban \u003cyevgeny.y.rouban@intel.com\u003e\n" }, { "commit": "6e88ef6b604a7a945a466784580c42e6554c1289", "tree": "1e296564787b51514cf2eca5b732647c1a82912e", "parents": [ "58e51f38e2304a08aa9ec380383e0b3614f96a96" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Tue Oct 14 15:01:24 2014 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Tue Oct 14 15:43:21 2014 -0700" }, "message": "Change MemMap::maps_ to not be global variable\n\nRuntime.exit() was causing globals to get destructed at the same time\nthat another thread was using it for allocating a new mem map.\n\nBug: 17962201\nChange-Id: I400cb7b8141d858f3c08a6fe59a02838c04c6962\n" }, { "commit": "5c5676b26a08454b3f0133783778991bbe5dd681", "tree": "233f278fb590036beaf327e0a345f177b070df43", "parents": [ "e4228d93de256c72df9d57f0def938b11cfe21a1" ], "author": { "name": "Razvan A Lupusoru", "email": "razvan.a.lupusoru@intel.com", "time": "Mon Sep 29 16:42:11 2014 -0700" }, "committer": { "name": "Razvan A Lupusoru", "email": "razvan.a.lupusoru@intel.com", "time": "Tue Oct 14 13:06:52 2014 -0700" }, "message": "ART: Add div/rem zero check elimination flag\n\nJust as with other throwing bytecodes, it is possible to prove in some cases\nthat a divide/remainder won\u0027t throw ArithmeticException. For example, in case\ntwo divides with same denominator are in order, then provably the second one\ncannot throw if the first one did not.\n\nThis patch adds the elimination flag and updates the signature of several\nMir2Lir methods to take the instruction optimization flags into account.\n\nChange-Id: I0b078cf7f29899f0f059db1f14b65a37444b84e8\nSigned-off-by: Razvan A Lupusoru \u003crazvan.a.lupusoru@intel.com\u003e\n" }, { "commit": "633021e6ff6b9a57a374a994e74cfd69275ce100", "tree": "78755b7e5d90f1374b317cea2193605de9bdd2d9", "parents": [ "a8069ce1c3caa4f9b1651988986f3732152c186d" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 01 14:12:25 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 14 14:44:16 2014 +0100" }, "message": "Implement default traversals in CFG \u0026 SSA graph checkers.\n\n- Check CFG graphs using an insertion order traversal.\n- Check SSA form graphs using a reverse post-order traversal.\n\nChange-Id: Ib9062599bdbf3c17b9f213b743274b2d71a9fa90\n" }, { "commit": "a8069ce1c3caa4f9b1651988986f3732152c186d", "tree": "bfeaeefaec1aae17905bb9df72959193a539ca75", "parents": [ "e161a2a60c0325793f04be42a0f05228955ecfdd" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 01 10:48:29 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 14 14:44:16 2014 +0100" }, "message": "Improve art::SSAChecker::VisitInstruction.\n\nActually inspect the uses of an instruction to ensure the\nlatter dominates all of the former, instead of browsing the\ninputs of this instruction (to ensure they dominate the\ninstruction).\n\nAlso check instruction domination with respect to environment\nuses.\n\nChange-Id: I967f34a45f48930607bf9683180d02e7c27b4e06\n" }, { "commit": "e161a2a60c0325793f04be42a0f05228955ecfdd", "tree": "426167496f383ec4343902f01ce0745d4dd1874d", "parents": [ "3a3fd0f8d3981691aa2331077a8fae5feee08dd1" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 03 12:45:18 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 14 14:44:16 2014 +0100" }, "message": "Do not remove NullChecks \u0026 BoundsChecks in HDeadCodeElimination.\n\nRemoving a NullCheck or a BoundsCheck instruction may change\nthe behavior of a program.\n\nChange-Id: Ib2c9beff0cc98c382210e7cc88b1fa9af3c61887\n" }, { "commit": "3a3fd0f8d3981691aa2331077a8fae5feee08dd1", "tree": "7fc5bb817010f0b77c109d8c645c7ec4f6b2e467", "parents": [ "b8f2480853aeca1db33ed623b9a9b2648954906e" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 10 13:56:31 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 14 14:44:16 2014 +0100" }, "message": "Turn constant conditional jumps into unconditional jumps.\n\nIf a condition (input of an art::HIf instruction) is\nconstant (an art::HConstant object), evaluate it at\ncompile time and generate an unconditional branch\ninstruction if it is true (in lieu of a conditional jump).\n\nChange-Id: I262e43ffe66d5c25dbbfa98092a41c8b3c4c75d6\n" }, { "commit": "7cd01f5d496c384874ea8c21eafb2b6479833e6a", "tree": "14850b67072afaa67273c1e9e9b75e8c9c898421", "parents": [ "72ab3cadce5002163783d7b76781b9f26413b773" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 13 18:29:44 2014 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 13 18:29:44 2014 +0100" }, "message": "Add regression test for null check elimination.\n\nPrompted by\n https://android-review.googlesource.com/110090\n\nBug: 17969907\nChange-Id: I938c27cda0681b9431d69baf4eafa7ca2f9b5c9c\n" }, { "commit": "72ab3cadce5002163783d7b76781b9f26413b773", "tree": "987fbbe5317e6a29ecc44e2af88baa1d4488bf4c", "parents": [ "472b1591300912af2430e3299c3b6119624c2849", "cb46ee13a5683c2973244da964887a448e61b6ec" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 13 17:19:04 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 13 17:19:05 2014 +0000" }, "message": "Merge \"Revert \"ART: fix NullCheckElimination to preserve MIR_IGNORE_NULL_CHECK\"\"" }, { "commit": "cb46ee13a5683c2973244da964887a448e61b6ec", "tree": "ad82945f47b3f5256eb0440e9a398443a6e401a8", "parents": [ "504b7882fbb841787e350f2da54b1fa9171ce82a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 13 15:18:34 2014 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 13 15:18:34 2014 +0000" }, "message": "Revert \"ART: fix NullCheckElimination to preserve MIR_IGNORE_NULL_CHECK\"\n\nThis reverts commit 504b7882fbb841787e350f2da54b1fa9171ce82a.\n\nChange-Id: I41c7a03c49f7904370a64c6ececc89146ff735c8\n" }, { "commit": "f8e28f575b1382e984edb2e8c9846a27a1bdea10", "tree": "12506af9dc858d842061843570a939e74822b517", "parents": [ "f659bec20db45c809a891ff528fb6aecf2c76149", "476df557fed5f0b3f32f8d11a654674bb403a8f8" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 13 11:36:10 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 13 11:36:11 2014 +0000" }, "message": "Merge \"Use Is*() helpers to shorten code in the optimizing compiler.\"" }, { "commit": "f659bec20db45c809a891ff528fb6aecf2c76149", "tree": "1d51e37668d6dece4668318e7a763ef355152a95", "parents": [ "b71c9d7a6a26070d302b97a95a0fecc0acc73e87", "3d2ec35be5aadecc9d2bbd80394929ba3b36a4bf" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 13 10:08:32 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 13 10:08:33 2014 +0000" }, "message": "Merge \"Fix ScopedArenaAllocator::Reset() for Create()d allocators.\"" }, { "commit": "647b1a86f518d8db0331b3d52a96392b7a62504b", "tree": "7370f795ef3c7fbdd2695d23bc6f8171f40f43f1", "parents": [ "acfbbd4df2fc1c79a7102587bebf398f95b5e5de" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Fri Oct 10 11:02:11 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Fri Oct 10 12:26:02 2014 -0700" }, "message": "Fix 2 new sets of clang compiler warnings.\n\nFix issues that are flagged by -Wfloat-equal and -Wmissing-noreturn.\nIn the case of -Wfloat-equal the current cases in regular code are deliberate,\nso the change is to silence the warning. For gtest code the appropriate fix is\nto switch from EXPECT_EQ to EXPECT_(FLOAT|DOUBLE)_EQ.\nThe -Wmissing-noreturn warning isn\u0027t enabled due to a missing noreturn in\ngtest. This issue has been reported to gtest.\n\nChange-Id: Id84c70c21c542716c9ee0c41492e8ff8788c4ef8\n" }, { "commit": "3d2ec35be5aadecc9d2bbd80394929ba3b36a4bf", "tree": "e007e66d240f12782361e998719901145508243f", "parents": [ "acfbbd4df2fc1c79a7102587bebf398f95b5e5de" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Oct 10 15:39:11 2014 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Oct 10 15:40:01 2014 +0100" }, "message": "Fix ScopedArenaAllocator::Reset() for Create()d allocators.\n\nChange-Id: I88cbb329911ed489768772218b49b6f1756ffd86\n" }, { "commit": "71175b7f19a4f6cf9cc264feafd820dbafa371fb", "tree": "5370e7c7c9f7d1edf148a00548cb1334d5118f8d", "parents": [ "b76c5495c4879fcfa0866b1490031a3123baf9ee" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 09 22:13:55 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 10 11:36:03 2014 +0000" }, "message": "Cleanup baseline register allocator.\n\n- Use three arrays for blocking regsters instead of\n one and computing offsets in that array.]\n- Don\u0027t pass blocked_registers_ to methods, just use the field.\n\nChange-Id: Ib698564c31127c59b5a64c80f4262394b8394dc6\n" }, { "commit": "b76c5495c4879fcfa0866b1490031a3123baf9ee", "tree": "06180f586f6a3de4398091d96cf5d907c4b65a3a", "parents": [ "4471609d86b7e846b26bebe3373707a10c222e71", "360231a056e796c36ffe62348507e904dc9efb9b" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 10 11:22:50 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 10 11:22:50 2014 +0000" }, "message": "Merge \"Fix code generation of materialized conditions.\"" }, { "commit": "fc787ecd91127b2c8458afd94e5148e2ae51a1f5", "tree": "ef48c0f511ee9bf4ed85607cc4d530bace7e6cae", "parents": [ "8fa8c904f7c783204a1dc9438429391d256658da" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Thu Oct 09 21:56:44 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Thu Oct 09 22:22:46 2014 -0700" }, "message": "Enable -Wimplicit-fallthrough.\n\nFalling through switch cases on a clang build must now annotate the fallthrough\nwith the FALLTHROUGH_INTENDED macro.\nBug: 17731372\n\nChange-Id: I836451cd5f96b01d1ababdbf9eef677fe8fa8324\n" } ], "next": "13735955f39b3b304c37d2b2840663c131262c18" }