)]}' { "log": [ { "commit": "1ba0f596e9e4ddd778ab431237d11baa85594eba", "tree": "c1d51616adf4d98aab3ebccf47ad5146635cb87f", "parents": [ "1ef3495abfa2a858b3cc7a1844383c8e7dff0b60" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 27 15:14:55 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 27 17:20:35 2014 +0000" }, "message": "Support hard float on arm in optimizing compiler.\n\nAlso bump oat version, needed after latest hard float switch.\n\nChange-Id: Idf5acfb36c07e74acff00edab998419a3c6b2965\n" }, { "commit": "2e07b4f0a84a7968b4690c2b1be2e2f75cc6fa8e", "tree": "2fc5c75594b2cf8be1d6bd295d36c627af1651fe", "parents": [ "02567379e7099682345fd59d45a23e17711c9ddd" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 18:12:09 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 24 11:22:59 2014 +0100" }, "message": "Revert \"Revert \"Implement long negate instruction in the optimizing compiler.\"\"\n\nThis reverts commit 30ca3d847fe72cfa33e1b2473100ea2d8bea4517.\n\nChange-Id: I188ca8d460d55d3a9966bcf31e0588575afa77d2\n" }, { "commit": "30ca3d847fe72cfa33e1b2473100ea2d8bea4517", "tree": "a66582c2cb6026be2f59ba66ff437429b67bbe44", "parents": [ "46fdec13b6dcaf932aa9fb1338f32df01aa0d959" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 18:07:44 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 18:07:44 2014 +0100" }, "message": "Revert \"Implement long negate instruction in the optimizing compiler.\"\n\nThis reverts commit 66ce173a40eff4392e9949ede169ccf3108be2db.\n" }, { "commit": "66ce173a40eff4392e9949ede169ccf3108be2db", "tree": "552bc6275388c3bc6ecd4f549ffcd1422c020f82", "parents": [ "e2b2cbf8bffdf9ee3ece487fde9ac78652b4abaf" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 16:38:33 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 17:08:48 2014 +0100" }, "message": "Implement long negate instruction in the optimizing compiler.\n\n- Add support for the neg-long (long integer two\u0027s\n complement negate) instruction in the optimizing compiler.\n- Add a 64-bit NEG instruction (negq) to the x86-64\n assembler.\n- Generate ARM, x86 and x86-64 code for integer HNeg nodes.\n- Put neg-related tests into test/415-optimizing-arith-neg.\n\nChange-Id: I1fbe9611e134408a6b8745d1df20ab6ffa5e50f2\n" }, { "commit": "1135168a1a9e2a6493657be8c5e91d67e5f224a7", "tree": "02d16c2aaaf0d0a3a31e47e9b219509b4840b3d6", "parents": [ "e833b110876fa8fe34a08f06d2521c74488180bb" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 15:38:15 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 16:25:09 2014 +0100" }, "message": "[optimizing compiler] Add float/double subtraction\n\n- for arm, x86, x86_64\n- add tests\n- a bit of clean up\n\nChange-Id: I3761b0d908aca3e3c5d60da481fafb423ff7c9b9\n" }, { "commit": "1cc5f251df558b0e22cea5000626365eb644c727", "tree": "5e65a32366261646edce02283a185928adba79b5", "parents": [ "b08f4dcf90215ed49e0b796ab3e609bd605be8ba" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 22 18:06:21 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 10:12:06 2014 +0100" }, "message": "Implement int bit-wise not operation in the optimizing compiler.\n\n- Add support for the not-int (integer one\u0027s complement\n negate) instruction in the optimizing compiler.\n- Extend the HNot control-flow graph node type and make it\n inherit from HUnaryOperation.\n- Generate ARM, x86 and x86-64 code for integer HNeg nodes.\n- Exercise these additions in the codegen_test gtest, as there\n is not direct way to assess the support of not-int from a\n Java source. Indeed, compiling a Java expression such as\n `~a\u0027 using javac and then dx generates an xor-int/lit8 Dex\n instruction instead of the expected not-int Dex instruction.\n This is probably because the Java bytecode has an `ixor\u0027\n instruction, but there\u0027s not instruction directly\n corresponding to a bit-wise not operation.\n\nChange-Id: I223aed75c4dac5785e04d99da0d22e8d699aee2b\n" }, { "commit": "b5bfa96ff20e86316961327dec5c859239dab6a0", "tree": "c37c4260f59a5eb79b33e3a81142eefc7bc49390", "parents": [ "46bf5e0759e80bbe69130d6731a95fd07e10507c" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 21 18:02:24 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Oct 22 15:20:25 2014 +0100" }, "message": "Add multiplication for floats/doubles in optimizing compiler\n\nChange-Id: I61de8ce1d9e37e30db62e776979b3f22dc643894\n" }, { "commit": "a3d05a40de076aabf12ea284c67c99ff28b43dbf", "tree": "acbe183e7637a333bdaaf0910731b053f2be0f26", "parents": [ "2da28f2a9e79a09a4044521dc4d00320fcdcd041" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 20 17:41:32 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 22 13:49:47 2014 +0000" }, "message": "Implement array creation related DEX instructions.\n\nImplement new-array, filled-new-array, and fill-array-data.\n\nChange-Id: I405560d66777a57d881e384265322617ac5d3ce3\n" }, { "commit": "b762d2ebf9dc604561d9915c96b377235c94960c", "tree": "aa6060b282db511651908d232a6b16ecbb22b755", "parents": [ "4ff20eba94a2519e5bac57b5f92e04741ea90141" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 22 10:11:06 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 22 10:11:06 2014 +0100" }, "message": "Various fixes related to integer negate operations.\n\n- Emit an RSB instruction for HNeg nodes in the ARM code\n generator instead of RSBS, as we do not need to update the\n condition code flags in this case.\n- Simply punt when trying to statically evaluate a long\n unary operation, instead of aborting.\n- Move a test case to the right place.\n\nChange-Id: I35eb8dea58ed35258d4d8df77181159c3ab07b6f\n" }, { "commit": "102cbed1e52b7c5f09458b44903fe97bb3e14d5f", "tree": "cb0a433c8f284021298c8a0c4dd0da97ca9d198a", "parents": [ "07f5c5edb7ef24ac35364e6ef9a8107a44e6564e" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 15 18:31:05 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 16:03:51 2014 +0100" }, "message": "Implement register allocator for floating point registers.\n\nAlso:\n- Fix misuses of emitting the rex prefix in the x86_64 assembler.\n- Fix movaps code generation in the x86_64 assembler.\n\nChange-Id: Ib6dcf6e7c4a9c43368cfc46b02ba50f69ae69cbe\n" }, { "commit": "fdc31730353f0b3d3064cdf8b6aacabea26eb4f7", "tree": "26a7a5f64a5e82c10ba7536952bbb9841f6b3a54", "parents": [ "41aae699515430c10ab662945657d98c0febd578", "88cb1755e1d6acaed0f66ce65d7a2a4465053342" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 21 13:28:20 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Oct 21 13:28:21 2014 +0000" }, "message": "Merge \"Implement int negate instruction in the optimizing compiler.\"" }, { "commit": "88cb1755e1d6acaed0f66ce65d7a2a4465053342", "tree": "6ffdd07aa75a38eae9376bd95d0991a789cd624c", "parents": [ "1e642b5e5b2958ffc1653f5f42f2d091bbd8549e" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 20 16:36:47 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 21 13:48:32 2014 +0100" }, "message": "Implement int negate instruction in the optimizing compiler.\n\n- Add support for the neg-int (integer two\u0027s complement\n negate) instruction in the optimizing compiler.\n- Add a HNeg node type for control-flow graphs and an\n intermediate HUnaryOperation base class.\n- Generate ARM, x86 and x86-64 code for integer HNeg nodes.\n\nChange-Id: I72fd3e1e5311a75c38a8cb665a9211a20325a42e\n" }, { "commit": "8e3964b766652a0478e8e0e303e8556c997675f1", "tree": "ebae22017d3d3c872642cbc56610f67ff32a861d", "parents": [ "5830247c351a1c40f37666584d6c390f32c31957" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 17 11:06:38 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 11:47:54 2014 +0100" }, "message": "Remove the notion of dies at entry.\n\n- Instead, explicitly say that the output does not overlap.\n- Inputs that must be in a fixed register do die at entry,\n as we know they have a location that others can not take.\n- There is also no need to differentiate between an input move\n and a connecting sibling move - those can be put in the\n same parallel move instruction.\n\nChange-Id: I1b2b2827906601f822b59fb9d6a21d48e43bae27\n" }, { "commit": "34bacdf7eb46c0ffbf24ba7aa14a904bc9176fb2", "tree": "e8ed8e40c5f7896a9ac01bf7dcc2e56f40cfc804", "parents": [ "7f758228f7904d2f65f06bfbd2b8ecbb8e8c6a9d" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 07 20:23:36 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Oct 17 11:46:45 2014 +0100" }, "message": "Add multiplication for integral types\n\nThis also fixes an issue where we could allocate a pair register even if\none of its parts was already blocked.\n\nChange-Id: I4869175933409add2a56f1ccfb369c3d3dd3cb01\n" }, { "commit": "dc43794b146283b2ba588db83d1fac1f8a3af6d3", "tree": "7b6befbdfe47071ebfde5b627edae339fe9ab6f3", "parents": [ "ec2ea6ff6e3d7816df889454866a28b58ce6e6f5", "92a73aef279be78e3c2b04db1713076183933436" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 16 14:20:58 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 16 14:20:59 2014 +0000" }, "message": "Merge \"Don\u0027t use assembler classes in code_generator.h.\"" }, { "commit": "92a73aef279be78e3c2b04db1713076183933436", "tree": "e73b214fb7d740588f5d065b2e4ff3eb8c527e34", "parents": [ "5c5efc253507eb43265997c9afcd778f72b6cef4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 16 11:12:52 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 16 15:17:44 2014 +0100" }, "message": "Don\u0027t use assembler classes in code_generator.h.\n\nThe arm64 backend uses its own assembler and does not share\nthe same classes as the other backends. To avoid conflicts\nor unnecessary mappings, just don\u0027t use those classes in the\nshared part of the code generator.\n\nChange-Id: I9e5fa40c1021d2e83a4ef14c52cd1ccd03f2f73d\n" }, { "commit": "3a3fd0f8d3981691aa2331077a8fae5feee08dd1", "tree": "7fc5bb817010f0b77c109d8c645c7ec4f6b2e467", "parents": [ "b8f2480853aeca1db33ed623b9a9b2648954906e" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 10 13:56:31 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 14 14:44:16 2014 +0100" }, "message": "Turn constant conditional jumps into unconditional jumps.\n\nIf a condition (input of an art::HIf instruction) is\nconstant (an art::HConstant object), evaluate it at\ncompile time and generate an unconditional branch\ninstruction if it is true (in lieu of a conditional jump).\n\nChange-Id: I262e43ffe66d5c25dbbfa98092a41c8b3c4c75d6\n" }, { "commit": "f8e28f575b1382e984edb2e8c9846a27a1bdea10", "tree": "12506af9dc858d842061843570a939e74822b517", "parents": [ "f659bec20db45c809a891ff528fb6aecf2c76149", "476df557fed5f0b3f32f8d11a654674bb403a8f8" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 13 11:36:10 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 13 11:36:11 2014 +0000" }, "message": "Merge \"Use Is*() helpers to shorten code in the optimizing compiler.\"" }, { "commit": "71175b7f19a4f6cf9cc264feafd820dbafa371fb", "tree": "5370e7c7c9f7d1edf148a00548cb1334d5118f8d", "parents": [ "b76c5495c4879fcfa0866b1490031a3123baf9ee" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 09 22:13:55 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 10 11:36:03 2014 +0000" }, "message": "Cleanup baseline register allocator.\n\n- Use three arrays for blocking regsters instead of\n one and computing offsets in that array.]\n- Don\u0027t pass blocked_registers_ to methods, just use the field.\n\nChange-Id: Ib698564c31127c59b5a64c80f4262394b8394dc6\n" }, { "commit": "b76c5495c4879fcfa0866b1490031a3123baf9ee", "tree": "06180f586f6a3de4398091d96cf5d907c4b65a3a", "parents": [ "4471609d86b7e846b26bebe3373707a10c222e71", "360231a056e796c36ffe62348507e904dc9efb9b" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 10 11:22:50 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 10 11:22:50 2014 +0000" }, "message": "Merge \"Fix code generation of materialized conditions.\"" }, { "commit": "fc787ecd91127b2c8458afd94e5148e2ae51a1f5", "tree": "ef48c0f511ee9bf4ed85607cc4d530bace7e6cae", "parents": [ "8fa8c904f7c783204a1dc9438429391d256658da" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Thu Oct 09 21:56:44 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Thu Oct 09 22:22:46 2014 -0700" }, "message": "Enable -Wimplicit-fallthrough.\n\nFalling through switch cases on a clang build must now annotate the fallthrough\nwith the FALLTHROUGH_INTENDED macro.\nBug: 17731372\n\nChange-Id: I836451cd5f96b01d1ababdbf9eef677fe8fa8324\n" }, { "commit": "476df557fed5f0b3f32f8d11a654674bb403a8f8", "tree": "0ca72785e60b3b1152bca0908e6d134c0a30f631", "parents": [ "9e878d50567f624094f3c4940ac3aedbc5eff3b9" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 09 17:51:36 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 09 17:59:50 2014 +0100" }, "message": "Use Is*() helpers to shorten code in the optimizing compiler.\n\nChange-Id: I79f31833bc9a0aa2918381aa3fb0b05d45f75689\n" }, { "commit": "360231a056e796c36ffe62348507e904dc9efb9b", "tree": "a62ff73c11eaa6694649c98e4c2d872e89149b0c", "parents": [ "2072c465cfff077da257bdf14f1f1b2690c946c8" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 08 21:07:48 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 09 15:21:57 2014 +0100" }, "message": "Fix code generation of materialized conditions.\n\nMove the logic for knowing if a condition needs to be materialized\nin an optimization pass (so that the information does not change\nas a side effect of another optimization).\n\nAlso clean-up arm and x86_64 codegen:\n- arm: ldr and str are for power-users when a constant is\n in play. We should use LoadFromOffset and StoreToOffset.\n- x86_64: fix misuses of movq instead of movl.\n\nChange-Id: I01a03b91803624be2281a344a13ad5efbf4f3ef3\n" }, { "commit": "56b9ee6fe1d6880c5fca0e7feb28b25a1ded2e2f", "tree": "34e5163967f59a98e64f2c89489ed7b76334b48a", "parents": [ "a3c4d72210de174552f47b2d117b1946f274af1e" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 09 11:47:51 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 09 14:42:13 2014 +0100" }, "message": "Stop converting from Location to ManagedRegister.\n\nNow the source of truth is the Location object that knows\nwhich register (core, pair, fpu) it needs to refer to.\n\nChange-Id: I62401343d7479ecfb24b5ed161ec7829cda5a0b1\n" }, { "commit": "7e70b002c4552347ed1af8c002a0e13f08864f20", "tree": "79d5ee5444a5be70130d9a75dd51831c4b15687b", "parents": [ "edc34c88b8f8abd04f9c4668787403608cf0b2d4" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Wed Oct 08 11:47:24 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Wed Oct 08 11:57:59 2014 -0700" }, "message": "Header file clean up.\n\nRemove runtime.h from object.h.\nMove TypeStaticIf to its own header file to avoid bringing utils.h into\nallocator.h.\nMove Array::DataOffset into -inl.h as it now has a utils.h dependency.\nFix include issues arising from this.\n\nChange-Id: I4605b1aa4ff5f8dc15706a0132e15df03c7c8ba0\n" }, { "commit": "01ef345767ea609417fc511e42007705c9667546", "tree": "8a3cf1b5a576caf212ef31db966b97b6d23aaf98", "parents": [ "a9f2904263581f606a5704f2bb74efcecf7e9f97" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 01 11:32:17 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 07 21:25:27 2014 +0100" }, "message": "Add trivial register hints to the register allocator.\n\n- Add hints for phis, same as first input, and expected registers.\n- Make the if instruction accept non-condition instructions.\n\nChange-Id: I34fa68393f0d0c19c68128f017b7a05be556fbe5\n" }, { "commit": "7fb49da8ec62e8a10ed9419ade9f32c6b1174687", "tree": "8b1bec67452b84809cecd5645543e1f885ccbd44", "parents": [ "4a1b4679cda2f0d2893b8e3f910c21231849291c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 06 09:12:41 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 07 20:19:47 2014 +0100" }, "message": "Add support for floats and doubles.\n\n- Follows Quick conventions.\n- Currently only works with baseline register allocator.\n\nChange-Id: Ie4b8e298f4f5e1cd82364da83e4344d4fc3621a3\n" }, { "commit": "26a25ef62a13f409f941aa39825a51b4d6f0f047", "tree": "aa0ed991cfcea17297e85f74624a44e32e8913cf", "parents": [ "17b1c174dddb1d83018740c2084ab42daa812fff" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Sep 30 13:54:09 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 06 18:52:56 2014 +0100" }, "message": "Add a prepare for register allocation pass.\n\n- Currently the pass just changes the uses of checks to the\n actual values.\n- Also optimize array access, now that inputs can be constants.\n- And fix another bug in the register allocator reveiled by\n this change.\n\nChange-Id: I43be0dbde9330ee5c8f9d678de11361292d8bd98\n" }, { "commit": "9ae0daa60c568f98ef0020e52366856ff314615f", "tree": "e74b9ee49af0b1b202444fdaaca4b39620d962dd", "parents": [ "2d4e89e97812aeca16ff058d7286f29b7549c43a" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Sep 30 22:40:23 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 06 16:36:49 2014 +0100" }, "message": "Add support for inputs dying at entry of instructions.\n\n- Start using it in places where it makes sense.\n- Also improve suspend check on arm to use subs directly.\n\nChange-Id: I09ac0589f5ccb9b850ee757c76dcbcf35ee8cd01\n" }, { "commit": "a72cb229d555a8ca86dca748733ea3791eaeec14", "tree": "b051a0f2d10c126a83d22ff45f2feecf0365aca3", "parents": [ "d7e2f329ddacd2294ba94cd5acde026677d32e0d", "3c04974a90b0e03f4b509010bff49f0b2a3da57f" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 25 13:37:06 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Sep 25 13:37:06 2014 +0000" }, "message": "Merge \"Optimize suspend checks in optimizing compiler.\"" }, { "commit": "5799fc0754da7ff2b50b472e05c65cd4ba32dda2", "tree": "38a4189bc2e667dfd0537b02b24a8563907898d4", "parents": [ "f2476d524281c6d649f5deb6d1ccccc92380c1ed" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Sep 25 12:15:20 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Sep 25 13:06:17 2014 +0100" }, "message": "Optimizing compiler: remove unnecessary `explicit\u0027 keywords.\n\nChange-Id: I5927fd92d53308c81e14edbd6e7d1c943bfa085b\n" }, { "commit": "3c04974a90b0e03f4b509010bff49f0b2a3da57f", "tree": "52649104e3e80272c3774793350f4d9f260ae732", "parents": [ "c0d36abb12cdbb9469039c1dc153a586bd984015" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 24 18:10:46 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 25 12:23:40 2014 +0100" }, "message": "Optimize suspend checks in optimizing compiler.\n\n- Remove the ones added during graph build (they were added\n for the baseline code generator).\n- Emit them at loop back edges after phi moves, so that the test\n can directly jump to the loop header.\n- Fix x86 and x86_64 suspend check by using cmpw instead of cmpl.\n\nChange-Id: I6fad5795a55705d86c9e1cb85bf5d63dadfafa2a\n" }, { "commit": "3f5e9bbb1e25b50dbaf75e1b5300863c112a62d0", "tree": "ca535bf8e23ab08996caed729febc51838f43399", "parents": [ "2e1391b9abdafdbe7e0ef5ef116c49f812394056", "3bca0df855f0e575c6ee020ed016999fc8f14122" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Sep 23 13:36:28 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Sep 23 13:36:29 2014 +0000" }, "message": "Merge \"Support for saving and restoring live registers in a slow path.\"" }, { "commit": "3bca0df855f0e575c6ee020ed016999fc8f14122", "tree": "15e15c8290ad314c29ca608f51d89d4db68fd9ba", "parents": [ "d41491adb23764f28a80cbb7f2bd7af6491cd892" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Sep 19 11:01:00 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Sep 23 13:57:30 2014 +0100" }, "message": "Support for saving and restoring live registers in a slow path.\n\nAnd use it in suspend check slow paths.\n\nChange-Id: I79caf28f334c145a36180c79a6e2fceae3990c31\n" }, { "commit": "18efde5017369e005f1e8bcd3bbfb04e85053640", "tree": "dcb8bc8db745f3b8096cde55228730e6c402b2c5", "parents": [ "ef3e89b9281525d6c084136c379346608b44d933" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 22 15:51:11 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Sep 23 12:02:03 2014 +0100" }, "message": "Fix code generation with materialized conditions.\n\nChange-Id: I8630af3c13fc1950d3fa718d7488407b00898796\n" }, { "commit": "e982f0b8e809cece6f460fa2d8df25873aa69de4", "tree": "df729d47439f7243b498dd4503a5f7aa41a4818b", "parents": [ "f031724abf4f215e1627ff837f87cad5d7a25165" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Aug 13 02:11:24 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 17 09:53:50 2014 +0100" }, "message": "Implement invoke virtual in optimizing compiler.\n\nAlso refactor 004 tests to make them work with both Quick and\nOptimizing.\n\nChange-Id: I87e275cb0ae0258fc3bb32b612140000b1d2adf8\n" }, { "commit": "fbc695f9b8e2084697e19c1355ab925f99f0d235", "tree": "03e643aa9b468a512873293528bec93438580bab", "parents": [ "3d2d7fb7ad24f4aec681ddc68a9565fa837b97ef" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 15 15:33:30 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Sep 16 16:18:12 2014 +0100" }, "message": "Revert \"Revert \"Implement suspend checks in new compiler.\"\"\n\nThis reverts commit 7e3652c45c30c1f2f840e6088e24e2db716eaea7.\n\nChange-Id: Ib489440c34e41cba9e9e297054f9274f6e81a2d8\n" }, { "commit": "7e3652c45c30c1f2f840e6088e24e2db716eaea7", "tree": "a6bdb852a5d1337bd095d0ad8eab90f6689aee9e", "parents": [ "6fbce029fba3ed5da6c36017754ed408e6bcb632" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 15 14:34:01 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 15 14:34:01 2014 +0000" }, "message": "Revert \"Implement suspend checks in new compiler.\"\n\nThis reverts commit 6fbce029fba3ed5da6c36017754ed408e6bcb632.\n\nChange-Id: Ia915c27873b021e658a10212e559095dfc91284e\n" }, { "commit": "6fbce029fba3ed5da6c36017754ed408e6bcb632", "tree": "71debbb7c475be1508e14a7986ed69e75e5b0e4c", "parents": [ "8accb5ac557598fd40b80214bf87517bc4b7bc41" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 10 10:23:58 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 15 12:43:06 2014 +0100" }, "message": "Implement suspend checks in new compiler.\n\nFor simplicity, they are currently placed on all (dex-level)\nback edges, and at method entry.\n\nChange-Id: I6e833e244d559dd788c69727e22fe40aff5b3435\n" }, { "commit": "3946844c34ad965515f677084b07d663d70ad1b8", "tree": "0d85bfba2ff69c34a2897351d1e50a1464509305", "parents": [ "e2c23739c6395a83b30ece38f8a2e9e1bf7cf3ce" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Sep 02 15:17:15 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 08 12:15:07 2014 +0100" }, "message": "Runtime support for the new stack maps for the opt compiler.\n\nNow most of the methods supported by the compiler can be optimized,\ninstead of using the baseline.\n\nChange-Id: I80ab36a34913fa4e7dd576c7bf55af63594dc1fa\n" }, { "commit": "648d7112609dd19c38131b3e71c37bcbbd19d11e", "tree": "54062831327c660acb309e877e8d8df9ba0c2d5d", "parents": [ "99c251bbd225dd97d0deece29559a430b12a0b66" ], "author": { "name": "Dave Allison", "email": "dallison@google.com", "time": "Fri Jul 25 16:15:27 2014 -0700" }, "committer": { "name": "Dave Allison", "email": "dallison@google.com", "time": "Wed Aug 13 09:01:41 2014 -0700" }, "message": "Reduce stack usage for overflow checks\n\nThis reduces the stack space reserved for overflow checks to 12K, split\ninto an 8K gap and a 4K protected region. GC needs over 8K when running\nin a stack overflow situation.\n\nAlso prevents signal runaway by detecting a signal inside code that\nresulted from a signal handler invokation. And adds a max signal count to\nthe SignalTest to prevent it running forever.\n\nAlso reduces the number of iterations for the InterfaceTest as this was\ntaking (almost) forever with the --trace option on run-test.\n\nBug: 15435566\n\nChange-Id: Id4fd46f22d52d42a9eb431ca07948673e8fda694\n" }, { "commit": "3c7bb98698f77af10372cf31824d3bb115d9bf0f", "tree": "1cd4cc18babfbb16ab908f23929fa88d7678f06b", "parents": [ "98cc1e552c2ccbe5d51bc81d49e79119280f5416" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jul 23 16:04:16 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jul 28 15:44:28 2014 +0100" }, "message": "Implement array get and array put in optimizing.\n\nAlso fix a couple of assembler/disassembler issues.\n\nChange-Id: I705c8572988c1a9c4df3172b304678529636d5f6\n" }, { "commit": "f12feb8e0e857f2832545b3f28d31bad5a9d3903", "tree": "0a7320caf995441ea4577875abaf731fc37dd0a9", "parents": [ "ebb6b5c90857f390db5a4f840bbe67b3a59a22d8" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jul 17 18:32:41 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jul 22 16:07:59 2014 +0100" }, "message": "Stack overflow checks and NPE checks for optimizing.\n\nChange-Id: I59e97448bf29778769b79b51ee4ea43f43493d96\n" }, { "commit": "1a43dd78d054dbad8d7af9ba4829ea2f1cb70b53", "tree": "9460255e0afe00e2976a8d0485d8fc5e3219c6fd", "parents": [ "b5a214105d4c9b6c14de1649764950dd35bd620f" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jul 17 15:15:34 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jul 21 10:39:33 2014 +0100" }, "message": "Add write barriers to optimizing compiler.\n\nChange-Id: I43a40954757f51d49782e70bc28f7c314d6dbe17\n" }, { "commit": "96f89a290eb67d7bf4b1636798fa28df14309cc7", "tree": "ca2b484a18107f8253aa7774cde304586a31bc60", "parents": [ "4436e926aa8e64ac7e4c4afb81f2a59b2477045a" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jul 11 10:57:49 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jul 21 09:54:20 2014 +0100" }, "message": "Add assembly operations with constants in optimizing compiler.\n\nChange-Id: I5bcc35ab50d4457186effef5592a75d7f4e5b65f\n" }, { "commit": "8d486731559ba0c5e12c27b4a507181333702b7e", "tree": "78d19970d33511d6a1c54560801d5c5dcc0c47af", "parents": [ "fbde4dd1cb6db729e3f3ee5bdae0cdd824d73054" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jul 16 16:23:40 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jul 16 17:55:38 2014 +0100" }, "message": "Use the thumb2 assembler for the optimizing compiler.\n\nChange-Id: I2b058f4433504dc3299c06f5cb0b5ab12f34aa82\n" }, { "commit": "ab032bc1ff57831106fdac6a91a136293609401f", "tree": "5891daefe635283443a255a811ab6a3f3b8a62cd", "parents": [ "635561b86ac03f5562bdb779baa6db12f31b3cae" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jul 15 12:55:21 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jul 15 12:58:29 2014 +0100" }, "message": "Fix a braino in the stack layout.\n\nAlso do some refactoring to have this code be just in CodeGenerator.\n\nChange-Id: I88de109889138af8d60027973c12a64bee813cb7\n" }, { "commit": "e50383288a75244255d3ecedcc79ffe9caf774cb", "tree": "8858489463a57c7b50f7db4d972abec21302b7a7", "parents": [ "cf90ba7ebe00346651f3b7ce1e5b1f785f7caabd" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jul 04 09:41:32 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jul 14 10:06:11 2014 +0100" }, "message": "Support fields in optimizing compiler.\n\n- Required support for temporaries, to be only used by baseline compiler.\n- Also fixed a few invalid assumptions around locations and instructions\n that don\u0027t need materialization. These instructions should not have an Out.\n\nChange-Id: Idc4a30dd95dd18015137300d36bec55fc024cf62\n" }, { "commit": "412f10cfed002ab617c78f2621d68446ca4dd8bd", "tree": "bbd9dddd0436da566365ada5deb1840e315e1b11", "parents": [ "d6ab04646d8eec6f24b200f8649f3d942d9ad17e" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 19 10:00:34 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jul 02 16:00:32 2014 +0100" }, "message": "Support longs in the register allocator for x86_64.\n\nChange-Id: I7fb6dfb761bc5cf9e5705682032855a0a70ca867\n" }, { "commit": "f61b5377068f22c0be7b2f6e62961e620408beb2", "tree": "15971fe1cf0797fa0b8ac0507b1a88c206f6c22e", "parents": [ "fe6bfba3153ab55dab3ec0d644d628136e5ff0a4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 25 14:35:34 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 26 09:27:37 2014 +0100" }, "message": "Re-enable tests with the optimizing compiler.\n\nTests run ok on my host/target. I reverted the move to\nusing thumb2, because tests were crashing. But I could not\nreproduce file limits issues.\n\nMake SignalTest as crashing for optimizing. We need to implement\nstack overflow checks.\n\nChange-Id: Ieda575501eaf30af7aaa2c44e71544c9c467c24f\n" }, { "commit": "20dfc797dc631bf8d655dcf123f46f13332d3074", "tree": "c1d4e4f919d54f39a6d39d9d769ed5a844afb22b", "parents": [ "cbb0e809c0a4e8a4e8b7f5d3768a1864cfb381bb" ], "author": { "name": "Dave Allison", "email": "dallison@google.com", "time": "Mon Jun 16 20:44:29 2014 -0700" }, "committer": { "name": "Dave Allison", "email": "dallison@google.com", "time": "Tue Jun 24 09:05:27 2014 -0700" }, "message": "Add some more instruction support to optimizing compiler.\n\nThis adds a few more DEX instructions to the optimizing compiler\u0027s\nbuilder (constants, moves, if_xx, etc).\n\nAlso:\n* Changes the codegen for IF_XX instructions to use a condition\n rather than comparing a value against 0.\n* Fixes some instructions in the ARM disassembler.\n* Fixes PushList and PopList in the thumb2 assembler.\n* Switches the assembler for the optimizing compiler to thumb2\n rather than ARM.\n\nChange-Id: Iaafcd02243ccc5b03a054ef7a15285b84c06740f\n" }, { "commit": "9cf35523764d829ae0470dae2d5dd99be469c841", "tree": "889459a8ecf8fdf801ea46dd58d15268dfb25af8", "parents": [ "b08f63c21de64f8b74003e3638e100471bd099f3" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jun 09 18:40:10 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jun 13 09:49:30 2014 +0100" }, "message": "Add x86_64 support to the optimizing compiler.\n\nChange-Id: I4462d9ae15be56c4a3dc1bd4d1c0c6548c1b94be\n" }, { "commit": "e27f31a81636ad74bd3376ee39cf215941b85c0e", "tree": "12dd6a1153b78b831c887f65f0bcef715e89719d", "parents": [ "dfc2091d2fb8a7694f69acf8bd39ce4953e026c2" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 12 17:53:14 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 12 18:05:00 2014 +0100" }, "message": "Enable the register allocator on ARM.\n\n- Also fixes a few bugs/wrong assumptions in code not hit by x86.\n- We need to differentiate between moves due to connecting siblings within\n a block, and moves due to control flow resolution.\n\nChange-Id: Idd05cf138a71c8f36f5531c473de613c0166fe38\n" }, { "commit": "86dbb9a12119273039ce272b41c809fa548b37b6", "tree": "a4626e21ae16a9a5e133ea3e5e95b58d2ea4d8e5", "parents": [ "c936622863a50bdda9b10062515dfc02a8c8b652" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 04 11:12:39 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 12 10:02:06 2014 +0100" }, "message": "Final CL to enable register allocation on x86.\n\nThis CL implements:\n1) Resolution after allocation: connecting the locations\n allocated to an interval within a block and between blocks.\n2) Handling of fixed registers: some instructions require\n inputs/output to be at a specific location, and the allocator\n needs to deal with them in a special way.\n3) ParallelMoveResolver::EmitNativeCode for x86.\n\nChange-Id: I0da6bd7eb66877987148b87c3be6a983b4e3f858\n" }, { "commit": "31d76b42ef5165351499da3f8ee0ac147428c5ed", "tree": "4f9cf307923c72f73e4a814662a26406f155c38c", "parents": [ "7eb3fa1e03b070c55ecbc814e2e3ae4409cf7b1e" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jun 09 15:02:22 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jun 10 10:48:50 2014 +0100" }, "message": "Plug code generator into liveness analysis.\n\nAlso implement spill slot support.\n\nChange-Id: If5e28811e9fbbf3842a258772c633318a2f4fafc\n" }, { "commit": "a7062e05e6048c7f817d784a5b94e3122e25b1ec", "tree": "a5d6b64ae6d5352f761fc2547bda863281adbe40", "parents": [ "8b5b1e5593ffa77c393e4172b71a3d5a821d2ed8" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu May 22 12:50:17 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon May 26 11:31:38 2014 +0100" }, "message": "Add a linear scan register allocator to the optimizing compiler.\n\nThis is a \"by-the-book\" implementation. It currently only deals\nwith allocating registers, with no hint optimizations.\n\nThe changes remaining to make it functional are:\n- Allocate spill slots.\n- Resolution and placements of Move instructions.\n- Connect it to the code generator.\n\nChange-Id: Ie0b2f6ba1b98da85425be721ce4afecd6b4012a4\n" }, { "commit": "4e3d23aa1523718ea1fdf3a32516d2f9d81e84fe", "tree": "78593d033513a98486a409e7b23678ccced12cd5", "parents": [ "59f3f62534581311c7c403c832f56c272426a17c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu May 22 18:32:45 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri May 23 10:00:44 2014 +0100" }, "message": "Import Dart\u0027s parallel move resolver.\n\nAnd write a few tests while at it.\n\nA parallel move resolver will be needed for performing multiple moves\nthat are conceptually parallel, for example moves at a block\nexit that branches to a block with phi nodes.\n\nChange-Id: Ib95b247b4fc3f2c2fcab3b8c8d032abbd6104cd7\n" }, { "commit": "b0fa5dc7769c1e054032f39de0a3f6d6dd06f8cf", "tree": "839d13ebfa7170967dd9b4abd434b7abda53da99", "parents": [ "948740c1938860df055ddc801f20fd1707331e38" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Mon Apr 28 16:47:08 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Tue Apr 29 14:36:28 2014 -0700" }, "message": "Force inlining on trivial accessors.\n\nMake volatility for GetFieldObject a template parameter.\nMove some trivial mirror::String routines to a -inl.h.\n\nBug: 14285442\n\nChange-Id: Ie23b11d4f18cb15a62c3bbb42837a8aaf6b68f92\n" }, { "commit": "a7aca370a7d62ca04a1e24423d90e8020d6f1a58", "tree": "65d501b0f9711abddbea1a9d06623baafa4ae2b3", "parents": [ "5dee5df89aa2cefef6c886d5b9b642cc6f1c595b" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Apr 28 17:47:12 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Apr 29 10:55:30 2014 +0100" }, "message": "Setup policies for register allocation.\n\nChange-Id: I857e77530fca3e2fb872fc142a916af1b48400dc\n" }, { "commit": "c32e770f21540e4e9eda6dc7f770e745d33f1b9f", "tree": "56a76d7399bf749a4500fb60483e0dc075a24ee7", "parents": [ "618a87009202dc959c935ed8f237ae32bdec57d0" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Apr 24 12:43:16 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Apr 28 16:21:40 2014 +0100" }, "message": "Add a Transform to SSA phase to the optimizing compiler.\n\nChange-Id: Ia9700756a0396d797a00b529896487d52c989329\n" }, { "commit": "a747a392fb5f88d2ecc4c6021edf9f1f6615ba16", "tree": "fc5f08b127f3cf6bfb933504070109d46a455bb9", "parents": [ "c2b2bbf1bbdf6273298b79d6006611593ed9f3a0" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Apr 17 14:56:23 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Apr 17 15:16:00 2014 +0100" }, "message": "Code cleanup in preparation for x64 backend.\n\n- Use InvokeDexCallingConventionVisitor for setting\n up HParameterValues\n- Use kVregSize instead of kX86WordSize when dealing with\n virtual registers.\n\nChange-Id: Ia520223010194c70a3ff0ed659077f55cec4e7d8\n" }, { "commit": "db928fcc975b431d8a78700c11bd7da21090384a", "tree": "24092c6da3cd3651fc0eaee89d0093ac05afeaed", "parents": [ "e8b2e6e70decca7ce324350c9c03c9a432ed64d6" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Apr 16 17:38:32 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Apr 17 13:23:24 2014 +0000" }, "message": "Simplify HInvokeStatic code generation.\n\nHPushArgument is not needed for now (but might be when we start\noptimizing). Also, calling convention for 64bits backend will\nrequire to know more about the argument than the argument\u0027s\nindex. Therefore currently let HInvokeStatic setup the arguments,\nwhich is possible because arguments of a calls are virtual registers\nand not instructions.\n\nChange-Id: I8753ed6083aa083c5180ab53b436dc8de4f1fe31\n" }, { "commit": "01bc96d007b67fdb7fe349232a83e4b354ce3d08", "tree": "1ed36c2d7c0fb204e6f276bd9853153d9350ad1d", "parents": [ "2be6fc74bce10ac68d3d1b39a5019f520ad170ea" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Apr 11 17:43:50 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Apr 16 14:21:12 2014 +0100" }, "message": "Long support in optimizing compiler.\n\n- Add stack locations to the Location class.\n- Change logic of parameter passing/setup by setting the\n location of such instructions the ones for the calling\n convention.\n\nChange-Id: I4730ad58732813dcb9c238f44f55dfc0baa18799\n" }, { "commit": "b55f835d66a61e5da6fc1895ba5a0482868c9552", "tree": "44659a826aeadcf2bf176c2e8d31108ba64c88eb", "parents": [ "427ca38b0a6c6fd7dc0dbb380619e2b91b56cf1c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Apr 07 15:26:35 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Apr 08 08:43:50 2014 +0100" }, "message": "Test control flow instruction with optimizing compiler.\n\nAdd support for basic instructions to implement these tests.\n\nChange-Id: I3870bf9301599043b3511522bb49dc6364c9b4c0\n" }, { "commit": "f583e5976e1de9aa206fb8de4f91000180685066", "tree": "0e7c2d30af5c713012f0a33e6dd7d8f71e7fc85d", "parents": [ "7ab4e5c5288e04b7beb6d8ddfd5e8bf878002732" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Apr 07 13:20:42 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Apr 07 15:24:23 2014 +0100" }, "message": "Add support for taking parameters in optimizing compiler.\n\n- Fix stack layout to mimic Quick\u0027s.\n- Implement some sub operations.\n\nChange-Id: I8cf75a4d29b662381a64f02c0bc61d859482fc4e\n" }, { "commit": "707c809f661554713edfacf338365adca8dfd3a3", "tree": "21aaa53a3beb7d73fb2af9ab55bee7a538254fcb", "parents": [ "7efad5d3a806a15166109837439f2e149031feef" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Apr 04 10:50:14 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Apr 04 10:50:14 2014 +0100" }, "message": "Use target-specific word instead of runtime word.\n\nChange-Id: Ia11dc3cc520a1a5c7bd017013e5699af9570ce91\n" }, { "commit": "2e7038ac5848468740d6a419434d3dde8c585a53", "tree": "465940d5cc57b28c4f5b5ad588f6d86ee72097ed", "parents": [ "a7b2826fa469c626ff2c3ff26fd848c28bccc092" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Apr 03 18:49:58 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Apr 04 09:59:06 2014 +0100" }, "message": "Add support for new-instance and invoke-direct.\n\nChange-Id: I2daed646904f7711972a7da15d88be7573426932\n" }, { "commit": "4a34a428c6a2588e0857ef6baf88f1b73ce65958", "tree": "a9f025c17752a175c4e6a203c01e935cb438efb1", "parents": [ "8549cf9d83688f7decbbea2a8de761ce29e95f3c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Apr 03 10:38:37 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Apr 03 17:09:22 2014 +0100" }, "message": "Support passing arguments to invoke-static* instructions.\n\n- Stop using the frame pointer for accessing locals.\n- Stop emulating a stack when doing code generation. Instead,\n rely on dex register model, where instructions only reference\n registers.\n\nChange-Id: Id51bd7d33ac430cb87a53c9f4b0c864eeb1006f9\n" }, { "commit": "d8ee737fdbf380c5bb90c9270c8d1087ac23e76c", "tree": "becdbf2b4e2a3c84952bd7b1db60a2daccd47206", "parents": [ "7f466c08888129a9923cb973a4dc73ee4a71574e" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Mar 28 15:43:40 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 31 11:41:39 2014 +0100" }, "message": "Add support for adding two integers in optimizing compiler.\n\nChange-Id: I5524e193cd07f2692a57c6b4f8069904471b2928\n" }, { "commit": "8ccc3f5d06fd217cdaabd37e743adab2031d3720", "tree": "ec8c904baafb4d9b9bfd582245e2d780bcdfaade", "parents": [ "ad174d1b54bf2fa477bec71a0ca93595f54b8fe9" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Mar 19 10:34:11 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 31 09:44:40 2014 +0100" }, "message": "Add support for invoke-static in optimizing compiler.\n\nSupport is limited to calls without parameters and returning\nvoid. For simplicity, we currently follow the Quick ABI.\n\nChange-Id: I54805161141b7eac5959f1cae0dc138dd0b2e8a5\n" }, { "commit": "787c3076635cf117eb646c5a89a9014b2072fb44", "tree": "3c9c6c6d56e3900cf2255a5d1ade008ec6a40681", "parents": [ "b9d50a9829b795932eac4cc50a99b4ce80b0ecb4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 17 10:20:19 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Mar 18 11:20:20 2014 +0000" }, "message": "Plug new optimizing compiler in compilation pipeline.\n\nAlso rename accessors to ART\u0027s conventions.\n\nChange-Id: I344807055b98aa4b27215704ec362191464acecc\n" }, { "commit": "bab4ed7057799a4fadc6283108ab56f389d117d4", "tree": "ea1bf495458fd9f7a3ffbed0ea4e1dda5a0b8184", "parents": [ "37d4c1db4d705f5a28001f65afdd68d0527948d8" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Mar 11 17:53:17 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Mar 13 09:23:12 2014 +0000" }, "message": "More code generation for the optimizing compiler.\n\n- Add HReturn instruction\n- Generate code for locals/if/return\n- Setup infrastructure for register allocation. Currently\n emulate a stack.\n\nChange-Id: Ib28c2dba80f6c526177ed9a7b09c0689ac8122fb\n" }, { "commit": "3ff386aafefd5282bb76c8a50506a70a4321e698", "tree": "5f6e990553daae150a168f581bac79e659f7f712", "parents": [ "0307b5c91c287e08cd414ecc5de32befceb7e371" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Mar 04 14:46:47 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 10 11:41:22 2014 +0000" }, "message": "Add register support to the optimizing compiler.\n\nAlso make if take an input and build the use list for instructions.\n\nChange-Id: I1938cee7dce5bd4c66b259fa2b431d2c79b3cf82\n" }, { "commit": "d4dd255db1d110ceb5551f6d95ff31fb57420994", "tree": "93c9dfff8d16f2b9675c35477cc4bcd8ea3f630c", "parents": [ "b565506a63e75dac4a8bb9dd54dabf5259e5b95f" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Feb 28 10:23:58 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Mar 04 16:19:11 2014 +0000" }, "message": "Add codegen support to the optimizing compiler.\n\nChange-Id: I9aae76908ff1d6e64fb71a6718fc1426b67a5c28\n" } ] }