)]}' { "log": [ { "commit": "927307433af0a9322e8ba77eda37168512a73683", "tree": "6166be9b846cb8a639121e6977abda177e7ffb01", "parents": [ "46fdec13b6dcaf932aa9fb1338f32df01aa0d959" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@arm.com", "time": "Wed Oct 01 12:55:56 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 23 17:36:52 2014 +0100" }, "message": "ART: Add basic tests for materialized conditions.\n\nChange-Id: I4acef30cc6a48b5fe07d55db6b9cf0d093b326ee\n" }, { "commit": "5319defdf502fc4569316473846b83180ec08035", "tree": "909c6b29f065c79c8368a283946947cbb582d1c7", "parents": [ "37a7188810e865a1ee0a7bdc2d01d62c1f1ea49e" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@arm.com", "time": "Thu Oct 23 10:03:10 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 23 13:44:42 2014 +0100" }, "message": "ART: optimizing compiler: initial support for ARM64.\n\nThe ARM64 port uses VIXL for code generation, to which it defers work\nlike label binding and branch resolving, register type coherency\nchecking, and immediate values handling.\n\nChange-Id: I0a44508c0c991f472a63e67b3469cdd878fe1a68\nSigned-off-by: Serban Constantinescu \u003cserban.constantinescu@arm.com\u003e\nSigned-off-by: Alexandre Rames \u003calexandre.rames@arm.com\u003e\n" }, { "commit": "039b6e2fd3bfadbd1ee8583002f673d6ccba5b7e", "tree": "1c42d51799207bb7c4ced079fce4878274fa8e81", "parents": [ "1e4dc259b4242c1a03415b5b5f4aed7a23e53f79" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 12:32:11 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 12:47:38 2014 +0100" }, "message": "Remove obsolete TODOs from codegen tests\n\nThe features are already exercised by the art test 411-optimizing-arith.\n\nChange-Id: Id008931e0ed8206ced11ecc85a80a7e4aef3e68e\n" }, { "commit": "1cc5f251df558b0e22cea5000626365eb644c727", "tree": "5e65a32366261646edce02283a185928adba79b5", "parents": [ "b08f4dcf90215ed49e0b796ab3e609bd605be8ba" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 22 18:06:21 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 10:12:06 2014 +0100" }, "message": "Implement int bit-wise not operation in the optimizing compiler.\n\n- Add support for the not-int (integer one\u0027s complement\n negate) instruction in the optimizing compiler.\n- Extend the HNot control-flow graph node type and make it\n inherit from HUnaryOperation.\n- Generate ARM, x86 and x86-64 code for integer HNeg nodes.\n- Exercise these additions in the codegen_test gtest, as there\n is not direct way to assess the support of not-int from a\n Java source. Indeed, compiling a Java expression such as\n `~a\u0027 using javac and then dx generates an xor-int/lit8 Dex\n instruction instead of the expected not-int Dex instruction.\n This is probably because the Java bytecode has an `ixor\u0027\n instruction, but there\u0027s not instruction directly\n corresponding to a bit-wise not operation.\n\nChange-Id: I223aed75c4dac5785e04d99da0d22e8d699aee2b\n" }, { "commit": "48dee04f4e4214b0fdd8acd0587ef6b08d3d2456", "tree": "aa50172b03bce73ba8d3ef535696c7684d047445", "parents": [ "b5bfa96ff20e86316961327dec5c859239dab6a0" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Oct 22 15:54:12 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Oct 22 15:54:12 2014 +0100" }, "message": "Minor fix in codegen tests.\n\nChange-Id: I9b843536353d4f820b969895d5f75ee9b679aff0\n" }, { "commit": "34bacdf7eb46c0ffbf24ba7aa14a904bc9176fb2", "tree": "e8ed8e40c5f7896a9ac01bf7dcc2e56f40cfc804", "parents": [ "7f758228f7904d2f65f06bfbd2b8ecbb8e8c6a9d" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 07 20:23:36 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Oct 17 11:46:45 2014 +0100" }, "message": "Add multiplication for integral types\n\nThis also fixes an issue where we could allocate a pair register even if\none of its parts was already blocked.\n\nChange-Id: I4869175933409add2a56f1ccfb369c3d3dd3cb01\n" }, { "commit": "360231a056e796c36ffe62348507e904dc9efb9b", "tree": "a62ff73c11eaa6694649c98e4c2d872e89149b0c", "parents": [ "2072c465cfff077da257bdf14f1f1b2690c946c8" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 08 21:07:48 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 09 15:21:57 2014 +0100" }, "message": "Fix code generation of materialized conditions.\n\nMove the logic for knowing if a condition needs to be materialized\nin an optimization pass (so that the information does not change\nas a side effect of another optimization).\n\nAlso clean-up arm and x86_64 codegen:\n- arm: ldr and str are for power-users when a constant is\n in play. We should use LoadFromOffset and StoreToOffset.\n- x86_64: fix misuses of movq instead of movl.\n\nChange-Id: I01a03b91803624be2281a344a13ad5efbf4f3ef3\n" }, { "commit": "fbc695f9b8e2084697e19c1355ab925f99f0d235", "tree": "03e643aa9b468a512873293528bec93438580bab", "parents": [ "3d2d7fb7ad24f4aec681ddc68a9565fa837b97ef" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 15 15:33:30 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Sep 16 16:18:12 2014 +0100" }, "message": "Revert \"Revert \"Implement suspend checks in new compiler.\"\"\n\nThis reverts commit 7e3652c45c30c1f2f840e6088e24e2db716eaea7.\n\nChange-Id: Ib489440c34e41cba9e9e297054f9274f6e81a2d8\n" }, { "commit": "a1c22c172046d51579f2adb1f12f658022ff022e", "tree": "736f09504001e3d00824366cdcfbac736451f03f", "parents": [ "0b35b9781b9e7143d673474fd59e13294c90abb5" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 11 12:17:43 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 11 12:17:43 2014 +0100" }, "message": "Fix builds on archs the compiler does not support.\n\nChange-Id: Ibfc47026596c868fb6d48465a6e564a0b1e07fd0\n" }, { "commit": "8a16d97fb8f031822b206e65f9109a071da40563", "tree": "9dbbf5feaac15d2e4f54fbfc3c204fcdd6e8317a", "parents": [ "c7f6b86c269727fe031146b9c18652d40916d46f" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 11 10:30:02 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 11 10:32:12 2014 +0100" }, "message": "Fix valgrind errors.\n\nFor now just stack allocate the code generator. Will think\nabout cleaning up the root problem later (CodeGenerator being an\narena object).\n\nChange-Id: I161a6f61c5f27ea88851b446f3c1e12ee9c594d7\n" }, { "commit": "73e80c3ae76fafdb53afe3a85306dcb491fb5b00", "tree": "6c437ad0e24f0ed66251e8f37c13b6e6675db1f2", "parents": [ "16fc9f617e395758eb95b5f2124c79a828186b55" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jul 22 17:47:56 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jul 22 17:47:56 2014 +0100" }, "message": "Make unit test tell if a method is a leaf.\n\nThe runtime is not initialized completely in gtests, so we\ncannot run code (such as explicit stack overflow checks) that\nlook at tls values.\n\nChange-Id: I74a4449b01eb203f1b411dda700e9459878d0d55\n" }, { "commit": "8d486731559ba0c5e12c27b4a507181333702b7e", "tree": "78d19970d33511d6a1c54560801d5c5dcc0c47af", "parents": [ "fbde4dd1cb6db729e3f3ee5bdae0cdd824d73054" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jul 16 16:23:40 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jul 16 17:55:38 2014 +0100" }, "message": "Use the thumb2 assembler for the optimizing compiler.\n\nChange-Id: I2b058f4433504dc3299c06f5cb0b5ab12f34aa82\n" }, { "commit": "f61b5377068f22c0be7b2f6e62961e620408beb2", "tree": "15971fe1cf0797fa0b8ac0507b1a88c206f6c22e", "parents": [ "fe6bfba3153ab55dab3ec0d644d628136e5ff0a4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 25 14:35:34 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 26 09:27:37 2014 +0100" }, "message": "Re-enable tests with the optimizing compiler.\n\nTests run ok on my host/target. I reverted the move to\nusing thumb2, because tests were crashing. But I could not\nreproduce file limits issues.\n\nMake SignalTest as crashing for optimizing. We need to implement\nstack overflow checks.\n\nChange-Id: Ieda575501eaf30af7aaa2c44e71544c9c467c24f\n" }, { "commit": "e61fd353c06f51f1b8ca5af69997d0185b7659b2", "tree": "984d0609bf71e7705117e19eb836ddf203be6d01", "parents": [ "20550910e608ed7d86db97927d2ce9d2191061a4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 25 14:15:06 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 25 14:15:06 2014 +0000" }, "message": "Revert \"Re-enable tests with the optimizing compiler.\"\n\nThis reverts commit 20550910e608ed7d86db97927d2ce9d2191061a4.\n\nChange-Id: Ic28b719946c795378838a18162a2a2b2cf41a0e8\n" }, { "commit": "20550910e608ed7d86db97927d2ce9d2191061a4", "tree": "685b5ede42c3583c0152f784567026b1afc8e55d", "parents": [ "ae43e2b11cc5af5b632700a9e4e4d9ed436b24dc" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 25 14:35:34 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 25 14:35:34 2014 +0100" }, "message": "Re-enable tests with the optimizing compiler.\n\nTests run ok on my host/target. I reverted the move to\nusing thumb2, because tests were crashing. But I could not\nreproduce file limits issues.\n\nChange-Id: I26bc4ec1eb6c227750d11210e012d9d3b1d824af\n" }, { "commit": "20dfc797dc631bf8d655dcf123f46f13332d3074", "tree": "c1d4e4f919d54f39a6d39d9d769ed5a844afb22b", "parents": [ "cbb0e809c0a4e8a4e8b7f5d3768a1864cfb381bb" ], "author": { "name": "Dave Allison", "email": "dallison@google.com", "time": "Mon Jun 16 20:44:29 2014 -0700" }, "committer": { "name": "Dave Allison", "email": "dallison@google.com", "time": "Tue Jun 24 09:05:27 2014 -0700" }, "message": "Add some more instruction support to optimizing compiler.\n\nThis adds a few more DEX instructions to the optimizing compiler\u0027s\nbuilder (constants, moves, if_xx, etc).\n\nAlso:\n* Changes the codegen for IF_XX instructions to use a condition\n rather than comparing a value against 0.\n* Fixes some instructions in the ARM disassembler.\n* Fixes PushList and PopList in the thumb2 assembler.\n* Switches the assembler for the optimizing compiler to thumb2\n rather than ARM.\n\nChange-Id: Iaafcd02243ccc5b03a054ef7a15285b84c06740f\n" }, { "commit": "49c105d624e4bf8e56b85caaecfeb80864bd3f59", "tree": "a1fbfb6af61a3c5c4d605556ed67964c367a5a92", "parents": [ "9613592aebace270e5d147c55e8d3c642fbb7541" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jun 13 10:29:43 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jun 13 10:29:43 2014 +0100" }, "message": "Guard `Run` for platforms we\u0027re not compiling to, yet.\n\nChange-Id: I0dc210d2734e95714bed6c481a31fa4daabb9332\n" }, { "commit": "9cf35523764d829ae0470dae2d5dd99be469c841", "tree": "889459a8ecf8fdf801ea46dd58d15268dfb25af8", "parents": [ "b08f63c21de64f8b74003e3638e100471bd099f3" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jun 09 18:40:10 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jun 13 09:49:30 2014 +0100" }, "message": "Add x86_64 support to the optimizing compiler.\n\nChange-Id: I4462d9ae15be56c4a3dc1bd4d1c0c6548c1b94be\n" }, { "commit": "86dbb9a12119273039ce272b41c809fa548b37b6", "tree": "a4626e21ae16a9a5e133ea3e5e95b58d2ea4d8e5", "parents": [ "c936622863a50bdda9b10062515dfc02a8c8b652" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 04 11:12:39 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 12 10:02:06 2014 +0100" }, "message": "Final CL to enable register allocation on x86.\n\nThis CL implements:\n1) Resolution after allocation: connecting the locations\n allocated to an interval within a block and between blocks.\n2) Handling of fixed registers: some instructions require\n inputs/output to be at a specific location, and the allocator\n needs to deal with them in a special way.\n3) ParallelMoveResolver::EmitNativeCode for x86.\n\nChange-Id: I0da6bd7eb66877987148b87c3be6a983b4e3f858\n" }, { "commit": "700a402244a1a423da4f3ba8032459f4b65fa18f", "tree": "4c22fcda04d271bd55a37aff30650214af17a90c", "parents": [ "047c11adcbcbc0bcf210defdfcbada763961ffee" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Mon May 19 16:49:03 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Mon May 19 22:27:39 2014 -0700" }, "message": "Now we have a proper C++ library, use std::unique_ptr.\n\nAlso remove the Android.libcxx.mk and other bits of stlport compatibility\nmechanics.\n\nChange-Id: Icdf7188ba3c79cdf5617672c1cfd0a68ae596a61\n" }, { "commit": "d8ee737fdbf380c5bb90c9270c8d1087ac23e76c", "tree": "becdbf2b4e2a3c84952bd7b1db60a2daccd47206", "parents": [ "7f466c08888129a9923cb973a4dc73ee4a71574e" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Mar 28 15:43:40 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 31 11:41:39 2014 +0100" }, "message": "Add support for adding two integers in optimizing compiler.\n\nChange-Id: I5524e193cd07f2692a57c6b4f8069904471b2928\n" }, { "commit": "787c3076635cf117eb646c5a89a9014b2072fb44", "tree": "3c9c6c6d56e3900cf2255a5d1ade008ec6a40681", "parents": [ "b9d50a9829b795932eac4cc50a99b4ce80b0ecb4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 17 10:20:19 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Mar 18 11:20:20 2014 +0000" }, "message": "Plug new optimizing compiler in compilation pipeline.\n\nAlso rename accessors to ART\u0027s conventions.\n\nChange-Id: I344807055b98aa4b27215704ec362191464acecc\n" }, { "commit": "39d57e2de8ec7420f2395a28cd7bd51e658d57b8", "tree": "355feca4d3694cd1fd5afef99fe54d0db8886520", "parents": [ "af7ec0e4efd43aaa58094d036c85736059d9f18d" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Mar 13 10:28:41 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Mar 13 10:28:41 2014 +0000" }, "message": "Fix non-{arm, x86} builds.\n\nChange-Id: If4c13775f8e1fd0fd26b4a731f3011c77b0bfed1\n" }, { "commit": "bab4ed7057799a4fadc6283108ab56f389d117d4", "tree": "ea1bf495458fd9f7a3ffbed0ea4e1dda5a0b8184", "parents": [ "37d4c1db4d705f5a28001f65afdd68d0527948d8" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Mar 11 17:53:17 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Mar 13 09:23:12 2014 +0000" }, "message": "More code generation for the optimizing compiler.\n\n- Add HReturn instruction\n- Generate code for locals/if/return\n- Setup infrastructure for register allocation. Currently\n emulate a stack.\n\nChange-Id: Ib28c2dba80f6c526177ed9a7b09c0689ac8122fb\n" }, { "commit": "3ff386aafefd5282bb76c8a50506a70a4321e698", "tree": "5f6e990553daae150a168f581bac79e659f7f712", "parents": [ "0307b5c91c287e08cd414ecc5de32befceb7e371" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Mar 04 14:46:47 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 10 11:41:22 2014 +0000" }, "message": "Add register support to the optimizing compiler.\n\nAlso make if take an input and build the use list for instructions.\n\nChange-Id: I1938cee7dce5bd4c66b259fa2b431d2c79b3cf82\n" }, { "commit": "d4dd255db1d110ceb5551f6d95ff31fb57420994", "tree": "93c9dfff8d16f2b9675c35477cc4bcd8ea3f630c", "parents": [ "b565506a63e75dac4a8bb9dd54dabf5259e5b95f" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Feb 28 10:23:58 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Mar 04 16:19:11 2014 +0000" }, "message": "Add codegen support to the optimizing compiler.\n\nChange-Id: I9aae76908ff1d6e64fb71a6718fc1426b67a5c28\n" } ] }