)]}' { "log": [ { "commit": "b52bbde2870e5ab5d126612961dcb3da8e5236ee", "tree": "3a58d251d8667e7c8447199a799fecba9bd5f918", "parents": [ "1b0755299928221a1dcc5db383bf8fc378d29b60" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Feb 12 12:06:05 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Feb 15 15:06:44 2016 +0000" }, "message": "Optimizing: Simplify consecutive type conversions.\n\nMerge two consecutive type conversions to one if the result\nof such merged conversion is guaranteed to be the same and\nremove all implicit conversions, not just conversions to the\nsame type. Improve codegens to handle conversions from long\nto integral types smaller than int.\n\nThis will make it easier to simplify `(byte) (x \u0026 0xffL)` to\n`(byte) x` where the conversion from long to byte is done by\ntwo dex instructions, long-to-int and in int-to-byte.\n\nBug: 23965701\nChange-Id: I833f193556671136ad2cd3f5b31cdfbc2d99c19d\n" }, { "commit": "6e332529c33be4d7dae5dad3609a839f4c0d3bfc", "tree": "cedd2e1beb170fd5821136fe974e3f34adfcddc2", "parents": [ "d3caabd4f85f86dd744da432993e12935d843a83" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Feb 02 16:15:27 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Feb 12 15:17:50 2016 +0000" }, "message": "ART: Remove HTemporary\n\nChange-Id: I21b984224370a9ce7a4a13a9652503cfb03c5f03\n" }, { "commit": "a19616e3363276e7f2c471eb2839fb16f1d43f27", "tree": "ad3e7fd0f53229e95fb0443586fc30eedabe6967", "parents": [ "9fba3f67a0792ad5eeb495e489d11a87211c318f" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Feb 01 18:57:58 2016 -0800" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Feb 05 09:26:21 2016 -0800" }, "message": "Implemented compare/signum intrinsics as HCompare\n(with all code generation for all)\n\nRationale:\nAt HIR level, many more optimizations are possible, while ultimately\ngenerated code can take advantage of full semantics.\n\nChange-Id: I6e2ee0311784e5e336847346f7f3c4faef4fd17e\n" }, { "commit": "9ff1de06d6ed1da36f7e976224a2d13e5e9882bf", "tree": "9121c384f3e0375fccfa4ca9f71c7d86baf38904", "parents": [ "bee600ff66e3e233274faa1391890ff424a8244e", "a42363f79832a6e14f348514664dc6dc3edf9da2" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 28 16:09:16 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jan 28 16:09:16 2016 +0000" }, "message": "Merge \"Implement first kind of polymorphic inlining.\"" }, { "commit": "a42363f79832a6e14f348514664dc6dc3edf9da2", "tree": "bcd43acdf9903a704b566af00b5c740786284b7b", "parents": [ "9cea9139033a4d04437ebc5542e9466fd67137fe" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Dec 17 14:57:09 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 28 15:55:46 2016 +0000" }, "message": "Implement first kind of polymorphic inlining.\n\nAdd HClassTableGet to fetch an ArtMethod from the vtable or imt,\nand compare it to the only method the profiling saw.\n\nChange-Id: I76afd3689178f10e3be048aa3ac9a97c6f63295d\n" }, { "commit": "74eb1b264691c4eb399d0858015a7fc13c476ac6", "tree": "0b6fc4f3003d50bf6c388601013cdfc606e53859", "parents": [ "75fd2a8ab9b4aff59308034da26eb4986d10fa9e" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Dec 14 11:44:01 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 28 15:50:27 2016 +0000" }, "message": "ART: Implement HSelect\n\nThis patch adds a new HIR instruction to Optimizing. HSelect returns\none of two inputs based on the outcome of a condition.\n\nThis is only initial implementation which:\n - defines the new instruction,\n - repurposes BooleanSimplifier to emit it,\n - extends InstructionSimplifier to statically resolve it,\n - updates existing code and tests accordingly.\n\nCode generators currently emit fallback if/then/else code and will be\nupdated in follow-up CLs to use platform-specific conditional moves\nwhen possible.\n\nChange-Id: Ib61b17146487ebe6b55350c2b589f0b971dcaaee\n" }, { "commit": "b3e773eea39a156b3eacf915ba84e3af1a5c14fa", "tree": "6c0d3a748d7b445a0d776ed306c7add43a0e1dd3", "parents": [ "05aeb408f292d8d94af1646a94bc69faf77f0b46" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Jan 26 11:28:37 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 28 15:48:00 2016 +0000" }, "message": "ART: Implement support for instruction inlining\n\nOptimizing HIR contains \u0027non-materialized\u0027 instructions which are\nemitted at their use sites rather than their defining sites. This\nwas not properly handled by the liveness analysis which did not\nadjust the use positions of the inputs of such instructions.\nDespite the analysis being incorrect, the current use cases never\nproduce incorrect code.\n\nThis patch generalizes the concept of inlined instructions and\nupdates liveness analysis to set the compute use positions correctly.\n\nChange-Id: Id703c154b20ab861241ae5c715a150385d3ff621\n" }, { "commit": "95e7ffc28ea4d6deba356e636b16120ae49b62e2", "tree": "f365f762a4ff46042871b86b96c112d6f1c8d624", "parents": [ "c24b8df48be848af1f4cb54e9caef2b7d6afe680" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 22 11:57:25 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 22 11:57:25 2016 +0000" }, "message": "Improve documentation and assertions of read barrier instrumentation.\n\nFor ARM, x86, x86-64 back ends. The case of the ARM64 back\nend is already handled in\nhttps://android-review.googlesource.com/#/c/197870/.\n\nBug: 12687968\nChange-Id: I6df1128cc100cbdb89020876e1a54de719508be3\n" }, { "commit": "6b5afdd144d2bb3bf994240797834b5666b2cf98", "tree": "d536cd7b3aaf55c563e82c2c522521a91b2bb953", "parents": [ "debeb98aaa8950caf1a19df490f2ac9bf563075b" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jan 22 09:31:52 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jan 22 09:31:52 2016 +0000" }, "message": "Revert \"ARM/ARM64: Extend support of instruction combining.\"\n\nThe test fails its checker parts.\n\nThis reverts commit debeb98aaa8950caf1a19df490f2ac9bf563075b.\n\nChange-Id: I49929e15950c7814da6c411ecd2b640d12de80df\n" }, { "commit": "debeb98aaa8950caf1a19df490f2ac9bf563075b", "tree": "b2a7a7cc6fb2f56d4bcc6cecaa80035668f38dc4", "parents": [ "6aadaef35ea52506db61e463910c2520b702ca5e" ], "author": { "name": "Ilmir Usmanov", "email": "i.usmanov@samsung.com", "time": "Fri Dec 11 11:39:44 2015 +0300" }, "committer": { "name": "Artem Udovichenko", "email": "artem.u@samsung.com", "time": "Thu Jan 21 11:07:38 2016 +0300" }, "message": "ARM/ARM64: Extend support of instruction combining.\n\nCombine multiply instructions in the following way:\nARM64:\nMUL/NEG -\u003e MNEG\nARM32 (32-bit integers only):\nMUL/ADD -\u003e MLA\nMUL/SUB -\u003e MLS\n\nChange-Id: If20f2d8fb060145ab6fbceeb5a8f1a3d02e0ecdb\n" }, { "commit": "e3f43ac79e50a4693ea4d46acf5cffca64910cee", "tree": "848caf115a3251ffc3c9fc60290549a52765801a", "parents": [ "17ccfff2de292fd2b4a78aef87d79b662381f920" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jan 19 15:07:47 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jan 19 15:07:47 2016 +0000" }, "message": "Some read barrier clean-up in Optimizing.\n\nThese changes make the read barrier compiler instrumentation\ncode more uniform among the ARM, ARM64, x86 and x86-64 back\nends.\n\nBug: 12687968\nChange-Id: I6b1c0cf2bc22ed6cd6b14754136bef4a2a036ea5\n" }, { "commit": "955d24c4221aa514067dc13d8a40c8b5071f467d", "tree": "67a527b7e8360579d233ece14b1bb6718b39777a", "parents": [ "ae9f99e2973edd24302b893d109224e8b05dbdf6", "58282f4510961317b8d5a364a6f740a78926716f" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Jan 18 17:13:14 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jan 18 17:13:14 2016 +0000" }, "message": "Merge \"ART: Remove Baseline compiler\"" }, { "commit": "58282f4510961317b8d5a364a6f740a78926716f", "tree": "5d97c0db9fe01dd6e8df2357ef11f614abb853e8", "parents": [ "b8bb9f6d0b59be125066f604f134155f8998f5ae" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 14 12:45:10 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Jan 18 16:39:30 2016 +0000" }, "message": "ART: Remove Baseline compiler\n\nWe don\u0027t need Baseline any more and it hasn\u0027t been maintained for\na while anyway. Let\u0027s remove it.\n\nChange-Id: I442ed26855527be2df3c79935403a25b1ee55df6\n" }, { "commit": "d6e069b16a7d4964e546daf3d340ea11756ab090", "tree": "3b6509b03527e2cb0d9135bdccb02ddf9ea00cd8", "parents": [ "b8bb9f6d0b59be125066f604f134155f8998f5ae" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jan 18 11:11:01 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jan 18 13:16:48 2016 +0000" }, "message": "Optimizing: Improve floating point comparisons on arm and arm64.\n\nAvoid the extra check for unordered inputs by using the\nappropriate arm/arm64 condition.\n\nChange-Id: Ib5e775a90428db7a2cf377ad9fd6a3192d670617\n" }, { "commit": "28943466954ca5d6f586bb5496f7f3f0f85fe87a", "tree": "56a4f7427addf50aba847ea944ec24396c7e848f", "parents": [ "68c56ae9ccdb6e348501456e374ae65e74f6270c", "6de1938e562b0d06e462512dd806166e754035ea" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jan 15 09:19:12 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jan 15 09:19:12 2016 +0000" }, "message": "Merge \"ART: Remove incorrect HFakeString optimization\"" }, { "commit": "947cb4f5582d1f57270b48d3c47ea95e7f9085b5", "tree": "6f6aed8f8cca3177b06521a8db6ca845d18623ad", "parents": [ "7b4199a5fa9f151fbf3af2a34f26d04215a1016c", "15bd22849ee6a1ffb3fb3630f686c2870bdf1bbc" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 14 21:25:16 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jan 14 21:25:16 2016 +0000" }, "message": "Merge \"Implement irreducible loop support in optimizing.\"" }, { "commit": "6de1938e562b0d06e462512dd806166e754035ea", "tree": "f9df086a73860c20768d17ff7bc5be4139567941", "parents": [ "f5b84ee14a3bc578f799a39dca1ae512b49356ea" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jan 08 17:37:10 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 14 16:22:13 2016 +0000" }, "message": "ART: Remove incorrect HFakeString optimization\n\nSimplification of HFakeString assumes that it cannot be used until\nString.\u003cinit\u003e is called which is not true and causes different\nbehaviour between the compiler and the interpreter. This patch\nremoves the optimization together with the HFakeString instruction.\n\nInstead, HNewInstance is generated and an empty String allocated\nuntil it is replaced with the result of the StringFactory call. This\nis consistent with the behaviour of the interpreter but is too\nconservative. A follow-up CL will attempt to optimize out the initial\nallocation when possible.\n\nBug: 26457745\nBug: 26486014\n\nChange-Id: I7139e37ed00a880715bfc234896a930fde670c44\n" }, { "commit": "15bd22849ee6a1ffb3fb3630f686c2870bdf1bbc", "tree": "a261601589163faa4538bcf1c9d156e8ec4a42b3", "parents": [ "5b7b5ddb515828c93f0c2aec67aa513c32d0de22" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jan 05 15:55:41 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 14 15:00:20 2016 +0000" }, "message": "Implement irreducible loop support in optimizing.\n\nSo we don\u0027t fallback to the interpreter in the presence of\nirreducible loops.\n\nImplications:\n- A loop pre-header does not necessarily dominate a loop header.\n- Non-constant redundant phis will be kept in loop headers, to\n satisfy our linear scan register allocation algorithm.\n- while-graph optimizations, such as gvn, licm, lse, and dce\n need to know when they are dealing with irreducible loops.\n\nChange-Id: I2cea8934ce0b40162d215353497c7f77d6c9137e\n" }, { "commit": "42249c3602c3d0243396ee3627ffb5906aa77c1e", "tree": "1e822a21c87331246cbde3923eac88fa315fa2cc", "parents": [ "922698ded1e80cad1ecce4c2172a88c76a216373" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Jan 07 15:33:50 2016 -0800" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Jan 12 16:39:20 2016 -0800" }, "message": "Reduce code size by sharing slow paths.\n\nRationale:\nSharing identical slow path code reduces code size.\n\nBackground:\nCurrently, slow paths with the same dex-pc, same physical register\nspilling code, and identical stack maps are shared (making this\nonly useful for deopt slow paths). The newly introduced mechanism\nis sufficiently general to allow future improvements by e.g.\nallowing different dex-pc (by passing this to runtime) or even\nthe kind of slow paths (by passing runtime addresses to the slowpath).\n\nChange-Id: I819615c47b4fd98440a241f681f93e4fc22d12e0\n" }, { "commit": "3da15f8b1097905e06a59149c3a4a9658cbb7d5e", "tree": "1c572d200ee0382b33d33e038b5b228b16c198c0", "parents": [ "a21489e7fa07722d340f69a12921cd7aa9ee4a17", "ac6ac10a0801fa6eb95e0ab0c72b2ed562210b34" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jan 12 12:19:19 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jan 12 12:19:19 2016 +0000" }, "message": "Merge \"Optimizing/ARM: Fix CmpConstant().\"" }, { "commit": "8566a91502db625ff9428a3c2418714488ecd5d9", "tree": "fc3ade71413203fd053d06b98210f263084e34c9", "parents": [ "20b6863769357d798464a65c5ee5dfd64464d400", "b7070a2db8b0b7eca14f01f932be305be64ded57" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Jan 11 14:47:37 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jan 11 14:47:37 2016 +0000" }, "message": "Merge \"Generate Nops to ensure that debug stack maps have distinct PC.\"" }, { "commit": "f871d466a1f20a6906d4d22f878f1f93d73ccf69", "tree": "9c46d31d371eb03a5d56cb7aceb5a5a625ae0fd3", "parents": [ "6f68ad42bb6b22e7cf8337f76953fda44ca89405", "68f6289fbc1b14ed814722c023b3f343c1e59a79" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 11 14:20:52 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jan 11 14:20:52 2016 +0000" }, "message": "Merge \"Don\u0027t use std::abs on INT_MIN/LONG_MIN, it\u0027s undefined.\"" }, { "commit": "b7070a2db8b0b7eca14f01f932be305be64ded57", "tree": "06ba87d56a708712fb206e23d3abd55f21934373", "parents": [ "ae6f23c83e1c8dcfbc4f74186ea1a37f1044414b" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Jan 08 18:13:53 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Jan 11 12:22:17 2016 +0000" }, "message": "Generate Nops to ensure that debug stack maps have distinct PC.\n\nChange-Id: I5740ec958a20d236634b66df0e675382ed5c16fc\n" }, { "commit": "68f6289fbc1b14ed814722c023b3f343c1e59a79", "tree": "86bf0f10e1368871e567145a0d70087cb8f74a4f", "parents": [ "b7371a5517f78f61759f7e6124f2d957d974d9cd" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 04 08:39:49 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 11 11:36:48 2016 +0000" }, "message": "Don\u0027t use std::abs on INT_MIN/LONG_MIN, it\u0027s undefined.\n\nbug:25494265\n\nChange-Id: I560a3a589b92440020285f9adfdf7c9efb06217c\n" }, { "commit": "363910e676f388b87478e553c243157d395ffc3c", "tree": "ea179b1a3db97302f96b0f17b6a2ac05e00118f2", "parents": [ "fbd9dfcf4ffc32f0bda831aa898c7ea5dbf8ed9a", "1407ee7df9d063e4d94c488c7beb46cb2da0677e" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 08 16:50:53 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jan 08 16:50:53 2016 +0000" }, "message": "Merge \"Add a missing implicit null check in the ARM codegen.\"" }, { "commit": "80e6709722d6c27aed399c50a11a98e0ab13a97e", "tree": "5aca52185bf8f8ae2f3eac040aac703a9aae771d", "parents": [ "74179b2082f8114db5154c75be643d9337cb3a63" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 08 16:04:55 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 08 16:04:55 2016 +0000" }, "message": "Small implicit null checks refactoring in the ARM codegen.\n\nChange-Id: I7dccb02cf7ac2f7d8fd1676b03e0b394701fbe3f\n" }, { "commit": "1407ee7df9d063e4d94c488c7beb46cb2da0677e", "tree": "9f1ebbd7ca7bb83ecae0c9b9aaf046d0243c1c58", "parents": [ "74179b2082f8114db5154c75be643d9337cb3a63" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 08 15:56:19 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 08 15:56:19 2016 +0000" }, "message": "Add a missing implicit null check in the ARM codegen.\n\nThe code generated for object ArraySet on ARM used to\nmiss an implicit null check for the array when the assigned\nvalue is `null`. This has not been an actual issue so far,\nas ArraySet instructions have never been using implicit null\nchecks.\n\nNote: This CL comes without a regression test, as the code\npath in question is not used (yet).\n\nChange-Id: If3bc85e32802595e635513dfb83ccfcfd8f00d3d\n" }, { "commit": "c928591f5b2c544751bb3fb26dc614d3c2e67bef", "tree": "b6c8a5e08c4d4c7a66a70f4d91e209ededf22334", "parents": [ "5ee288c9dd99614e3a238f5efceeec6456e3499d" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Dec 18 10:38:42 2015 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 08 12:55:31 2016 +0000" }, "message": "ARM Baker\u0027s read barrier fast path implementation.\n\nIntroduce an ARM fast path implementation in Optimizing for\nBaker\u0027s read barriers (for both heap reference loads and GC\nroot loads). The marking phase of the read barrier is\nperformed by a slow path, invoking the runtime entry point\nartReadBarrierMark.\n\nOther read barrier algorithms continue to use the original\nslow path based implementation, which has been renamed as\nGenerateReadBarrierSlow/GenerateReadBarrierForRootSlow.\n\nBug: 12687968\nChange-Id: Ie7ee85b1b4c0564148270cebdd3cbd4c3da51b3a\n" }, { "commit": "0cf4493166ff28518c8eafa2d0463f6e817cce75", "tree": "6d207db3fb655bbd692f2b01fa963c603619bd0e", "parents": [ "d674bf7ba2a209790cea8ef8d935480ef515c9e1" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Dec 09 14:09:59 2015 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Dec 23 13:19:16 2015 +0000" }, "message": "Generate more stack maps during native debugging.\n\nGenerate extra stack map at the start of each java statement.\nThe stack maps are later translated to DWARF which allows\nLLDB to set breakpoints and view local variables.\n\nChange-Id: If00ab875513308e4a1399d1e12e0fe8934a6f0c3\n" }, { "commit": "5f7b58ea1adfc0639dd605b65f59198d3763f801", "tree": "04556e673cdd3967cc967ff79931eab49e523956", "parents": [ "1201804d1813d7db0accead9721d67c40b3de564" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Nov 23 19:49:34 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Dec 23 09:59:07 2015 +0000" }, "message": "Rewrite HInstruction::Is/As\u003ctype\u003e().\n\nMake Is\u003ctype\u003e() and As\u003ctype\u003e() non-virtual for concrete\ninstruction types, relying on GetKind(), and mark GetKind()\nas PURE to improve optimization opportunities. This reduces\nthe number of relocations in libart-compiler.so\u0027s .rel.dyn\nsection by ~4K, or ~44%, and in .data.rel.ro by ~18K, or\n~65%. The file is 96KiB smaller for Nexus 5, including 8KiB\nreduction of the .text section.\n\nUnfortunately, the g++/clang++ __attribute__((pure)) is not\nstrong enough to avoid duplicated virtual calls and we would\nneed the C++ [[pure]] attribute proposed in n3744 instead.\nTo work around this deficiency, we introduce an extra\nnon-virtual indirection for GetKind(), so that the compiler\ncan optimize common expressions such as\n instruction-\u003eIsAdd() || instruction-\u003eIsSub()\nor\n instruction-\u003eIsAdd() \u0026\u0026 instruction-\u003eAsAdd()-\u003e...\nwhich contain two virtual calls to GetKind() after inlining.\n\nChange-Id: I83787de0671a5cb9f5b0a5f4a536cef239d5b401\n" }, { "commit": "ac6ac10a0801fa6eb95e0ab0c72b2ed562210b34", "tree": "3758a1903dbdd273c35d4bae4ee0e820857946c0", "parents": [ "1201804d1813d7db0accead9721d67c40b3de564" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 12:14:00 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Dec 22 11:51:33 2015 +0000" }, "message": "Optimizing/ARM: Fix CmpConstant().\n\nCMN updates flags based on addition of its operands.\nDo not confuse the \"N\" suffix with bitwise inversion\nperformed by MVN.\n\nAlso add more special cases analogous to AddConstant()\nand use CmpConstant() more in code generator.\n\nChange-Id: I0d4571770a3f0fdf162e97d4bde56814098e7246\n" }, { "commit": "14c4e90f67e71430dade7d4f20920e6352be386e", "tree": "2d376e0d6f833bb87348faae12ad7ed3bf15b95b", "parents": [ "6132a3884a912a704010f22ea2991f3d9d432af2", "f3e0ee27f46aa6434b900ab33f12cd3157578234" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 16:46:19 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Dec 17 16:46:19 2015 +0000" }, "message": "Merge \"Revert \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"\"" }, { "commit": "f3e0ee27f46aa6434b900ab33f12cd3157578234", "tree": "83d5a75bf26238ff1789569de62e4b72fb348119", "parents": [ "b4c137630fd2226ad07dfd178ab15725374220f1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 15:23:13 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 15:23:13 2015 +0000" }, "message": "Revert \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"\n\nThis reverts commit b4c137630fd2226ad07dfd178ab15725374220f1.\n\nThe underlying issue was fixed by https://android-review.googlesource.com/188271 .\n\nBug: 26121945\nChange-Id: I58b08eb1a9f0a5c861f8cda93522af64bcf63920\n" }, { "commit": "d7d35383838c369a4a1ff5aa21e952f941718c48", "tree": "7d36f56c834e2b561ebc0359b9d11ad03d150cb2", "parents": [ "6b75bc08e8e2e5516a23350418bacef2cf982bd9", "b4c137630fd2226ad07dfd178ab15725374220f1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 16 12:31:14 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Dec 16 12:31:14 2015 +0000" }, "message": "Merge \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"" }, { "commit": "b4c137630fd2226ad07dfd178ab15725374220f1", "tree": "6f319089980073ffb2c20d36e367a944daa525c4", "parents": [ "59f054d98f519a3efa992b1c688eb97bdd8bbf55" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 16 12:06:39 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 16 12:07:01 2015 +0000" }, "message": "Revert \"ART: Reduce the instructions generated by packed switch.\"\n\nThis reverts commit 59f054d98f519a3efa992b1c688eb97bdd8bbf55.\n\nbug:26121945\n\nChange-Id: I8a5ad7ef1f1de8d44787c27528fa3f7f5c2e9cd3\n" }, { "commit": "351dddf4025f07477161209e374741f089d97cb4", "tree": "d35406fe1e975369acf8f103d0ad5e0cf2313431", "parents": [ "58dcb021c3bd45718d0103844f4e6d55754e6501" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Dec 11 16:34:46 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Dec 11 16:54:42 2015 +0000" }, "message": "Optimizing: Clean up after HRor.\n\nChange-Id: I96bd7fa2e8bdccb87a3380d063dad0dd57fed9d7\n" }, { "commit": "58dcb021c3bd45718d0103844f4e6d55754e6501", "tree": "b5ca917081eff52a98331b1234335069ead8bede", "parents": [ "66278646b5b332142d1474703ac7d945dfbf7c78", "40a04bf64e5837fa48aceaffe970c9984c94084a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Dec 11 16:14:56 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Dec 11 16:14:56 2015 +0000" }, "message": "Merge \"Replace rotate patterns and invokes with HRor IR.\"" }, { "commit": "40a04bf64e5837fa48aceaffe970c9984c94084a", "tree": "27aeff3b9492b396050155734d81aba3c57ffbb7", "parents": [ "763fd2d3d131898cad6295a19ae9a30e22ce5f2a" ], "author": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Fri Dec 11 09:50:36 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Dec 11 16:13:44 2015 +0000" }, "message": "Replace rotate patterns and invokes with HRor IR.\n\nReplace constant and register version bitfield rotate patterns, and\nrotateRight/Left intrinsic invokes, with new HRor IR.\n\nWhere k is constant and r is a register, with the UShr and Shl on\neither side of a |, +, or ^, the following patterns are replaced:\n\n x \u003e\u003e\u003e #k OP x \u003c\u003c #(reg_size - k)\n x \u003e\u003e\u003e #k OP x \u003c\u003c #-k\n\n x \u003e\u003e\u003e r OP x \u003c\u003c (#reg_size - r)\n x \u003e\u003e\u003e (#reg_size - r) OP x \u003c\u003c r\n\n x \u003e\u003e\u003e r OP x \u003c\u003c -r\n x \u003e\u003e\u003e -r OP x \u003c\u003c r\n\nImplemented for ARM/ARM64 \u0026 X86/X86_64.\n\nTests changed to not be inlined to prevent optimization from folding\nthem out. Additional tests added for constant rotate amounts.\n\nChange-Id: I5847d104c0a0348e5792be6c5072ce5090ca2c34\n" }, { "commit": "917d01680714b2295f109f8fea0aa06764a30b70", "tree": "1da1b936fcc2318dced0d0aa9d2f987af1a05169", "parents": [ "d48015603a54b820d287d92709825765159615f0" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 24 18:25:35 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Dec 10 16:48:06 2015 +0000" }, "message": "Don\u0027t generate a slow path for strings in the dex cache.\n\nChange-Id: I1d258f1a89bf0ec7c7ddd134be9215d480f0b09a\n" }, { "commit": "59f054d98f519a3efa992b1c688eb97bdd8bbf55", "tree": "83d5a75bf26238ff1789569de62e4b72fb348119", "parents": [ "763fd2d3d131898cad6295a19ae9a30e22ce5f2a" ], "author": { "name": "Zheng Xu", "email": "zheng.xu@linaro.org", "time": "Mon Dec 07 17:17:03 2015 +0800" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Dec 08 13:14:10 2015 -0500" }, "message": "ART: Reduce the instructions generated by packed switch.\n\nImplement Vladimir Marko\u0027s suggestion. The new compare/jump series\nreduce the number of instructions from (2*n+1) to (1.5*n+3).\n\nGenerate normal compare/jump series when numEntries \u003c\u003d 3.\nGenerate optimal compare/jump series when numEntries \u003c\u003d threshold.\nGenerate jump tables otherwise.\n\nChange-Id: I425547b6787057c7fa84e71f17c145b63b208633\n" }, { "commit": "e523423a053af5cb55837f07ceae9ff2fd581712", "tree": "6c2d9c570bf0d9a0e2cd056e052c0be618b03fc5", "parents": [ "08a84acc7adb1bb076595eb961bd4667896e5075" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 02 09:06:11 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 02 13:01:25 2015 +0000" }, "message": "Revert \"Revert \"Don\u0027t use the compiler driver for method resolution.\"\"\n\nThis reverts commit c88ef3a10c474045a3476a02ae75d07ddd3230b7.\n\nChange-Id: I0ed88a48b313a8d28bc39fae40631123aadb13ef\n" }, { "commit": "1cfe7fd885fc21292dfe74b554c38b07304cb10e", "tree": "5a809d58debfe5265bb40c2ae71f67a0532dd974", "parents": [ "8b3609b4daacfd6d823fe9d9052955db2202aa0f", "c88ef3a10c474045a3476a02ae75d07ddd3230b7" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 16:28:28 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Dec 01 16:28:28 2015 +0000" }, "message": "Merge \"Revert \"Don\u0027t use the compiler driver for method resolution.\"\"" }, { "commit": "c88ef3a10c474045a3476a02ae75d07ddd3230b7", "tree": "cd23e1e0a3cea10cc9a9ae8269a01f75ada8ef0e", "parents": [ "4db0bf9c4db6a09716c3388b7d2f88d534470339" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 16:28:10 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 16:28:10 2015 +0000" }, "message": "Revert \"Don\u0027t use the compiler driver for method resolution.\"\n\nFails 425 in debuggable mode.\n\nThis reverts commit 4db0bf9c4db6a09716c3388b7d2f88d534470339.\n\nChange-Id: I346df8f75674564fc4fb241c60f23e250fc7f0a7\n" }, { "commit": "753e8c43e1e68cade83e42f8111745d5c6f14f90", "tree": "8ed2ef769ee068f0c7620fc03b8d0b39cedee84a", "parents": [ "b1aa617639c01c0dffaafd1641e0304ad179b6a2", "4db0bf9c4db6a09716c3388b7d2f88d534470339" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 14:24:03 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Dec 01 14:24:03 2015 +0000" }, "message": "Merge \"Don\u0027t use the compiler driver for method resolution.\"" }, { "commit": "4db0bf9c4db6a09716c3388b7d2f88d534470339", "tree": "71feab1b20d4d773f881e0afc26dfcd236c177d1", "parents": [ "d1744d449cf2b56af7e0896b3729fac2a414e3af" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Nov 23 09:35:04 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 14:23:01 2015 +0000" }, "message": "Don\u0027t use the compiler driver for method resolution.\n\nThe compiler driver makes assumptions that don\u0027t hold for\nthe optimizing compiler, and will for example always go to\nslow path for an invoke-super when there\u0027s no verified method.\n\nAlso fix GenerateInvokeVirtual in the presence of intrinsics.\n\nNext change will address some of the TODOs in sharpening.cc.\n\nChange-Id: I2b0e543ee9b9bebcadb2d26de29e850c59ad58b9\n" }, { "commit": "b4536b7de576b20c74c612406c5d3132998075ef", "tree": "5265c07b51b4d79b2fd64c63d9b78d38b7601a8f", "parents": [ "883ef45b5d5a2e4005914c7b339881900976b6e7" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Nov 24 13:45:23 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Dec 01 11:38:03 2015 +0000" }, "message": "Optimizing/ARM: Implement kDexCachePcRelative dispatch.\n\nChange-Id: I0fe2da50a30a3f62bec8ea01688dd1fec84b1831\n" }, { "commit": "42e372e5a34d0fef88007bc5f40dd0fc7c03b58b", "tree": "434618ad8deec85313335b6ca63c6519639b4959", "parents": [ "95f7bbcd991fbfaead438a2866354714eb32af38" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 24 15:48:56 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 24 17:57:26 2015 +0000" }, "message": "Optimize HLoadClass when we know the class is in the cache.\n\nChange-Id: Iaa74591eed0f2eabc9ba9f9988681d9582faa320\n" }, { "commit": "888d067a67640e7d9fc349b0451dfe845acad562", "tree": "6fdbf0027e06b2f140ec9396b8a6d650a15c4e84", "parents": [ "51a354c747c8a76a4716a49a1f70bfd975d63787" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Nov 23 18:53:50 2015 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Nov 24 11:40:13 2015 +0000" }, "message": "Revamp art::CheckEntrypointTypes uses.\n\nChange-Id: I6e13e594539e766ed94524ac3282cec292ba91da\n" }, { "commit": "4f6b0b551ee549af12fce75c8379f5137fe4cfad", "tree": "0d6fb6de8fb262d6a1d4b8f802b59da59362d441", "parents": [ "0c32fdeaeda2a1e388e280da12662d1d18c834a2" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Nov 23 19:29:22 2015 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Nov 23 19:29:22 2015 +0000" }, "message": "Clean up read barrier related comments in Optimizing.\n\nBug: 12687968\nChange-Id: Idf2e371e01e10d9d32c95b150735e2c96244232e\n" }, { "commit": "f180af0fc0d0bd981dd6356848df2ba237e1a227", "tree": "bea248023c5823bbb28a1864655e3afce9226400", "parents": [ "97cd5bb34ca97e7e87a030b2e1acec004fd26275", "f9d741e32c6f1629ce70eefc68d3363fa1cfd696" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Nov 23 11:20:35 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Nov 23 11:20:35 2015 +0000" }, "message": "Merge \"Optimizing/ARM: Improve long shifts by 1.\"" }, { "commit": "01b88a2c8903954ca72067bab93471b2c6aca135", "tree": "0dbbc998527471123a96abb3f6b568c9329b1da2", "parents": [ "be0c2d91027929682fa754ae21943f52b4e111b7", "729645a937eb9f04a311b3c22471dcf3ebe9bcec" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Nov 23 08:51:44 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Nov 23 08:51:44 2015 +0000" }, "message": "Merge \"Explicitly add HLoadClass/HClinitCheck for HNewInstance.\"" }, { "commit": "729645a937eb9f04a311b3c22471dcf3ebe9bcec", "tree": "100c5d843a4d436b166d52e7a463ef6b283abc8c", "parents": [ "d846a2cc45aae5b1c84b5ac51cdd37a22b8447ff" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 19 13:29:02 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Nov 20 22:19:02 2015 +0000" }, "message": "Explicitly add HLoadClass/HClinitCheck for HNewInstance.\n\nbug:25735083\nbug:25173758\n\nChange-Id: Ie81cfa4fa9c47cc025edb291cdedd7af209a03db\n" }, { "commit": "f9d741e32c6f1629ce70eefc68d3363fa1cfd696", "tree": "409005e5b1d01d2830c20421f8466125e110d6af", "parents": [ "beb709a2607a00b5df33f0235f22ccdd876cee22" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Nov 20 15:08:11 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Nov 20 16:18:39 2015 +0000" }, "message": "Optimizing/ARM: Improve long shifts by 1.\n\nImplement long\n Shl(x,1) as LSLS+ADC,\n Shr(x,1) as ASR+RRX and\n UShr(x,1) as LSR+RRX.\n\nRemove the simplification substituting Shl(x,1) with\nADD(x,x) as it interferes with some other optimizations\ninstead of helping them. And since it didn\u0027t help 64-bit\narchitectures anyway, codegen is the correct place for it.\nThis is now implemented for ARM and x86, so only mips32 can\nbe improved.\n\nChange-Id: Idd14f23292198b2260189e1497ca5411b21743b3\n" }, { "commit": "c53c0797a78a89d637e4230503cc1feb27e855a8", "tree": "194d9215590abf283d2b278adf39462d3b704c1b", "parents": [ "ee7d4a3d574d8789fb0d1860eba284ae5099f10d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 19 15:48:33 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 19 16:08:12 2015 +0000" }, "message": "Clean up the special input in HInvokeStaticOrDirect.\n\nChange-Id: I4042aefbdac1a8c236d00e2e7145349a64f6486b\n" }, { "commit": "3b359c71f2fb784589be113206932e76807787bb", "tree": "f50f1b98a2948668d2ffabc42ce0cd9a00cecd0c", "parents": [ "a04f57badca0a9211d45eb7bde44c1d1e8f159ff" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Nov 17 19:35:12 2015 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Nov 17 19:35:12 2015 +0000" }, "message": "ARM read barrier support for concurrent GC in Optimizing.\n\nThis first implementation uses slow paths to instrument heap\nreference loads and GC root loads for the concurrent copying\ncollector, respectively calling the artReadBarrierSlow and\nartReadBarrierForRootSlow runtime entry points.\n\nNotes:\n- This implementation does not instrument HInvokeVirtual\n nor HInvokeInterface instructions (for class reference\n loads), as the corresponding read barriers are not stricly\n required with the current concurrent copying collector.\n- Intrinsics which may eventually call (on slow path) are\n disabled when read barriers are enabled, as the current\n slow path infrastructure does not support this case.\n- When read barriers are enabled, the code generated for a\n HArraySet instruction always go into the array set slow\n path for object arrays (delegating the operation to the\n runtime), as we are lacking a mechanism to keep a\n temporary register live accross a runtime call (needed for\n the instrumentation of type checking code, which requires\n two successive read barriers).\n\nBug: 12687968\nChange-Id: I92e8db414d029f952c07f3d3a98069e46dfdbc2a\n" }, { "commit": "0debae7bc89eb05f7a2bf7dccd223318fad7c88d", "tree": "3da9656dc77d271b12c1b02793e7d713ae3da790", "parents": [ "991842a5273d20695dd5f35eb9a9e28c386c5b4b" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Nov 12 18:37:00 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Nov 17 15:12:00 2015 +0000" }, "message": "ART: Refactor GenerateTestAndBranch\n\nEach code generator implements a method for generating condition\nevaluation and branching to arbitrary labels. This patch refactors\nit for better clarity but also to generate fewer jumps when the true\nbranch is the fallthrough successor.\n\nThis is preliminary work for implementing HSelect.\n\nChange-Id: Iaa545a5ecbacb761c5aa241fa69140cf6eb5952f\n" }, { "commit": "13c86fdd2238ef158594182b31040533e1c92965", "tree": "e25633ef5157e63090aeff10654ada3bc624ec2e", "parents": [ "c85f88b4c145015401d6849c83d9061bd998861f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Nov 11 12:37:46 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Nov 11 16:33:27 2015 +0000" }, "message": "Optimizing: Clean up constant location handling.\n\nLocations builder should use ConstantLocation() when the\ncode generator relies on a location to be constant. Code\ngenerator should interrogate locations, not inputs, about\nbeing const.\n\nChange-Id: Ic35bb84aa9f83e0977b151a0430aca6c88f19cf0\n" }, { "commit": "33ad10e72438f01d11ec57695fe68194007535d2", "tree": "af224add2c700737b11fd92982babee006f2c7d7", "parents": [ "5c7c8248e48857f3a7c98a02d93c6971834d7241" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Nov 10 19:31:26 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Nov 11 11:14:23 2015 +0000" }, "message": "Optimizing/ARM: Improve shifts of long values by a constant.\n\nChange-Id: Id66ef8cdb9e64306f2be547370b90cc100a3e086\n" }, { "commit": "b8b97695d178337736b61609220613b92f344d45", "tree": "8b412373d1f21cac78168e284e36977a7fab0875", "parents": [ "b24301b06b31b463f7e92ebc9a8f75839e54b746" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri May 22 16:58:19 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Thu Nov 05 10:44:24 2015 -0500" }, "message": "Fix conditional jump over jmp (X86/X86-64/ARM32)\n\nOptimize the code generation for \u0027if\u0027 statements to jump to the\n\u0027false\u0027 block if the next block to be generated is the \u0027true\u0027 block.\n\nAdd an X86-64 test for this case.\n\nNote that ARM64 \u0026 MIPS64 have not been updated.\n\nChange-Id: Iebb1352feb9d3bd0142d8b0621a2e3069a708ea7\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "7cffc3b0004d32faffc552c0a59286f369b21504", "tree": "e3838b8ba2a782ed91ef8faa381362b7a686a32a", "parents": [ "9e1b56f0e77aa5b6c72374b86d0cef58484ddcaa" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Oct 19 21:31:53 2015 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Oct 30 11:15:26 2015 -0700" }, "message": "ART: Arm32 packed-switch jump tables\n\nAdd jump table support to the thumb2 assembler. Jump tables are\na collection of labels for the case targets, and an anchor label\ndenoting the position of the jump.\n\nUse the jump table support to implement packed-switch support for\narm32.\n\nAdd tests for BindTrackedLabel and JumpTable to the thumb2 assembler\ntest.\n\nBug: 24092914\nChange-Id: I5c84f193dfebf9e07f48678efc8bd151bb1410dd\n" }, { "commit": "dc151b2346bb8a4fdeed0c06e54c2fca21d59b5d", "tree": "391d8ccb44ff9e6fc1c8fa8975e534e20cc002ff", "parents": [ "823e693aa946ba75cd047429e1290011a2ed8729" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 15 18:02:30 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Oct 23 14:45:32 2015 +0100" }, "message": "Optimizing: Determine invoke-static/-direct dispatch early.\n\nDetermine the dispatch type of invoke-static/-direct in a\nspecial pass right after the type inference. This allows the\ninliner to pass the \"needs dex cache\" check and inline more.\nIt also allows the code generator to avoid requesting a\nregister location for the ArtMethod* for kDexCachePcRelative\nand direct methods.\n\nThe supported dispatch check handles also situations that\nthe CompilerDriver currently doesn\u0027t allow. The cleanup of\nthe CompilerDriver and required changes to Quick will come\nin a separate change.\n\nChange-Id: I3f8e903a119949e95871d8ab0a995f4731a13a07\n" }, { "commit": "f69f56e7d4a1e31dfce2a77558c9b7047f82092b", "tree": "30c394773a7544bf5296138f8e923b5d73dc5cb8", "parents": [ "a31e53f83cf7c773bd506bb4b7d28f73e92a391a", "bb245d199a5240b4c520263fd2c8c10dba79eadc" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Oct 19 18:42:59 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 19 18:42:59 2015 +0000" }, "message": "Merge \"Generalize codegen and simplification of deopt.\"" }, { "commit": "bb245d199a5240b4c520263fd2c8c10dba79eadc", "tree": "e16b37485e3e0e34c24e35a71cc8e6986d1e2e70", "parents": [ "d5a69fc429f57bf528aa061618d3ae94ee8deb24" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Oct 19 11:05:03 2015 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Oct 19 11:12:11 2015 -0700" }, "message": "Generalize codegen and simplification of deopt.\n\nRationale: the de-opt instruction is very similar to an if,\n so the existing assumption that it always has a\n conditional \"under the hood\" is very unsafe, since\n optimizations may have replaced conditionals with\n actual values; this CL generalizes handling of deopt.\n\nChange-Id: I1c6cb71fdad2af869fa4714b38417dceed676459\n" }, { "commit": "4b8f1ecd3aa5a29ec1463ff88fee9db365f257dc", "tree": "d113f8a5c6b61c078256cf15c7cbb9f7c8de0390", "parents": [ "114873103db3d4d6e0da42ca02bad1ea8826443b" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Aug 26 18:34:03 2015 +0100" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Oct 15 12:22:39 2015 -0700" }, "message": "Use ATTRIBUTE_UNUSED more.\n\nUse it in lieu of UNUSED(), which had some incorrect uses.\n\nChange-Id: If247dce58b72056f6eea84968e7196f0b5bef4da\n" }, { "commit": "d5a69fc429f57bf528aa061618d3ae94ee8deb24", "tree": "1a00f22b320afe53c7c02320e78f1a0e538ee5d0", "parents": [ "bdbce4e321b16a14425659fabaa5648f52853d51", "e9f37600e98ba21308ad4f70d9d68cf6c057bdbe" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Oct 15 16:18:05 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 15 16:18:05 2015 +0000" }, "message": "Merge \"Added support for unsigned comparisons\"" }, { "commit": "e9f37600e98ba21308ad4f70d9d68cf6c057bdbe", "tree": "ad7953f41a35eeee68a31b4b567a08c650647bba", "parents": [ "793e6fbdefb092d1dab50bca5618aed110c7e037" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Oct 09 11:15:55 2015 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Oct 14 13:38:22 2015 -0700" }, "message": "Added support for unsigned comparisons\n\nRationale: even though not directly supported in input graph,\n having the ability to express unsigned comparisons\n in HIR is useful for all sorts of optimizations.\n\nChange-Id: I4543c96a8c1895c3d33aaf85685afbf80fe27d72\n" }, { "commit": "644044333f5f6d7ba7e327619ac0d0ce4e2609d3", "tree": "9adfec0dc75c7a6acce2ea53cf1348d264c40759", "parents": [ "045a95cf3cb91fd72b5982c67757175f1091cc7d", "d2b4ca2d02c86b1ce1826fd2b35ce6c9c58c1ff1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Oct 14 11:34:02 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Oct 14 11:34:02 2015 +0000" }, "message": "Merge \"Improve Thumb2 bitwise operations.\"" }, { "commit": "d2b4ca2d02c86b1ce1826fd2b35ce6c9c58c1ff1", "tree": "dab4cdfacd3e7cb529f3b0de931c8a173039571f", "parents": [ "fb11bab9bc96ff05dcb12f43abf58df256b7c7aa" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 14 15:13:26 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Oct 14 12:20:59 2015 +0100" }, "message": "Improve Thumb2 bitwise operations.\n\nAllow embedding constants in AND, ORR, EOR. Add ORN to\nassembler, use BIC and ORN for AND and ORR when needed.\n\nChange-Id: I24d69ecc7ce6992b9c5eb7a313ff47a942de9661\n" }, { "commit": "5bd05a5c9492189ec28edaf6396d6a39ddf03367", "tree": "186488cafe4d815ab834097e91c75f2c20009e2b", "parents": [ "439ffb8d4fa25b4ac7518a3bd5cbc3f3769ead48" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 13 09:48:30 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 13 17:29:19 2015 +0100" }, "message": "Implement System.arraycopy intrinsic for arm.\n\nChange-Id: I58ae1af5103e281fe59fbe022b718d6d8f293a5e\n" }, { "commit": "ec7802a102d49ab5c17495118d4fe0bcc7287beb", "tree": "08649609604b9c96bc48ca071c48b0af5abb1a3f", "parents": [ "b2e436ffcda1d7a87e7bf9133d8ed878388c73c2" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 01 20:57:57 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 08 11:10:18 2015 +0100" }, "message": "Add DCHECKs to ArenaVector and ScopedArenaVector.\n\nImplement dchecked_vector\u003c\u003e template that DCHECK()s element\naccess and insert()/emplace()/erase() positions. Change the\nArenaVector\u003c\u003e and ScopedArenaVector\u003c\u003e aliases to use the new\ntemplate instead of std::vector\u003c\u003e. Remove DCHECK()s that\nhave now become unnecessary from the Optimizing compiler.\n\nChange-Id: Ib8506bd30d223f68f52bd4476c76d9991acacadc\n" }, { "commit": "580b609cd6cfef46108156457df42254d11e72a7", "tree": "64104e19b57cbb9df97c9349585cc4d1e9fdb3de", "parents": [ "b5c469357f8faf8fbaa05bc41d56903b300d0cd1" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 06 17:35:58 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 06 17:35:58 2015 +0100" }, "message": "Fix location summary for LoadClass\n\nDon\u0027t request a register for the current method if we\u0027re gonna call the\nruntime.\n\nChange-Id: I9760d15108bd95efb2a34e6eacd84b60841781d7\n" }, { "commit": "98893e146b0ff0e1fd1d7c29252f1d1e75a163f2", "tree": "a14bb10d039fcee10a7e0cacb494bb60d08b2039", "parents": [ "7b5c395e9a50f988ca2275a429df17b6abbcc475" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Oct 02 21:05:03 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 06 13:42:55 2015 +0100" }, "message": "Add support for unresolved classes in optimizing.\n\nChange-Id: I0e299a81e560eb9cb0737ec46125dffc99333b54\n" }, { "commit": "ecf680d5e1fe6fcdd57962334a7c7865720503cc", "tree": "a7b5fbcf2f37f1af47395e28debb67ce41de8f71", "parents": [ "c8fb997c694e3587f4b618b2a1727206b8d4a327" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 05 11:15:37 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 05 13:26:51 2015 +0100" }, "message": "Block callee save fp registers in debuggable.\n\nThis is a simple but conservative implementation. We could\nextend it by using the registers but still saving them before\na call and at method entry.\n\nbug: 21057237\n\nChange-Id: Ia2e9e0e2efae0b01625e0f4165d0535c4bf9ba62\n" }, { "commit": "c8fb997c694e3587f4b618b2a1727206b8d4a327", "tree": "527d6f1fbebf8c71444070229b86da1fb5b4977e", "parents": [ "8a50a4aa4636bdc3e0443ea94f5042db18c03ed2", "75d5b9bbd48edbe221d00dc85d25093977c6fa41" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 05 07:41:02 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 05 07:41:02 2015 +0000" }, "message": "Merge \"Revert \"Don\u0027t use floating point callee saves in debuggable.\"\"" }, { "commit": "75d5b9bbd48edbe221d00dc85d25093977c6fa41", "tree": "56f2beff6636ccdb60408eaa2e17910ab8d96814", "parents": [ "88a95ba893fcda974d492917dd77a9b11693dbf2" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 05 07:40:35 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 05 07:40:35 2015 +0000" }, "message": "Revert \"Don\u0027t use floating point callee saves in debuggable.\"\n\nbug:24602865\nbug:24605078\n\nThis reverts commit 88a95ba893fcda974d492917dd77a9b11693dbf2.\n\nChange-Id: Iba97eeab5c2ba725f66cc138f740dac337344828\n" }, { "commit": "e460d1df1f789c7c8bb97024a8efbd713ac175e9", "tree": "3511036fb18828dd0ee140d33a8bcd0535ebeab6", "parents": [ "25217af2a7cae96b32ba566aaf697288f3374c99" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Sep 29 04:52:17 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Oct 02 02:25:18 2015 +0100" }, "message": "Revert \"Revert \"Support unresolved fields in optimizing\"\n\nThe CL also changes the calling convetion for 64bit static field set\nto use kArg2 instead of kArg1. This allows optimizing to keep\nthe asumptions:\n- arm pairs are always of form (even_reg, odd_reg)\n- ecx_edx is not used as a register on x86.\n\nThis reverts commit e6f49b47b6a4dc9c7684e4483757872cfc7ff1a1.\n\nChange-Id: I93159917565824084abc96775f31be1a4249f2f3\n" }, { "commit": "dc2ce636d6a98118a5998b93da161ef7840ec645", "tree": "02277004b63a2ffa18e2c7022aac93e72bbf9f40", "parents": [ "d1169045e978c8c9dde98315612c488c6bb153f4", "e0395dd58454e27fc47c0ca273913929fb658e6c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 01 07:34:40 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 01 07:34:40 2015 +0000" }, "message": "Merge \"Optimize ArraySet for x86/x64/arm/arm64.\"" }, { "commit": "0dbcaee559dc6005dec335119982b73692300e45", "tree": "8537357c1718c8b93ec42c3fd8192e2a3347849d", "parents": [ "a841bc3fb000a9cdbbb7b3cedf2cb7a11e2c82ce", "88a95ba893fcda974d492917dd77a9b11693dbf2" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 30 17:48:51 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Sep 30 17:48:51 2015 +0000" }, "message": "Merge \"Don\u0027t use floating point callee saves in debuggable.\"" }, { "commit": "88a95ba893fcda974d492917dd77a9b11693dbf2", "tree": "9914d3dee4b74e9f3afe39e1d0c714299ce8bf17", "parents": [ "6387821209a03c5d873cf9dc6fd11434918bbdf4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 30 17:18:14 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 30 18:44:46 2015 +0100" }, "message": "Don\u0027t use floating point callee saves in debuggable.\n\nThe runtime stubs don\u0027t save them, so GetVReg and SetVReg\nwon\u0027t work on them.\n\nNot having callee saves will increase code size and reduce\nperformance of fp-heavy methods. But we need to do it for\npropper debugging.\n\nChange-Id: I40354c29718af49b6b3adf61d724d3bb93680107\n" }, { "commit": "e0395dd58454e27fc47c0ca273913929fb658e6c", "tree": "a43acfddd08fe55858b752860b05a3e0a035777f", "parents": [ "6387821209a03c5d873cf9dc6fd11434918bbdf4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Sep 25 11:04:45 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 30 18:32:01 2015 +0100" }, "message": "Optimize ArraySet for x86/x64/arm/arm64.\n\nChange-Id: I5bc8c6adf7f82f3b211f0c21067f5bb54dd0c040\n" }, { "commit": "5233f93ee336b3581ccdb993ff6342c52fec34b0", "tree": "225dc0ab491263ef56362a8d0fe2926266bd5047", "parents": [ "de8a3f4dce1e9ff0e3be16956b06bafc8cd4f397" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 29 19:01:15 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 29 19:46:03 2015 +0100" }, "message": "Optimizing: Tag even more arena allocations.\n\nTag previously \"Misc\" arena allocations with more specific\nallocation types. Move some native heap allocations to the\narena in BCE.\n\nBug: 23736311\nChange-Id: If8ef15a8b614dc3314bdfb35caa23862c9d4d25c\n" }, { "commit": "225b6464a58ebe11c156144653f11a1c6607f4eb", "tree": "3f1c6067c3841c892edaa1a60a61af9c559cb4e4", "parents": [ "6a9984e62c08bcd78c8e49dd40b1f0f9d53513b7" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 28 12:17:40 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 29 10:49:35 2015 +0100" }, "message": "Optimizing: Tag arena allocations in code generators.\n\nAnd completely remove the deprecated GrowableArray.\n\nReplace GrowableArray with ArenaVector in code generators\nand related classes and tag arena allocations.\n\nLabel arrays use direct allocations from ArenaAllocator\nbecause Label is non-copyable and non-movable and as such\ncannot be really held in a container. The GrowableArray\nnever actually constructed them, instead relying on the\nzero-initialized storage from the arena allocator to be\ncorrect. We now actually construct the labels.\n\nAlso avoid StackMapStream::ComputeDexRegisterMapSize() being\npassed null references, even though unused.\n\nChange-Id: I26a46fdd406b23a3969300a67739d55528df8bf4\n" }, { "commit": "33c0ed6cc26d07d4512a87a5d39d3412ee077020", "tree": "a1ac0376f982c7e3898ae13a2053a39a7aa155ce", "parents": [ "4ef16199765253bfe0ae1f02daf3b4f392d9ff67", "fe57faa2e0349418dda38e77ef1c0ac29db75f4d" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Sep 22 23:05:00 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Sep 22 23:05:00 2015 +0000" }, "message": "Merge \"[optimizing] Add basic PackedSwitch support\"" }, { "commit": "abfcf18fa2fe723bd683edcb685ed5058d9c7cf3", "tree": "98f8c9be7b4cb6bdcfd7ce7fc817f6a0750f30d5", "parents": [ "47d89c7376090a3a4b8eb114e2c861afe27d01d0" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 21 18:41:21 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Sep 22 10:38:46 2015 +0100" }, "message": "Further refinements to checkcast/instanceof.\n\n- Use setcc when possible.\n- Do an exact check in the Object[] case before checking the\n component type.\n\nChange-Id: Ic11c60643af9b41fe4ef2beb59dfe7769bef388f\n" }, { "commit": "fe57faa2e0349418dda38e77ef1c0ac29db75f4d", "tree": "38ba7a406f8a86a1152bd6c9f2d0a6c677423211", "parents": [ "9e30c0e177adabaaf94a66c91130a19a7632fc7c" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri Sep 18 09:26:15 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Mon Sep 21 07:23:45 2015 -0400" }, "message": "[optimizing] Add basic PackedSwitch support\n\nAdd HPackedSwitch, and generate it from the builder. Code generators\nconvert this to a series of compare/branch tests. Better implementation\nin the code generators as a real jump table will follow as separate CLs.\n\nChange-Id: If14736fa4d62809b6ae95280148c55682e856911\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "85c7bab43d11180d552179c506c2ffdf34dd749c", "tree": "337976b69d3b2a35cc9f12284cda03c8eb2a58c7", "parents": [ "819a9c5638b6d6b579c89fe36df96acc1f378182" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Sep 18 13:40:46 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Sep 18 15:19:04 2015 +0100" }, "message": "Revert \"Revert \"Optimize code generation of check-cast and instance-of.\"\"\n\nThis reverts commit 7537437c6a2f89249a48e30effcc27d4e7c5a04f.\n\nChange-Id: If759cb08646e47b62829bebc3c5b1e2f2969cf84\n" }, { "commit": "85b62f23fc6dfffe2ddd3ddfa74611666c9ff41d", "tree": "c916b01b1608558a7d8c9d100274c4c6b6706386", "parents": [ "6766eae2d91e894b4ceab9f29cc983900e7bc0c7" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Sep 09 13:15:38 2015 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Sep 17 14:41:52 2015 -0700" }, "message": "ART: Refactor intrinsics slow-paths\n\nRefactor slow paths so that there is a default implementation for\ncommon cases (only arm64 with vixl is special). Write a generic\nintrinsic slow-path that can be reused for the specific architectures.\nMove helper functions into CodeGenerator so that they are accessible.\n\nChange-Id: Ibd788dce432601c6a9f7e6f13eab31f28dcb8550\n" }, { "commit": "6766eae2d91e894b4ceab9f29cc983900e7bc0c7", "tree": "4a3aac762e01c7933bcbffebb5277bde208e975b", "parents": [ "930761fb7a4db70fbd5e75faa1fca07e5b494ae9", "7537437c6a2f89249a48e30effcc27d4e7c5a04f" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 17 17:12:37 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Sep 17 17:12:37 2015 +0000" }, "message": "Merge \"Revert \"Optimize code generation of check-cast and instance-of.\"\"" }, { "commit": "7537437c6a2f89249a48e30effcc27d4e7c5a04f", "tree": "3f5f1d89f27d549cf40901f906ffab86bb05b520", "parents": [ "64acf303eaa2f32c0b1d8cfcbf044a822c5eec08" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 17 17:12:19 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 17 17:12:19 2015 +0000" }, "message": "Revert \"Optimize code generation of check-cast and instance-of.\"\n\nFailures with libcore tests.\n\nThis reverts commit 64acf303eaa2f32c0b1d8cfcbf044a822c5eec08.\n\nChange-Id: Ie6f323fcf5d86bae5c334c1352bb21f1bad60a88\n" }, { "commit": "a201d5eeb0903408df925a1ed1686a55238a274c", "tree": "d59b87e3c0bddb1d244199e9fbcc9301cb7dc52f", "parents": [ "271d30dd847fb72d78d3178b8b3b225192c2d1c0", "64acf303eaa2f32c0b1d8cfcbf044a822c5eec08" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 17 14:18:03 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Sep 17 14:18:03 2015 +0000" }, "message": "Merge \"Optimize code generation of check-cast and instance-of.\"" }, { "commit": "e6f49b47b6a4dc9c7684e4483757872cfc7ff1a1", "tree": "6a5f45136832f73138ced75fcd3c6110b74116ea", "parents": [ "23a8e35481face09183a24b9d11e505597c75ebb" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Sep 17 14:04:33 2015 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Sep 17 14:04:33 2015 +0000" }, "message": "Revert \"Support unresolved fields in optimizing\"\nbreaks debuggable tests.\n\nThis reverts commit 23a8e35481face09183a24b9d11e505597c75ebb.\n\nChange-Id: I8e60b5c8f48525975f25d19e5e8066c1c94bd2e5\n" }, { "commit": "64acf303eaa2f32c0b1d8cfcbf044a822c5eec08", "tree": "1e9829deb0621b3cb9b275846c8d08381956fecf", "parents": [ "017719a03c7c111a2069b5f85e3b9c81566c0902" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 14 22:20:29 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 17 14:45:39 2015 +0100" }, "message": "Optimize code generation of check-cast and instance-of.\n\nOn x86/x64/arm/arm64. Improve code size of selected apks from 0.3% to 1%,\nand performance of DeltaBlue by 20%.\n\nChange-Id: Ib5799f7a53443cd880a121dd7f21932ae9f5c7aa\n" }, { "commit": "23a8e35481face09183a24b9d11e505597c75ebb", "tree": "bcaafb6ea001349acbf160c2cc89334fab4a38dc", "parents": [ "175dc732c80e6f2afd83209348124df349290ba8" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Sep 08 19:56:31 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Sep 17 12:29:59 2015 +0100" }, "message": "Support unresolved fields in optimizing\n\nChange-Id: I9941fa5fcb6ef0a7a253c7a0b479a44a0210aad4\n" }, { "commit": "175dc732c80e6f2afd83209348124df349290ba8", "tree": "6a5f45136832f73138ced75fcd3c6110b74116ea", "parents": [ "5d01db1aa7634a012109d43e6403451b76de1daa" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Aug 25 15:42:32 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Sep 17 12:29:51 2015 +0100" }, "message": "Support unresolved methods in Optimizing\n\nChange-Id: If2da02b50d2fa668cd58f134a005f1752e7746b1\n" }, { "commit": "fe157012b6d760c275d944ff83e8bea371c59b09", "tree": "a2b013dded6e25cab1d3ff5abf09c426904e142c", "parents": [ "aef880c4b872ccf1a63a3c563cb056ae117fc9c8", "ecc4366670e12b4812ef1653f7c8d52234ca1b1f" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Sep 16 14:33:16 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Sep 16 14:33:16 2015 +0000" }, "message": "Merge \"Add OptimizingCompilerStats to the CodeGenerator class.\"" }, { "commit": "fa6b93c4b69e6d7ddfa2a4ed0aff01b0608c5a3a", "tree": "3528c88e104dac8e58ae5370ab066b8b1dd0218f", "parents": [ "e295be4a95d7861f6ec179edf6565f58cad747cc" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 15 10:15:55 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Sep 16 13:21:33 2015 +0100" }, "message": "Optimizing: Tag arena allocations in HGraph.\n\nReplace GrowableArray with ArenaVector in HGraph and related\nclasses HEnvironment, HLoopInformation, HInvoke and HPhi,\nand tag allocations with new arena allocation types.\n\nChange-Id: I3d79897af405b9a1a5b98bfc372e70fe0b3bc40d\n" }, { "commit": "77a48ae01bbc5b05ca009cf09e2fcb53e4c8ff23", "tree": "780c7d6bdee784c2f8248979de348491cfb63b34", "parents": [ "659562aaf133c41b8d90ec9216c07646f0f14362" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Sep 15 12:34:04 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Sep 15 12:34:04 2015 +0000" }, "message": "Revert \"Revert \"ART: Register allocation and runtime support for try/catch\"\"\n\nThe original CL triggered b/24084144 which has been fixed\nby Ib72e12a018437c404e82f7ad414554c66a4c6f8c.\n\nThis reverts commit 659562aaf133c41b8d90ec9216c07646f0f14362.\n\nChange-Id: Id8980436172457d0fcb276349c4405f7c4110a55\n" }, { "commit": "659562aaf133c41b8d90ec9216c07646f0f14362", "tree": "be1beae390262bf2f5a17bfa44de93081a849d07", "parents": [ "b022fa1300e6d78639b3b910af0cf85c43df44bb" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 14 21:26:33 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 14 21:26:33 2015 +0000" }, "message": "Revert \"ART: Register allocation and runtime support for try/catch\"\n\nBreaks libcore test org.apache.harmony.security.tests.java.security.KeyStorePrivateKeyEntryTest#testGetCertificateChain. Need to investigate.\n\nThis reverts commit b022fa1300e6d78639b3b910af0cf85c43df44bb.\n\nChange-Id: Ib24d3a80064d963d273e557a93469c95f37b1f6f\n" }, { "commit": "b022fa1300e6d78639b3b910af0cf85c43df44bb", "tree": "780c7d6bdee784c2f8248979de348491cfb63b34", "parents": [ "e481c006e8b055a31d9c7cff27f4145e57e3c113" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Aug 20 17:47:48 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 14 20:42:58 2015 +0100" }, "message": "ART: Register allocation and runtime support for try/catch\n\nThis patch completes a series of CLs that add support for try/catch\nin the Optimizing compiler. With it, Optimizing can compile all\nmethods containing try/catch, provided they don\u0027t contain catch loops.\nFuture work will focus on improving performance of the generated code.\n\nSsaLivenessAnalysis was updated to propagate liveness information of\ninstructions live at catch blocks, and to keep location information on\ninstructions which may be caught by catch phis.\n\nRegisterAllocator was extended to spill values used after catch, and\nto allocate spill slots for catch phis. Catch phis generated for the\nsame vreg share a spill slot as the raw value must be the same.\n\nLocation builders and slow paths were updated to reflect the fact that\nthrowing an exception may not lead to escaping the method.\n\nInstruction code generators are forbidden from using of implicit null\nchecks in try blocks as live registers need to be saved before handing\nover to the runtime.\n\nCodeGenerator emits a stack map for each catch block, storing locations\nof catch phis. CodeInfo and StackMapStream recognize this new type of\nstack map and store them separate from other stack maps to avoid dex_pc\nconflicts.\n\nAfter having found the target catch block to deliver an exception to,\nQuickExceptionHandler looks up the dex register maps at the throwing\ninstruction and the catch block and copies the values over to their\nrespective locations.\n\nThe runtime-support approach was selected because it allows for the\nbest performance in the normal control-flow path, since no propagation\nof catch phi values is necessary until the exception is thrown. In\naddition, it also greatly simplifies the register allocation phase.\n\nConstantHoisting was removed from LICMTest because it instantiated\n(now abstract) HConstant and was bogus anyway (constants are always in\nthe entry block).\n\nChange-Id: Ie31038ad8e3ee0c13a5bbbbaf5f0b3e532310e4e\n" }, { "commit": "501fd635a557645ab05f893c56e1f358e21bab82", "tree": "828ad27a68033d78fb858dcf031c36a627659165", "parents": [ "010c7fd437932e0132fc4b44de6274480573ff30" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Sep 10 16:11:06 2015 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Sep 10 17:01:22 2015 -0700" }, "message": "ART: Fix Quick-style LR vs PC core spill mask bug\n\nIt\u0027s always been a bug that Quick marked PC as spilled instead of\nLR. The root cause was a mutation of the spill mask at frame exit,\nwhen LR is being restored into PC to return. A local should have\nbeen used to keep the actual spill mask safe and sound.\n\nThis has only worked because nobody ever uses LR, even after long\njumps for exception dispatch. However, single-frame deoptimization\nneeds this to work, and I\u0027d rather fix this than being forced to\nhave machine-specific fixups.\n\nAlso fix in optimizing, and bump the oat version.\n\nChange-Id: Ib032a533408bf464097fc96dcbfc5b6a68bf59a1\n" } ], "next": "bfb5ba90cd6425ce49c2125a87e3b12222cc2601" }