)]}' { "log": [ { "commit": "32ca375a5f9dcd010bafa84f829339b6b612b844", "tree": "cfb67bf6410a1223d6f4fe07fc7368559140eab8", "parents": [ "d99073f2a57929b5baeb4ed2b80556f0a2aa1284" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Feb 17 16:49:37 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Feb 17 16:53:00 2016 +0000" }, "message": "Fix uses of art::HCompare::IsGtBias on MIPS32 and MIPS64.\n\nDo not call this method on non floating-point HCompare\ninstructions.\n\nChange-Id: I262ab23f48d32295641063f897dca02cb92eb2e2\n" }, { "commit": "b52bbde2870e5ab5d126612961dcb3da8e5236ee", "tree": "3a58d251d8667e7c8447199a799fecba9bd5f918", "parents": [ "1b0755299928221a1dcc5db383bf8fc378d29b60" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Feb 12 12:06:05 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Feb 15 15:06:44 2016 +0000" }, "message": "Optimizing: Simplify consecutive type conversions.\n\nMerge two consecutive type conversions to one if the result\nof such merged conversion is guaranteed to be the same and\nremove all implicit conversions, not just conversions to the\nsame type. Improve codegens to handle conversions from long\nto integral types smaller than int.\n\nThis will make it easier to simplify `(byte) (x \u0026 0xffL)` to\n`(byte) x` where the conversion from long to byte is done by\ntwo dex instructions, long-to-int and in int-to-byte.\n\nBug: 23965701\nChange-Id: I833f193556671136ad2cd3f5b31cdfbc2d99c19d\n" }, { "commit": "6e332529c33be4d7dae5dad3609a839f4c0d3bfc", "tree": "cedd2e1beb170fd5821136fe974e3f34adfcddc2", "parents": [ "d3caabd4f85f86dd744da432993e12935d843a83" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Feb 02 16:15:27 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Feb 12 15:17:50 2016 +0000" }, "message": "ART: Remove HTemporary\n\nChange-Id: I21b984224370a9ce7a4a13a9652503cfb03c5f03\n" }, { "commit": "a19616e3363276e7f2c471eb2839fb16f1d43f27", "tree": "ad3e7fd0f53229e95fb0443586fc30eedabe6967", "parents": [ "9fba3f67a0792ad5eeb495e489d11a87211c318f" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Feb 01 18:57:58 2016 -0800" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Feb 05 09:26:21 2016 -0800" }, "message": "Implemented compare/signum intrinsics as HCompare\n(with all code generation for all)\n\nRationale:\nAt HIR level, many more optimizations are possible, while ultimately\ngenerated code can take advantage of full semantics.\n\nChange-Id: I6e2ee0311784e5e336847346f7f3c4faef4fd17e\n" }, { "commit": "ba70200c03f0481543877b218a8626c107edfbf6", "tree": "e684332612c43e63b2af2799f2a28b0e9d2c95d5", "parents": [ "85fdcda926fbab0e5a7b3e8b3541f5d225b2bcdb" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Feb 01 18:15:29 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Feb 02 17:18:59 2016 +0000" }, "message": "Add MIPS floating point register mapping to DWARF.\n\nChange-Id: I88508461412bc166549843744a3c6a4ee925b2c7\n" }, { "commit": "d967266cdfc8011c81ba6e9857a247c4a73bd0fc", "tree": "7bf469b0656c4819921799d814b2ca7a4f1705be", "parents": [ "ba5ea7003f071f85936ee351aff46f64a56ee096" ], "author": { "name": "Lazar Trsic", "email": "Lazar.Trsic@imgtec.com", "time": "Thu Sep 03 17:33:01 2015 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Fri Jan 29 17:38:06 2016 +0100" }, "message": "MIPS64: Remove unaligned memory access from art generated code\n\nUnaligned memory access was caused by sd, ld, ldc1 and sdc1\ninstructions. Check if offset is unaligned and replace it\nwith two 32 bit memory accesses, if so.\n\nAdded assembler tests for new instructions, as well as assembler\ntests for LoadFromOffset, LoadFpuFromOffset, StoreToOffset and\nStoreFpuToOffset.\n\nChange-Id: I0228a4a2ce6c801eeb5b46952b8330e14468deb3\n" }, { "commit": "9ff1de06d6ed1da36f7e976224a2d13e5e9882bf", "tree": "9121c384f3e0375fccfa4ca9f71c7d86baf38904", "parents": [ "bee600ff66e3e233274faa1391890ff424a8244e", "a42363f79832a6e14f348514664dc6dc3edf9da2" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 28 16:09:16 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jan 28 16:09:16 2016 +0000" }, "message": "Merge \"Implement first kind of polymorphic inlining.\"" }, { "commit": "a42363f79832a6e14f348514664dc6dc3edf9da2", "tree": "bcd43acdf9903a704b566af00b5c740786284b7b", "parents": [ "9cea9139033a4d04437ebc5542e9466fd67137fe" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Dec 17 14:57:09 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 28 15:55:46 2016 +0000" }, "message": "Implement first kind of polymorphic inlining.\n\nAdd HClassTableGet to fetch an ArtMethod from the vtable or imt,\nand compare it to the only method the profiling saw.\n\nChange-Id: I76afd3689178f10e3be048aa3ac9a97c6f63295d\n" }, { "commit": "74eb1b264691c4eb399d0858015a7fc13c476ac6", "tree": "0b6fc4f3003d50bf6c388601013cdfc606e53859", "parents": [ "75fd2a8ab9b4aff59308034da26eb4986d10fa9e" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Dec 14 11:44:01 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 28 15:50:27 2016 +0000" }, "message": "ART: Implement HSelect\n\nThis patch adds a new HIR instruction to Optimizing. HSelect returns\none of two inputs based on the outcome of a condition.\n\nThis is only initial implementation which:\n - defines the new instruction,\n - repurposes BooleanSimplifier to emit it,\n - extends InstructionSimplifier to statically resolve it,\n - updates existing code and tests accordingly.\n\nCode generators currently emit fallback if/then/else code and will be\nupdated in follow-up CLs to use platform-specific conditional moves\nwhen possible.\n\nChange-Id: Ib61b17146487ebe6b55350c2b589f0b971dcaaee\n" }, { "commit": "b3e773eea39a156b3eacf915ba84e3af1a5c14fa", "tree": "6c0d3a748d7b445a0d776ed306c7add43a0e1dd3", "parents": [ "05aeb408f292d8d94af1646a94bc69faf77f0b46" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Jan 26 11:28:37 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 28 15:48:00 2016 +0000" }, "message": "ART: Implement support for instruction inlining\n\nOptimizing HIR contains \u0027non-materialized\u0027 instructions which are\nemitted at their use sites rather than their defining sites. This\nwas not properly handled by the liveness analysis which did not\nadjust the use positions of the inputs of such instructions.\nDespite the analysis being incorrect, the current use cases never\nproduce incorrect code.\n\nThis patch generalizes the concept of inlined instructions and\nupdates liveness analysis to set the compute use positions correctly.\n\nChange-Id: Id703c154b20ab861241ae5c715a150385d3ff621\n" }, { "commit": "8ed1826a9da054920f2d39d34dfc7ba43337e4c9", "tree": "21f64788a548fa0f4f39417cf50c74c6df0b9c6f", "parents": [ "a7d507eb0fc55240700232a0b6269d1388e9b5a5" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Fri Jan 22 13:01:00 2016 +0100" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Fri Jan 22 15:20:21 2016 +0100" }, "message": "Fix MIPS64 booting problem\n\nAdd missing MarkGCCard in compareAndSwapObject intinsic.\n\nAdditionaly, don\u0027t do a null test in MarkGCCard if the value\ncannot be null for MIPS64.\n\nChange-Id: Iad50f9e6be8cd27fedb31abb00d5829498941696\n" }, { "commit": "58282f4510961317b8d5a364a6f740a78926716f", "tree": "5d97c0db9fe01dd6e8df2357ef11f614abb853e8", "parents": [ "b8bb9f6d0b59be125066f604f134155f8998f5ae" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 14 12:45:10 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Jan 18 16:39:30 2016 +0000" }, "message": "ART: Remove Baseline compiler\n\nWe don\u0027t need Baseline any more and it hasn\u0027t been maintained for\na while anyway. Let\u0027s remove it.\n\nChange-Id: I442ed26855527be2df3c79935403a25b1ee55df6\n" }, { "commit": "28943466954ca5d6f586bb5496f7f3f0f85fe87a", "tree": "56a4f7427addf50aba847ea944ec24396c7e848f", "parents": [ "68c56ae9ccdb6e348501456e374ae65e74f6270c", "6de1938e562b0d06e462512dd806166e754035ea" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jan 15 09:19:12 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jan 15 09:19:12 2016 +0000" }, "message": "Merge \"ART: Remove incorrect HFakeString optimization\"" }, { "commit": "6de1938e562b0d06e462512dd806166e754035ea", "tree": "f9df086a73860c20768d17ff7bc5be4139567941", "parents": [ "f5b84ee14a3bc578f799a39dca1ae512b49356ea" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jan 08 17:37:10 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 14 16:22:13 2016 +0000" }, "message": "ART: Remove incorrect HFakeString optimization\n\nSimplification of HFakeString assumes that it cannot be used until\nString.\u003cinit\u003e is called which is not true and causes different\nbehaviour between the compiler and the interpreter. This patch\nremoves the optimization together with the HFakeString instruction.\n\nInstead, HNewInstance is generated and an empty String allocated\nuntil it is replaced with the result of the StringFactory call. This\nis consistent with the behaviour of the interpreter but is too\nconservative. A follow-up CL will attempt to optimize out the initial\nallocation when possible.\n\nBug: 26457745\nBug: 26486014\n\nChange-Id: I7139e37ed00a880715bfc234896a930fde670c44\n" }, { "commit": "baf60b7cceb3968ae36540e2f7f92cec3805f6ed", "tree": "97170e2b5ad9439e4d94fb1d86c5b1382ddba0be", "parents": [ "08d3ab591d98fce33b7ab552a10cec04aaff6ce1" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Dec 22 15:15:03 2015 -0800" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Jan 13 17:43:42 2016 -0800" }, "message": "MIPS: Improve conversion between ints and floats.\n\nChange-Id: I767fe9623cc14e8480c31e305725eb5221cac282\n" }, { "commit": "f96c43eaa72f4ead472f4a97f13622e17a29e8f6", "tree": "ad5e7d69eee8db1c53ddc9743dd27dceb6159a73", "parents": [ "dae9fd594864074de041ee7edea34d4a3e9e6463", "42249c3602c3d0243396ee3627ffb5906aa77c1e" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Jan 13 19:15:15 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jan 13 19:15:15 2016 +0000" }, "message": "Merge \"Reduce code size by sharing slow paths.\"" }, { "commit": "67fcbd4f0c32ec1de3cd248d411f0c2a6ba52e4b", "tree": "b971f33b38769553f8d19557776a9f26e868c327", "parents": [ "922698ded1e80cad1ecce4c2172a88c76a216373", "92d9060c0cdff7c726549a9d9494e5655404bed7" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jan 13 10:39:05 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jan 13 10:39:05 2016 +0000" }, "message": "Merge \"MIPS: Implement HRor\"" }, { "commit": "42249c3602c3d0243396ee3627ffb5906aa77c1e", "tree": "1e822a21c87331246cbde3923eac88fa315fa2cc", "parents": [ "922698ded1e80cad1ecce4c2172a88c76a216373" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Jan 07 15:33:50 2016 -0800" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Jan 12 16:39:20 2016 -0800" }, "message": "Reduce code size by sharing slow paths.\n\nRationale:\nSharing identical slow path code reduces code size.\n\nBackground:\nCurrently, slow paths with the same dex-pc, same physical register\nspilling code, and identical stack maps are shared (making this\nonly useful for deopt slow paths). The newly introduced mechanism\nis sufficiently general to allow future improvements by e.g.\nallowing different dex-pc (by passing this to runtime) or even\nthe kind of slow paths (by passing runtime addresses to the slowpath).\n\nChange-Id: I819615c47b4fd98440a241f681f93e4fc22d12e0\n" }, { "commit": "8566a91502db625ff9428a3c2418714488ecd5d9", "tree": "fc3ade71413203fd053d06b98210f263084e34c9", "parents": [ "20b6863769357d798464a65c5ee5dfd64464d400", "b7070a2db8b0b7eca14f01f932be305be64ded57" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Jan 11 14:47:37 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jan 11 14:47:37 2016 +0000" }, "message": "Merge \"Generate Nops to ensure that debug stack maps have distinct PC.\"" }, { "commit": "b7070a2db8b0b7eca14f01f932be305be64ded57", "tree": "06ba87d56a708712fb206e23d3abd55f21934373", "parents": [ "ae6f23c83e1c8dcfbc4f74186ea1a37f1044414b" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Jan 08 18:13:53 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Jan 11 12:22:17 2016 +0000" }, "message": "Generate Nops to ensure that debug stack maps have distinct PC.\n\nChange-Id: I5740ec958a20d236634b66df0e675382ed5c16fc\n" }, { "commit": "68f6289fbc1b14ed814722c023b3f343c1e59a79", "tree": "86bf0f10e1368871e567145a0d70087cb8f74a4f", "parents": [ "b7371a5517f78f61759f7e6124f2d957d974d9cd" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 04 08:39:49 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 11 11:36:48 2016 +0000" }, "message": "Don\u0027t use std::abs on INT_MIN/LONG_MIN, it\u0027s undefined.\n\nbug:25494265\n\nChange-Id: I560a3a589b92440020285f9adfdf7c9efb06217c\n" }, { "commit": "92d9060c0cdff7c726549a9d9494e5655404bed7", "tree": "22c1274193e7f1a3bd9872a2455c758394587dee", "parents": [ "376a6f3dbae7b71a6fc2c339ec416d3407277308" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Fri Dec 18 18:16:36 2015 -0800" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Mon Jan 04 20:53:44 2016 -0800" }, "message": "MIPS: Implement HRor\n\nThis also fixes differentiation between the SRL and ROTR\ninstructions in the disassembler.\n\nChange-Id: Ie19697f8d6ea8fa4e338adde3e3cf8e4a0383eae\n" }, { "commit": "0cf4493166ff28518c8eafa2d0463f6e817cce75", "tree": "6d207db3fb655bbd692f2b01fa963c603619bd0e", "parents": [ "d674bf7ba2a209790cea8ef8d935480ef515c9e1" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Dec 09 14:09:59 2015 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Dec 23 13:19:16 2015 +0000" }, "message": "Generate more stack maps during native debugging.\n\nGenerate extra stack map at the start of each java statement.\nThe stack maps are later translated to DWARF which allows\nLLDB to set breakpoints and view local variables.\n\nChange-Id: If00ab875513308e4a1399d1e12e0fe8934a6f0c3\n" }, { "commit": "5f7b58ea1adfc0639dd605b65f59198d3763f801", "tree": "04556e673cdd3967cc967ff79931eab49e523956", "parents": [ "1201804d1813d7db0accead9721d67c40b3de564" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Nov 23 19:49:34 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Dec 23 09:59:07 2015 +0000" }, "message": "Rewrite HInstruction::Is/As\u003ctype\u003e().\n\nMake Is\u003ctype\u003e() and As\u003ctype\u003e() non-virtual for concrete\ninstruction types, relying on GetKind(), and mark GetKind()\nas PURE to improve optimization opportunities. This reduces\nthe number of relocations in libart-compiler.so\u0027s .rel.dyn\nsection by ~4K, or ~44%, and in .data.rel.ro by ~18K, or\n~65%. The file is 96KiB smaller for Nexus 5, including 8KiB\nreduction of the .text section.\n\nUnfortunately, the g++/clang++ __attribute__((pure)) is not\nstrong enough to avoid duplicated virtual calls and we would\nneed the C++ [[pure]] attribute proposed in n3744 instead.\nTo work around this deficiency, we introduce an extra\nnon-virtual indirection for GetKind(), so that the compiler\ncan optimize common expressions such as\n instruction-\u003eIsAdd() || instruction-\u003eIsSub()\nor\n instruction-\u003eIsAdd() \u0026\u0026 instruction-\u003eAsAdd()-\u003e...\nwhich contain two virtual calls to GetKind() after inlining.\n\nChange-Id: I83787de0671a5cb9f5b0a5f4a536cef239d5b401\n" }, { "commit": "299a93993fb8f3efbf0465cf674d80c3bcfdc66c", "tree": "1ba8d1cd2a34091317af08cbbe5cfa3fa52e549f", "parents": [ "fae1db92d8433d0f75258c190bcf2c940731f036" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Dec 08 16:08:02 2015 -0800" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Thu Dec 17 14:14:26 2015 -0800" }, "message": "MIPS64: Fuse long and FP compare \u0026 condition in Optimizing.\n\nBug: 25559148\n\nChange-Id: I2d14ac75460a76848c71c08cffff6d7a18f5f580\n" }, { "commit": "14c4e90f67e71430dade7d4f20920e6352be386e", "tree": "2d376e0d6f833bb87348faae12ad7ed3bf15b95b", "parents": [ "6132a3884a912a704010f22ea2991f3d9d432af2", "f3e0ee27f46aa6434b900ab33f12cd3157578234" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 16:46:19 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Dec 17 16:46:19 2015 +0000" }, "message": "Merge \"Revert \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"\"" }, { "commit": "f3e0ee27f46aa6434b900ab33f12cd3157578234", "tree": "83d5a75bf26238ff1789569de62e4b72fb348119", "parents": [ "b4c137630fd2226ad07dfd178ab15725374220f1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 15:23:13 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 15:23:13 2015 +0000" }, "message": "Revert \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"\n\nThis reverts commit b4c137630fd2226ad07dfd178ab15725374220f1.\n\nThe underlying issue was fixed by https://android-review.googlesource.com/188271 .\n\nBug: 26121945\nChange-Id: I58b08eb1a9f0a5c861f8cda93522af64bcf63920\n" }, { "commit": "698fa975c10e244fd181e2ffb4bb67a88851e1d7", "tree": "104d67a406808b9952cd0b177c3aa44f2393c19d", "parents": [ "cbf8af898e758cef27687c20c8cf9ac75280026d" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Dec 16 17:06:47 2015 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Dec 16 17:06:47 2015 +0000" }, "message": "Remove spurious references to kEmitCompilerReadBarrier in MIPS.\n\nWe do not support read barriers on MIPS code generators yet.\n\nAlso, wrap some long lines in the MIPS64 code generator.\n\nChange-Id: Ia2755590afa60eb9c8fb547e059146ab6518372b\n" }, { "commit": "d7d35383838c369a4a1ff5aa21e952f941718c48", "tree": "7d36f56c834e2b561ebc0359b9d11ad03d150cb2", "parents": [ "6b75bc08e8e2e5516a23350418bacef2cf982bd9", "b4c137630fd2226ad07dfd178ab15725374220f1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 16 12:31:14 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Dec 16 12:31:14 2015 +0000" }, "message": "Merge \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"" }, { "commit": "b4c137630fd2226ad07dfd178ab15725374220f1", "tree": "6f319089980073ffb2c20d36e367a944daa525c4", "parents": [ "59f054d98f519a3efa992b1c688eb97bdd8bbf55" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 16 12:06:39 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 16 12:07:01 2015 +0000" }, "message": "Revert \"ART: Reduce the instructions generated by packed switch.\"\n\nThis reverts commit 59f054d98f519a3efa992b1c688eb97bdd8bbf55.\n\nbug:26121945\n\nChange-Id: I8a5ad7ef1f1de8d44787c27528fa3f7f5c2e9cd3\n" }, { "commit": "58dcb021c3bd45718d0103844f4e6d55754e6501", "tree": "b5ca917081eff52a98331b1234335069ead8bede", "parents": [ "66278646b5b332142d1474703ac7d945dfbf7c78", "40a04bf64e5837fa48aceaffe970c9984c94084a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Dec 11 16:14:56 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Dec 11 16:14:56 2015 +0000" }, "message": "Merge \"Replace rotate patterns and invokes with HRor IR.\"" }, { "commit": "40a04bf64e5837fa48aceaffe970c9984c94084a", "tree": "27aeff3b9492b396050155734d81aba3c57ffbb7", "parents": [ "763fd2d3d131898cad6295a19ae9a30e22ce5f2a" ], "author": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Fri Dec 11 09:50:36 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Dec 11 16:13:44 2015 +0000" }, "message": "Replace rotate patterns and invokes with HRor IR.\n\nReplace constant and register version bitfield rotate patterns, and\nrotateRight/Left intrinsic invokes, with new HRor IR.\n\nWhere k is constant and r is a register, with the UShr and Shl on\neither side of a |, +, or ^, the following patterns are replaced:\n\n x \u003e\u003e\u003e #k OP x \u003c\u003c #(reg_size - k)\n x \u003e\u003e\u003e #k OP x \u003c\u003c #-k\n\n x \u003e\u003e\u003e r OP x \u003c\u003c (#reg_size - r)\n x \u003e\u003e\u003e (#reg_size - r) OP x \u003c\u003c r\n\n x \u003e\u003e\u003e r OP x \u003c\u003c -r\n x \u003e\u003e\u003e -r OP x \u003c\u003c r\n\nImplemented for ARM/ARM64 \u0026 X86/X86_64.\n\nTests changed to not be inlined to prevent optimization from folding\nthem out. Additional tests added for constant rotate amounts.\n\nChange-Id: I5847d104c0a0348e5792be6c5072ce5090ca2c34\n" }, { "commit": "917d01680714b2295f109f8fea0aa06764a30b70", "tree": "1da1b936fcc2318dced0d0aa9d2f987af1a05169", "parents": [ "d48015603a54b820d287d92709825765159615f0" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 24 18:25:35 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Dec 10 16:48:06 2015 +0000" }, "message": "Don\u0027t generate a slow path for strings in the dex cache.\n\nChange-Id: I1d258f1a89bf0ec7c7ddd134be9215d480f0b09a\n" }, { "commit": "59f054d98f519a3efa992b1c688eb97bdd8bbf55", "tree": "83d5a75bf26238ff1789569de62e4b72fb348119", "parents": [ "763fd2d3d131898cad6295a19ae9a30e22ce5f2a" ], "author": { "name": "Zheng Xu", "email": "zheng.xu@linaro.org", "time": "Mon Dec 07 17:17:03 2015 +0800" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Dec 08 13:14:10 2015 -0500" }, "message": "ART: Reduce the instructions generated by packed switch.\n\nImplement Vladimir Marko\u0027s suggestion. The new compare/jump series\nreduce the number of instructions from (2*n+1) to (1.5*n+3).\n\nGenerate normal compare/jump series when numEntries \u003c\u003d 3.\nGenerate optimal compare/jump series when numEntries \u003c\u003d threshold.\nGenerate jump tables otherwise.\n\nChange-Id: I425547b6787057c7fa84e71f17c145b63b208633\n" }, { "commit": "e523423a053af5cb55837f07ceae9ff2fd581712", "tree": "6c2d9c570bf0d9a0e2cd056e052c0be618b03fc5", "parents": [ "08a84acc7adb1bb076595eb961bd4667896e5075" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 02 09:06:11 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 02 13:01:25 2015 +0000" }, "message": "Revert \"Revert \"Don\u0027t use the compiler driver for method resolution.\"\"\n\nThis reverts commit c88ef3a10c474045a3476a02ae75d07ddd3230b7.\n\nChange-Id: I0ed88a48b313a8d28bc39fae40631123aadb13ef\n" }, { "commit": "c88ef3a10c474045a3476a02ae75d07ddd3230b7", "tree": "cd23e1e0a3cea10cc9a9ae8269a01f75ada8ef0e", "parents": [ "4db0bf9c4db6a09716c3388b7d2f88d534470339" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 16:28:10 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 16:28:10 2015 +0000" }, "message": "Revert \"Don\u0027t use the compiler driver for method resolution.\"\n\nFails 425 in debuggable mode.\n\nThis reverts commit 4db0bf9c4db6a09716c3388b7d2f88d534470339.\n\nChange-Id: I346df8f75674564fc4fb241c60f23e250fc7f0a7\n" }, { "commit": "4db0bf9c4db6a09716c3388b7d2f88d534470339", "tree": "71feab1b20d4d773f881e0afc26dfcd236c177d1", "parents": [ "d1744d449cf2b56af7e0896b3729fac2a414e3af" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Nov 23 09:35:04 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 14:23:01 2015 +0000" }, "message": "Don\u0027t use the compiler driver for method resolution.\n\nThe compiler driver makes assumptions that don\u0027t hold for\nthe optimizing compiler, and will for example always go to\nslow path for an invoke-super when there\u0027s no verified method.\n\nAlso fix GenerateInvokeVirtual in the presence of intrinsics.\n\nNext change will address some of the TODOs in sharpening.cc.\n\nChange-Id: I2b0e543ee9b9bebcadb2d26de29e850c59ad58b9\n" }, { "commit": "42e372e5a34d0fef88007bc5f40dd0fc7c03b58b", "tree": "434618ad8deec85313335b6ca63c6519639b4959", "parents": [ "95f7bbcd991fbfaead438a2866354714eb32af38" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 24 15:48:56 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 24 17:57:26 2015 +0000" }, "message": "Optimize HLoadClass when we know the class is in the cache.\n\nChange-Id: Iaa74591eed0f2eabc9ba9f9988681d9582faa320\n" }, { "commit": "888d067a67640e7d9fc349b0451dfe845acad562", "tree": "6fdbf0027e06b2f140ec9396b8a6d650a15c4e84", "parents": [ "51a354c747c8a76a4716a49a1f70bfd975d63787" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Nov 23 18:53:50 2015 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Nov 24 11:40:13 2015 +0000" }, "message": "Revamp art::CheckEntrypointTypes uses.\n\nChange-Id: I6e13e594539e766ed94524ac3282cec292ba91da\n" }, { "commit": "51a354c747c8a76a4716a49a1f70bfd975d63787", "tree": "37b82929ccc42f4b1b70b94baf64dbd9fd8b4c15", "parents": [ "7f8275549fd503f82ac63d65800afacab85af09d", "a0e87b0a97fadd54540ec7e8331b61bebd82d378" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Nov 24 10:34:22 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Nov 24 10:34:22 2015 +0000" }, "message": "Merge \"MIPS64: Support short and long branches\"" }, { "commit": "01b88a2c8903954ca72067bab93471b2c6aca135", "tree": "0dbbc998527471123a96abb3f6b568c9329b1da2", "parents": [ "be0c2d91027929682fa754ae21943f52b4e111b7", "729645a937eb9f04a311b3c22471dcf3ebe9bcec" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Nov 23 08:51:44 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Nov 23 08:51:44 2015 +0000" }, "message": "Merge \"Explicitly add HLoadClass/HClinitCheck for HNewInstance.\"" }, { "commit": "a0e87b0a97fadd54540ec7e8331b61bebd82d378", "tree": "c1027e65fd859cf59f295ff3a5630404e3724db3", "parents": [ "d83b9042d67f2a7d5ca5a1f63819c97940033336" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Thu Sep 24 22:57:20 2015 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sat Nov 21 22:18:50 2015 -0800" }, "message": "MIPS64: Support short and long branches\n\nChange-Id: I618c960bd211048166d9fde78d4106bd3ca42b3a\n" }, { "commit": "729645a937eb9f04a311b3c22471dcf3ebe9bcec", "tree": "100c5d843a4d436b166d52e7a463ef6b283abc8c", "parents": [ "d846a2cc45aae5b1c84b5ac51cdd37a22b8447ff" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 19 13:29:02 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Nov 20 22:19:02 2015 +0000" }, "message": "Explicitly add HLoadClass/HClinitCheck for HNewInstance.\n\nbug:25735083\nbug:25173758\n\nChange-Id: Ie81cfa4fa9c47cc025edb291cdedd7af209a03db\n" }, { "commit": "c53c0797a78a89d637e4230503cc1feb27e855a8", "tree": "194d9215590abf283d2b278adf39462d3b704c1b", "parents": [ "ee7d4a3d574d8789fb0d1860eba284ae5099f10d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 19 15:48:33 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 19 16:08:12 2015 +0000" }, "message": "Clean up the special input in HInvokeStaticOrDirect.\n\nChange-Id: I4042aefbdac1a8c236d00e2e7145349a64f6486b\n" }, { "commit": "0debae7bc89eb05f7a2bf7dccd223318fad7c88d", "tree": "3da9656dc77d271b12c1b02793e7d713ae3da790", "parents": [ "991842a5273d20695dd5f35eb9a9e28c386c5b4b" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Nov 12 18:37:00 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Nov 17 15:12:00 2015 +0000" }, "message": "ART: Refactor GenerateTestAndBranch\n\nEach code generator implements a method for generating condition\nevaluation and branching to arbitrary labels. This patch refactors\nit for better clarity but also to generate fewer jumps when the true\nbranch is the fallthrough successor.\n\nThis is preliminary work for implementing HSelect.\n\nChange-Id: Iaa545a5ecbacb761c5aa241fa69140cf6eb5952f\n" }, { "commit": "0d5a281c671444bfa75d63caf1427a8c0e6e1177", "tree": "fd9bbe0f1c581bcc7c05bbfb2643ffe0b1fb014e", "parents": [ "dd4cbcc924c8ba2a578914a4a366996693bdcd74" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Nov 13 10:07:31 2015 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Sun Nov 15 12:16:41 2015 +0000" }, "message": "x86/x86-64 read barrier support for concurrent GC in Optimizing.\n\nThis first implementation uses slow paths to instrument heap\nreference loads and GC root loads for the concurrent copying\ncollector, respectively calling the artReadBarrierSlow and\nartReadBarrierForRootSlow (new) runtime entry points.\n\nNotes:\n- This implementation does not instrument HInvokeVirtual\n nor HInvokeInterface instructions (for class reference\n loads), as the corresponding read barriers are not stricly\n required with the current concurrent copying collector.\n- Intrinsics which may eventually call (on slow path) are\n disabled when read barriers are enabled, as the current\n slow path infrastructure does not support this case.\n- When read barriers are enabled, the code generated for a\n HArraySet instruction always go into the array set slow\n path for object arrays (delegating the operation to the\n runtime), as we are lacking a mechanism to keep a\n temporary register live accross a runtime call (needed for\n the instrumentation of type checking code, which requires\n two successive read barriers).\n\nBug: 12687968\nChange-Id: I14cd6107233c326389120336f93955b28ffbb329\n" }, { "commit": "00580bdbbb119a354c94a9c19928c1dcbd14a8f4", "tree": "722017e414952bccc6933a63e28b4ed5a214f1ff", "parents": [ "c4b24109473d50e4cc829be5d1e7c77fd21527f3" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Nov 11 13:31:12 2015 -0800" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Nov 11 16:06:29 2015 -0800" }, "message": "MIPS64: fix calling conventions in LoadClass and field accesses\n\nThis fixes failures in test 529-checker-unresolved\n\nChange-Id: I6170c22059e9711b2fcc965b00d6e34edd839539\n" }, { "commit": "6f6f3592ea47be2a59836bd9fe5feb2003c6aee7", "tree": "3edad72b08769ace21c0c6b6e9ed944fcf721b88", "parents": [ "f11f5ebe321fde9f6efb49d75b861606391b6502" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Nov 09 12:54:16 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Nov 09 12:54:16 2015 +0000" }, "message": "Fix mip64 build: hide current method input only if it exists.\n\nChange-Id: I7d3cb34843d421babfb1f93469e770c05ee8d5a9\n" }, { "commit": "2264f624e41acf09b17c3961bd52966e43f2b58f", "tree": "b946c5ffdca5399408fc0769edb12762980087b8", "parents": [ "4202a2ff49d77eda813052d091675bf53c46cb0f", "5c75ffad3aaf9d62ea3ac4cf2c0a2fd699368f83" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Sat Nov 07 14:15:46 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Sat Nov 07 14:15:46 2015 +0000" }, "message": "Merge \"MIPS64: small improvements in code generation\"" }, { "commit": "5c75ffad3aaf9d62ea3ac4cf2c0a2fd699368f83", "tree": "15da165b06f99c55849e5431d8b405c2014883dc", "parents": [ "b203aad7a0db904efa8429d48b53e56583f61ec2" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Thu Sep 24 14:41:59 2015 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Fri Nov 06 13:13:47 2015 -0800" }, "message": "MIPS64: small improvements in code generation\n\nSpecifically:\n- More efficient load/store of constant 0 (and +0.0)\n- Improved swapping of floats/doubles in registers\n- Use kNoOutputOverlap wherever possible\n- More efficient 64-bit integer comparison with 0\n- More efficient load of integer constants of the form (2**n)-1\n\nChange-Id: Ic2914d8865aa6616b9a0b21b3cc173d4477eb8c7\n" }, { "commit": "c857c746707dfd45d74b75cb7fa84484ca68cc2a", "tree": "0c223c9cb4999ffe9b04b3e264f5fea4c91d949a", "parents": [ "b203aad7a0db904efa8429d48b53e56583f61ec2" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Sep 23 15:12:39 2015 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Fri Nov 06 13:03:43 2015 -0800" }, "message": "MIPS64: Improve integer division by constants\n\nThis also removes some unused instructions and instructions not\navailable on MIPS64R6.\n\nChange-Id: I44bfe12c60344312c88c45e97b6b07dcd5bdc630\n" }, { "commit": "53afca191ace3d7447b09097f9ea82a513075c52", "tree": "f037ef8007bcbe4632b5d06fab0a7aea5550ce61", "parents": [ "a930832a4ef0a2ef0835c5db4650750018ab0765" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Thu Nov 05 16:34:23 2015 -0800" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Thu Nov 05 16:53:19 2015 -0800" }, "message": "MIPS64: Implement virtual intrinsic slow path\n\nThis fixes a crash in dex2oat while compiling boot.oat.\n\nChange-Id: I44fc92809902d7fc226c88b3e3f081b72cc19ce5\n" }, { "commit": "dc151b2346bb8a4fdeed0c06e54c2fca21d59b5d", "tree": "391d8ccb44ff9e6fc1c8fa8975e534e20cc002ff", "parents": [ "823e693aa946ba75cd047429e1290011a2ed8729" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 15 18:02:30 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Oct 23 14:45:32 2015 +0100" }, "message": "Optimizing: Determine invoke-static/-direct dispatch early.\n\nDetermine the dispatch type of invoke-static/-direct in a\nspecial pass right after the type inference. This allows the\ninliner to pass the \"needs dex cache\" check and inline more.\nIt also allows the code generator to avoid requesting a\nregister location for the ArtMethod* for kDexCachePcRelative\nand direct methods.\n\nThe supported dispatch check handles also situations that\nthe CompilerDriver currently doesn\u0027t allow. The cleanup of\nthe CompilerDriver and required changes to Quick will come\nin a separate change.\n\nChange-Id: I3f8e903a119949e95871d8ab0a995f4731a13a07\n" }, { "commit": "f652cecb984c104d44a0223c3c98400ef8ed8ce2", "tree": "ec0cc193eccdd11a79f42f957a856d2ba57699e1", "parents": [ "b8b44983f861cfeeca66c624dd0f2a3fa71b4992" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Tue Aug 25 16:11:42 2015 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Thu Oct 22 18:51:13 2015 +0200" }, "message": "MIPS: Initial version of optimizing compiler for MIPS32\n\nChange-Id: I370388e8d5de52c7001552b513877ef5833aa621\n" }, { "commit": "bb245d199a5240b4c520263fd2c8c10dba79eadc", "tree": "e16b37485e3e0e34c24e35a71cc8e6986d1e2e70", "parents": [ "d5a69fc429f57bf528aa061618d3ae94ee8deb24" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Oct 19 11:05:03 2015 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Oct 19 11:12:11 2015 -0700" }, "message": "Generalize codegen and simplification of deopt.\n\nRationale: the de-opt instruction is very similar to an if,\n so the existing assumption that it always has a\n conditional \"under the hood\" is very unsafe, since\n optimizations may have replaced conditionals with\n actual values; this CL generalizes handling of deopt.\n\nChange-Id: I1c6cb71fdad2af869fa4714b38417dceed676459\n" }, { "commit": "e9f37600e98ba21308ad4f70d9d68cf6c057bdbe", "tree": "ad7953f41a35eeee68a31b4b567a08c650647bba", "parents": [ "793e6fbdefb092d1dab50bca5618aed110c7e037" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Oct 09 11:15:55 2015 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Oct 14 13:38:22 2015 -0700" }, "message": "Added support for unsigned comparisons\n\nRationale: even though not directly supported in input graph,\n having the ability to express unsigned comparisons\n in HIR is useful for all sorts of optimizations.\n\nChange-Id: I4543c96a8c1895c3d33aaf85685afbf80fe27d72\n" }, { "commit": "ec7802a102d49ab5c17495118d4fe0bcc7287beb", "tree": "08649609604b9c96bc48ca071c48b0af5abb1a3f", "parents": [ "b2e436ffcda1d7a87e7bf9133d8ed878388c73c2" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 01 20:57:57 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 08 11:10:18 2015 +0100" }, "message": "Add DCHECKs to ArenaVector and ScopedArenaVector.\n\nImplement dchecked_vector\u003c\u003e template that DCHECK()s element\naccess and insert()/emplace()/erase() positions. Change the\nArenaVector\u003c\u003e and ScopedArenaVector\u003c\u003e aliases to use the new\ntemplate instead of std::vector\u003c\u003e. Remove DCHECK()s that\nhave now become unnecessary from the Optimizing compiler.\n\nChange-Id: Ib8506bd30d223f68f52bd4476c76d9991acacadc\n" }, { "commit": "580b609cd6cfef46108156457df42254d11e72a7", "tree": "64104e19b57cbb9df97c9349585cc4d1e9fdb3de", "parents": [ "b5c469357f8faf8fbaa05bc41d56903b300d0cd1" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 06 17:35:58 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 06 17:35:58 2015 +0100" }, "message": "Fix location summary for LoadClass\n\nDon\u0027t request a register for the current method if we\u0027re gonna call the\nruntime.\n\nChange-Id: I9760d15108bd95efb2a34e6eacd84b60841781d7\n" }, { "commit": "98893e146b0ff0e1fd1d7c29252f1d1e75a163f2", "tree": "a14bb10d039fcee10a7e0cacb494bb60d08b2039", "parents": [ "7b5c395e9a50f988ca2275a429df17b6abbcc475" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Oct 02 21:05:03 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 06 13:42:55 2015 +0100" }, "message": "Add support for unresolved classes in optimizing.\n\nChange-Id: I0e299a81e560eb9cb0737ec46125dffc99333b54\n" }, { "commit": "e460d1df1f789c7c8bb97024a8efbd713ac175e9", "tree": "3511036fb18828dd0ee140d33a8bcd0535ebeab6", "parents": [ "25217af2a7cae96b32ba566aaf697288f3374c99" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Sep 29 04:52:17 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Oct 02 02:25:18 2015 +0100" }, "message": "Revert \"Revert \"Support unresolved fields in optimizing\"\n\nThe CL also changes the calling convetion for 64bit static field set\nto use kArg2 instead of kArg1. This allows optimizing to keep\nthe asumptions:\n- arm pairs are always of form (even_reg, odd_reg)\n- ecx_edx is not used as a register on x86.\n\nThis reverts commit e6f49b47b6a4dc9c7684e4483757872cfc7ff1a1.\n\nChange-Id: I93159917565824084abc96775f31be1a4249f2f3\n" }, { "commit": "9b29f3ef7df18c84d922634709e38a1913709ad7", "tree": "64d8c0fd2300992d57d2581a6fbedd569a35beef", "parents": [ "8446ed412d3a4ca2c70737d6f40c4129b0ee8ab1", "49e553927a70704cd6a29c7c8b96861e63808470" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Oct 01 20:29:43 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 01 20:29:43 2015 +0000" }, "message": "Merge \"MIPS64: Implement intrinsic java.lang.Thread.currentThread()\"" }, { "commit": "225b6464a58ebe11c156144653f11a1c6607f4eb", "tree": "3f1c6067c3841c892edaa1a60a61af9c559cb4e4", "parents": [ "6a9984e62c08bcd78c8e49dd40b1f0f9d53513b7" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 28 12:17:40 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 29 10:49:35 2015 +0100" }, "message": "Optimizing: Tag arena allocations in code generators.\n\nAnd completely remove the deprecated GrowableArray.\n\nReplace GrowableArray with ArenaVector in code generators\nand related classes and tag arena allocations.\n\nLabel arrays use direct allocations from ArenaAllocator\nbecause Label is non-copyable and non-movable and as such\ncannot be really held in a container. The GrowableArray\nnever actually constructed them, instead relying on the\nzero-initialized storage from the arena allocator to be\ncorrect. We now actually construct the labels.\n\nAlso avoid StackMapStream::ComputeDexRegisterMapSize() being\npassed null references, even though unused.\n\nChange-Id: I26a46fdd406b23a3969300a67739d55528df8bf4\n" }, { "commit": "49e553927a70704cd6a29c7c8b96861e63808470", "tree": "0233cc8c8c229b6a63d8f07ac6a4170f6d33079b", "parents": [ "85e5207ef094f99081539333bd868ce721c6fd73" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Fri Sep 04 16:04:03 2015 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Mon Sep 28 10:02:13 2015 -0700" }, "message": "MIPS64: Implement intrinsic java.lang.Thread.currentThread()\n\nChange-Id: I45378414e5b6071dce9663ee42a2136874eba6ff\n" }, { "commit": "0b7ac98ecdb891797a282c508b41238451d6c770", "tree": "c6d2b03cf97c8c087cbf5a00e632db3105a58726", "parents": [ "c27e706785c975eb91d9716800aae6c48dc47da6" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Fri Sep 04 12:54:28 2015 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Fri Sep 25 16:15:52 2015 -0700" }, "message": "MIPS64: Implement intrinsics from java.lang.Math:\n\n- abs(double) - abs(float) - abs(int)\n- abs(long) - ceil(double) - floor(double)\n- max(double, double) - max(float, float) - max(int, int)\n- max(long, long) - min(double, double) - min(float, float)\n- min(int, int) - min(long, long) - rint(double)\n- sqrt(double)\n\nThe math intrinsics:\n\n- round(double) - round(float)\n\naren\u0027t implemented because there is no simple mapping from these Java\nfunctions into MIPS assembly code.\n\nChange-Id: I37ee5224d3d64f7162ed98521ba566fbc58d7905\n" }, { "commit": "95ca0733c618556383b288ad5cdee9b431f691f5", "tree": "a0ed4d570f74a3726140bd56b7182df0d1b00edf", "parents": [ "8a0014dd3ad1562d93695fa0d3033856ec7da133", "3039e381b79ac1ef01c420511f6629f639d40ab4" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Sep 25 19:51:10 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Sep 25 19:51:10 2015 +0000" }, "message": "Merge \"MIPS64: Implement miscellaneous bit manipulation intrinsics\"" }, { "commit": "33c0ed6cc26d07d4512a87a5d39d3412ee077020", "tree": "a1ac0376f982c7e3898ae13a2053a39a7aa155ce", "parents": [ "4ef16199765253bfe0ae1f02daf3b4f392d9ff67", "fe57faa2e0349418dda38e77ef1c0ac29db75f4d" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Sep 22 23:05:00 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Sep 22 23:05:00 2015 +0000" }, "message": "Merge \"[optimizing] Add basic PackedSwitch support\"" }, { "commit": "3039e381b79ac1ef01c420511f6629f639d40ab4", "tree": "afc8fb56069e007b28891d853dca4676b39da87f", "parents": [ "3f4b39dec9ec6b8948ed18b9d65ba49db2465004" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Wed Aug 26 07:54:08 2015 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Tue Sep 22 05:07:41 2015 -0700" }, "message": "MIPS64: Implement miscellaneous bit manipulation intrinsics\n\n// java.lang.Double\n- doubleToRawLongBits(double) - longBitsToDouble(long)\n\n// java.lang.Float\n- floatToRawIntBits(float) - intBitsToFloat(int)\n\n// java.lang.Integer\n- numberOfLeadingZeros(int) - reverseBytes(int)\n- reverse(int)\n\n// java.lang.Long\n- numberOfLeadingZeros(long) - reverseBytes(long)\n- reverse(long)\n\n// java.lang.Short\n- reverseBytes(short)\n\nChange-Id: Ic8f8c4e7b584132e2282b4fd267453870fefbaaa\n" }, { "commit": "bb3d505c9fd5ef4e161510e23d601c643feb4c3d", "tree": "eb54c557467f1401c4bd5729fa2b9e8ae91e8ffd", "parents": [ "0d50412e4626b6183b72e7535da16a78500170ad" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 21 18:39:16 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 21 18:39:16 2015 +0100" }, "message": "MIPS64: No call if ArraySet does not need a type check\n\nThe MIPS64 back-end did not use the ArraySet::NeedsTypeCheck query to\ndecide whether to invoke runtime or not like the other back-ends do.\n\nChange-Id: Ie4ef9ee3ca97947256cd59983a2c1c3e3af58c83\n" }, { "commit": "9f0dece681c9531596ba2aab5a758b29d984fe36", "tree": "23d7eeed0b8b046a4a948c36065f6047506181e6", "parents": [ "d0d11f20811f260453f6dfe2e26d7dbd6ed55f01" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 21 18:20:26 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 21 18:20:26 2015 +0100" }, "message": "ART: Print short register names with MIPS64\n\nMIPS64 back-end would print register names as \"GpuRegister: X\" or\n\"FpuRegister: X\". Space separates Checker attributes and therefore\ncaused a test to fail. This patch changes it to print \"aX\" and \"fX\"\nrespectively.\n\nChange-Id: Iffae989f25563ef074dd7ef0b09cdfe438119cee\n" }, { "commit": "fe57faa2e0349418dda38e77ef1c0ac29db75f4d", "tree": "38ba7a406f8a86a1152bd6c9f2d0a6c677423211", "parents": [ "9e30c0e177adabaaf94a66c91130a19a7632fc7c" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri Sep 18 09:26:15 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Mon Sep 21 07:23:45 2015 -0400" }, "message": "[optimizing] Add basic PackedSwitch support\n\nAdd HPackedSwitch, and generate it from the builder. Code generators\nconvert this to a series of compare/branch tests. Better implementation\nin the code generators as a real jump table will follow as separate CLs.\n\nChange-Id: If14736fa4d62809b6ae95280148c55682e856911\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "85c7bab43d11180d552179c506c2ffdf34dd749c", "tree": "337976b69d3b2a35cc9f12284cda03c8eb2a58c7", "parents": [ "819a9c5638b6d6b579c89fe36df96acc1f378182" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Sep 18 13:40:46 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Sep 18 15:19:04 2015 +0100" }, "message": "Revert \"Revert \"Optimize code generation of check-cast and instance-of.\"\"\n\nThis reverts commit 7537437c6a2f89249a48e30effcc27d4e7c5a04f.\n\nChange-Id: If759cb08646e47b62829bebc3c5b1e2f2969cf84\n" }, { "commit": "6766eae2d91e894b4ceab9f29cc983900e7bc0c7", "tree": "4a3aac762e01c7933bcbffebb5277bde208e975b", "parents": [ "930761fb7a4db70fbd5e75faa1fca07e5b494ae9", "7537437c6a2f89249a48e30effcc27d4e7c5a04f" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 17 17:12:37 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Sep 17 17:12:37 2015 +0000" }, "message": "Merge \"Revert \"Optimize code generation of check-cast and instance-of.\"\"" }, { "commit": "7537437c6a2f89249a48e30effcc27d4e7c5a04f", "tree": "3f5f1d89f27d549cf40901f906ffab86bb05b520", "parents": [ "64acf303eaa2f32c0b1d8cfcbf044a822c5eec08" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 17 17:12:19 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 17 17:12:19 2015 +0000" }, "message": "Revert \"Optimize code generation of check-cast and instance-of.\"\n\nFailures with libcore tests.\n\nThis reverts commit 64acf303eaa2f32c0b1d8cfcbf044a822c5eec08.\n\nChange-Id: Ie6f323fcf5d86bae5c334c1352bb21f1bad60a88\n" }, { "commit": "a201d5eeb0903408df925a1ed1686a55238a274c", "tree": "d59b87e3c0bddb1d244199e9fbcc9301cb7dc52f", "parents": [ "271d30dd847fb72d78d3178b8b3b225192c2d1c0", "64acf303eaa2f32c0b1d8cfcbf044a822c5eec08" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 17 14:18:03 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Sep 17 14:18:03 2015 +0000" }, "message": "Merge \"Optimize code generation of check-cast and instance-of.\"" }, { "commit": "e6f49b47b6a4dc9c7684e4483757872cfc7ff1a1", "tree": "6a5f45136832f73138ced75fcd3c6110b74116ea", "parents": [ "23a8e35481face09183a24b9d11e505597c75ebb" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Sep 17 14:04:33 2015 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Sep 17 14:04:33 2015 +0000" }, "message": "Revert \"Support unresolved fields in optimizing\"\nbreaks debuggable tests.\n\nThis reverts commit 23a8e35481face09183a24b9d11e505597c75ebb.\n\nChange-Id: I8e60b5c8f48525975f25d19e5e8066c1c94bd2e5\n" }, { "commit": "64acf303eaa2f32c0b1d8cfcbf044a822c5eec08", "tree": "1e9829deb0621b3cb9b275846c8d08381956fecf", "parents": [ "017719a03c7c111a2069b5f85e3b9c81566c0902" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 14 22:20:29 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 17 14:45:39 2015 +0100" }, "message": "Optimize code generation of check-cast and instance-of.\n\nOn x86/x64/arm/arm64. Improve code size of selected apks from 0.3% to 1%,\nand performance of DeltaBlue by 20%.\n\nChange-Id: Ib5799f7a53443cd880a121dd7f21932ae9f5c7aa\n" }, { "commit": "23a8e35481face09183a24b9d11e505597c75ebb", "tree": "bcaafb6ea001349acbf160c2cc89334fab4a38dc", "parents": [ "175dc732c80e6f2afd83209348124df349290ba8" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Sep 08 19:56:31 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Sep 17 12:29:59 2015 +0100" }, "message": "Support unresolved fields in optimizing\n\nChange-Id: I9941fa5fcb6ef0a7a253c7a0b479a44a0210aad4\n" }, { "commit": "175dc732c80e6f2afd83209348124df349290ba8", "tree": "6a5f45136832f73138ced75fcd3c6110b74116ea", "parents": [ "5d01db1aa7634a012109d43e6403451b76de1daa" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Aug 25 15:42:32 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Sep 17 12:29:51 2015 +0100" }, "message": "Support unresolved methods in Optimizing\n\nChange-Id: If2da02b50d2fa668cd58f134a005f1752e7746b1\n" }, { "commit": "fe157012b6d760c275d944ff83e8bea371c59b09", "tree": "a2b013dded6e25cab1d3ff5abf09c426904e142c", "parents": [ "aef880c4b872ccf1a63a3c563cb056ae117fc9c8", "ecc4366670e12b4812ef1653f7c8d52234ca1b1f" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Sep 16 14:33:16 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Sep 16 14:33:16 2015 +0000" }, "message": "Merge \"Add OptimizingCompilerStats to the CodeGenerator class.\"" }, { "commit": "77a48ae01bbc5b05ca009cf09e2fcb53e4c8ff23", "tree": "780c7d6bdee784c2f8248979de348491cfb63b34", "parents": [ "659562aaf133c41b8d90ec9216c07646f0f14362" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Sep 15 12:34:04 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Sep 15 12:34:04 2015 +0000" }, "message": "Revert \"Revert \"ART: Register allocation and runtime support for try/catch\"\"\n\nThe original CL triggered b/24084144 which has been fixed\nby Ib72e12a018437c404e82f7ad414554c66a4c6f8c.\n\nThis reverts commit 659562aaf133c41b8d90ec9216c07646f0f14362.\n\nChange-Id: Id8980436172457d0fcb276349c4405f7c4110a55\n" }, { "commit": "659562aaf133c41b8d90ec9216c07646f0f14362", "tree": "be1beae390262bf2f5a17bfa44de93081a849d07", "parents": [ "b022fa1300e6d78639b3b910af0cf85c43df44bb" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 14 21:26:33 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 14 21:26:33 2015 +0000" }, "message": "Revert \"ART: Register allocation and runtime support for try/catch\"\n\nBreaks libcore test org.apache.harmony.security.tests.java.security.KeyStorePrivateKeyEntryTest#testGetCertificateChain. Need to investigate.\n\nThis reverts commit b022fa1300e6d78639b3b910af0cf85c43df44bb.\n\nChange-Id: Ib24d3a80064d963d273e557a93469c95f37b1f6f\n" }, { "commit": "b022fa1300e6d78639b3b910af0cf85c43df44bb", "tree": "780c7d6bdee784c2f8248979de348491cfb63b34", "parents": [ "e481c006e8b055a31d9c7cff27f4145e57e3c113" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Aug 20 17:47:48 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 14 20:42:58 2015 +0100" }, "message": "ART: Register allocation and runtime support for try/catch\n\nThis patch completes a series of CLs that add support for try/catch\nin the Optimizing compiler. With it, Optimizing can compile all\nmethods containing try/catch, provided they don\u0027t contain catch loops.\nFuture work will focus on improving performance of the generated code.\n\nSsaLivenessAnalysis was updated to propagate liveness information of\ninstructions live at catch blocks, and to keep location information on\ninstructions which may be caught by catch phis.\n\nRegisterAllocator was extended to spill values used after catch, and\nto allocate spill slots for catch phis. Catch phis generated for the\nsame vreg share a spill slot as the raw value must be the same.\n\nLocation builders and slow paths were updated to reflect the fact that\nthrowing an exception may not lead to escaping the method.\n\nInstruction code generators are forbidden from using of implicit null\nchecks in try blocks as live registers need to be saved before handing\nover to the runtime.\n\nCodeGenerator emits a stack map for each catch block, storing locations\nof catch phis. CodeInfo and StackMapStream recognize this new type of\nstack map and store them separate from other stack maps to avoid dex_pc\nconflicts.\n\nAfter having found the target catch block to deliver an exception to,\nQuickExceptionHandler looks up the dex register maps at the throwing\ninstruction and the catch block and copies the values over to their\nrespective locations.\n\nThe runtime-support approach was selected because it allows for the\nbest performance in the normal control-flow path, since no propagation\nof catch phi values is necessary until the exception is thrown. In\naddition, it also greatly simplifies the register allocation phase.\n\nConstantHoisting was removed from LICMTest because it instantiated\n(now abstract) HConstant and was bogus anyway (constants are always in\nthe entry block).\n\nChange-Id: Ie31038ad8e3ee0c13a5bbbbaf5f0b3e532310e4e\n" }, { "commit": "957fb8930766ae422568e7b1b816159a9e9bc18c", "tree": "849a611f978656f1c85182402e1ef2c8ca50c5e6", "parents": [ "68ffda887e35f35e978f2f607b7a91e44a5e1969", "05792b98980741111b4d0a24d68cff2a8e070a3a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Sep 04 10:34:04 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Sep 04 10:34:04 2015 +0000" }, "message": "Merge \"ART: Move DexCache arrays to native.\"" }, { "commit": "05792b98980741111b4d0a24d68cff2a8e070a3a", "tree": "bad79a387bcbdaefc87c07b388099960ca9caff3", "parents": [ "c26b4512a01d46756683a4f5e186a0b7f397f251" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Aug 03 11:56:49 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 03 17:30:57 2015 +0100" }, "message": "ART: Move DexCache arrays to native.\n\nThis CL has a companion CL in libcore/\n https://android-review.googlesource.com/162985\n\nChange-Id: Icbc9e20ad1b565e603195b12714762bb446515fa\n" }, { "commit": "5a6cc49ed4f36dd11d6ec1590857b884ad8da6ab", "tree": "68f373808011cca47abf3bf09f5de6d8c9bca4b4", "parents": [ "75d4e58decf3f0be8814039df57456368e4d5475" ], "author": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Thu Aug 13 15:20:25 2015 +0100" }, "committer": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Thu Aug 27 18:21:03 2015 +0100" }, "message": "SlowPath: Remove the use of Locations in the SlowPath constructors.\n\nThe main motivation is that using locations in the SlowPath constructors\nties us to creating the SlowPaths after register allocation, since before\nthe locations are invalid.\n\nA later patch of the series will be moving the SlowPath creation to the\nLocationsBuilder visitors. This will enable us to add more checking as\nwell as consider sharing multiple SlowPaths of the same type.\n\nChange-Id: I7e96dcc2b5586d15153c942373e9281ecfe013f0\nSigned-off-by: Serban Constantinescu \u003cserban.constantinescu@linaro.org\u003e\n" }, { "commit": "ecc4366670e12b4812ef1653f7c8d52234ca1b1f", "tree": "fe7be52b1025b8122547b34d8765248d5959cd3a", "parents": [ "772cc4a2d4f978888d1b1e5a78c1c16a108260ed" ], "author": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Thu Aug 13 13:33:12 2015 +0100" }, "committer": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Thu Aug 27 15:28:25 2015 +0100" }, "message": "Add OptimizingCompilerStats to the CodeGenerator class.\n\nJust refactoring, not yet used, but will be used by the incoming patch\nseries and future CodeGen specific stats.\n\nChange-Id: I7d20489907b82678120518a77bdab9c4cc58f937\nSigned-off-by: Serban Constantinescu \u003cserban.constantinescu@linaro.org\u003e\n" }, { "commit": "581550137ee3a068a14224870e71aeee924a0646", "tree": "f62dd0d07c66a8ce4d7d994ee0e9c27bd8014bb1", "parents": [ "32f264e67afa8654a5570d38b627515fb73fc333" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 12:49:41 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 18:54:36 2015 +0100" }, "message": "Revert \"Revert \"Optimizing: Better invoke-static/-direct dispatch.\"\"\n\nFixed kCallArtMethod to use correct callee location for\nkRecursive. This combination is used when compiling with\ndebuggable flag set.\n\nThis reverts commit b2c431e80e92eb6437788cc544cee6c88c3156df.\n\nChange-Id: Idee0f2a794199ebdf24892c60f8a5dcf057db01c\n" }, { "commit": "b2c431e80e92eb6437788cc544cee6c88c3156df", "tree": "6c0ac5f843845e4b09829eb0fd9f1b3013cf4494", "parents": [ "9b688a095afbae21112df5d495487ac5231b12d0" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 12:45:42 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 12:45:42 2015 +0000" }, "message": "Revert \"Optimizing: Better invoke-static/-direct dispatch.\"\n\nReverting due to failing ndebug tests.\n\nThis reverts commit 9b688a095afbae21112df5d495487ac5231b12d0.\n\nChange-Id: Ie4f69da6609df3b7c8443412b6cf7f5c43c2c5d9\n" }, { "commit": "9b688a095afbae21112df5d495487ac5231b12d0", "tree": "e5e881d4d124803e66f1e90c1e0a0e4c90d22e13", "parents": [ "009c34cba875885d9540696f33255a9b355d6e15" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 06 14:12:42 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 12:23:37 2015 +0100" }, "message": "Optimizing: Better invoke-static/-direct dispatch.\n\nAdd framework for different types of loading ArtMethod*\nand code pointer retrieval. Implement invoke-static and\ninvoke-direct calls the same way as Quick. Document the\ndispatch kinds in HInvokeStaticOrDirect\u0027s new enumerations\nMethodLoadKind and CodePtrLocation.\n\nPC-relative loads from dex cache arrays are used only for\nx86-64 and arm64. The implementation for other architectures\nwill be done in separate CLs.\n\nChange-Id: I468ca4d422dbd14748e1ba6b45289f0d31734d94\n" }, { "commit": "7c2af0d873b7033adccf8fa7adf259166c53d369", "tree": "ec1a3cffa19b1131abcdd3e64541a14e9bcc4b86", "parents": [ "1d4219ee25dfb228cc72f353d97be69584fc0722", "3887c468d731420e929e6ad3acf190d5431e94fc" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Aug 13 11:00:54 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Aug 13 11:00:54 2015 +0000" }, "message": "Merge \"Remove unnecessary `explicit` qualifiers on constructors.\"" }, { "commit": "3887c468d731420e929e6ad3acf190d5431e94fc", "tree": "67dacb849e722e33e118b97714a48e467c06cbd5", "parents": [ "6a5037eb3340e4c981fd7de3ff45167ee5b7fc82" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Aug 12 18:15:42 2015 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Aug 12 18:15:42 2015 +0100" }, "message": "Remove unnecessary `explicit` qualifiers on constructors.\n\nChange-Id: Id12e392ad50f66a6e2251a68662b7959315dc567\n" }, { "commit": "78e3ef6bc5f8aa149f2f8bf0c78ce854c2f910fa", "tree": "b8aa83bef462e20e2e7e09650e6c15d3a8d97fa6", "parents": [ "6a5037eb3340e4c981fd7de3ff45167ee5b7fc82" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Wed Aug 12 13:43:29 2015 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Wed Aug 12 13:43:29 2015 +0100" }, "message": "Add a GVN dependency \u0027GC\u0027 for garbage collection.\n\nThis will be used by incoming architecture specific optimizations. The\ndependencies must be conservative. When an HInstruction is created we\nmay not be sure whether it can trigger GC. In that case the\n\u0027ChangesGC\u0027 dependency must be set. We control at code-generation time\nthat HInstructions that can call have the \u0027ChangesGC\u0027 dependency\nset.\n\nChange-Id: Iea6a7f430009f37a9599b0a0039207049906e45d\n" }, { "commit": "423f150e5c17b5f4cd16259565b61c57f5f19477", "tree": "f30a2ea82c56175870c11a39949cf6a38aa36617", "parents": [ "f24576a7233ec708d49badb239cd7336c2b0f07e", "8c0676ce786f33b8f9c8eedf1ace48988c750932" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Aug 11 14:25:45 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Aug 11 14:25:45 2015 +0000" }, "message": "Merge \"ART-Optimizing: Fix the type of HDivZeroCheck\"" }, { "commit": "8c0676ce786f33b8f9c8eedf1ace48988c750932", "tree": "024674305019f6e5b47a7aa044c47c87c1d4abaf", "parents": [ "1f3f766d3b365d01f36b85dc19d40f754fa48533" ], "author": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Mon Aug 03 13:55:33 2015 +0600" }, "committer": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Tue Aug 11 18:12:02 2015 +0600" }, "message": "ART-Optimizing: Fix the type of HDivZeroCheck\n\nHDivZeroCheck is created during the building CFG and at this moment\nits type is not known completely. So it sets the type to int or long.\nHowever, later SSA builder can insert the type conversion and type\nof input of HDivZeroCheck can become byte or short while the type\nof HDivZeroCheck remains the same.\n\nIn reality the type of HDivZeroCheck should be always equal to\nits input parameter.\nTo fix this inconsistency we return the type of HDivZeroCheck as its\ninput type. Code generators are updated accordingly.\n\nChange-Id: I6a5aedc8d479cfc6328704e7ddf252bca830076b\nSigned-off-by: Serguei Katkov \u003cserguei.i.katkov@intel.com\u003e\n" }, { "commit": "8158f28b6689314213eb4dbbe14166073be71f7e", "tree": "fced445e53f639b2db42cb5a0e96d5aa04750861", "parents": [ "33407564904d2186f536107e1ca8d88f2c760c83" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Fri Aug 07 10:26:17 2015 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Fri Aug 07 10:26:17 2015 +0100" }, "message": "Ensure coherency of call kinds for LocationSummary.\n\nThe coherency is enforced with checks added in the `InvokeRuntime`\nhelper, that we now also use on x86 and x86_64.\n\nChange-Id: I8cb92b042f25dc3c5fd390e9c61a45b477d081f4\n" }, { "commit": "cb1c0557033065f2436ee79e7fa6c19d87064801", "tree": "741b623b2e370a133b5cef9feed2542151186db6", "parents": [ "e238414eee3ec933a4ceb1894666c9ef331ace0c" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Aug 04 16:22:25 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Aug 04 16:39:38 2015 +0100" }, "message": "ART: Move exception clearing into own instruction\n\nRuntime delivers exceptions only to catch blocks which begin with a\nMOVE_EXCEPTION instruction (in DEX). In that case, the catch block is\nexpected to clear the thread-local exception storage after having\nread the exception reference.\n\nThis patch changes Optimizing to represent MOVE_EXCEPTION with two\ninstructions - HLoadException and HClearException - instead of one.\nIf the exception reference is not used, HLoadException can be safely\nremoved, saving a memory load without breaking the runtime behaviour.\n\nChange-Id: Idad8a714467bf9d9d5fccefbc43c0bd8ae13ddba\n" }, { "commit": "2e7cd752452d02499a2f5fbd604c5427aa372f00", "tree": "505527250317827f56378f4b786534793ccfbb61", "parents": [ "f16b820fc18ff86e765a14176f05417305d689a0" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jul 10 11:38:52 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jul 10 18:21:13 2015 +0100" }, "message": "[optimizing] Don\u0027t rely on the verifier for String.\u003cinit\u003e.\n\nContinue work on cutting the dependency on the verifier.\n\nChange-Id: I0f95b1eb2e10fd8f6bf54817f1202bdf6dfdb0fe\n" }, { "commit": "fc6a86ab2b70781e72b807c1798b83829ca7f931", "tree": "90201491e811cf7be0e0469d7a06a828f4384cad", "parents": [ "d3eaade87ac079accca30473ef0a3b38ab600828" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jun 26 10:33:45 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jun 26 13:49:50 2015 +0100" }, "message": "Revert \"Revert \"ART: Implement try/catch blocks in Builder\"\"\n\nThis patch enables the GraphBuilder to generate blocks and edges which\nrepresent the exceptional control flow when try/catch blocks are\npresent in the code. Actual compilation is still delegated to Quick\nand Baseline ignores the additional code.\n\nTo represent the relationship between try and catch blocks, Builder\nsplits the edges which enter/exit a try block and links the newly\ncreated blocks to the corresponding exception handlers. This layout\nwill later enable the SsaBuilder to correctly infer the dominators of\nthe catch blocks and to produce the appropriate reverse post ordering.\nIt will not, however, allow for building the complete SSA form of the\ncatch blocks and consequently optimizing such blocks.\n\nTo this end, a new TryBoundary control-flow instruction is introduced.\nCodegen treats it the same as a Goto but it allows for additional\nsuccessors (the handlers).\n\nThis reverts commit 3e18738bd338e9f8363b26bc895f38c0ec682824.\n\nChange-Id: I4f5ea961848a0b83d8db3673763861633e9bfcfb\n" }, { "commit": "3e18738bd338e9f8363b26bc895f38c0ec682824", "tree": "708013ef06cfb524f040b2b5c494f7f3cb84ac2c", "parents": [ "0b5c7d1994b76090afcc825e737f2b8c546da2f8" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jun 26 09:59:52 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jun 26 09:59:52 2015 +0000" }, "message": "Revert \"ART: Implement try/catch blocks in Builder\"\n\nCauses OutOfMemory issues, need to investigate.\n\nThis reverts commit 0b5c7d1994b76090afcc825e737f2b8c546da2f8.\n\nChange-Id: I263e6cc4df5f9a56ad2ce44e18932ca51d7e349f\n" }, { "commit": "0b5c7d1994b76090afcc825e737f2b8c546da2f8", "tree": "057eddf8830b1991f02af3c3ce1b63dee90dd2ad", "parents": [ "1dd3136d9f6b1c7d551897a2d96c8314e40f7324" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jun 11 11:17:49 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jun 25 16:58:08 2015 +0100" }, "message": "ART: Implement try/catch blocks in Builder\n\nThis patch enables the GraphBuilder to generate blocks and edges which\nrepresent the exceptional control flow when try/catch blocks are\npresent in the code. Actual compilation is still delegated to Quick\nand Baseline ignores the additional code.\n\nTo represent the relationship between try and catch blocks, Builder\nsplits the edges which enter/exit a try block and links the newly\ncreated blocks to the corresponding exception handlers. This layout\nwill later enable the SsaBuilder to correctly infer the dominators of\nthe catch blocks and to produce the appropriate reverse post ordering.\nIt will not, however, allow for building the complete SSA form of the\ncatch blocks and consequently optimizing such blocks.\n\nTo this end, a new TryBoundary control-flow instruction is introduced.\nCodegen treats it the same as a Goto but it allows for additional\nsuccessors (the handlers).\n\nChange-Id: I415b985596d5bebb7b1bb358a46e08b7b04bb53a\n" } ], "next": "46648896b9ff3640a9b7ec742ec63957c412eab3" }