)]}'
{
  "log": [
    {
      "commit": "28a2ff0bd6c30549f3f6465d8316f5707b1d072f",
      "tree": "4d181bd254584f78cf1f3d81d3acb23d6f2f8b3d",
      "parents": [
        "c8f1df9965ca7f97ba9e6289f8c7a717765a59a9"
      ],
      "author": {
        "name": "Mathieu Chartier",
        "email": "mathieuc@google.com",
        "time": "Thu Jan 21 18:21:59 2016 +0000"
      },
      "committer": {
        "name": "Mathieu Chartier",
        "email": "mathieuc@google.com",
        "time": "Thu Jan 21 18:21:59 2016 +0000"
      },
      "message": "Revert \"ARM64 Baker\u0027s read barrier fast path implementation.\"\n\nThis reverts commit c8f1df9965ca7f97ba9e6289f8c7a717765a59a9.\n\nThis breaks master.\n\nChange-Id: Ic07f602af8732e2835bd11f65e3b9e766d3349c7\n"
    },
    {
      "commit": "c8f1df9965ca7f97ba9e6289f8c7a717765a59a9",
      "tree": "7c04fd5601293cc251651ce2df2dfd2416737a1c",
      "parents": [
        "fef7aabd582ae0237a44947c5e0b24cb63e395f0"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Jan 20 16:38:05 2016 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Jan 20 16:38:05 2016 +0000"
      },
      "message": "ARM64 Baker\u0027s read barrier fast path implementation.\n\nIntroduce an ARM64 fast path implementation in Optimizing\nfor Baker\u0027s read barriers (for both heap reference loads and\nGC root loads).  The marking phase of the read barrier is\nperformed by a slow path, invoking the runtime entry point\nartReadBarrierMark.\n\nOther read barrier algorithms continue to use the original\nslow path based implementation, which has been renamed as\nGenerateReadBarrierSlow/GenerateReadBarrierForRootSlow.\n\nBug: 12687968\nBug: 26601270\nChange-Id: I60da15249b58a8ee1a065ed9be2c4e438ee17150\n"
    },
    {
      "commit": "955d24c4221aa514067dc13d8a40c8b5071f467d",
      "tree": "67a527b7e8360579d233ece14b1bb6718b39777a",
      "parents": [
        "ae9f99e2973edd24302b893d109224e8b05dbdf6",
        "58282f4510961317b8d5a364a6f740a78926716f"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Jan 18 17:13:14 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon Jan 18 17:13:14 2016 +0000"
      },
      "message": "Merge \"ART: Remove Baseline compiler\""
    },
    {
      "commit": "58282f4510961317b8d5a364a6f740a78926716f",
      "tree": "5d97c0db9fe01dd6e8df2357ef11f614abb853e8",
      "parents": [
        "b8bb9f6d0b59be125066f604f134155f8998f5ae"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Jan 14 12:45:10 2016 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Jan 18 16:39:30 2016 +0000"
      },
      "message": "ART: Remove Baseline compiler\n\nWe don\u0027t need Baseline any more and it hasn\u0027t been maintained for\na while anyway. Let\u0027s remove it.\n\nChange-Id: I442ed26855527be2df3c79935403a25b1ee55df6\n"
    },
    {
      "commit": "ae9f99e2973edd24302b893d109224e8b05dbdf6",
      "tree": "5296d16855e2da599ce3b0e6e80f3f17acc117a5",
      "parents": [
        "9a85f58cd380d8ad35c481576fa55a9b04917f4e",
        "d6e069b16a7d4964e546daf3d340ea11756ab090"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Jan 18 16:31:07 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon Jan 18 16:31:07 2016 +0000"
      },
      "message": "Merge \"Optimizing: Improve floating point comparisons on arm and arm64.\""
    },
    {
      "commit": "7c0f2e55456c39f92f0136844ebf17b2bbcf9a97",
      "tree": "70cceb1203e173bb594667872b91b60d2e14311c",
      "parents": [
        "7d6872a2471a20a10fc99b02459db89a5fc2dc1d"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 18 15:24:53 2016 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 18 15:39:39 2016 +0000"
      },
      "message": "Do HFieldGet first to avoid explicit null check.\n\nChange-Id: If22f85d502e1dce428f8d341fcb64e27a886fb89\n"
    },
    {
      "commit": "d6e069b16a7d4964e546daf3d340ea11756ab090",
      "tree": "3b6509b03527e2cb0d9135bdccb02ddf9ea00cd8",
      "parents": [
        "b8bb9f6d0b59be125066f604f134155f8998f5ae"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Jan 18 11:11:01 2016 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Jan 18 13:16:48 2016 +0000"
      },
      "message": "Optimizing: Improve floating point comparisons on arm and arm64.\n\nAvoid the extra check for unordered inputs by using the\nappropriate arm/arm64 condition.\n\nChange-Id: Ib5e775a90428db7a2cf377ad9fd6a3192d670617\n"
    },
    {
      "commit": "c903b6af634927479915eaa9516d493eea23f911",
      "tree": "d14d0e2f323516ffac38baba7be4dce320fd772b",
      "parents": [
        "b8bb9f6d0b59be125066f604f134155f8998f5ae"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 18 12:56:06 2016 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 18 12:56:06 2016 +0000"
      },
      "message": "Move --dump-cfg and dump-cfg-append to CompilerOptions.\n\nIt simplifies passing the option to the JIT.\n\nChange-Id: Iee1b722362899e5809ef97be90961e3dda1e16cc\n"
    },
    {
      "commit": "cd3d0fb5a4c113cfdb610454d133762a2ab0e6de",
      "tree": "482d31703326300fd8c53a2ebbfe6dbf58a74448",
      "parents": [
        "8c8e997d29fadaa9bfb4007e95a8cd6cb76d6e80"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Jan 15 19:26:48 2016 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Sun Jan 17 11:58:18 2016 +0000"
      },
      "message": "Do not use HArm64IntermediateAddress with read barriers.\n\nThis ARM64 instruction simplification does not yet work\ncorrectly with the read barrier compiler instrumentation.\n\nBug: 26601270\nBug: 12687968\nChange-Id: I0c3c5d0043ebd936e00984740efbae8b3025c7ca\n"
    },
    {
      "commit": "28943466954ca5d6f586bb5496f7f3f0f85fe87a",
      "tree": "56a4f7427addf50aba847ea944ec24396c7e848f",
      "parents": [
        "68c56ae9ccdb6e348501456e374ae65e74f6270c",
        "6de1938e562b0d06e462512dd806166e754035ea"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Fri Jan 15 09:19:12 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Fri Jan 15 09:19:12 2016 +0000"
      },
      "message": "Merge \"ART: Remove incorrect HFakeString optimization\""
    },
    {
      "commit": "947cb4f5582d1f57270b48d3c47ea95e7f9085b5",
      "tree": "6f6aed8f8cca3177b06521a8db6ca845d18623ad",
      "parents": [
        "7b4199a5fa9f151fbf3af2a34f26d04215a1016c",
        "15bd22849ee6a1ffb3fb3630f686c2870bdf1bbc"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jan 14 21:25:16 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Thu Jan 14 21:25:16 2016 +0000"
      },
      "message": "Merge \"Implement irreducible loop support in optimizing.\""
    },
    {
      "commit": "15db4dcfcc17dfe6c41d3c7b26355ccfa2504f4e",
      "tree": "f3a03a66775378c0ea0e4d0dfeb64dacb42ae899",
      "parents": [
        "be55805f72329732fefeca72c596452912ab6722",
        "780aeced2a8ef918901d8f450864de934f79c555"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Thu Jan 14 18:29:57 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Thu Jan 14 18:29:57 2016 +0000"
      },
      "message": "Merge \"Update `ValidateInvokeRuntime()` and HDivZeroCheck.\""
    },
    {
      "commit": "6de1938e562b0d06e462512dd806166e754035ea",
      "tree": "f9df086a73860c20768d17ff7bc5be4139567941",
      "parents": [
        "f5b84ee14a3bc578f799a39dca1ae512b49356ea"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Fri Jan 08 17:37:10 2016 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Jan 14 16:22:13 2016 +0000"
      },
      "message": "ART: Remove incorrect HFakeString optimization\n\nSimplification of HFakeString assumes that it cannot be used until\nString.\u003cinit\u003e is called which is not true and causes different\nbehaviour between the compiler and the interpreter. This patch\nremoves the optimization together with the HFakeString instruction.\n\nInstead, HNewInstance is generated and an empty String allocated\nuntil it is replaced with the result of the StringFactory call. This\nis consistent with the behaviour of the interpreter but is too\nconservative. A follow-up CL will attempt to optimize out the initial\nallocation when possible.\n\nBug: 26457745\nBug: 26486014\n\nChange-Id: I7139e37ed00a880715bfc234896a930fde670c44\n"
    },
    {
      "commit": "15bd22849ee6a1ffb3fb3630f686c2870bdf1bbc",
      "tree": "a261601589163faa4538bcf1c9d156e8ec4a42b3",
      "parents": [
        "5b7b5ddb515828c93f0c2aec67aa513c32d0de22"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Jan 05 15:55:41 2016 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jan 14 15:00:20 2016 +0000"
      },
      "message": "Implement irreducible loop support in optimizing.\n\nSo we don\u0027t fallback to the interpreter in the presence of\nirreducible loops.\n\nImplications:\n- A loop pre-header does not necessarily dominate a loop header.\n- Non-constant redundant phis will be kept in loop headers, to\n  satisfy our linear scan register allocation algorithm.\n- while-graph optimizations, such as gvn, licm, lse, and dce\n  need to know when they are dealing with irreducible loops.\n\nChange-Id: I2cea8934ce0b40162d215353497c7f77d6c9137e\n"
    },
    {
      "commit": "8422edd7af342a955f17639ab827cf062ef8965e",
      "tree": "8687cc87bcf04f3d00f4e68fa9a758d99afbc6cb",
      "parents": [
        "f50d7ea29eda80fd405de7f665ea15eafde3dff5",
        "bb9863af3a98622e650de78fb235ab484b50eb1f"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Thu Jan 14 13:09:10 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Thu Jan 14 13:09:10 2016 +0000"
      },
      "message": "Merge \"MIPS32: don\u0027t use R2+ instructions (mthc1, mfhc1) on MIPS32R1 or with 32-bit FPUs.\""
    },
    {
      "commit": "da88e5734f23d7bf215c7fd34c478225d450a530",
      "tree": "054a508b49af1ce54b9696419cbdd1e5b15b1ce1",
      "parents": [
        "26751735568224bddd07eeb9218560833c3f4ee1",
        "012fc4e9d9b66b3ffb7838b0e29dadbb4863ee69"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jan 14 12:22:39 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Thu Jan 14 12:22:39 2016 +0000"
      },
      "message": "Merge \"Don\u0027t encode a DexRegisterMap if there is no live register.\""
    },
    {
      "commit": "8e6b237031eef38e79c844904c3253bb0aa4c132",
      "tree": "196b074a373aa9cc718f1fa50462f116ed998d0b",
      "parents": [
        "4b45bb98a3f06827cb14217e5b968cefd31ae9ca",
        "baf60b7cceb3968ae36540e2f7f92cec3805f6ed"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Thu Jan 14 12:01:59 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Thu Jan 14 12:01:59 2016 +0000"
      },
      "message": "Merge \"MIPS: Improve conversion between ints and floats.\""
    },
    {
      "commit": "bb9863af3a98622e650de78fb235ab484b50eb1f",
      "tree": "3df79ba309964d56867d23e497322f2a5f3bbeb8",
      "parents": [
        "08d3ab591d98fce33b7ab552a10cec04aaff6ce1"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Mon Jan 11 15:51:16 2016 -0800"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Wed Jan 13 22:47:21 2016 -0800"
      },
      "message": "MIPS32: don\u0027t use R2+ instructions (mthc1, mfhc1) on MIPS32R1 or\nwith 32-bit FPUs.\n\nChange-Id: If66932fb39cdd5946f6c05c82036191ad405a877\n"
    },
    {
      "commit": "baf60b7cceb3968ae36540e2f7f92cec3805f6ed",
      "tree": "97170e2b5ad9439e4d94fb1d86c5b1382ddba0be",
      "parents": [
        "08d3ab591d98fce33b7ab552a10cec04aaff6ce1"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Tue Dec 22 15:15:03 2015 -0800"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Wed Jan 13 17:43:42 2016 -0800"
      },
      "message": "MIPS: Improve conversion between ints and floats.\n\nChange-Id: I767fe9623cc14e8480c31e305725eb5221cac282\n"
    },
    {
      "commit": "0d9150b80fbae08dff6431b693de2e4e7b9697d8",
      "tree": "2b25b645493f489c4ffb6c94a123897ce9e38ab2",
      "parents": [
        "08d3ab591d98fce33b7ab552a10cec04aaff6ce1"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Wed Jan 13 16:24:25 2016 -0800"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Wed Jan 13 16:25:51 2016 -0800"
      },
      "message": "MIPS: HRor clean-up\n\nThis is a follow up to\nhttps://android-review.googlesource.com/#/c/194590/.\n\nChange-Id: Ia37faa02736e5dd54c1e71fd2a4d94e074746757\n"
    },
    {
      "commit": "08d3ab591d98fce33b7ab552a10cec04aaff6ce1",
      "tree": "37f0ff62c0dbdfb95a800031d3b9e6f51235309d",
      "parents": [
        "f96c43eaa72f4ead472f4a97f13622e17a29e8f6",
        "55b14df87d8e14c0e3cd1aef4c60ea83e9f19f1a"
      ],
      "author": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Wed Jan 13 20:53:18 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Jan 13 20:53:18 2016 +0000"
      },
      "message": "Merge \"Fixed bug with hoisting/deopting in taken-block instead of preheader. With a fail-before pass-after regression test.\""
    },
    {
      "commit": "f96c43eaa72f4ead472f4a97f13622e17a29e8f6",
      "tree": "ad5e7d69eee8db1c53ddc9743dd27dceb6159a73",
      "parents": [
        "dae9fd594864074de041ee7edea34d4a3e9e6463",
        "42249c3602c3d0243396ee3627ffb5906aa77c1e"
      ],
      "author": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Wed Jan 13 19:15:15 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Jan 13 19:15:15 2016 +0000"
      },
      "message": "Merge \"Reduce code size by sharing slow paths.\""
    },
    {
      "commit": "55b14df87d8e14c0e3cd1aef4c60ea83e9f19f1a",
      "tree": "95be3d62c4c469f01af14c061ecc206f4cfa32c4",
      "parents": [
        "f8011ede664afca36a2be611c8f0cc8c0e3342df"
      ],
      "author": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Tue Jan 12 14:12:47 2016 -0800"
      },
      "committer": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Wed Jan 13 10:31:39 2016 -0800"
      },
      "message": "Fixed bug with hoisting/deopting in taken-block instead of preheader.\nWith a fail-before pass-after regression test.\n\nRationale:\nHoisting and deopting should be done in the taken-block for safety\nof the evaluation *unless* the code was in the original loop header,\nand thus always taken.\n\nhttps://code.google.com/p/android/issues/detail?id\u003d198697\n\nbug: 26506884\n\nChange-Id: I1cf121292559fd2570ad67587ec3bc8e8a85a92a\n"
    },
    {
      "commit": "86e4278d5edc3685465b8846dcb17efa83c86d75",
      "tree": "53c9af36418ed8872be46271a86a481075e78854",
      "parents": [
        "b8a20aafa13d59112dcbf1df858b8d1d61cfb708"
      ],
      "author": {
        "name": "Tamas Berghammer",
        "email": "tberghammer@google.com",
        "time": "Tue Jan 05 14:29:02 2016 +0000"
      },
      "committer": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Wed Jan 13 15:56:52 2016 +0000"
      },
      "message": "Add DWARF type information generation.\n\nEmit native debugging information for types which are used during\ncompilation.\n\nChange-Id: If28d19f60294494b7c6db8400d179494bebe9e61\n"
    },
    {
      "commit": "5cc349f3dd578e974f78314c50b6a0267c23e591",
      "tree": "7d8bf706fd6aba6f298bfe212f75db0f66e94b81",
      "parents": [
        "a38e418fb2d9b817309c54b54ca85039907c2bbb"
      ],
      "author": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Fri Dec 18 15:04:48 2015 +0000"
      },
      "committer": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Wed Jan 13 15:39:12 2016 +0000"
      },
      "message": "Report DWARF debug information for JITed code.\n\nChange-Id: Ia5b2133c54386932c76c22774cf3d2ae61e0925f\n"
    },
    {
      "commit": "780aeced2a8ef918901d8f450864de934f79c555",
      "tree": "0e91880137f2a5cffad2ead46d1b917bd523ae47",
      "parents": [
        "a38e418fb2d9b817309c54b54ca85039907c2bbb"
      ],
      "author": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@linaro.org",
        "time": "Wed Jan 13 14:34:39 2016 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 13 15:00:44 2016 +0000"
      },
      "message": "Update `ValidateInvokeRuntime()` and HDivZeroCheck.\n\nChange-Id: I35beab2777a8c83bd508d56966afa1ceff9ee24f\n"
    },
    {
      "commit": "1cde05849f2057b11e3a149144a1d02245d22060",
      "tree": "6ee7b558c082124c5fb45048e33ae18b8c13d790",
      "parents": [
        "185be57ccf1ffe059fc7a0d5acca81446b732411"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 13 13:56:20 2016 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 13 13:56:20 2016 +0000"
      },
      "message": "HDeoptimize can also trigger GC.\n\nbug:26532563\nChange-Id: Idaa294fb500ab820c7b45e37747e96f0b455f663\n"
    },
    {
      "commit": "185be57ccf1ffe059fc7a0d5acca81446b732411",
      "tree": "bff811b2a1dd83fbd175bb5f0a787a949835c075",
      "parents": [
        "5e0f5fc429331102d1a602a726af2ed6ee3bae01",
        "4bedb3845ac33c95cb779987abd4e76a88b19989"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Jan 13 13:24:59 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Jan 13 13:24:59 2016 +0000"
      },
      "message": "Merge \"Fix memory fences in the ARM64 UnsafeCas intrinsics.\""
    },
    {
      "commit": "bb3a8bd9d204f0a7cd6f8c491e9ed028219a203e",
      "tree": "9981b088f62ca69a27c10012ba0d196cf32953c0",
      "parents": [
        "67fcbd4f0c32ec1de3cd248d411f0c2a6ba52e4b",
        "1af564e2d3b560fb9a076eb35ea20471aed0dc92"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 13 12:39:41 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Jan 13 12:39:41 2016 +0000"
      },
      "message": "Merge \"Set side effects to HNullCheck and HBoundsCheck.\""
    },
    {
      "commit": "1af564e2d3b560fb9a076eb35ea20471aed0dc92",
      "tree": "1a369a546a6319fd866c241d5c92f3a241d314af",
      "parents": [
        "922698ded1e80cad1ecce4c2172a88c76a216373"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 13 12:09:39 2016 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 13 12:38:52 2016 +0000"
      },
      "message": "Set side effects to HNullCheck and HBoundsCheck.\n\nBoth can trigger GC, as they will call NullPointerException or\nIndexOutOfBoundsException constructors.\n\nbug:26532563\nChange-Id: Id9e42f0450caaaf365630989e1b36e98add46c89\n"
    },
    {
      "commit": "67fcbd4f0c32ec1de3cd248d411f0c2a6ba52e4b",
      "tree": "b971f33b38769553f8d19557776a9f26e868c327",
      "parents": [
        "922698ded1e80cad1ecce4c2172a88c76a216373",
        "92d9060c0cdff7c726549a9d9494e5655404bed7"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Jan 13 10:39:05 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Jan 13 10:39:05 2016 +0000"
      },
      "message": "Merge \"MIPS: Implement HRor\""
    },
    {
      "commit": "42249c3602c3d0243396ee3627ffb5906aa77c1e",
      "tree": "1e822a21c87331246cbde3923eac88fa315fa2cc",
      "parents": [
        "922698ded1e80cad1ecce4c2172a88c76a216373"
      ],
      "author": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Thu Jan 07 15:33:50 2016 -0800"
      },
      "committer": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Tue Jan 12 16:39:20 2016 -0800"
      },
      "message": "Reduce code size by sharing slow paths.\n\nRationale:\nSharing identical slow path code reduces code size.\n\nBackground:\nCurrently, slow paths with the same dex-pc, same physical register\nspilling code, and identical stack maps are shared (making this\nonly useful for deopt slow paths). The newly introduced mechanism\nis sufficiently general to allow future improvements by e.g.\nallowing different dex-pc (by passing this to runtime) or even\nthe kind of slow paths (by passing runtime addresses to the slowpath).\n\nChange-Id: I819615c47b4fd98440a241f681f93e4fc22d12e0\n"
    },
    {
      "commit": "a3eca2d7300f35c66cf4b696d788a8b7ba74eb99",
      "tree": "18ea775d51bfc71d90407bd801e8b56fb5309868",
      "parents": [
        "3da15f8b1097905e06a59149c3a4a9658cbb7d5e"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Jan 12 16:03:16 2016 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Jan 12 16:05:38 2016 +0000"
      },
      "message": "Do not leave intermediate addresses across Java calls.\n\nbug:26472446\nChange-Id: Ie4a9b5fe6f1d61a76c71eceaa2299fe55512c612\n"
    },
    {
      "commit": "3da15f8b1097905e06a59149c3a4a9658cbb7d5e",
      "tree": "1c572d200ee0382b33d33e038b5b228b16c198c0",
      "parents": [
        "a21489e7fa07722d340f69a12921cd7aa9ee4a17",
        "ac6ac10a0801fa6eb95e0ab0c72b2ed562210b34"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Jan 12 12:19:19 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Tue Jan 12 12:19:19 2016 +0000"
      },
      "message": "Merge \"Optimizing/ARM: Fix CmpConstant().\""
    },
    {
      "commit": "4bedb3845ac33c95cb779987abd4e76a88b19989",
      "tree": "d8de13e932035710f32acdf9340970bc1eb89a90",
      "parents": [
        "363910e676f388b87478e553c243157d395ffc3c"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Jan 12 12:01:04 2016 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Jan 12 12:01:04 2016 +0000"
      },
      "message": "Fix memory fences in the ARM64 UnsafeCas intrinsics.\n\nAlso add some comments for the ARM UnsafeCas intrinsics.\n\nChange-Id: Ic6e4f2c37e468db4582ac8709496a80f3c1f9a6b\n"
    },
    {
      "commit": "8566a91502db625ff9428a3c2418714488ecd5d9",
      "tree": "fc3ade71413203fd053d06b98210f263084e34c9",
      "parents": [
        "20b6863769357d798464a65c5ee5dfd64464d400",
        "b7070a2db8b0b7eca14f01f932be305be64ded57"
      ],
      "author": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Mon Jan 11 14:47:37 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon Jan 11 14:47:37 2016 +0000"
      },
      "message": "Merge \"Generate Nops to ensure that debug stack maps have distinct PC.\""
    },
    {
      "commit": "f871d466a1f20a6906d4d22f878f1f93d73ccf69",
      "tree": "9c46d31d371eb03a5d56cb7aceb5a5a625ae0fd3",
      "parents": [
        "6f68ad42bb6b22e7cf8337f76953fda44ca89405",
        "68f6289fbc1b14ed814722c023b3f343c1e59a79"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 11 14:20:52 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon Jan 11 14:20:52 2016 +0000"
      },
      "message": "Merge \"Don\u0027t use std::abs on INT_MIN/LONG_MIN, it\u0027s undefined.\""
    },
    {
      "commit": "b7070a2db8b0b7eca14f01f932be305be64ded57",
      "tree": "06ba87d56a708712fb206e23d3abd55f21934373",
      "parents": [
        "ae6f23c83e1c8dcfbc4f74186ea1a37f1044414b"
      ],
      "author": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Fri Jan 08 18:13:53 2016 +0000"
      },
      "committer": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Mon Jan 11 12:22:17 2016 +0000"
      },
      "message": "Generate Nops to ensure that debug stack maps have distinct PC.\n\nChange-Id: I5740ec958a20d236634b66df0e675382ed5c16fc\n"
    },
    {
      "commit": "68f6289fbc1b14ed814722c023b3f343c1e59a79",
      "tree": "86bf0f10e1368871e567145a0d70087cb8f74a4f",
      "parents": [
        "b7371a5517f78f61759f7e6124f2d957d974d9cd"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 04 08:39:49 2016 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 11 11:36:48 2016 +0000"
      },
      "message": "Don\u0027t use std::abs on INT_MIN/LONG_MIN, it\u0027s undefined.\n\nbug:25494265\n\nChange-Id: I560a3a589b92440020285f9adfdf7c9efb06217c\n"
    },
    {
      "commit": "012fc4e9d9b66b3ffb7838b0e29dadbb4863ee69",
      "tree": "abba308e56a3d81e5c3fceebc95fb37a0ffe9c7c",
      "parents": [
        "5ee288c9dd99614e3a238f5efceeec6456e3499d"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jan 08 15:58:19 2016 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jan 08 17:14:17 2016 +0000"
      },
      "message": "Don\u0027t encode a DexRegisterMap if there is no live register.\n\nChange-Id: I76a291e6a0ac37f0590d16c7f5b866115588bc55\n"
    },
    {
      "commit": "363910e676f388b87478e553c243157d395ffc3c",
      "tree": "ea179b1a3db97302f96b0f17b6a2ac05e00118f2",
      "parents": [
        "fbd9dfcf4ffc32f0bda831aa898c7ea5dbf8ed9a",
        "1407ee7df9d063e4d94c488c7beb46cb2da0677e"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Jan 08 16:50:53 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Fri Jan 08 16:50:53 2016 +0000"
      },
      "message": "Merge \"Add a missing implicit null check in the ARM codegen.\""
    },
    {
      "commit": "80e6709722d6c27aed399c50a11a98e0ab13a97e",
      "tree": "5aca52185bf8f8ae2f3eac040aac703a9aae771d",
      "parents": [
        "74179b2082f8114db5154c75be643d9337cb3a63"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Jan 08 16:04:55 2016 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Jan 08 16:04:55 2016 +0000"
      },
      "message": "Small implicit null checks refactoring in the ARM codegen.\n\nChange-Id: I7dccb02cf7ac2f7d8fd1676b03e0b394701fbe3f\n"
    },
    {
      "commit": "1407ee7df9d063e4d94c488c7beb46cb2da0677e",
      "tree": "9f1ebbd7ca7bb83ecae0c9b9aaf046d0243c1c58",
      "parents": [
        "74179b2082f8114db5154c75be643d9337cb3a63"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Jan 08 15:56:19 2016 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Jan 08 15:56:19 2016 +0000"
      },
      "message": "Add a missing implicit null check in the ARM codegen.\n\nThe code generated for object ArraySet on ARM used to\nmiss an implicit null check for the array when the assigned\nvalue is `null`.  This has not been an actual issue so far,\nas ArraySet instructions have never been using implicit null\nchecks.\n\nNote: This CL comes without a regression test, as the code\npath in question is not used (yet).\n\nChange-Id: If3bc85e32802595e635513dfb83ccfcfd8f00d3d\n"
    },
    {
      "commit": "c928591f5b2c544751bb3fb26dc614d3c2e67bef",
      "tree": "b6c8a5e08c4d4c7a66a70f4d91e209ededf22334",
      "parents": [
        "5ee288c9dd99614e3a238f5efceeec6456e3499d"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Dec 18 10:38:42 2015 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Jan 08 12:55:31 2016 +0000"
      },
      "message": "ARM Baker\u0027s read barrier fast path implementation.\n\nIntroduce an ARM fast path implementation in Optimizing for\nBaker\u0027s read barriers (for both heap reference loads and GC\nroot loads).  The marking phase of the read barrier is\nperformed by a slow path, invoking the runtime entry point\nartReadBarrierMark.\n\nOther read barrier algorithms continue to use the original\nslow path based implementation, which has been renamed as\nGenerateReadBarrierSlow/GenerateReadBarrierForRootSlow.\n\nBug: 12687968\nChange-Id: Ie7ee85b1b4c0564148270cebdd3cbd4c3da51b3a\n"
    },
    {
      "commit": "0580d96231c3143f50d14bbc834662715faf6cdf",
      "tree": "3af88477c57e63d0851edca51e01adc0fa80e0a9",
      "parents": [
        "664d7cfba0e734ba8917c260e424ea559b7e8f9f"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 06 17:40:20 2016 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jan 07 09:27:13 2016 +0000"
      },
      "message": "Fix a crash with unresolved classes.\n\nWe cannot pass the initialization duty to a HLoadClass that needs\naccess checks. The optimization was assuming the graph structure\ncould not lead to such a situation, but turns out with licm, it can.\n\nChange-Id: I6c5299955e1f9221a2dd70976a55e0dea06882eb\n"
    },
    {
      "commit": "744a1c687fb92050828e188838b0ce5e0474f94a",
      "tree": "ea04b85d15f74e8e8a88ab6de120ff2e330144c9",
      "parents": [
        "15693bfdf9fa3ec79327a77b7e10315614d716cc"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Dec 28 10:53:34 2015 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Wed Jan 06 12:44:46 2016 +0000"
      },
      "message": "ART: Don\u0027t set initial RTI for BoundType if input untyped\n\nReferenceTypePropagation will create a BoundType with upper bound\n[Object, inexact, not null] for each if-not-null branch. The logic\nsetting its initial RTI will, however, set it straight to Object if\nthe input is untyped (loop phi or its derivate). This patch changes\nthe logic to leave the BoundType untyped and set it during fix-point\niteration.\n\nBug: 26330326\nChange-Id: Ic492e2179a4c51f577908e60fbcf70d728b98a6f\n"
    },
    {
      "commit": "15693bfdf9fa3ec79327a77b7e10315614d716cc",
      "tree": "918208d60ec2a5595a2b5e42791865fefdbf9692",
      "parents": [
        "87bafaf563d35616804dd0cc0dbde176aac87817"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Wed Dec 16 10:30:45 2015 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Wed Jan 06 12:44:42 2016 +0000"
      },
      "message": "ART: Resolve ambiguous ArraySets\n\nJust like aget(-wide), the value operand of aput(-wide) bytecode\ninstructions can be both int/long and float/double. This patch builds\non the previous mechanism for resolving type of ArrayGets to type the\nvalues of ArraySets based on the reference type of the array.\n\nBug: 22538329\n\nChange-Id: Ic86abbb58de146692de04476b555010b6fcdd8b6\n"
    },
    {
      "commit": "f555258861aea7df8af9c2241ab761227fd2f66a",
      "tree": "1317545f50f78eb7c9e4dd44ebfb256bdff0af11",
      "parents": [
        "c917d195d8d8d05f90796b1e0842883fc608346d"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Sun Dec 27 13:36:12 2015 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Wed Jan 06 10:33:30 2016 +0000"
      },
      "message": "ART: Create BoundType for CheckCast early\n\nReferenceTypePropagation creates a BoundType for each CheckCast and\nreplaces all dominated uses of the casted object with it. This does\nnot include Phi uses on the boundary of the dominated scope, reducing\ntyping precision. This patch creates the BoundType in Builder, causing\nSsaBuilder to replace uses of the object automatically.\n\nBug: 26081304\n\nChange-Id: I083979155cccb348071ff58cb9060a896ed7d2ac\n"
    },
    {
      "commit": "fd2140f815bd173c9d399b2b012ea6d0075e77fa",
      "tree": "a3bca4f5ed222574999e9ef1c5dedc0ffed264d0",
      "parents": [
        "802207cbe3a39a89bcdfe687897711e0c8eb9f29"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Wed Dec 23 16:30:44 2015 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Tue Jan 05 10:24:51 2016 -0800"
      },
      "message": "ART: Make opt inliner a little bit cleaner/faster\n\nRemove the double-if.\n\nChange-Id: Ic6551e30d016d4b2c3b8dfb8841d2db90fce45cd\n"
    },
    {
      "commit": "92d9060c0cdff7c726549a9d9494e5655404bed7",
      "tree": "22c1274193e7f1a3bd9872a2455c758394587dee",
      "parents": [
        "376a6f3dbae7b71a6fc2c339ec416d3407277308"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Fri Dec 18 18:16:36 2015 -0800"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Mon Jan 04 20:53:44 2016 -0800"
      },
      "message": "MIPS: Implement HRor\n\nThis also fixes differentiation between the SRL and ROTR\ninstructions in the disassembler.\n\nChange-Id: Ie19697f8d6ea8fa4e338adde3e3cf8e4a0383eae\n"
    },
    {
      "commit": "d87f3eaa80139564969433fd47c0f6abf8dc46ba",
      "tree": "45830e3ae4fa04e9dd2da2e4df554718d32a7790",
      "parents": [
        "f196a43051547e777fac9a27f1148999688fd3c5"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Jan 04 15:55:10 2016 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Jan 04 15:55:10 2016 +0000"
      },
      "message": "ART: Use Primitive::Is64BitType in SsaBuilder::TypePhiFromInputs\n\nAccidentally submitted CL Ib39f3da2b92bc5be5d76f4240a77567d82c6bebe\nwithout this.\n\nBug: 26208284\nChange-Id: I2e69ca2fde72171f2ce645304c4835d8d57f4e0b\n"
    },
    {
      "commit": "f196a43051547e777fac9a27f1148999688fd3c5",
      "tree": "863d28833de94739214132705fa9ef97f0090370",
      "parents": [
        "06856d367c17918e13147365284f74a517798bf3",
        "152408f8c2188a7ed950cad04883b2f67dc74e84"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Jan 04 14:51:33 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon Jan 04 14:51:33 2016 +0000"
      },
      "message": "Merge \"X86: templatize GenerateTestAndBranch and friends\""
    },
    {
      "commit": "06856d367c17918e13147365284f74a517798bf3",
      "tree": "e992cf4f78fb90a0089112f00fea56673d5d0da5",
      "parents": [
        "a3f0bf3b984c393c468fb5e650ae533f038b2cde",
        "f5f64efda943000168d34bfe44ccbbadd284e55f"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 04 14:42:19 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon Jan 04 14:42:19 2016 +0000"
      },
      "message": "Merge \"Detect phi cycles.\""
    },
    {
      "commit": "a3f0bf3b984c393c468fb5e650ae533f038b2cde",
      "tree": "76ec8d09af72c37d998ca3aeb6e8ef178db8f616",
      "parents": [
        "5f332cbd0cf70edb80d4493a25ac3dabbc69b053",
        "5949fa0cb9a8d26ac20b9b02065a63b4b20443be"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 04 14:41:49 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon Jan 04 14:41:49 2016 +0000"
      },
      "message": "Merge \"Revert \"Revert \"Tweak inlining heuristics.\"\"\""
    },
    {
      "commit": "5949fa0cb9a8d26ac20b9b02065a63b4b20443be",
      "tree": "7e4760bac3073fdae84e850637aa35dd8c4c519c",
      "parents": [
        "b7371a5517f78f61759f7e6124f2d957d974d9cd"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Dec 18 10:57:10 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 04 12:53:06 2016 +0000"
      },
      "message": "Revert \"Revert \"Tweak inlining heuristics.\"\"\n\nThis reverts commit b17d1ccff0ac26fc22df671907ba2b4f4c656ce4.\n\nChange-Id: I26f6f8702a448c3da12662cbc6bc0f6e562bc40b\n"
    },
    {
      "commit": "5f332cbd0cf70edb80d4493a25ac3dabbc69b053",
      "tree": "24667353f97e9d349d1cbcf7e447728ffad68d73",
      "parents": [
        "b7371a5517f78f61759f7e6124f2d957d974d9cd",
        "5c7aed3b9844e240cf785e5885524ac133a04396"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 04 12:21:15 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon Jan 04 12:21:15 2016 +0000"
      },
      "message": "Merge \"MIPS32: improvements in code generation (mostly 64-bit ALU ops)\""
    },
    {
      "commit": "b7371a5517f78f61759f7e6124f2d957d974d9cd",
      "tree": "a6e86275880cbdd0a08e732f467ad236f7021f84",
      "parents": [
        "4bb356123b13ec5f41ea80158766df676ae08679",
        "b35302b9f79a4b9bcc980051f67e5495a03289c3"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 04 08:24:30 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon Jan 04 08:24:30 2016 +0000"
      },
      "message": "Merge \"Remove bogus DCHECK in induction analysis.\""
    },
    {
      "commit": "152408f8c2188a7ed950cad04883b2f67dc74e84",
      "tree": "0fd24e0023060d1eb58eeb0b94e31a2311eefe16",
      "parents": [
        "4bb356123b13ec5f41ea80158766df676ae08679"
      ],
      "author": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Thu Dec 31 12:28:50 2015 -0500"
      },
      "committer": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Thu Dec 31 12:28:50 2015 -0500"
      },
      "message": "X86: templatize GenerateTestAndBranch and friends\n\nAllow the use of NearLabel as well as Label.  This will be used by the\nHSelect patch.\n\nReplace a couple of Label(s) with NearLabel(s) as well.\n\nChange-Id: I8e674c89e691bcdbccf4a5cdc07ad13b29ec21dd\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n"
    },
    {
      "commit": "b35302b9f79a4b9bcc980051f67e5495a03289c3",
      "tree": "8a578febc1967aab22678814f45f355566b37ba5",
      "parents": [
        "e38e4b467bdcca1bf5f8b80adc66d3064fa9cf45"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Dec 29 16:12:27 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Dec 31 15:28:48 2015 +0000"
      },
      "message": "Remove bogus DCHECK in induction analysis.\n\nMethod is called during BCE, which may change the graph in non-SSA\nform temporarily.\n\nChange-Id: I84bed7d3370c6871dc2d3b883d0aca90b3a37696\n"
    },
    {
      "commit": "295abc1a3aec98868544dfd4e0eeab797c3d60c2",
      "tree": "8aa181253d0ab0a3d476f1a6b53eac720a903670",
      "parents": [
        "b68748929d108a534e91645733605b35efd4edad"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Dec 31 11:06:00 2015 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Dec 31 11:06:00 2015 +0000"
      },
      "message": "ART: Set RTI of HArm64IntermediateAddress\n\nChange-Id: I2145bc249cc940d7b133fd6cbbd133cc62fee187\n"
    },
    {
      "commit": "4833f5a1990c76bc2be89504225fb13cca22bedf",
      "tree": "8e096f222368f30bf821b154bc78bac12d5cd2e5",
      "parents": [
        "bb41b250153308ef51664d7a6cc26c6a2e588fb7"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Wed Dec 16 10:37:39 2015 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Dec 31 09:58:33 2015 +0000"
      },
      "message": "ART: Refactor SsaBuilder for more precise typing info\n\nThis reverts commit 68289a531484d26214e09f1eadd9833531a3bc3c.\n\nNow uses Primitive::Is64BitType instead of Primitive::ComponentSize\nbecause it was incorrectly optimized by GCC.\n\nBug: 26208284\nBug: 24252151\nBug: 24252100\nBug: 22538329\nBug: 25786318\n\nChange-Id: Ib39f3da2b92bc5be5d76f4240a77567d82c6bebe\n"
    },
    {
      "commit": "5d75afe333f57546786686d9bee16b52f1bbe971",
      "tree": "ee203dd8ff8c4c6257b6c1ae1db1a432a8a8682f",
      "parents": [
        "1e65a78577ed71f5e3d79edaa0e6735ea4a3371b"
      ],
      "author": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Mon Dec 14 11:57:01 2015 -0800"
      },
      "committer": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Wed Dec 30 10:52:51 2015 -0800"
      },
      "message": "Improved side-effects/can-throw information on intrinsics.\n\nRationale: improved side effect and exception analysis gives\n           many more opportunities for GVN/LICM/BCE.\n\nChange-Id: I8aa9b757d77c7bd9d58271204a657c2c525195b5\n"
    },
    {
      "commit": "fa0dc72626f2f678e41e23d7868acb822d4b1eab",
      "tree": "ce3a07455fa25191d4f10355bd722265b386414c",
      "parents": [
        "1c421aada1303f9b63589ae7ce6dc454ca44ca2a",
        "6ce017304099d1df97ffa016ce0efce79c67f344"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Dec 30 14:26:57 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Dec 30 14:26:57 2015 +0000"
      },
      "message": "Merge \"On x64, cmpl can never take a int64 immediate.\""
    },
    {
      "commit": "6ce017304099d1df97ffa016ce0efce79c67f344",
      "tree": "6c8265acb94f17e78371191809fe67d8101c2c4e",
      "parents": [
        "e38e4b467bdcca1bf5f8b80adc66d3064fa9cf45"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Dec 30 14:10:13 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Dec 30 14:22:11 2015 +0000"
      },
      "message": "On x64, cmpl can never take a int64 immediate.\n\nFix a wrong type widening in x64 code generator and add\nCHECKs in the assembler.\n\nChange-Id: Id35f5d47c6cf78ed07e73ab783db09712d3c437f\n"
    },
    {
      "commit": "1c421aada1303f9b63589ae7ce6dc454ca44ca2a",
      "tree": "46774a78e92a68d2d4d06240d6dd833cd86365d9",
      "parents": [
        "6aca23ae95d016da8c4badcf1cf9c092a03383cf",
        "7f59d59ff5a716283c9ba0ead17ab7c51bc2e525"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Dec 30 14:20:48 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Dec 30 14:20:48 2015 +0000"
      },
      "message": "Merge \"Fix code generation for String.\u003cinit\u003e on x64.\""
    },
    {
      "commit": "7f59d59ff5a716283c9ba0ead17ab7c51bc2e525",
      "tree": "217f2ded5586a18aec4bb14d0da44f2a13ecb8e5",
      "parents": [
        "e38e4b467bdcca1bf5f8b80adc66d3064fa9cf45"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Dec 29 16:20:52 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Dec 29 16:20:52 2015 +0000"
      },
      "message": "Fix code generation for String.\u003cinit\u003e on x64.\n\nThe ArtMethod is a 64bit pointer so should be loaded with movq.\n\nChange-Id: I80803046a9144776d7f069e8baee61e39ae289d5\n"
    },
    {
      "commit": "e6d0d8de85f79c8702ee722a04cd89ee7e89aeb7",
      "tree": "66fdb4f09ffe5d62f491f53b9d311ea3e7349f71",
      "parents": [
        "095b1df3d20e806ed7ad8c545b03866c1561d1f6"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Dec 28 09:54:29 2015 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Dec 28 09:57:13 2015 -0800"
      },
      "message": "ART: Disable Math.round intrinsics\n\nThe move to OpenJDK means that Android has caught up with the\ndefinition change of Math.round. Disable intrinsics.\n\nBug: 26327751\nChange-Id: I00dc6cfca12bd7c95e56a4ab76ffee707d3822dc\n"
    },
    {
      "commit": "095b1df3d20e806ed7ad8c545b03866c1561d1f6",
      "tree": "b4b05fc3ec253b19389783367175ee67b485cbac",
      "parents": [
        "e38e4b467bdcca1bf5f8b80adc66d3064fa9cf45"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Dec 28 09:06:29 2015 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Dec 28 09:56:48 2015 -0800"
      },
      "message": "Revert \"Make Math.round consistent on arm64.\"\n\nThis reverts commit 40041c9a38e3961d8675d117517719458a115520.\n\nNeeds to be generalized to all platforms.\n\nBug: 26327751\nChange-Id: Iae8f1c8846d120d8e3e99b6eb87f3760bf793ec5\n"
    },
    {
      "commit": "40041c9a38e3961d8675d117517719458a115520",
      "tree": "c21af5a5325476518b3c396c309878aabcb67591",
      "parents": [
        "3de604892a295caf4ffa76809b8028e6d046edd5"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Sun Dec 27 16:20:14 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Sun Dec 27 16:21:40 2015 +0000"
      },
      "message": "Make Math.round consistent on arm64.\n\nOpenJDK seems to have a different rounding implementation than\nlibcore. Temporarily disable the intrinsic.\n\nTest that fails:\nAssert.assertEquals(StrictMath.round(0.49999999999999994d), 1l);\nAssert.assertEquals(Math.round(0.49999999999999994d), 1l);\n\nbug:26327751\n\nChange-Id: Iad2fb847e4a553b8c1f5031f772c81e7e4db9f4c\n"
    },
    {
      "commit": "dcdc85bbd569f0ee66c331b4219c19304a616214",
      "tree": "b5ab789248e279318f6c1e3f6c511703d7294476",
      "parents": [
        "48944c760b196188b968b7af81439466cf987a75"
      ],
      "author": {
        "name": "Jeff Hao",
        "email": "jeffhao@google.com",
        "time": "Fri Dec 04 14:06:18 2015 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Wed Dec 23 21:14:23 2015 -0800"
      },
      "message": "Dex2oat support for multiple oat file and image file outputs.\n\nMultiple changes to dex2oat and the runtime to support a --multi-image\noption. This generates a separate oat file and image file output for\neach dex file input.\n\nChange-Id: Ie1d6f0b8afa8aed5790065b8c2eb177990c60129\n"
    },
    {
      "commit": "0cf4493166ff28518c8eafa2d0463f6e817cce75",
      "tree": "6d207db3fb655bbd692f2b01fa963c603619bd0e",
      "parents": [
        "d674bf7ba2a209790cea8ef8d935480ef515c9e1"
      ],
      "author": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Wed Dec 09 14:09:59 2015 +0000"
      },
      "committer": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Wed Dec 23 13:19:16 2015 +0000"
      },
      "message": "Generate more stack maps during native debugging.\n\nGenerate extra stack map at the start of each java statement.\nThe stack maps are later translated to DWARF which allows\nLLDB to set breakpoints and view local variables.\n\nChange-Id: If00ab875513308e4a1399d1e12e0fe8934a6f0c3\n"
    },
    {
      "commit": "5f7b58ea1adfc0639dd605b65f59198d3763f801",
      "tree": "04556e673cdd3967cc967ff79931eab49e523956",
      "parents": [
        "1201804d1813d7db0accead9721d67c40b3de564"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Nov 23 19:49:34 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Dec 23 09:59:07 2015 +0000"
      },
      "message": "Rewrite HInstruction::Is/As\u003ctype\u003e().\n\nMake Is\u003ctype\u003e() and As\u003ctype\u003e() non-virtual for concrete\ninstruction types, relying on GetKind(), and mark GetKind()\nas PURE to improve optimization opportunities. This reduces\nthe number of relocations in libart-compiler.so\u0027s .rel.dyn\nsection by ~4K, or ~44%, and in .data.rel.ro by ~18K, or\n~65%. The file is 96KiB smaller for Nexus 5, including 8KiB\nreduction of the .text section.\n\nUnfortunately, the g++/clang++ __attribute__((pure)) is not\nstrong enough to avoid duplicated virtual calls and we would\nneed the C++ [[pure]] attribute proposed in n3744 instead.\nTo work around this deficiency, we introduce an extra\nnon-virtual indirection for GetKind(), so that the compiler\ncan optimize common expressions such as\n    instruction-\u003eIsAdd() || instruction-\u003eIsSub()\nor\n    instruction-\u003eIsAdd() \u0026\u0026 instruction-\u003eAsAdd()-\u003e...\nwhich contain two virtual calls to GetKind() after inlining.\n\nChange-Id: I83787de0671a5cb9f5b0a5f4a536cef239d5b401\n"
    },
    {
      "commit": "ac6ac10a0801fa6eb95e0ab0c72b2ed562210b34",
      "tree": "3758a1903dbdd273c35d4bae4ee0e820857946c0",
      "parents": [
        "1201804d1813d7db0accead9721d67c40b3de564"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Dec 17 12:14:00 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Dec 22 11:51:33 2015 +0000"
      },
      "message": "Optimizing/ARM: Fix CmpConstant().\n\nCMN updates flags based on addition of its operands.\nDo not confuse the \"N\" suffix with bitwise inversion\nperformed by MVN.\n\nAlso add more special cases analogous to AddConstant()\nand use CmpConstant() more in code generator.\n\nChange-Id: I0d4571770a3f0fdf162e97d4bde56814098e7246\n"
    },
    {
      "commit": "9865bde5d822f56c4732214c2005dfcaa41f94cf",
      "tree": "cd2eae058f4f4f13b5a82ff557b7eaaf13a1ecfb",
      "parents": [
        "115a02b737dd5f4d485b2f6c359e02988df66b83"
      ],
      "author": {
        "name": "Mathieu Chartier",
        "email": "mathieuc@google.com",
        "time": "Mon Dec 21 09:58:16 2015 -0800"
      },
      "committer": {
        "name": "Mathieu Chartier",
        "email": "mathieuc@google.com",
        "time": "Mon Dec 21 09:58:16 2015 -0800"
      },
      "message": "Rename NullHandle to ScopedNullHandle\n\nThis makes it clearer that is invalid to do things like:\nHandle\u003cT\u003e h \u003d ScopedNullHandle\u003cT\u003e();\n\nBug: 26233305\nChange-Id: I6d8f54eae01ec2e901cb7043afa853ea77db79fe\n"
    },
    {
      "commit": "803cbb9c9319af10b01317abb849303fb8329fb7",
      "tree": "be2111df46daca89d711c7517570df99e68640e3",
      "parents": [
        "045d37ae20ae9481f6c967ab5db4240991ff151f"
      ],
      "author": {
        "name": "Mingyao Yang",
        "email": "mingyao@google.com",
        "time": "Tue Dec 01 12:24:36 2015 -0800"
      },
      "committer": {
        "name": "Mingyao Yang",
        "email": "mingyao@google.com",
        "time": "Fri Dec 18 10:23:59 2015 -0800"
      },
      "message": "For LSE, further optimize stores for singleton references.\n\nLoop side effects shouldn\u0027t affect singletons whose fields are never stored into\ninside a loop.\n\nChange-Id: If3715d7b7e621bb077ef9481072a56f7fec87f2b\n"
    },
    {
      "commit": "280a65b1ea1f18ab8204a4089630a206dd2d0375",
      "tree": "31cb62a357b77204994f86afecc79c36a101e6fc",
      "parents": [
        "9d9435ff95f31c5467912a6a3eb60070cc6f4199",
        "299a93993fb8f3efbf0465cf674d80c3bcfdc66c"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Dec 18 17:54:01 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Fri Dec 18 17:54:01 2015 +0000"
      },
      "message": "Merge \"MIPS64: Fuse long and FP compare \u0026 condition in Optimizing.\""
    },
    {
      "commit": "ecf52dfa46addbbd5d1ee92a4bc9b7a9fd960629",
      "tree": "581d6d5071b7a0450d676eee167aeb34812240fa",
      "parents": [
        "273941131aed5248a8c75b2d3f2952a88c7ab02d"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Dec 14 16:58:08 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Dec 18 13:58:22 2015 +0000"
      },
      "message": "ART: Fix bug in LSE\n\nLSE will not remove a load if the type of the heap value does not\nmatch the type of the load. This was a workaround for b/22538329 but\nbackfires for integers. For example, \u0027IntConstant 0\u0027 has type int\nbut can be retrieved from a boolean field. The corresponding store is\nremoved but not the load, loading uninitialized memory. This fixes the\nissue until the workaround is not needed any more.\n\nChange-Id: I2a47783e8d5f93104854e5216b69b6c220832c76\n"
    },
    {
      "commit": "273941131aed5248a8c75b2d3f2952a88c7ab02d",
      "tree": "55bb421dd5e9e2a9c1119e57af56f98afb712ecb",
      "parents": [
        "570a920d0a4a01e159a1be46609ff3db4aedc221",
        "391b866ce55b8e78b1f9a6b98321d837256e8d66"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Dec 18 12:56:47 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Fri Dec 18 12:56:47 2015 +0000"
      },
      "message": "Merge \"Disable the UnsafeCASObject intrinsic with read barriers.\""
    },
    {
      "commit": "391b866ce55b8e78b1f9a6b98321d837256e8d66",
      "tree": "f420d0083300621d9059f65bbfeaf0c361961ff2",
      "parents": [
        "14c4e90f67e71430dade7d4f20920e6352be386e"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Dec 18 11:43:38 2015 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Dec 18 11:43:38 2015 +0000"
      },
      "message": "Disable the UnsafeCASObject intrinsic with read barriers.\n\nThe current implementations of the UnsafeCASObject\nintrinsics are missing a read barrier.  Temporarily disable\nthem when read barriers are enabled.\n\nAlso re-enable the jsr166.LinkedTransferQueueTest tests that\nwere failing on the concurrent collector configuration, as\nthe UnsafeCASObject JNI implementation now correctly\nimplements the read barrier which was missing.\n\nBug: 25883050\nBug: 26205973\nChange-Id: Iaf5d515532949662d0ac6702c9452a00aa0a23e6\n"
    },
    {
      "commit": "570a920d0a4a01e159a1be46609ff3db4aedc221",
      "tree": "d959ea022b6ef33d4c9aefef0f02756384e2769d",
      "parents": [
        "fae1db92d8433d0f75258c190bcf2c940731f036",
        "17077d888a6752a2e5f8161eee1b2c3285783d12"
      ],
      "author": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Thu Dec 17 23:28:06 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Thu Dec 17 23:28:06 2015 +0000"
      },
      "message": "Merge \"Revert \"Revert \"X86: Use locked add rather than mfence\"\"\""
    },
    {
      "commit": "299a93993fb8f3efbf0465cf674d80c3bcfdc66c",
      "tree": "1ba8d1cd2a34091317af08cbbe5cfa3fa52e549f",
      "parents": [
        "fae1db92d8433d0f75258c190bcf2c940731f036"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Tue Dec 08 16:08:02 2015 -0800"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Thu Dec 17 14:14:26 2015 -0800"
      },
      "message": "MIPS64: Fuse long and FP compare \u0026 condition in Optimizing.\n\nBug: 25559148\n\nChange-Id: I2d14ac75460a76848c71c08cffff6d7a18f5f580\n"
    },
    {
      "commit": "14c4e90f67e71430dade7d4f20920e6352be386e",
      "tree": "2d376e0d6f833bb87348faae12ad7ed3bf15b95b",
      "parents": [
        "6132a3884a912a704010f22ea2991f3d9d432af2",
        "f3e0ee27f46aa6434b900ab33f12cd3157578234"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Dec 17 16:46:19 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Thu Dec 17 16:46:19 2015 +0000"
      },
      "message": "Merge \"Revert \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"\""
    },
    {
      "commit": "f3e0ee27f46aa6434b900ab33f12cd3157578234",
      "tree": "83d5a75bf26238ff1789569de62e4b72fb348119",
      "parents": [
        "b4c137630fd2226ad07dfd178ab15725374220f1"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Dec 17 15:23:13 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Dec 17 15:23:13 2015 +0000"
      },
      "message": "Revert \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"\n\nThis reverts commit b4c137630fd2226ad07dfd178ab15725374220f1.\n\nThe underlying issue was fixed by https://android-review.googlesource.com/188271 .\n\nBug: 26121945\nChange-Id: I58b08eb1a9f0a5c861f8cda93522af64bcf63920\n"
    },
    {
      "commit": "3e3e4a762c23c3de66436b30e9fc65f35dad344c",
      "tree": "8a039c333528790c52a080311511f36186c6ff9f",
      "parents": [
        "fb9f4ad455eced3a07bef1d4772ab1fe34ec133b"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Dec 17 14:28:35 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Dec 17 14:31:05 2015 +0000"
      },
      "message": "Fix braino in parallel move resolver.\n\nReiterating over the moves needs to set i to -1, not 0.\n\nbug:26241132\n\nChange-Id: Iaae7eac5b421b0ee1b1ce89577c8b951b2d4dae8\n"
    },
    {
      "commit": "17077d888a6752a2e5f8161eee1b2c3285783d12",
      "tree": "15b869f7ed0a8273814b628cd277a6d5d779b24d",
      "parents": [
        "d16bb3f0dc17d77db7022150d0710fcbb8b6fd9d"
      ],
      "author": {
        "name": "Mark P Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Wed Dec 16 19:15:59 2015 +0000"
      },
      "committer": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Wed Dec 16 20:17:48 2015 -0500"
      },
      "message": "Revert \"Revert \"X86: Use locked add rather than mfence\"\"\n\nThis reverts commit 0da3b9117706760e8722029f407da6d0297cc943.\n\nFix a compilation failure that slipped in somehow.\n\nChange-Id: Ide8681cdc921febb296ea47aa282cc195f154049\n"
    },
    {
      "commit": "5c7aed3b9844e240cf785e5885524ac133a04396",
      "tree": "acc868d1478f0410fda4d0f6de3c60755aa6680e",
      "parents": [
        "1c70f18dce7705ff70147ddebf65a97f66df8d5c"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Wed Nov 25 19:41:54 2015 -0800"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Wed Dec 16 15:33:30 2015 -0800"
      },
      "message": "MIPS32: improvements in code generation (mostly 64-bit ALU ops)\n\nSpecifically:\n- Use the delay slot in InvokeRuntime() for direct entry points\n- Use kNoOutputOverlap wherever possible\n- Improve and/or/xor/add/sub with 64-bit integer constants\n- Improve 64-bit shifts by a constant amount on R2+\n- More efficient load/store of 64-bit constants (especially, 0 \u0026 +0.0)\n\nChange-Id: I86d2217c8b5b8e2a9371effc2ce38b9eec62782b\n"
    },
    {
      "commit": "1c70f18dce7705ff70147ddebf65a97f66df8d5c",
      "tree": "7fa76545c1b91499b86f840cdb8c53050e9c761c",
      "parents": [
        "1f312652e138e05328b9c4c738d3ecbab2d09ae9",
        "0da3b9117706760e8722029f407da6d0297cc943"
      ],
      "author": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Wed Dec 16 19:11:38 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Dec 16 19:11:38 2015 +0000"
      },
      "message": "Merge \"Revert \"X86: Use locked add rather than mfence\"\""
    },
    {
      "commit": "0da3b9117706760e8722029f407da6d0297cc943",
      "tree": "84ad42399e1055f3596d7df6f786d9f7b8605ee3",
      "parents": [
        "7b3e4f99b25c31048a33a08688557b133ad345ab"
      ],
      "author": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Wed Dec 16 19:06:17 2015 +0000"
      },
      "committer": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Wed Dec 16 19:06:17 2015 +0000"
      },
      "message": "Revert \"X86: Use locked add rather than mfence\"\n\nThis reverts commit 7b3e4f99b25c31048a33a08688557b133ad345ab.\n\nReason: build error on sdk (linux) in git_mirror-aosp-master-with-vendor , please fix first\n\nart/compiler/optimizing/code_generator_x86_64.cc:4032:7: error: use of\nundeclared identifier \u0027codegen_\u0027\n      codegen_-\u003eMemoryFence();\n\nChange-Id: I91f8542cfd944b7425d1981c35872dcdcb901e18\n"
    },
    {
      "commit": "c3ca1e6543ef5e717183c059e68ac34597be7022",
      "tree": "ee7032d33c1dc8962a767d81321a142e9f4d173d",
      "parents": [
        "9ddcbf69cfa807790e324f7f54e1931bc66d0f5c",
        "7b3e4f99b25c31048a33a08688557b133ad345ab"
      ],
      "author": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Wed Dec 16 18:47:07 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Dec 16 18:47:07 2015 +0000"
      },
      "message": "Merge \"X86: Use locked add rather than mfence\""
    },
    {
      "commit": "698fa975c10e244fd181e2ffb4bb67a88851e1d7",
      "tree": "104d67a406808b9952cd0b177c3aa44f2393c19d",
      "parents": [
        "cbf8af898e758cef27687c20c8cf9ac75280026d"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Dec 16 17:06:47 2015 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Dec 16 17:06:47 2015 +0000"
      },
      "message": "Remove spurious references to kEmitCompilerReadBarrier in MIPS.\n\nWe do not support read barriers on MIPS code generators yet.\n\nAlso, wrap some long lines in the MIPS64 code generator.\n\nChange-Id: Ia2755590afa60eb9c8fb547e059146ab6518372b\n"
    },
    {
      "commit": "cbf8af898e758cef27687c20c8cf9ac75280026d",
      "tree": "982a30df208013b0b3107dc5cadb169a4d76b3ab",
      "parents": [
        "1329b15f47751b764ba3162674b2bb997c2ddb90",
        "cd7b0ee296b0462961c63e51d99c9c323e2690df"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Dec 16 15:45:29 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Dec 16 15:45:29 2015 +0000"
      },
      "message": "Merge \"MIPS32: Fuse long and FP compare \u0026 condition in Optimizing.\""
    },
    {
      "commit": "4741516396e9dbfb3afc2c1d8241a7e4e26a6302",
      "tree": "5b828a40c6a4342e4a3fbe995560df014db8fa81",
      "parents": [
        "7f3b38cc23b638ab84ac01a94e90f0456da3b688",
        "751beff19b36f777d9e3a966d754fd9cfad5d534"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Dec 16 15:21:25 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Dec 16 15:21:25 2015 +0000"
      },
      "message": "Merge \"Revert \"Revert \"Introduce support for hardware simulators, starting with ARM64\"\"\""
    },
    {
      "commit": "d7d35383838c369a4a1ff5aa21e952f941718c48",
      "tree": "7d36f56c834e2b561ebc0359b9d11ad03d150cb2",
      "parents": [
        "6b75bc08e8e2e5516a23350418bacef2cf982bd9",
        "b4c137630fd2226ad07dfd178ab15725374220f1"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Dec 16 12:31:14 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Dec 16 12:31:14 2015 +0000"
      },
      "message": "Merge \"Revert \"ART: Reduce the instructions generated by packed switch.\"\""
    },
    {
      "commit": "f5f64efda943000168d34bfe44ccbbadd284e55f",
      "tree": "7364ec231d39291af44245dc16b0ca48919862d0",
      "parents": [
        "74768fb83073a2ae84c9173d4fc53654e3092b24"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Dec 15 14:11:59 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Dec 16 12:22:20 2015 +0000"
      },
      "message": "Detect phi cycles.\n\nHaving reference and non-reference phi equivalent, only happened\nfor the 0/null constant. To avoid such occurences, we must\ndetect phi cycles.\n\nbug:25493693\n\nChange-Id: Ie1a8460c3abacca96c299da107fa4407e17dd792\n"
    },
    {
      "commit": "b4c137630fd2226ad07dfd178ab15725374220f1",
      "tree": "6f319089980073ffb2c20d36e367a944daa525c4",
      "parents": [
        "59f054d98f519a3efa992b1c688eb97bdd8bbf55"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Dec 16 12:06:39 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Dec 16 12:07:01 2015 +0000"
      },
      "message": "Revert \"ART: Reduce the instructions generated by packed switch.\"\n\nThis reverts commit 59f054d98f519a3efa992b1c688eb97bdd8bbf55.\n\nbug:26121945\n\nChange-Id: I8a5ad7ef1f1de8d44787c27528fa3f7f5c2e9cd3\n"
    },
    {
      "commit": "96f721dd41f81c967b187d81b6f3e1bcc2a9243c",
      "tree": "6a5f6e02d76be32ccbd5ee38a811785b62ccbe53",
      "parents": [
        "b059c8a044ed3ede1a0eea4b1e92008ced90c013",
        "dce90b9198d523488b8f9a04dfb3834311ff3554"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Dec 16 09:34:39 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Dec 16 09:34:39 2015 +0000"
      },
      "message": "Merge \"Revert \"ART: Set RTI of Arm64IntermediateAddress\"\""
    },
    {
      "commit": "dce90b9198d523488b8f9a04dfb3834311ff3554",
      "tree": "9f4e4ffb5fae25c4f14059fd1d772726e9d96170",
      "parents": [
        "e36ae9435da21542891ceeebb3328f5066c8301e"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Dec 16 09:34:21 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Dec 16 09:34:21 2015 +0000"
      },
      "message": "Revert \"ART: Set RTI of Arm64IntermediateAddress\"\n\nThis reverts commit e36ae9435da21542891ceeebb3328f5066c8301e.\n\nChange-Id: If675b02db04bee78cc95da4ed58e545da5085da1\n"
    },
    {
      "commit": "68289a531484d26214e09f1eadd9833531a3bc3c",
      "tree": "6f87852b9d14e479ea2c7ef92de35c3118a0fd1e",
      "parents": [
        "bc90a0538e56f98b8e138cb622e6b9d834244ad9"
      ],
      "author": {
        "name": "Alex Light",
        "email": "allight@google.com",
        "time": "Tue Dec 15 17:30:30 2015 -0800"
      },
      "committer": {
        "name": "Alex Light",
        "email": "allight@google.com",
        "time": "Tue Dec 15 17:40:08 2015 -0800"
      },
      "message": "Revert \"ART: Refactor SsaBuilder for more precise typing info\"\n\nThis reverts commit d9510dfc32349eeb4f2145c801f7ba1d5bccfb12.\n\nBug: 26208284\n\nBug: 24252151\nBug: 24252100\nBug: 22538329\nBug: 25786318\n\nChange-Id: I5f491becdf076ff51d437d490405ec4e1586c010\n"
    },
    {
      "commit": "cd7b0ee296b0462961c63e51d99c9c323e2690df",
      "tree": "57a9071635389e58a8912d98b99d7e114c1efcc6",
      "parents": [
        "0bbc1727c446ee5f4cc3c28e68127164ef379594"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Thu Dec 03 16:46:38 2015 -0800"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Tue Dec 15 14:29:48 2015 -0800"
      },
      "message": "MIPS32: Fuse long and FP compare \u0026 condition in Optimizing.\n\nThis also does a minor clean-up in the assembler and\nits test.\n\nBug: 25559148\nChange-Id: I9bad3c500b592a09013b56745f70752eb284a842\n"
    },
    {
      "commit": "7b3e4f99b25c31048a33a08688557b133ad345ab",
      "tree": "446ce2d9b4684120c35fad9c097ea2f760f0797c",
      "parents": [
        "089ff4886aa9b5e7cec04d2ef5cdeb9d68e5dc43"
      ],
      "author": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Thu Nov 19 14:08:40 2015 -0500"
      },
      "committer": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Tue Dec 15 15:48:39 2015 -0500"
      },
      "message": "X86: Use locked add rather than mfence\n\nJava semantics for memory ordering can be satisfied using\n  lock addl $0,0(SP)\nrather than mfence.  The locked add synchronizes the memory caches, but\ndoesn\u0027t affect device memory.\n\nTiming on a micro benchmark with a mfence or lock add $0,0(sp) in a loop\nwith 600000000 iterations:\ntime ./mfence\nreal    0m5.411s\nuser    0m5.408s\nsys     0m0.000s\n\ntime ./locked_add\nreal    0m3.552s\nuser    0m3.550s\nsys     0m0.000s\n\nImplement this as an instruction-set-feature lock_add.  This is off by\ndefault (uses mfence), and enabled for atom \u0026 silvermont variants.\nGeneration of mfence can be forced by a parameter to MemoryFence.\n\nChange-Id: I5cb4fded61f4cbbd7b7db42a1b6902e43e458911\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n"
    }
  ],
  "next": "7d57d7f2f0328241ff07c43a93edadbc1a6697c6"
}