)]}' { "log": [ { "commit": "5439f051a950f0281eeafb8e8064839f2aea6e38", "tree": "889efef779fa462357f77cb2166c600cb0d60679", "parents": [ "483bf78ae61ab43a3d513cef0de0072e86d0b0b1" ], "author": { "name": "Ulya Trafimovich", "email": "skvadrik@google.com", "time": "Wed Jul 29 10:03:46 2020 +0100" }, "committer": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Wed Jul 29 13:58:15 2020 +0000" }, "message": "Revert^3 \"VIXL simulator for ART (Stage1)\"\n\nThis reverts commit e886d68b9c40c941d8966b9c90d0e265c75fb19e.\n\nReason for revert: simulator implemention is not ready yet.\n\nTest: lunch aosp_cf_x86_phone-userdebug \u0026\u0026 m\nTest: art/test.py --run-test --optimizing --host\nChange-Id: I03c8c09ea348205b0238d7a26caef3477cd6ae3b\n" }, { "commit": "e886d68b9c40c941d8966b9c90d0e265c75fb19e", "tree": "ad78c4e375c95a96e200baa2786e748505ab928b", "parents": [ "f12dd5861e0eaf1822c12137fd353b5e79761a6c" ], "author": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Thu Jul 16 15:09:38 2020 +0000" }, "committer": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Fri Jul 17 11:04:27 2020 +0000" }, "message": "Revert^2 \"VIXL simulator for ART (Stage1)\"\n\nThis reverts commit 3060bb919cd2f37c6a97e87c1581ac5294af72b3.\n\nReason for revert: relanding original change. The fix is setting\n`device_supported: false` for libart(d)-simulator module in the .bp\nfile (`m checkbuild` attempted to build it for arm32 and failed).\nOriginal commit message:\n\nVIXL simulator for ART (Stage1)\n\nQuick User Guide: test/README.simulator.md\n\nThis CL enables running ART run-tests in a simulator on host machine.\nSome benefits of using this simulator approach:\n- No need to use a target device at all.\n Save developers from solving the device troubles: build, flash, usb,\n adb, etc.\n- Speed up development/debug/test cycle.\n- Allows easy debugging/testing new instruction features without real\n hardware.\n- Allows using a smaller AOSP Android manifest master-art.\n\nThe Stage1 CL provides support for running 30% of current run-tests.\nThe rest unsupported test cases are kept in knownfailures.json.\n\nFuture work will be supporting proper stack frame layout between\nsimulator and quick entrypoints, so that stack walk,\nQuickArgumentVisitor, deoptimization, etc can be supported.\n\nThis CL adds libart(d)-simulator-container library to the ART APEX. It\nhas caused the following increase of the APEX size (small, about 0.13%\nfor release APEX, measured for target aosp_arm64-userdebug):\n Before:\n 88992 com.android.art.debug.apex\n 51612 com.android.art.release.apex\n 112352 com.android.art.testing.apex\n After:\n 89124 com.android.art.debug.apex\n 51680 com.android.art.release.apex\n 112468 com.android.art.testing.apex\n\nChange-Id: I461c80aa9c4ce0673eef1c0254d2c539f2b6a8d5\nTest: art/test.py --run-test --optimizing --simulate-arm64\nTest: art/test.py --run-test --optimizing --host\nTest: m test-art-host-gtest\n" }, { "commit": "3060bb919cd2f37c6a97e87c1581ac5294af72b3", "tree": "6a2b517812ff83cd10cc3b055635d0746157b345", "parents": [ "48ca6a681efe1fa1cf82d8af918bf9bbfd35ae96" ], "author": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Thu Jul 16 14:17:11 2020 +0000" }, "committer": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Thu Jul 16 14:17:11 2020 +0000" }, "message": "Revert \"VIXL simulator for ART (Stage1)\"\n\nThis reverts commit 48ca6a681efe1fa1cf82d8af918bf9bbfd35ae96.\n\nReason for revert: broken build 6685551 on aosp-master on full-eng\nBug: 161440641\n\nChange-Id: I849fe53f56c4786f0f2a1605cbfd215559f11072\n" }, { "commit": "48ca6a681efe1fa1cf82d8af918bf9bbfd35ae96", "tree": "87ff5251f8f843e64e3f3632c423856ba14ceadf", "parents": [ "cfea667ed9bfbdd21bf9812d1598603fc359d2e1" ], "author": { "name": "Xueliang Zhong", "email": "xueliang.zhong@linaro.org", "time": "Thu Mar 07 14:48:55 2019 +0000" }, "committer": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Thu Jul 16 13:31:48 2020 +0000" }, "message": "VIXL simulator for ART (Stage1)\n\nQuick User Guide: test/README.simulator.md\n\nThis CL enables running ART run-tests in a simulator on host machine.\nSome benefits of using this simulator approach:\n- No need to use a target device at all.\n Save developers from solving the device troubles: build, flash, usb,\n adb, etc.\n- Speed up development/debug/test cycle.\n- Allows easy debugging/testing new instruction features without real\n hardware.\n- Allows using a smaller AOSP Android manifest master-art.\n\nThe Stage1 CL provides support for running 30% of current run-tests.\nThe rest unsupported test cases are kept in knownfailures.json.\n\nFuture work will be supporting proper stack frame layout between\nsimulator and quick entrypoints, so that stack walk,\nQuickArgumentVisitor, deoptimization, etc can be supported.\n\nThis CL adds libart(d)-simulator-container library to the ART APEX. It\nhas cause the following increase of the APEX size (small, about 0.13% for\nrelease APEX, measured for target aosp_arm64-userdebug):\n Before:\n 88992 com.android.art.debug.apex\n 51612 com.android.art.release.apex\n 112352 com.android.art.testing.apex\n After:\n 89124 com.android.art.debug.apex\n 51680 com.android.art.release.apex\n 112468 com.android.art.testing.apex\n\nTest: art/test.py --run-test --optimizing --simulate-arm64\nTest: art/test.py --run-test --optimizing --host\nTest: m test-art-host-gtest\n\nChange-Id: I078812dde9aaf7128d9f262b2102251927596b7f\n" }, { "commit": "bbc6e7edb5fca4a61ac53dd9bce79cb4f0bb3403", "tree": "0fbce767bc383358cf4cd65aafc74140e1850982", "parents": [ "19379b58bd433da91230e4fe6cd96e7416d16adc" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Aug 24 16:58:47 2018 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Aug 28 11:06:07 2018 +0100" }, "message": "Use \u0027final\u0027 and \u0027override\u0027 specifiers directly in ART.\n\nRemove all uses of macros \u0027FINAL\u0027 and \u0027OVERRIDE\u0027 and replace them with\n\u0027final\u0027 and \u0027override\u0027 specifiers. Remove all definitions of these\nmacros as well, which were located in these files:\n- libartbase/base/macros.h\n- test/913-heaps/heaps.cc\n- test/ti-agent/ti_macros.h\n\nART is now using C++14; the \u0027final\u0027 and \u0027override\u0027 specifiers have\nbeen introduced in C++11.\n\nTest: mmma art\nChange-Id: I256c7758155a71a2940ef2574925a44076feeebf\n" }, { "commit": "33bff25bcd7a02d35c54f63740eadb1a4833fc92", "tree": "553db4f60878acf2a0fa7036a739d406df9a29b7", "parents": [ "321b3ca9a36d769283c64d4bdee0798db80af524" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Nov 01 14:35:42 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 02 10:11:02 2017 +0000" }, "message": "ART: Make InstructionSet an enum class and add kLast.\n\nAdding InstructionSet::kLast shall make it easier to encode\nthe InstructionSet in fewer bits using BitField\u003c\u003e. However,\nintroducing `kLast` into the `art` namespace is not a good\nidea, so we change the InstructionSet to an enum class.\nThis also uncovered a case of InstructionSet::kNone being\nerroneously used instead of vixl32::Condition::None(), so\nit\u0027s good to remove `kNone` from the `art` namespace.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nChange-Id: I6fa6168dfba4ed6da86d021a69c80224f09997a6\n" }, { "commit": "71da4878f2e3f0dc8b7c3a31b4f57172fde5f378", "tree": "ae560b5e56ce09cfaaf1f3c04e96366f193c4180", "parents": [ "b22ae40038aeeebb16936fbf62b48f080d6e7ef4" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Jul 26 10:02:07 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Jul 26 11:23:03 2017 -0700" }, "message": "ART: Move simulator to art/\n\nMove the simulator library out of the runtime directory. Let\u0027s not\npollute the runtime library.\n\nTest: m\nChange-Id: I351a0061ae628c3af0462b72d4de727db296ec23\n" }, { "commit": "af4e42a0d210aa3aa5d52926536b2ca5c2952934", "tree": "b64d683ba6ac11c0b7730df9a579aead2905dfff", "parents": [ "dce74be0c49e8a540affc0b5649a9cf8756b809b" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Aug 08 15:11:24 2016 +0100" }, "committer": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Fri Aug 12 13:22:34 2016 +0100" }, "message": "ARM64: VIXL: Support a newer version of VIXL.\n\nPlease note that compiling VIXL with -Wshadow is a known VIXL issue.\n\nThis will be resolved in a later version of VIXL, when we can drop\nthe deprecated API for getters and setters.\n\nFor more info take a look at VIXL_DEPRECATED in the VIXL source code.\n\nChange-Id: Iea30b1a7b065f9b16a92c6cc7ebdc50ef068b348\n" }, { "commit": "97c72b76cf776228196c6abd33973ef751de61ad", "tree": "7a78a2b19b0847281f8cf69af735b30b15732fa8", "parents": [ "1fd347303275a424d114c9833f954e8e27812554" ], "author": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Fri Jun 24 16:19:36 2016 +0100" }, "committer": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Fri Jul 15 09:48:07 2016 +0100" }, "message": "Fixes to build against new VIXL interface.\n\n- Fix namespace usage and use of deprecated functions.\n- Link all dependants to new libvixl-arm64 target for now.\n\nChange-Id: Iee6f299784fd663fc2a759f3ee816fdbc511e509\n" }, { "commit": "751beff19b36f777d9e3a966d754fd9cfad5d534", "tree": "450cb7ef8cb9f955a6d689c394bd85bc9eea14f1", "parents": [ "4bbe7807f313bb8e59131812c31bf31513094f8f" ], "author": { "name": "Phil Wang", "email": "phil.wang@linaro.org", "time": "Fri Aug 28 15:17:15 2015 +0800" }, "committer": { "name": "Phil Wang", "email": "phil.wang@linaro.org", "time": "Fri Nov 06 14:44:20 2015 +0800" }, "message": "Revert \"Revert \"Introduce support for hardware simulators, starting with ARM64\"\"\n\nThis reverts commit 4cd27d64b0bbdde61fa3f6674ceb24221853ac2c.\n\nThis depends on VIXL 1.11.\n\nChange-Id: I402c1fd6bbb218ba80ef8e59af203c9276151059\n" }, { "commit": "4cd27d64b0bbdde61fa3f6674ceb24221853ac2c", "tree": "20d0a46a943a3cd66341d87eb568cd8c5f83aec2", "parents": [ "edd0a6dbe26bb334f02d5abe649e3da9165277b2" ], "author": { "name": "Alex Light", "email": "allight@google.com", "time": "Tue Aug 18 23:03:42 2015 +0000" }, "committer": { "name": "Alex Light", "email": "allight@google.com", "time": "Tue Aug 18 16:17:57 2015 -0700" }, "message": "Revert \"Introduce support for hardware simulators, starting with ARM64\"\n\nThis reverts commit c2e1a5edc438274159c6ef8e65455ac73723a8f1.\n\nThis breaks the build for x86_64 targets. This is because on target the libvixl is not included as a\nlibrary for the libart.so target build. The build of non-x86_64 targets only works because the\ncompilers removes the dead-code that contains the libvixl symbols.\n\nBug: 23321940\nChange-Id: I39e93ff05b887665c47fb0986867f1d13ca65b9b\n" }, { "commit": "c2e1a5edc438274159c6ef8e65455ac73723a8f1", "tree": "30deefcdb9f8226a7367342000104248ea635487", "parents": [ "62dee441fff15e951c577b9565f87bb5f27c5ffb" ], "author": { "name": "Phil Wang", "email": "phil.wang@linaro.org", "time": "Wed Jul 29 15:14:09 2015 +0800" }, "committer": { "name": "Phil Wang", "email": "phil.wang@linaro.org", "time": "Tue Aug 18 15:15:17 2015 +0800" }, "message": "Introduce support for hardware simulators, starting with ARM64\n\nSimulator support for ARM64 is implemented with VIXL.\nNow codegen_test will also run on all supported hardware simulators.\n\nChange-Id: Idc740f566175d1a23c373ea9292b8fc5ba526d00\n" } ] }