)]}' { "log": [ { "commit": "1ca6f32dd26f97e2617c45627b470d548d573975", "tree": "ebb64a8b0507ff1b245e77aa435d4ca183874baf", "parents": [ "02fd071c03c8587ff2bbea639c165b24c11d9a2f" ], "author": { "name": "Andra Danciu", "email": "andradanciu@google.com", "time": "Wed Aug 12 08:58:07 2020 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Aug 13 09:41:48 2020 +0000" }, "message": "Revert^2 \"Revert^2 \"X86: VarHandle.Get() intrinsic for static primitive fields.\"\"\n\nThis reverts commit 0e5e1772fb6ed3dcbd1cdaf09e3c8cd2020091d5.\n\nReason for revert: Relanding the change. It was reverted because it\nseemed to be the source of a test failure, but it turned out to be a\nknown flaky test (Bug: 147572335).\n\nChange-Id: I572d2d1951b0909641a73df0b3ef2fd453f62d8b\n" }, { "commit": "0e5e1772fb6ed3dcbd1cdaf09e3c8cd2020091d5", "tree": "53daaedc7d7a07bec449723521dcfaad3782de83", "parents": [ "c3c7dff8784ab409fe0c3e47d9516ed0bc6f6cc9" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Tue Aug 11 23:03:59 2020 +0000" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Aug 12 00:56:06 2020 +0000" }, "message": "Revert \"Revert^2 \"X86: VarHandle.Get() intrinsic for static primitive fields.\"\"\n\nThis reverts commit ed0acfdaffdbf3c76fa57b15150390dabb4c69aa.\n\nReason for revert: Failing buildbot test\n\nChange-Id: Ib43f526de492f9a09075c6c57658b7a14d05b168\n" }, { "commit": "ed0acfdaffdbf3c76fa57b15150390dabb4c69aa", "tree": "c353c4191ba3d61ad5afda3ccef173f73121a79a", "parents": [ "04bc725e1eafb567be44f64f27e441efcc0bc150" ], "author": { "name": "Andra Danciu", "email": "andradanciu@google.com", "time": "Tue Aug 11 10:10:40 2020 +0000" }, "committer": { "name": "Andra Danciu", "email": "andradanciu@google.com", "time": "Tue Aug 11 12:05:00 2020 +0000" }, "message": "Revert^2 \"X86: VarHandle.Get() intrinsic for static primitive fields.\"\n\nTest: art/test.py --host --32 -r -t 712-varhandle-invocations\nTest: ART_READ_BARRIER_TYPE\u003dTABLELOOKUP ART_HEAP_POISONING\u003dtrue\nSOONG_ALLOW_MISSING_DEPENDENCIES\u003dtrue TARGET_BUILD_UNBUNDLED\u003dtrue\nart/test/testrunner/testrunner.py --interpreter --optimizing --host\n--dex2oat-jobs 4 -b --dist --verbose -t 712-varhandle-invocations\n\nBug: 65872996\n\nThis reverts commit e74df4c3f269f2f624fa6f093c48f901fe971002.\n\nReason for revert: Relanding the change. Support only Baker-style\nread barriers for VarHandleGet.\n\nChange-Id: Id02ff69350fb2a2f701a96a591b7efd52f1060e7\n" }, { "commit": "e74df4c3f269f2f624fa6f093c48f901fe971002", "tree": "31366eed138d6971725433da4349d0b048f9963e", "parents": [ "fc12a6cb415b2eacee0459fd170490a407c2548a" ], "author": { "name": "Andra Danciu", "email": "andradanciu@google.com", "time": "Mon Aug 10 09:35:51 2020 +0000" }, "committer": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Mon Aug 10 12:52:14 2020 +0000" }, "message": "Revert \"X86: VarHandle.Get() intrinsic for static primitive fields.\"\n\nThis reverts commit d9af38a3b76fc54909148456da2701666bade6e0.\n\nReason for revert: Broken build git_master-art-host/art-read-barrier-table-lookup @ 6749888\n\nChange-Id: I17f5717e3a9a204568526fc72bce5d56a383e38d\n" }, { "commit": "d3e9c62976780e830da79ae32be4192dee196db2", "tree": "bf7855545f49ea039c6824d340ce2a162ad40ebd", "parents": [ "60ef3997cbcd866c505e51ecde7f06a0535110a0" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 05 12:20:28 2020 +0100" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon Aug 10 09:17:34 2020 +0000" }, "message": "ARM: Allow FP args in core regs for @CriticalNative.\n\nIf a float or double argument needs to be passed in core\nregister to a @CriticalNative method due to soft-float\nnative ABI, insert a fake call to Float.floatToRawIntBits()\nor Double.doubleToRawLongBits() to satisfy type checks in\nthe compiler.\n\nWe cannot do that for intrinsics that expect those inputs in\nactual FP registers, so we still prevent such intrinsics\nfrom using `kCallCriticalNative`. This should be irrelevant\nif an actual intrinsic implementation is emitted. There are\ncurrently two unimplemented intrinsics that are affected by\nthe carve-out, namely MathRoundDouble and FP16ToHalf, and\nfour intrinsics implemented only when ARMv8A is supported,\nnamely MathRint, MathRoundFloat, MathCeil and MathFloor.\n\nTest: testrunner.py --target --32 -t 178-app-image-native-method\nBug: 112189621\nChange-Id: Id14ef4f49f8a0e6489f97dc9588c0e6a5c122632\n" }, { "commit": "d9af38a3b76fc54909148456da2701666bade6e0", "tree": "91e4d6c4307fd79738f7f89ab25a7d922854175d", "parents": [ "bf78fb558fc6c8a2cb71890f9981ad64d10d486e" ], "author": { "name": "Andra Danciu", "email": "andradanciu@google.com", "time": "Wed Aug 05 13:17:54 2020 +0000" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Aug 07 14:20:51 2020 +0000" }, "message": "X86: VarHandle.Get() intrinsic for static primitive fields.\n\nTest: art/test.py --host --32 -r -t 712-varhandle-invocations\nBug: 65872996\nChange-Id: I8f1eeb1c9041ae55b3a159a6eb1e356687e574e9\n" }, { "commit": "bf78fb558fc6c8a2cb71890f9981ad64d10d486e", "tree": "54735fa65d9f3776497a9601b7bf69c7486e6fae", "parents": [ "2c71e26d4fa5cd8f4dbf5c60291a7242725e43d2" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Aug 07 13:40:52 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Aug 07 13:40:52 2020 +0100" }, "message": "ARM64: Fix VarHandle.Get() intrinsic static field check.\n\nTest: New test in 712-varhandle-invocations\nTest: testrunner.py --target --64 -t 712-varhandle-invocations\nBug: 65872996\nChange-Id: I3adf62ae68f59855715550198ad3198a1c0dea2a\n" }, { "commit": "55cc5868ec31b2b71f3d69ed6283e5f75c065d99", "tree": "ab6449481874c953ffa1398d5c06dd0a904f1359", "parents": [ "8a8e1c5b4ccda0619c7bc946bc4790ea44ff8286" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 05 10:59:46 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 05 11:54:07 2020 +0000" }, "message": "ARM64: Fix VarHandle.Get() intrinsic for heap poisoning.\n\nTest: testrunner.py --target --64 -t 712-varhandle-invocations\n with and without ART_HEAP_POISONING\u003d1\nBug: 65872996\nChange-Id: I14c74494829c0d057666c914aa8bc64eae475b61\n" }, { "commit": "79db646837672c8188b1b7117f795a64ef0a5baf", "tree": "e09caf7ae8feb320bec5df35d01c0be56b69c2ff", "parents": [ "ebb726d186407779eb371aba849fd4f5978b2b8f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jul 31 14:57:32 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 04 08:16:37 2020 +0000" }, "message": "ARM64: VarHandle.Get() intrinsic for static primitive fields.\n\nTest: testrunner.py --target --64 -t 712-varhandle-invocations\nBug: 65872996\nChange-Id: I124f28a3bf5cdbeec5064b1e0c8fdf00a9ecfa68\n" }, { "commit": "e3e187f29fa4025e30c5a43decb2b6f6c584d59c", "tree": "b38e434558cc2c6d7a8153c709a9884313cd4df1", "parents": [ "1a277a6e5d5152b4fe4dd5717432ecf8941ec820" ], "author": { "name": "Andra Danciu", "email": "andradanciu@google.com", "time": "Thu Jul 30 12:19:31 2020 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Aug 03 10:03:16 2020 +0000" }, "message": "Check if VarHandle access mode is supported.\n\nThis commit checks if a VarHandle access mode is supported. If not, an\nUnsupportedOperationException is raised by calling the runtime to handle it.\n\nI added the polymorphic intrinsics case in the IntrinsicSlowPath\ncode generation to handle all the eventual exceptions. For now,\nnone of the operations are actually compiled. If the slow path is\nnot called, the runtime handles the operation.\n\nBug: b/65872996\nTest: art/test.py --host -r -t 712-varhandle-invocations --32\nTest: art/test.py --host --all-compiler -r\nChange-Id: I5a637561549b3fdd64fa53e2d7dbf835d3ae0d64\n" }, { "commit": "5439f051a950f0281eeafb8e8064839f2aea6e38", "tree": "889efef779fa462357f77cb2166c600cb0d60679", "parents": [ "483bf78ae61ab43a3d513cef0de0072e86d0b0b1" ], "author": { "name": "Ulya Trafimovich", "email": "skvadrik@google.com", "time": "Wed Jul 29 10:03:46 2020 +0100" }, "committer": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Wed Jul 29 13:58:15 2020 +0000" }, "message": "Revert^3 \"VIXL simulator for ART (Stage1)\"\n\nThis reverts commit e886d68b9c40c941d8966b9c90d0e265c75fb19e.\n\nReason for revert: simulator implemention is not ready yet.\n\nTest: lunch aosp_cf_x86_phone-userdebug \u0026\u0026 m\nTest: art/test.py --run-test --optimizing --host\nChange-Id: I03c8c09ea348205b0238d7a26caef3477cd6ae3b\n" }, { "commit": "2d4552035130474bdad7f7f30ffe50bc5f9d5d85", "tree": "d82bad85eababe43271fa9a98694891ad3c6da2b", "parents": [ "4db5ea400d1a641c830542f056ab14578fdabebd" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Tue Jul 28 16:22:10 2020 +0100" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Jul 28 18:16:00 2020 +0000" }, "message": "A few more inclusive language updates\n\nBased on:\n https://source.android.com/setup/contribute/respectful-code\n\n#inclusivefixit\n\nBug: 161336379\nBug: 161896447\nTest: art/test.py --host --64\nChange-Id: Ieb9af8f5abde2d2e75a2d490e4d3d5c621859a7c\n" }, { "commit": "72e27b0b29fd1bdea6747f62c5bd865d26a0bdcd", "tree": "970bdf71ef5272a231df09a0818a08d81920e5c2", "parents": [ "a462fa67f88a2b893e1543a763821d483247011d" ], "author": { "name": "Alex Light", "email": "allight@google.com", "time": "Mon Jul 27 12:59:58 2020 -0700" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Jul 28 16:13:40 2020 +0000" }, "message": "Remove deprecated debug_suspend_count TLS value\n\nThe debug_suspend_count TLS value has been dead for a while and was\naccidentally left in. Remove it entirely.\n\nTest: ./test.py --host\nChange-Id: Ie2ead0d30e5ff3885cdd83242cad2c826c7fb732\n" }, { "commit": "2446feb60919ceb09b5cab388291a86ccdc9be10", "tree": "c5293d846db8b93e3a3fc660ba5d07e5a56be4af", "parents": [ "2091019e6c3ca07454b97730f29bb7200fa9d46e" ], "author": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Mon Jul 27 12:25:49 2020 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jul 28 13:36:12 2020 +0000" }, "message": "Dump ISA into .cfg\n\nThe optimizing compiler dumps ISA features into .cfg which can be used\nby the checker. A new tool perf2cfg needs to know ISA a CFG corresponds\nto. The tool uses this to check that input perf data has the same ISA.\n\nThis CL implements in the compiler dumping ISA in addition to ISA features:\n\nbegin_compilation\n name \"isa:some_isa isa_features:feature1,-feature2\"\n method \"isa:some_isa isa_features:feature1,-feature2\"\n date 1580721972\nend_compilation\n\nBug: 147876827\nTest: ./art/tools/checker/run_unit_tests.py\nTest: test.py --target --optimizing --jit --interpreter\nTest: test.py --host --optimizing --jit --interpreter\nChange-Id: I189eae0f4de61e6a49c01d925e7136b5f7027c91\n" }, { "commit": "2091019e6c3ca07454b97730f29bb7200fa9d46e", "tree": "483ed18c115ec2db233ffa15c1d5084c4ef1578e", "parents": [ "098faa82913d24a0c71b5debc164ea717fac2b3e" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Tue Jul 28 10:08:11 2020 +0100" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Tue Jul 28 13:17:59 2020 +0000" }, "message": "Update invoke-type in HInvokePolymorphic\n\nBug: 154693569\nTest: art/test.py --host -r\nChange-Id: Ibdf88397e1c13caf7e333fd4c52bbc75f316bbfb\n" }, { "commit": "3c359ee6c49d0899934dabd0bb7ee07a1bd85489", "tree": "9146c0c86a50558059c795cc5191369d8e613933", "parents": [ "346fd964a826cfb5626582452b7519c04aee2f8a" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Wed Jun 24 19:25:10 2020 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jul 28 12:27:29 2020 +0000" }, "message": "ARM64: Enable SDOT/UDOT instructions emission.\n\nEnables SDOT/UDOT instructions emission for those arm64\ntargets which support DOTPROD feature. Currently only\nvector VecDotProd instruction could emit those.\n\nTest: test-art-target.\nTest: test-art-target --instruction-set-features runtime.\nTest: 684-checker-simd-dotprod.\n\nChange-Id: I57a16e340a42879ff19a3b2439ea11525dbeaccc\n" }, { "commit": "346fd964a826cfb5626582452b7519c04aee2f8a", "tree": "49fb6cf2ab865391ba4027389b0049474df38c7b", "parents": [ "d3ee902ed06b635eedebc796543a67299eb6cd05" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Jul 27 16:51:00 2020 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Jul 28 11:13:37 2020 +0000" }, "message": "More inclusive language in the runtime\n\nTest: m\nBug: 161896447\nBug: 161850439\nBug: 161336379\nChange-Id: Iabc29fa43b4b5a403699d6bca95e9a2cb8945d77\n" }, { "commit": "b931b8c25c93c9384fa6c02bc487cf7424fa6057", "tree": "eaa091cac485552c71e7e2e88a2d970f223eb9e5", "parents": [ "853fc2ea8c4fb30d71adb1dbba6ebf0e8493ba51" ], "author": { "name": "Andra Danciu", "email": "andradanciu@google.com", "time": "Mon Jul 27 13:16:37 2020 +0000" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Tue Jul 28 10:01:23 2020 +0000" }, "message": "Add clarification for HInvokePolymorphic constructor parameter\n\nAdded a comment that clarifies why the ArtMethod object is needed\nfor HInvokePolymorphic nodes.\n\nBug: b/65872996\nChange-Id: I9dd0451aa29492b17c5963ffb3e9925601262f3b\n" }, { "commit": "8ebd86ea2ea9eac96d48db88c65364d56ff3b8ab", "tree": "8d4009c204136af090ec904a35168572b06c1b1a", "parents": [ "07f78906212edb684b3bf046d1bb661613f81c22" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jul 27 12:49:24 2020 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jul 27 14:50:45 2020 +0000" }, "message": "Replace \"dummy\" in libartbase/, libdexfile/, compiler/.\n\nTest: m test-art-host-gtest\nBug: 161336379\nChange-Id: I5335b28b1f66cdec39500563385bda99c580454d\n" }, { "commit": "a0130e8d2842a9a82e4fd4e811ee699272eb2e0b", "tree": "1468e015b7c4b001e40d847cf1448311706516e7", "parents": [ "75c8b635178d0c59691c2bc22f3bd1101d5516b5" ], "author": { "name": "Andra Danciu", "email": "andradanciu@google.com", "time": "Thu Jul 23 12:34:56 2020 +0000" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Fri Jul 24 10:11:54 2020 +0000" }, "message": "Prepare compiler for adding VarHandle support.\n\nThis commit prepares the ground for adding VarHandle support\nin the compiler. The intrinsic locations builder and code\ngenerator are now triggered for HInvokePolymorphic nodes.\nVarHandle and MethodHandle intrinsics are marked as unimplemented\nrather than unreachable.\n\nSince the Varhandle intrinsics are not implemented yet, the\nfunctionality is not changed (i.e. the intrinsics are evaluated\nat runtime and not compiled). I manually tested that the intrinsic\nVisit* methods are triggered for the VarHandle methods.\n\nBug: b/65872996\nTest: art/test.py --host -r -t 713-varhandle-invokers\nTest: art/test.py --host --all-compiler -r\n\nChange-Id: I3333728c5f16d8dc4f92ceae2738ed59b3e31e6a\n" }, { "commit": "2d53643ca0e05e7c67894aa75eba899acbb9f287", "tree": "39299475c04303312f527bc00355bd9fd7a3fad8", "parents": [ "cefebc86af30522bf79d2a89a2bcf96f7f970ecb" ], "author": { "name": "Ian Pedowitz", "email": "ijpedowitz@google.com", "time": "Wed Jul 22 14:33:00 2020 -0700" }, "committer": { "name": "Ian Pedowitz", "email": "ijpedowitz@google.com", "time": "Fri Jul 24 00:41:56 2020 +0000" }, "message": "Update language to comply with Android’s inclusive language guidance\n\nSee https://source.android.com/setup/contribute/respectful-code for\nreference\n\nBug: 161896447\nBug: 161850439\nBug: 161336379\nTest: m -j checkbuild cts docs tests\nChange-Id: I32d869c274a5d9a3dac63221e25874fe685d38c4\n" }, { "commit": "c2208272f24e921b808af53721d2ca821d76503c", "tree": "924a1ca0e42c8a59947c4c86e5d26ac4f9d8d71b", "parents": [ "50a454b23485ceb8fe37e102abc0e41e2857876a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 23 11:04:39 2020 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 23 14:15:33 2020 +0000" }, "message": "Replace \"dummy\" with \"fake\" in some tests.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing -t 004-JniTest\nBug: 161336379\nChange-Id: Ifab653fbf66af8ea3bd4a35ca116c7cc91be51bd\n" }, { "commit": "50a454b23485ceb8fe37e102abc0e41e2857876a", "tree": "12699b0a7cd40e916c210bed4118a836491fea6d", "parents": [ "aacf977a3b3af644a7e2eb58d8e56a23d1f3d215" ], "author": { "name": "Ulya Trafimovich", "email": "skvadrik@google.com", "time": "Thu Jul 23 11:47:51 2020 +0100" }, "committer": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Thu Jul 23 13:33:39 2020 +0000" }, "message": "Link statically with libart(d)-simulator-container.\n\nTest: lunch aosp_cf_x86_phone-userdebug \u0026\u0026 m\nTest: art/test.py --run-test --optimizing --host\nTest: m test-art-host-gtest\nChange-Id: I39d4b500d73a48e1a102a7c5826b6af384b8f031\n" }, { "commit": "aacf977a3b3af644a7e2eb58d8e56a23d1f3d215", "tree": "6a595bf88f3124e61c826bcd72520dd406664f1e", "parents": [ "4ef451aecd4008ccee2ebf6136a70ed6a5c14717" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Wed Jul 22 21:51:00 2020 +0100" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Jul 23 13:18:06 2020 +0000" }, "message": "Reword some comments to be more inclusive\n\nAlso corrects a typo s/He/We/.\n\nBug: 161336379\nBug: 161850439\nBug: 161896447\nTest: m\nChange-Id: Ie8e37310eb777b7ee41a13f8894e99795c29a98a\n" }, { "commit": "4ef451aecd4008ccee2ebf6136a70ed6a5c14717", "tree": "d9f2155873bf0c040aad3cc372c3b3509fe4b583", "parents": [ "659e8d6f76d5ce487c46710291e143bc897b5071" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 23 09:54:27 2020 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 23 11:58:05 2020 +0000" }, "message": "Rename kDummy32BitOffset to kPlaceholder32BitOffset.\n\nAnd drop an obsolete reference to Quick compiler.\n\nTest: m test-art-host-gtest\nBug: 161336379\nChange-Id: If08cc0ca83cfeb1c6923c41f9d61766f878a295a\n" }, { "commit": "52d5354a399b4581222d0f02f2677927b48985f7", "tree": "c6e9beb18d514c0d586fe8b578a15ddfd9ce532e", "parents": [ "40b0614be3296e163654c4e293793d00bcf36a5a" ], "author": { "name": "Fabio Rinaldi", "email": "fabio.rinaldi@linaro.org", "time": "Mon Feb 10 17:28:06 2020 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jul 22 14:37:34 2020 +0000" }, "message": "Dump instruction set features in .cfg\n\nThis commit adds a compilation block at the beginning of the .cfg\ndumped by the optimizing compiler when --dump-cfg is enabled.\n\nThe compilation block appears in the following form:\n\nbegin_compilation\n name \"isa_features:feature1,-feature2\"\n method \"isa_features:feature1,-feature2\"\n date 1580721972\nend_compilation\n\nThis compilation block dump is passed to checker script (see\nhttps://android-review.googlesource.com/c/platform/art/+/1290997)\nfor checking if a certain instruction set feature was used at compile\ntime.\n\nAuthor: Fabio Rinaldi\nCommitter: Artem Serov\n\nBug: 147876827\nTest: ./art/tools/checker/run_unit_tests.py\nTest: test.py --target --optimizing\nChange-Id: If4309af4bab892f715aad1d3bd338f8ee11e497c\n" }, { "commit": "4307cd77319dd88eb65e88e5b4763250eff9c543", "tree": "bec7345debfa105c1dd0e8c161eaf89281eb4d53", "parents": [ "76228ffa13c3101c1a74cc561c171c4064593796" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jul 17 14:35:56 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jul 20 08:21:11 2020 +0000" }, "message": "LSE: Fix tracking heap values for small types.\n\nWe previously inserted TypeConversion to 8-bit and 16-bit\ntypes only when replacing loads at the end of LSE. This is\ninsufficient as it allowed incorrect merging of values that\nhad different type. We now insert the TypeConversion when we\ndesignate a load for replacement and therefore when a value\nretrieved by such load is stored in another heap location,\nwe record the substitute TypeConversion as the heap value.\n\nThis replaces the insufficient fix from\n https://android-review.googlesource.com/538635 .\n\nTest: New tests in 530-checker-lse and 530-checker-lse3.\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nBug: 161521389\nChange-Id: I7c41931126455411d25f0d675857f104700a15af\n" }, { "commit": "e886d68b9c40c941d8966b9c90d0e265c75fb19e", "tree": "ad78c4e375c95a96e200baa2786e748505ab928b", "parents": [ "f12dd5861e0eaf1822c12137fd353b5e79761a6c" ], "author": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Thu Jul 16 15:09:38 2020 +0000" }, "committer": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Fri Jul 17 11:04:27 2020 +0000" }, "message": "Revert^2 \"VIXL simulator for ART (Stage1)\"\n\nThis reverts commit 3060bb919cd2f37c6a97e87c1581ac5294af72b3.\n\nReason for revert: relanding original change. The fix is setting\n`device_supported: false` for libart(d)-simulator module in the .bp\nfile (`m checkbuild` attempted to build it for arm32 and failed).\nOriginal commit message:\n\nVIXL simulator for ART (Stage1)\n\nQuick User Guide: test/README.simulator.md\n\nThis CL enables running ART run-tests in a simulator on host machine.\nSome benefits of using this simulator approach:\n- No need to use a target device at all.\n Save developers from solving the device troubles: build, flash, usb,\n adb, etc.\n- Speed up development/debug/test cycle.\n- Allows easy debugging/testing new instruction features without real\n hardware.\n- Allows using a smaller AOSP Android manifest master-art.\n\nThe Stage1 CL provides support for running 30% of current run-tests.\nThe rest unsupported test cases are kept in knownfailures.json.\n\nFuture work will be supporting proper stack frame layout between\nsimulator and quick entrypoints, so that stack walk,\nQuickArgumentVisitor, deoptimization, etc can be supported.\n\nThis CL adds libart(d)-simulator-container library to the ART APEX. It\nhas caused the following increase of the APEX size (small, about 0.13%\nfor release APEX, measured for target aosp_arm64-userdebug):\n Before:\n 88992 com.android.art.debug.apex\n 51612 com.android.art.release.apex\n 112352 com.android.art.testing.apex\n After:\n 89124 com.android.art.debug.apex\n 51680 com.android.art.release.apex\n 112468 com.android.art.testing.apex\n\nChange-Id: I461c80aa9c4ce0673eef1c0254d2c539f2b6a8d5\nTest: art/test.py --run-test --optimizing --simulate-arm64\nTest: art/test.py --run-test --optimizing --host\nTest: m test-art-host-gtest\n" }, { "commit": "3060bb919cd2f37c6a97e87c1581ac5294af72b3", "tree": "6a2b517812ff83cd10cc3b055635d0746157b345", "parents": [ "48ca6a681efe1fa1cf82d8af918bf9bbfd35ae96" ], "author": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Thu Jul 16 14:17:11 2020 +0000" }, "committer": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Thu Jul 16 14:17:11 2020 +0000" }, "message": "Revert \"VIXL simulator for ART (Stage1)\"\n\nThis reverts commit 48ca6a681efe1fa1cf82d8af918bf9bbfd35ae96.\n\nReason for revert: broken build 6685551 on aosp-master on full-eng\nBug: 161440641\n\nChange-Id: I849fe53f56c4786f0f2a1605cbfd215559f11072\n" }, { "commit": "48ca6a681efe1fa1cf82d8af918bf9bbfd35ae96", "tree": "87ff5251f8f843e64e3f3632c423856ba14ceadf", "parents": [ "cfea667ed9bfbdd21bf9812d1598603fc359d2e1" ], "author": { "name": "Xueliang Zhong", "email": "xueliang.zhong@linaro.org", "time": "Thu Mar 07 14:48:55 2019 +0000" }, "committer": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Thu Jul 16 13:31:48 2020 +0000" }, "message": "VIXL simulator for ART (Stage1)\n\nQuick User Guide: test/README.simulator.md\n\nThis CL enables running ART run-tests in a simulator on host machine.\nSome benefits of using this simulator approach:\n- No need to use a target device at all.\n Save developers from solving the device troubles: build, flash, usb,\n adb, etc.\n- Speed up development/debug/test cycle.\n- Allows easy debugging/testing new instruction features without real\n hardware.\n- Allows using a smaller AOSP Android manifest master-art.\n\nThe Stage1 CL provides support for running 30% of current run-tests.\nThe rest unsupported test cases are kept in knownfailures.json.\n\nFuture work will be supporting proper stack frame layout between\nsimulator and quick entrypoints, so that stack walk,\nQuickArgumentVisitor, deoptimization, etc can be supported.\n\nThis CL adds libart(d)-simulator-container library to the ART APEX. It\nhas cause the following increase of the APEX size (small, about 0.13% for\nrelease APEX, measured for target aosp_arm64-userdebug):\n Before:\n 88992 com.android.art.debug.apex\n 51612 com.android.art.release.apex\n 112352 com.android.art.testing.apex\n After:\n 89124 com.android.art.debug.apex\n 51680 com.android.art.release.apex\n 112468 com.android.art.testing.apex\n\nTest: art/test.py --run-test --optimizing --simulate-arm64\nTest: art/test.py --run-test --optimizing --host\nTest: m test-art-host-gtest\n\nChange-Id: I078812dde9aaf7128d9f262b2102251927596b7f\n" }, { "commit": "b461b53c926dae7f1959a309b0a2b109b6d3c4d3", "tree": "a9d3d51d8a3267dd3e7724c1ab3bf70cfd4c417a", "parents": [ "fab6f1c479f6053a0c1eaaa889e0ff067d596211" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Jul 13 17:45:22 2020 +0000" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Jul 15 09:48:56 2020 +0000" }, "message": "Revert^2 \"Switch to LLVM prebuilt tools for ART gtests\"\n\nIt is also necessary to adjust the expected output of some tests.\n\nThis reverts commit ea54b823a3a02f65c865e11bbbccb327a273c039.\n\nBug: 147817558\nTest: m test-art-host-gtest\nChange-Id: Ib244e8b7d43d575299654397a47056f295ab4589\n" }, { "commit": "fab6f1c479f6053a0c1eaaa889e0ff067d596211", "tree": "14d18defe0ae9ab78a52f19b74d1532ac2a29391", "parents": [ "d2c30c33ed4d6ba33efa1be1813449621d43deb4" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jul 14 16:25:05 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jul 15 08:04:01 2020 +0000" }, "message": "Fix incorrect LSE across throwing ArraySet.\n\nTest: Additional test in 530-checker-lse.\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nBug: 161233339\nChange-Id: I0aaa6a4a1060e1a5abdbb49b6241e7e0bf58a7d5\n" }, { "commit": "ea54b823a3a02f65c865e11bbbccb327a273c039", "tree": "e6cb592138b95d2cb3ab5a132d56b3211915a108", "parents": [ "7285a4bc7337cf6382ac464b979ae5db986a2a53" ], "author": { "name": "Alex Light", "email": "allight@google.com", "time": "Fri Jul 10 18:28:56 2020 +0000" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Jul 10 19:34:40 2020 +0000" }, "message": "Revert \"Switch to LLVM prebuilt tools for ART gtests\"\n\nThis reverts commit 8070443ce4b31a6787c22490f18f838f8f6ed4be.\n\nReason for revert: Failing on chrome buildbots.\nTest: None\nBug: 137817558\n\nChange-Id: I4cbb4898e859ce33560592dd63cbf4a413048662\n" }, { "commit": "8070443ce4b31a6787c22490f18f838f8f6ed4be", "tree": "ca9952b599e81570b60a0b1d403316de45d3f340", "parents": [ "60690e495c3d6ead778bc25c44e925c5fd66173f" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Jul 01 13:40:19 2020 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Jul 10 10:57:04 2020 +0000" }, "message": "Switch to LLVM prebuilt tools for ART gtests\n\nIt is also necessary to adjust the expected output of some tests.\n\nBug: 147817558\nTest: m test-art-host-gtest\nChange-Id: Ib517169614470193e0c55f566adb72a526ae6902\n" }, { "commit": "2642cd4bb5308083ac44023f670519350ca96cf4", "tree": "aef84ad5a724535e9a803aef09cd06d51ad1daf3", "parents": [ "194f555db74816aa380d2f46f63c8626f38e9b71" ], "author": { "name": "Andra Danciu", "email": "andradanciu@google.com", "time": "Thu Jul 09 13:36:45 2020 +0000" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Thu Jul 09 16:14:00 2020 +0000" }, "message": "Make Integer.divideUnsigned intrinsic for x86_64.\n\nBug: 156736938\nTest: art/test.py --host --64 -r -t 082-inline-execute\nChange-Id: Id5fa2fb8704b5db32584c7ec625f8c2451e23762\n" }, { "commit": "194f555db74816aa380d2f46f63c8626f38e9b71", "tree": "d81626d2023f2d5a7f77b1ff4718e353ee76bc90", "parents": [ "d6e14e0b6a3447d6e89a93d0a017e92b11dc5f6f" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Jul 07 01:10:07 2020 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Jul 09 15:58:18 2020 +0000" }, "message": "Refactor arm assembly tests.\n\nAnother step in preparation to move to the LLVM toolchain.\n\nBug: 147817558\nTest: m test-art-host-gtest\nChange-Id: Ie5be337165d8f24e04740de0486144fa6a62f063\n" }, { "commit": "d6e14e0b6a3447d6e89a93d0a017e92b11dc5f6f", "tree": "4e30db113ef4352874e57022a654b341e71f1a92", "parents": [ "be7fe3b5466e10c4c49f027f10a801e1a4a9216c" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Jul 01 13:19:17 2020 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Jul 09 13:21:59 2020 +0000" }, "message": "Rewrite assembler_test_base.h\n\nSimplify the code in preparation of move to LLVM prebuilt tools.\n\nBug: 147817558\nTest: m test-art-host-gtest\nChange-Id: Iba277235255fd7d7f0965749b0b2d4a9567ced1f\n" }, { "commit": "be7fe3b5466e10c4c49f027f10a801e1a4a9216c", "tree": "e8946fd568d6ce71114e0d3d75c6b329437dea4c", "parents": [ "dc787f488ce151478af1149c04a10b21b2b9fc6e" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 09 10:58:12 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 09 10:58:12 2020 +0100" }, "message": "Add some x86/x86-64 assembler tests.\n\nAlso add divq() and divl() to x86-64 assembler and clean up\na test. This is a follow-up to\n https://android-review.googlesource.com/1355865 .\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing -t 082-inline-execute\nBug: 156736938\nChange-Id: Iade33a2250cea481249f6b976bc53c86663cb901\n" }, { "commit": "dc787f488ce151478af1149c04a10b21b2b9fc6e", "tree": "38d402813c9c3f541630255e9f9890a9c6842c45", "parents": [ "9a09e7cf11b2653e6da2b179ac03bc6bb71c81e3" ], "author": { "name": "Andra Danciu", "email": "andradanciu@google.com", "time": "Tue Jul 07 14:28:56 2020 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 09 09:44:58 2020 +0000" }, "message": "Make Integer.divideUnsigned intrinsic for x86.\n\nBug: 156736938\nTest: Added a test to 082-inline-execute.\nTest: art/test.py --host --32 -r -t 082-inline-execute\nChange-Id: Id516126fce10f2fa52b95c1b2b107ca7bf45e347\n" }, { "commit": "c473dc7ae830ff6db4c9cead2be679af41da80e3", "tree": "b5b02261fdd2822f6478e0b83698bf35ee7c5e9a", "parents": [ "01e5698d5440c2665b7ab6dd924985843be161a2" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jul 03 15:04:21 2020 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jul 03 19:31:43 2020 +0000" }, "message": "Create individual counters and timers for compilation kinds.\n\nBug: 112676029\nTest: m\nChange-Id: I6f500d1253288e89ab83cd5d77f6ce0360bff340\n" }, { "commit": "f9388416a3315b93d0cf14eeaf8df49a7c4da176", "tree": "f90d73c779cc16bf2a532b102820a2c7ecdd30e9", "parents": [ "af92a0f06fe3ab2618ccc220df3dacc3a20d8bb1" ], "author": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Thu Jul 02 15:25:13 2020 +0100" }, "committer": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Thu Jul 02 17:23:25 2020 +0100" }, "message": "ARM: Optimize Div/Rem by positive const for non-negative dividends\n\nWhen a constant divisor is positive and it can be proved that dividends\nare non-negative, there is no need to generate instructions correcting\nthe result.\n\nThe CL implements this optimization for ARM32/ARM64.\n\nTest: 411-checker-hdiv-hrem-const\nTest: test.py --host --optimizing --jit --gtest --interpreter\nTest: test.py -target --optimizing --jit --interpreter\nTest: run-gtests.sh\nChange-Id: Idf9aa740f14700000948b5ca58311be403a269ee\n" }, { "commit": "af92a0f06fe3ab2618ccc220df3dacc3a20d8bb1", "tree": "a1825765fba713b9805a26b35743506907cdefe8", "parents": [ "8d799686ff11ef800a8489272f4e0b36b6ab21b3" ], "author": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Fri Jun 26 13:28:33 2020 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jul 02 10:49:08 2020 +0000" }, "message": "ARM: Optimize Div/Rem by 2^n for non-negative dividends\n\nWhen it can be proved that dividends are non-negative or the min integer\nif their type is integral, there is no need to generate instructions\ncorrecting the result.\n\nThe CL implements this optimization for ARM32/ARM64.\n\nTest: 411-checker-hdiv-hrem-pow2\nTest: test.py --host --optimizing --jit --gtest --interpreter\nTest: test.py -target --optimizing --jit --interpreter\nTest: run-gtests.sh\n\nChange-Id: I11211a42918b5801fce8e78f305e69549739c23c\n" }, { "commit": "58fb5e88e30335abfb59536f5d3c195ef95c1ef3", "tree": "d9dad4a7b1e45a7ed7b7ccb2eb17ed74594f66d1", "parents": [ "0a17b6a0e705e45cf47407d0573ef8a7fd67cd99" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Jul 01 13:23:11 2020 +0100" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Jul 01 14:05:04 2020 +0000" }, "message": "Fix X86Assembler::repe_cmpsb\n\nWe were emitting the wrong instruction.\n\nThis code seems unused in the compiler.\n\nTest: m test-art-host-gtest\nChange-Id: I6d990dd76f8a8a081158f2b5936e734db88fa345\n" }, { "commit": "0a17b6a0e705e45cf47407d0573ef8a7fd67cd99", "tree": "9b864aae8d952fc0ee2829672220774c91494303", "parents": [ "b7f4d0f15f02224ce5048ba566b2dce193ee103a" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Jul 01 11:29:47 2020 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Jul 01 12:41:06 2020 +0000" }, "message": "Revert \"Support running of host gtests in eng-prod\"\n\nThis reverts commit 22872da653053bb4b86fbef67163a9f6b7aee25b.\n\nReason for revert: Checking if this CL is cause of b/160132136\n\nBug: 147817558\nBug: 160132136\nChange-Id: Ifb6f2292292a7f69fbd0f2e9204fd37dbca84277\n" }, { "commit": "22872da653053bb4b86fbef67163a9f6b7aee25b", "tree": "5355ac349eeb15165c6db0c17e93f1286c52a3d4", "parents": [ "11303f2983bf2ef8d55870afcd0d5937f0778753" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Jun 25 15:23:15 2020 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Jun 26 17:14:57 2020 +0000" }, "message": "Support running of host gtests in eng-prod\n\nAdd more libraries and tools to the shared ART directory in testcases.\n\nChange the tests environment setup, so that it can find the tools.\n\nVast majority of tests pass. Some individual tests still need fixing.\n\nBug: 147817558\nTest: run gtests in forrest\nChange-Id: I3214f532436828c2a1a5a543e69d6b9bcf1e42af\n" }, { "commit": "2d10117d8188f57a3964f161366861ae02b954c7", "tree": "465ea1a6754f8ac097dc23aa22a91abf1c9f8ad9", "parents": [ "a63a2e971079f57d86acd2e736be99fe3f4f4a91" ], "author": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Thu Jun 25 16:52:03 2020 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jun 26 07:41:20 2020 +0000" }, "message": "ARM32: Combine LSR into ADD for Div by 2^n\n\nCombining LSR into ADD reduces a number of used registers from three to\ntwo and a needed number of instructions.\n\nThis CL implements this optimization.\n\nTest: 411-checker-hdiv-hrem-pow2\nTest: test.py --host --optimizing --jit --gtest --interpreter\nTest: test.py --32 --target --optimizing --jit --interpreter\nTest: run-gtests.sh\nChange-Id: I230d2623e745884fe4278a860740829ee63750c6\n" }, { "commit": "a5ed9a16c0bd4f0571b4d9fff951257d638b1199", "tree": "97c1a4aaae1772d9825777e14bbd0c5786d6f169", "parents": [ "86fafac1fb5c26ab671569258bb5125fa3207c5c" ], "author": { "name": "Josh Gao", "email": "jmgao@google.com", "time": "Wed Jun 17 19:24:21 2020 -0700" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Jun 24 10:59:01 2020 +0000" }, "message": "Mark deduplicated symbols more obviously.\n\nMove \"[DEDUPED]\" to the front of the symbol name to make the fact that\nthe symbol was deduplicated more obvious at a glance.\n\nBug: http://b/32949969\nTest: treehugger\nChange-Id: I4b60ee1eedd709dfd41b8da27ad6bb9e8197acda\n" }, { "commit": "dec7817522eeaf8f88dcae9ce065969aeebda3b3", "tree": "a15fd16ccb4a1929ec60584ead8f095b565c9e3e", "parents": [ "ea4d7d2d52dd9795cf39eccd46cb07551c62392f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 19 15:31:23 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 22 08:05:28 2020 +0000" }, "message": "Optimizing: Introduce {Increase,Decrease}Frame().\n\nAnd use it to clean up code generators.\n\nAlso fix CFI in MaybeIncrementHotness() for arm/arm64/x86.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: testrunner.py --host --debuggable --ndebuggable \\\n --optimizing --jit --jit-on-first-use -t 178\nTest: aosp_cf_x86_phone-userdebug boots.\nTest: aosp_cf_x86_phone-userdebug/jitzygote boots.\nTest: # On blueline:\n testrunner.py --target --debuggable --ndebuggable \\\n --optimizing --jit --jit-on-first-use -t 178\nBug: 112189621\nChange-Id: I524e6c3054ffe1b05e2860fd7988cd9995df2963\n" }, { "commit": "187a2014bdd8c19092766e916393bb74dfc5b788", "tree": "8e9a1fba8dd3dbf8e9167159c11d0316a9a01b86", "parents": [ "3d190c0f01071c5c402a96ac77ef07d20291405a" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Jun 19 14:21:26 2020 +0100" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Jun 19 14:52:14 2020 +0000" }, "message": "Improve DWARF test logging.\n\nBug: 159295421\nTest: Make some of the tests fail locally and observe output.\nChange-Id: I3d82f85ff1cb727d73b51688d35271d08a3f6c98\n" }, { "commit": "3d190c0f01071c5c402a96ac77ef07d20291405a", "tree": "c99b356725b7474448ae2c14d7bbe0e491c0cd15", "parents": [ "86c8752f64629325026945cd4eabd1dcea224acb" ], "author": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Wed Jun 17 15:37:02 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 19 11:32:38 2020 +0000" }, "message": "ART: Transform Sub+Sub into Sub+Add to merge Shl\n\nIn the instruction sequence like the following:\n t1 \u003d Shl(a, n)\n t2 \u003d Sub(t1, *)\n r \u003d Sub(*, t2)\nShl cannot be merged with Sub. However it can be done when the first Sub\noperands are reordered and the second Sub is replaced with Add:\n t1 \u003d Shl(a, n)\n t2 \u003d Sub(*, t1)\n r \u003d Add(*, t2)\n\nThis CL implements this transformation in the ARM/ARM64 instruction simplifiers.\n\nTest: 411-checker-instruct-simplifier-hrem\nTest: test.py --host --optimizing --jit --gtest --interpreter\nTest: test.py --target --optimizing --jit --interpreter\nTest: run-gtests.sh\nChange-Id: I24fde29d307f3ad53a8df8bbafe945b4f733ce6c\n" }, { "commit": "86c8752f64629325026945cd4eabd1dcea224acb", "tree": "9dc2be978f9e784a3ce16fa29d46941a94ac1c94", "parents": [ "f97a859e85f703644d897f0e3e1bc54315557aaa" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon May 11 16:55:55 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 19 08:26:46 2020 +0000" }, "message": "Direct calls to @CriticalNative methods.\n\nEmit direct calls from compiled managed code to the native\ncode registered with the method, avoiding the JNI stub.\n\nGolem results:\nart-opt-cc x86 x86-64 arm arm64\nNativeDowncallStaticCritical +12.5% +62.5% +75.9% +41.7%\nNativeDowncallStaticCritical6 +55.6% +87.5% +72.1% +35.3%\nart-opt x86 x86-64 arm arm64\nNativeDowncallStaticCritical +28.6% +85.6% +76.4% +38.4%\nNativeDowncallStaticCritical6 +44.6% +44.6% +74.6% +32.2%\n\nTest: Covered by 178-app-image-native-method.\nTest: m test-art-host-gtest\nTest: testrunner.py --host --debuggable --ndebuggable \\\n --optimizing --jit --jit-on-first-use\nTest: run-gtests.sh\nTest: testrunner.py --target --optimizing\nTest: testrunner.py --target --debuggable --ndebuggable \\\n --optimizing --jit --jit-on-first-use -t 178\nTest: aosp_cf_x86_phone-userdebug boots.\nTest: aosp_cf_x86_phone-userdebug/jitzygote boots.\nBug: 112189621\nChange-Id: I8b37da51e8fe0b7bc513bb81b127fe0416068866\n" }, { "commit": "396198b6bd6635fff52091131ca5be94cfab1d74", "tree": "5f49cc86258bbde5913420c1cb0cc009a8eb456a", "parents": [ "0d60a2b1eaa2cd2ec3481e49578b77405353efa1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jun 16 12:02:45 2020 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 18 15:07:22 2020 +0000" }, "message": "Handle unresolved field type in compiler.\n\nMake behavior consistent with interpreter, by only resolving field types\nwhen the stored value is not null.\n\nNote that this differs from RI behavior which throws a\nNoClassDefFoundError when loading the BadField class.\n\nBug: 79751666\n\nTest: 173-missing-field-type\nChange-Id: I1e584f3129fd651bee1c9635c90bc30e13190a90\n" }, { "commit": "0d60a2b1eaa2cd2ec3481e49578b77405353efa1", "tree": "91f16b9321ef7631aff731b10da2024c6c9d2029", "parents": [ "289bd1cccdb3aa37e2d129980f5c151f52f84897" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 17 14:31:56 2020 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 18 08:37:10 2020 +0000" }, "message": "Introduce an enum for the compilation kind.\n\nTest: test.py\nChange-Id: I5329e50a6b4521933b6b171c8c0fbc618c3f67cd\n" }, { "commit": "289bd1cccdb3aa37e2d129980f5c151f52f84897", "tree": "d7390d83a68045c61d7f3bc950cef8f398ee3993", "parents": [ "2b74f60158fe85192c4f9b8810fe3cdffabe4198" ], "author": { "name": "Alex Light", "email": "allight@google.com", "time": "Fri Apr 03 15:42:30 2020 -0700" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Jun 17 18:07:32 2020 +0000" }, "message": "Make GVN handle HDeoptimize better\n\nThe GVN system didn\u0027t handle the deoptimization very well since\ndeoptimize is a predicated operation. This means that HDeoptimize\nneeds to prevent some code motion but if it isn\u0027t taken the operation\nhas no effect. This confused the GVN system into thinking that it\ncannot merge deoptimizations. To fix this we special cased the side\neffects GVN considers deoptimizations to have.\n\nTest: ./test.py --host\nChange-Id: Ic79d975f9ae584a07026647cee2768ed1105e5a9\n" }, { "commit": "2b74f60158fe85192c4f9b8810fe3cdffabe4198", "tree": "0c6489b98b6812cb7d1a5a7cfec6c6439e7885cf", "parents": [ "c19822c60369a285d836b93db77d77a8ba3380ca" ], "author": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Wed Jun 17 12:34:19 2020 +0100" }, "committer": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Wed Jun 17 12:41:07 2020 +0100" }, "message": "ART: Add recognition of optimized HRems in BCE\n\nThe instruction simplifier can optimized HRems into\nHDiv+HMul+HSub or HDiv+HShl+HAdd(HSub)+HSub.\nDevelopers can also manually optimized them.\nThis prevents BCE from assigning ranges and eliminating\nbound checks.\n\nThis CL adds recognition of such optimized HRems to BCE.\n\nTest: 449-checker-bce-rem\nTest: test.py --host --optimizing --jit --gtest --interpreter\nTest: test.py --target --optimizing --jit --interpreter\nTest: run-gtests.sh\nChange-Id: Ief23dcb029e3a03b5e60d4388fcbb84e143a9ea5\n" }, { "commit": "6587d9110bd7f836e43db16f3f676da996218aef", "tree": "437d06a8e60fd70aaafaf2b167dfe636a303c68a", "parents": [ "1912a5c7b9400009e361b0db52da77cc78f1cd77" ], "author": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Fri Jun 12 10:51:43 2020 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 17 08:00:58 2020 +0000" }, "message": "ART: Simplify HRem to reuse existing HDiv\n\nA pattern seen in libcore and SPECjvm2008 workloads is a pair of HRem/HDiv\nhaving the same dividend and divisor. The code generator processes\nthem separately and generates duplicated instructions calculating HDiv.\n\nThis CL adds detection of such a pattern to the instruction simplifier.\nThis optimization affects HInductionVarAnalysis and HLoopOptimization\npreventing some loop optimizations. To avoid this the instruction simplifier\nhas the loop_friendly mode which means not to optimize HRems if they are in a loop.\n\nA microbenchmark run on Pixel 3 shows the following improvements:\n\n | little cores | big cores\narm32 Int32 | +21% | +40%\narm32 Int64 | +46% | +44%\narm64 Int32 | +27% | +14%\narm64 Int64 | +33% | +27%\n\nTest: 411-checker-instruct-simplifier-hrem\nTest: test.py --host --optimizing --jit --gtest --interpreter\nTest: test.py --target --optimizing --jit --interpreter\nTest: run-gtests.sh\n\nChange-Id: I376a1bd299d7fe10acad46771236edd5f85dfe56\n" }, { "commit": "9974e3cdc1564edc3143b90d7bb2a416f1f887e7", "tree": "4f9746e6b237b2a17cc1e2543a141817d4946c19", "parents": [ "2d19902c3d140c7b9b1d7ae905bd1023a4e649a1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jun 10 16:27:06 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jun 11 10:06:12 2020 +0000" }, "message": "Clean up generated operator\u003c\u003c(os, enum).\n\nPass enums by value instead of const reference.\n\nDo not generate operator\u003c\u003c sources for headers that have no\nenums or no declarations of operator\u003c\u003c. Do not define the\noperator\u003c\u003c for flag enums; these were unused anyway.\n\nAdd generated operator\u003c\u003c for some enums in nodes.h . Change\nthe operator\u003c\u003c for ComparisonBias so that the graph\nvisualizer can use it but do not use the generated\noperator\u003c\u003c yet as that would require changing checker tests.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nChange-Id: Ifd4c455c2fa921a9668c966a13068d43b9c6e173\n" }, { "commit": "077188411c692f82b0785597fee030810a2a5841", "tree": "f74ced58d91dcb215601175dc7d29854d46aee0d", "parents": [ "1715efa0b46d57d587237829d1c0695aaca2c344" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Feb 24 18:51:42 2020 +0000" }, "committer": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Tue Jun 09 13:11:45 2020 +0000" }, "message": "ART: Introduce predicated vector instructions.\n\nThis CL introduces a minimal changes to the IR to support\nautovectorization with use of predicated execution of SIMD\ninstructions (e.g. Arm SVE).\n\nTest: test-art-target, test-art-host.\nChange-Id: Ibb7c5520fec6b858fb29f0dde19ec65501831a3a\n" }, { "commit": "9922f00cf68aac69209216a0726a45eb6338763c", "tree": "7e43b55e85ed17443af1c6be6532dafbb8550495", "parents": [ "16527e892b13c9e1fb34f8d2e9993e58a72ac662" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 08 15:05:15 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jun 09 10:03:58 2020 +0000" }, "message": "arm/arm64: Clean up intrinsic slow paths.\n\nGeneralize and use the slow path template IntrinsicSlowPath\nfrom intrinsics_utils.h.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: aosp_taimen-userdebug boot image is unchanged.\nChange-Id: Ia8fa4e1b31c1f190fc5f02671336caec15e4cf4d\n" }, { "commit": "66704db5967a8eed64f53d82594205d6d48a953d", "tree": "9f10505d9e296cf9c24f4810fc0fd695b2dad233", "parents": [ "ef898425c975f150caaed077ca204fa86b951e7f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 08 14:04:27 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 08 14:49:09 2020 +0000" }, "message": "x86/x86-64: Clean up intrinsic codegen for SSE4.1.\n\nLet the normal codegen handle the calls if we\u0027re not\nemitting intrinsics because of lack of SSE4.1 support.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nChange-Id: Ic26e65974231bbcb44ad696100e1fa4469165e41\n" }, { "commit": "ef898425c975f150caaed077ca204fa86b951e7f", "tree": "1ad038b90bb860fe1b9a20872b990c7918fcd1e1", "parents": [ "f7290cac4af6a981d98122af1a6d48b0e80da574" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 08 10:26:06 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 08 12:41:04 2020 +0000" }, "message": "Run LSA as a part of the LSE pass.\n\nMake LSA a helper class, not an optimization pass. Move all\nits allocations to ScopedArenaAllocator to reduce the peak\nmemory usage a little bit.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nChange-Id: I7fc634abe732d22c99005921ffecac5207bcf05f\n" }, { "commit": "4a88a5af7417d9dc0bfe37cffd92a253531c8f30", "tree": "6a0496ac10c62f8d183265a9d9615d5778a8c444", "parents": [ "ffffa9c4e18e233db7b0f5eb31d07d8a52d527e4" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue May 05 16:21:57 2020 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri May 29 11:51:26 2020 +0000" }, "message": "Finish move of jar compilation rules from makefile to soong.\n\nThe rules have already been previously ported to soong, but they were\nonly used for atest. Always use them to simplify the makefile.\n\nThis makes the gtest modules in .bp files depend on the needed jars,\nwhich ensures that they will be copied next to the test binary.\nThis is needed as atest can not access them in the current location.\n\nIt also simplifies the tradefed xml since the manual copying\ncan be removed for the apex-based device testing.\n\nTest: test-art-host-gtest\nTest: atest ArtGtestsTarget\nBug: 147819342\nChange-Id: I54d92eca88fc04c949209d490e838d0a92ce8f87\n" }, { "commit": "fc136524f5a99be31f0c37ff849c07fde5629562", "tree": "523aec667aab870e38418d1a8150459a3236292e", "parents": [ "5158d4a204a8e6404d39d9f76021d5de0eef3174" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 27 09:39:32 2020 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 27 13:10:11 2020 +0000" }, "message": "Revert \"Don\u0027t abort for min/max/abs intrinsics, baseline use them.\"\n\nThis reverts commit 91038d67ce011456176411e8f74ed5d2e2440ed3.\n\nReason for revert: These assertions can be reinstated after\n https://android-review.googlesource.com/1283893 .\n\nChange-Id: I7265be87e86a9eabfdc2e9b5c207b633eebc273b\nTest: Rely on TreeHugger.\n" }, { "commit": "2acd1ec12ab6b81a7e870ab11085c24ae51faf6d", "tree": "ae9f2fc872cc3ca9ae456df13e7d5057e6fc1254", "parents": [ "4d55215d8b4bd0efb65b3a84a7dd041a6b097a96" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Sat May 16 01:38:49 2020 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed May 20 13:24:47 2020 +0000" }, "message": "HWASan fixes for ART tests\n\nBug: 156593692\nTest: SANITIZE_TARGET\u003dhwaddress art/tools/run-gtests.sh\nTest: SANITIZE_TARGET\u003dhwaddress art/test.py -r --target --64\nChange-Id: I24c5afdb4fed5ac94ce3a7b54a10c592f529191f\n" }, { "commit": "695348f4b0541f4373b46eac5830cdd87f71c076", "tree": "f2f6019f0c394f99aaaf9f2f7deec16bf6116b0f", "parents": [ "1f5300a211202442a07607830c6550773ca50b50" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 19 14:42:02 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 20 08:41:09 2020 +0000" }, "message": "Add compiler type to CompilerOptions.\n\nLet CompilerOptions hold the information whether it is AOT\nor JIT compilation, or Zygote JIT for shared code.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing --jit\nTest: aosp_taimen-userdebug boots.\nChange-Id: Id9200572406f8e43d99b8b61ef0e3edf43b52fff\n" }, { "commit": "8284e9a69535e2d55a9319fb3e631eb70ea4b6cd", "tree": "0fa06e3c25e70d2da63fb3f488995528ed545893", "parents": [ "ad71c9089364eca8415fd5b9b7ba471d19a421dc" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Fri May 15 17:14:33 2020 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Tue May 19 15:08:01 2020 +0000" }, "message": "Add extra failed inlining reasons\n\nAdded reasons for polymorphic invoke, custom, and unresolved.\n\nAdded a counter for the total number of inline attempts.\n\nTest: run dex2oat on APK with --dump-stats\nChange-Id: I57aa83dc7ac5fa8897b0c197f416baf46fbe9d53\n" }, { "commit": "0ddb338f084b1c46efbfa7a79ad6aa1b63a24ded", "tree": "e36eaa49dd79914622fff402f6ca2e829646c3fb", "parents": [ "8bcba2264f5ba66ef8820e3963e838a67bd6215f" ], "author": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Mon May 18 11:15:46 2020 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon May 18 15:10:40 2020 +0000" }, "message": "ARM64: Combine LSR+ADD into ADD_shift for Int32 HDiv/HRem\n\nHDiv/HRem having a constant divisor are optimized by using\nmultiplication of the dividend by a sort of reciprocal of the divisor.\nIn case of Int32 the multiplication is done into a 64-bit register\nhigh 32 bits of which are only used.\nThe multiplication result might need some ADD/SUB corrections.\nCurrently it is done by extracting high 32 bits with LSR and applying\nADD/SUB. However we can do correcting ADD/SUB on high 32 bits and extracting\nthose bits with the final right shift. This will eliminate the\nextracting LSR instruction.\n\nThis CL implements this optimization.\n\nTest: test.py --host --optimizing --jit\nTest: test.py --target --optimizing --jit\nChange-Id: I5ba557aa283291fd76d61ac0eb733cf6ea975116\n" }, { "commit": "1439e573517bb9f0b115aef5d3bbd9090751ebd6", "tree": "d6a1a4aed01719e988a8ac0fb81ed2843667d75f", "parents": [ "4be256069c494550037c81272ca4c27bd4a139df" ], "author": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Tue May 12 12:43:09 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon May 18 09:11:30 2020 +0000" }, "message": "ART: Optimize ADD/SUB+ADD_shift into ADDS/SUBS+CINC for HDiv/HRem\n\nHDiv/HRem having a constant divisor are optimized by using\nmultiplication of the dividend by a sort of reciprocal of the divisor.\nThe multiplication result might need some corrections to be finalized.\nThe last correction is to increment by 1, if the result is negative.\nCurrently it is done with \u0027add result, temp_result, temp_result, lsr #31 or #63\u0027.\nSuch ADD usually has latency 2, e.g. on Cortex-A55.\nHowever if one of the corrections is ADD or SUB, the sign can be detected\nwith ADDS/SUBS. They set the N flag if the result is negative.\nThis allows to use CINC which has latency 1:\n adds temp_result, temp_result, dividend\n cinc out, temp_result, mi\n\nThis CL implements this optimization.\n\nTest: test.py --host --optimizing --jit\nTest: test.py --target --optimizing --jit\nChange-Id: Ia6aac6771908e992c86e32fe1694a82bd1b7af0b\n" }, { "commit": "883c1346b87537ed93f7d4fd88bbbb041c14d320", "tree": "efb8205d15d677d3e3fdf90f0ae09c4a2eba9a4f", "parents": [ "612809740453427ce4c9211062794dde3823ab6d" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon May 11 23:30:29 2020 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri May 15 18:06:16 2020 +0100" }, "message": "Revert^2 \"Remove test_per_src from ART tests.\"\n\nSecond attempt at this, which fixes the asan failures.\n\nRemove test_per_src since it is not supported by atest.\nReplace it with gtest_isolate which is transparent to atest,\nand which still allows us to run tests in parallel.\n\nThe size of test binaries halves (from 1GB to 0.5GB).\nTest run-time on host is unchanged.\nTest run-time on target is 4x faster (tested on walleye).\n\nAdded a gtest_main.cc with the gtest isolated main function,\nand ART-specific initialization.\n\nBug: 147819342\n\nTest: m test-art-host-gtest\nTest: art/tools/run-gtests.sh\nTest: art/test/testrunner/run_build_test_target.py art-gtest-asan\nChange-Id: I515c911bb7d44285495802fc66cd732fc8e6d8df\n" }, { "commit": "ecb984ddbd830e6eb3f339b9bd4c7c90eac2438b", "tree": "d8ee8ef0672ba40b399812d576f6a992a67ad4ba", "parents": [ "f91fc1220f1b77c55317ff50f4dde8e6b043858f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 14 15:16:31 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri May 15 14:09:54 2020 +0000" }, "message": "Optimizing: Run additional tests on target.\n\nThese tests were running only when x86 codegen was supported\nbut they actually use the runtime instruction set, rather\nthan x86 codegen. Move them to the generic tests, so that\nthey run also on target now that it\u0027s cheap thanks to\n https://android-review.googlesource.com/1310447 .\n\nTest: m test-art-host-gtest\nTest: run-gtests.sh\nChange-Id: I76338453fbb5112fa07e8cd7c323dcd894790042\n" }, { "commit": "f91fc1220f1b77c55317ff50f4dde8e6b043858f", "tree": "3b8416a4fa9b9278d1114d4002485e0cb1c704bf", "parents": [ "33c091eaaa0febedc93cff820def75b122fde867" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 13 09:21:00 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri May 15 14:09:54 2020 +0000" }, "message": "Optimizing: Run gtests without creating the Runtime.\n\nThe only Optimizing test that actually needs a Runtime is\nthe ReferenceTypePropagationTest, so we make it subclass\nCommonCompilerTest explicitly and change OptimizingUnitTest\nto subclass CommonArtTest for the other tests.\n\nOn host, each test that initializes the Runtime takes ~220ms\nmore than without initializing the Runtime. For example, the\nConstantFoldingTest that has 10 individual tests previously\ntook over 2.2s to run but without the Runtime initialization\nit takes around 3-5ms. On target, running 32-bit gtests on\ntaimen with run-gtests.sh (single-threaded) goes from\n~28m47s to ~26m13s, a reduction of ~9%.\n\nTest: m test-art-host-gtest\nTest: run-gtests.sh\nChange-Id: I43e50ed58e52cc0ad04cdb4d39801bfbae840a3d\n" }, { "commit": "33c091eaaa0febedc93cff820def75b122fde867", "tree": "cbbe7369f8206af3180a9530bcd1729042cdd544", "parents": [ "5d2311a349f208f056b33da8fc9c950aad1a7ffe" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu May 14 14:51:11 2020 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu May 14 19:15:01 2020 +0100" }, "message": "Code sinking can move around LoadString that can throw.\n\nThe test accidentally used a string part of the boot image, which means\nwe know the instruction won\u0027t throw. However, a change in the boot\nclasspath meant the string \"a\" was not part of the boot image anymore,\nand the test started failing.\n\nThe CL now handles the case the LoadString might throw, and treat it\nlike NewInstance/NewArray.\n\nTest: 672-checker-throw-method, 673-checker-throw-vmethod\nBug: 156559242\nChange-Id: If9df2ed2c7c39c56254970172e315ec5113db64e\n" }, { "commit": "5d2311a349f208f056b33da8fc9c950aad1a7ffe", "tree": "c675c1e49da6057ce1ed8f9f453db9881198f30f", "parents": [ "58520dfba31d6eeef75f5babff15e09aa28e5db8" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 13 17:30:32 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 14 08:18:05 2020 +0000" }, "message": "Optimizing: Refactor ImprovedOptimizingUnitTest.\n\nAnd merge all functionality into OptimizingUnitTest.\n\nTest: m test-art-host-gtest\nChange-Id: I69a4e8c489462700ec0eb9ed93d5cdbdb6147f1a\n" }, { "commit": "02ca05a5a6e3f5028c6c2987a81be481d07bc617", "tree": "a364c4a46c573fdfddf607b0e78e5fd3f455c17f", "parents": [ "5868adaefe72cc8bcdcd8325c40f712375a506d1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 12 13:58:51 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 13 08:00:22 2020 +0000" }, "message": "Move HandleCache to HGraph.\n\nThis avoids passing the `VariableSizedHandleScope*` argument\naround and eliminates HGraph::inexact_object_rti_ and its\ninitialization. The latter shall allow running Optimizing\ngtests that do not require type information without creating\na Runtime in future. (To be implemented in a separate CL.)\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optmizing\nTest: aosp_taimen-userdebug boots.\nChange-Id: I36fe9bc556c6d610d644c8c14cc74c9985a14d64\n" }, { "commit": "5868adaefe72cc8bcdcd8325c40f712375a506d1", "tree": "a1d4328902c4e860fe69c4e4bb34052de2530df3", "parents": [ "5a62af5dc9e9bafeffcac7820e1a5b7586e58477" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 12 11:50:34 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 13 08:00:22 2020 +0000" }, "message": "Move implementations from class_root.h to -inl.h .\n\nMake it possible to include the definition of enum ClassRoot\nwithout pulling in a lot of other headers.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: aosp_taimen-userdebug boots.\nChange-Id: Ic90fdd70bfe0c5428a5c9a0d7901ea7e15b03488\n" }, { "commit": "5a62af5dc9e9bafeffcac7820e1a5b7586e58477", "tree": "94308509fc9e9610c2d058e0458648807ccb5ae8", "parents": [ "aba509f1624de7fd68409508d7c1600308a4ccc3" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon May 11 15:16:24 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 13 08:00:22 2020 +0000" }, "message": "Optimizing: Create fewer handles in inliner.\n\nUse ObjPtr\u003c\u003e and bool instead of ReferenceTypeInfo to avoid\ncreating unnecessary temporary Handle\u003c\u003es. This should reduce\ncompiler memory use a little bit.\n\nAnd rewrite ReferenceTypePropagation::IsAdmissible() with\nan explicit loop instead of a tail recursion.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: aosp_taimen-userdebug boots.\nChange-Id: Ic9952134d669b336fb28e6ea13117446d11dc145\n" }, { "commit": "85af16e673c58cef1eb6d764468b7218bc343dae", "tree": "ef52df17437ac4db52b450199d6406e9875f1987", "parents": [ "5b0bbf33180bbf9e7fbe8c952eda16096c637f8c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue May 12 15:36:52 2020 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue May 12 16:54:30 2020 +0000" }, "message": "Fix two bugs around aput-object.\n\n- Fix LSE by not removing stores that may throw.\n- Fix nterp to export the PC before calling the aput-object helper.\n\nTest: 726-array-store\nChange-Id: I4fa6c608fc657433dc62ef72a4e94260281db660\n" }, { "commit": "968db3c09e5059e30044d69f1a5fd9bcd937392e", "tree": "5496a327556b30ac2cd1877b515fa852688036bd", "parents": [ "2750a9884d7579f301c7ff65a6daaf8520af7902" ], "author": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Thu May 07 12:44:10 2020 +0100" }, "committer": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Tue May 12 10:35:49 2020 +0100" }, "message": "ARM64: Combine LSR+ASR into ASR for Int32 HDiv/HRem\n\nHDiv/HRem having a constant divisor are optimized by using\nmultiplication of the dividend by a sort of reciprocal of the divisor.\nThe multiplication is done by multiplying 32-bit numbers into a 64-bit\nresult. The high 32 bits of the result are used. In case of Int32 LSR\nis used to get those bits. After that there might be correction\noperations and ASR. When there are no correction operations between LSR\nand ASR they can be combined into one ASR.\n\nThis CL implements this optimization.\n\nImprovements (Pixel 3):\n little core big core\n jit_aot/LoadCheck.RandomSumInvokeStaticMethod 7.1% 8.3%\n jit_aot/LoadCheck.RandomSumInvokeUserClass 4.6% 12.0%\n benchmarksgame/fasta 3.3% 1.0%\n benchmarksgame/fasta_4 2.4% 2.6%\n benchmarksgame/fastaredux 2.2% 2.2%\n SPECjvm2k8 MPEGAudio 1.7% 1.0%\n\nTest: test.py --host --optimizing --jit\nTest: test.py --target --optimizing --jit\nChange-Id: I5267b38d3a58319e24152917fabe836d5b346bce\n" }, { "commit": "75b961a4cd926e647eb20ebf20ec5af410f7e1df", "tree": "4c83c209ca826494c440dedf1815217721e4439b", "parents": [ "3a079094a2b92a8dce725848d28abd5de7a84e9f" ], "author": { "name": "Martin Stjernholm", "email": "mast@google.com", "time": "Thu May 07 01:45:27 2020 +0100" }, "committer": { "name": "Martin Stjernholm", "email": "mast@google.com", "time": "Mon May 11 08:55:41 2020 +0000" }, "message": "Add visibilities for prebuilts.\n\nThese visibilities are intentionally blunt, to allow the prebuilts to\nmove around for now.\n\nMany of these visibilities may also go away completely again if the\nexported binaries are changed to compile internal ART libraries\nstatically.\n\nTest: v\n 1. build/soong/scripts/build-aml-prebuilts.sh art-module-sdk \\\n art-module-test-exports conscrypt-module-sdk \\\n conscrypt-module-test-exports conscrypt-module-host-exports \\\n art-module-host-exports\n 2. Unzip out/aml/soong/mainline-sdks/*.zip into separate\n subdirectories under prebuilts/runtime\n 3. env SOONG_ALLOW_MISSING_DEPENDENCIES\u003dtrue m nothing\n (together with the topic of https://r.android.com/1252167)\nBug: 155921753\nChange-Id: Id8bbc8aedb0b87e30e9cf3d2a9f34b33cb71756c\n" }, { "commit": "fc5e2ef08c78bcf4a60c5097ff3a7fa80e358522", "tree": "4c1d538f5faf72617e9088b8f99a368b999b32dd", "parents": [ "685c84775f7dfe23197b080e4730435fd80e6d27" ], "author": { "name": "Christopher Ferris", "email": "cferris@google.com", "time": "Fri May 08 00:08:42 2020 +0000" }, "committer": { "name": "Christopher Ferris", "email": "cferris@google.com", "time": "Fri May 08 07:25:07 2020 +0000" }, "message": "Revert \"Remove test_per_src from ART tests.\"\n\nThis reverts commit 8103e479d8f8447584582b2b70752029f7087776.\n\nReason for revert: asan run fails in multiple ways\n\nTest: ran ./art/test/testrunner/run_build_test_target.py art-gtest-asan\nChange-Id: Ib9f2887436a664b64c6410f56a25ae2dd0e0aab4\n" }, { "commit": "8103e479d8f8447584582b2b70752029f7087776", "tree": "53b2be70d195b785fc1d79b6151e42925b4981fe", "parents": [ "6a8f8c52da06de506b75fa524a56a30794849261" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Apr 28 21:36:49 2020 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu May 07 14:45:38 2020 +0100" }, "message": "Remove test_per_src from ART tests.\n\nRemove test_per_src since it is not supported by atest.\nReplace it with gtest_isolate which is transparent to atest,\nand which still allows us to run tests in parallel.\n\nThe size of test binaries halves (from 1GB to 0.5GB).\nTest run-time on host is unchanged.\nTest run-time on target is 4x faster (tested on walleye).\n\nBug: 147819342\nTest: m test-art-host-gtest\nTest: art/tools/run-gtests.sh\nChange-Id: Id295af00d08b24baa2e421b0f3313df0b2e56fe9\n" }, { "commit": "a6653d304faa3bbd981507570a4ac1107760c6a7", "tree": "6dc333f6f19b932c0fd739b4862c3800b3a51b45", "parents": [ "4d0f795aaa9abd1b36e2704b3851b2cc39c70cdd" ], "author": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Tue May 05 16:30:24 2020 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu May 07 09:04:21 2020 +0000" }, "message": "ART: Refactor InstructionCodeGeneratorARM64::GenerateDivRemWithAnyConstant\n\nInstructionCodeGeneratorARM64::GenerateDivRemWithAnyConstant handles\nboth Int32 and Int64 cases. However Int32 cases can have additional\noptimizations. Having them in GenerateDivRemWithAnyConstant makes code\ndifficult to read.\n\nThis CL splits the code of GenerateDivRemWithAnyConstant to:\n* GenerateInt32DivRemWithAnyConstant\n* GenerateInt64DivRemWithAnyConstant\n* GenerateResultDivRemWithAnyConstant\n\nTest: test.py --host --optimizing --jit\nTest: test.py --target --optimizing --jit\nChange-Id: I267331c026e87d6a233b593586f1b74759382896\n" }, { "commit": "d34b73b4ac478462acc03c4cd42ae7568c832eb8", "tree": "27f1c4599178ba57451c29d0156c232768711b6d", "parents": [ "4a48775376a4c0b180a7d32ad2cdf00bd0dca140" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 05 10:07:59 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 05 13:34:31 2020 +0000" }, "message": "Clean up internal stack trace construction.\n\nSimplify the code by ignoring active transactions. Writing\nto fields of a newly allocated object does not need to be\nrecorded as aborting the transaction removes all references\nto the new object and it\u0027s unnecessary to roll back writes\nto unreachable object\u0027s fields.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: aosp_taimen-userdebug boots.\nChange-Id: Ia91d3274398b0ca0f5b0040dcf323921d915b657\n" }, { "commit": "1a719e4de83532a1dcd9ddfad2c92d4130f28ea9", "tree": "445026effb3298ca8e962701ee01f65785be6fe6", "parents": [ "e33dca6d44463606168330d2f84bc616e8c147f6" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Thu Jul 18 14:24:55 2019 +0100" }, "committer": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Mon May 04 08:19:17 2020 +0000" }, "message": "RFC: ARM64: Split arm64 codegen into scalar and vector (SVE and NEON).\n\nThis is a first CL in the series of introducing arm64 SVE support\nin ART. The patch splits the codegen functionality into scalar and\nvector ones and for the latter introduces NEON and SVE\nimplementations. SVE one currently is an exact copy of NEON one -\nfor the sake of testing and an easy diff when the next CL comes\nwith an actual SVE instructions support.\n\nThe patch effectively doesn\u0027t change any behavior; NEON mode is\nused for vector instructions, tests pass.\n\nTest: test-art-target.\nChange-Id: I5f7f2c8218330998e5a733a56f42473526cd58e6\n" }, { "commit": "0f5b2bf1aee7e08ce3b0dbf91ee528eb846d372f", "tree": "98a84fb54c5d0a8e44fd159c7cd031e6dda84036", "parents": [ "3bae04718647f92d40e8b4c75fb71195a51fa4bd" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Wed Oct 23 14:07:41 2019 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri May 01 13:43:49 2020 +0000" }, "message": "ART: Introduce Loop Versioning in SuberblockCloner.\n\nSupport Loop Versioning in SuberblockCloner as a tool to\nenable further optimization (e.g. Dynamic Loop Unrolling).\nThe patch brings the feature in without enabling it.\n\nReplace std::cout with LOG(INFO) for debug dumps.\n\nTest: superblock_cloner_test.\nTest: test-art-target.\n\nChange-Id: I303cabfb752b8c3c8597abfc0ac261e8616e8cee\n" }, { "commit": "5f84607854775be67a8eb2437ce1071af7d477d2", "tree": "4d28da38b7170fad07ce08878cedb239f51279da", "parents": [ "c8150b5def82058c23df377a5006a78e7668afeb" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Apr 09 13:20:11 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Apr 17 15:43:48 2020 +0000" }, "message": "Optimizing: Construct intrinsic HIR in builder.\n\nTo help baseline compiler emit better code, construct\nintermediate representation for intrinsics that have\ncorresponding HIR classes in the instruction builder,\ninstead of doing it in the instruction simplifier.\n\nNote: The generated code is sometimes different than\nbefore because GVN uses instruction ids for input\nordering for commutative operations.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: aosp_taimen-userdebug boots.\nChange-Id: Ifa3a5774f8f3fbff4e3ca359c38eceee993d62cd\n" }, { "commit": "c8150b5def82058c23df377a5006a78e7668afeb", "tree": "8f0e15b91cd55b978ca7f152206f0a550353810a", "parents": [ "b2028739a2db03623ed76f5028ede1333c48f4c9" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Wed Jul 31 18:28:00 2019 +0100" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Apr 17 10:35:45 2020 +0000" }, "message": "ART: Refactor SIMD slots and regs size processing.\n\nART vectorizer assumes that there is single size of SIMD\nregister used for the whole program. Make this assumption explicit\nand refactor the code.\n\nNote: This is a base for the future introduction of SIMD slots of\nsize other than 8 or 16 bytes.\n\nTest: test-art-target, test-art-host.\nChange-Id: Id699d5e3590ca8c655ecd9f9ed4e63f49e3c4f9c\n" }, { "commit": "b47b978486572492140b63b0c8c5daa58dc28d41", "tree": "546c065d9396ef25bbd08b02d5ef4f6d269babfc", "parents": [ "e778fa6ead79e9cb26810d484c5a594e9612de9b" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Wed Dec 04 21:02:09 2019 +0000" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Apr 14 10:26:59 2020 +0000" }, "message": "ART: Fix vectorizer HalvingAdd idiom.\n\nIsAddConst2 function tried to extract addition chains\nfor the halving add idiom: (A + B) \u003e\u003e 1. The problem\nwas that regular shift right (x \u003e\u003e 1) was accepted for the\nidiom (with {A: x, B: 0}) and not processed as a shift - which\nbroke the assumptions on shifts right and operand signedness.\nThis CL fixes that.\n\nTest: 646-checker-simd-hadd.\nTest: test-art-target.\n\nChange-Id: Icf71e1a8e8c54e68114d7d5d6c4aa8a47ea5234d\n" }, { "commit": "2f40d24aea4b9b2726c994de71b17ae2f82e9238", "tree": "75194271dac88df6183b8e8034298942d74bc12b", "parents": [ "605c5914b9561c67b4e8b142715410a569f9ca45" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 08 12:56:45 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Apr 09 11:23:00 2020 +0000" }, "message": "Small cleanup in InstructionBuilder.\n\nRefactor BuildInvoke() to reduce runtime state transitions\n(fewer ScopedObjectAccess objects) and separate the class\ninit check for static methods from the instruction creation\nin preparation for allocating replacement instructions for\nintrinsics such as Math.abs().\n\nDelay Handle\u003c\u003e creation in ProcessClinitCheckForInvoke until\nit\u0027s actually needed. Change function parameters to ObjPtr\u003c\u003e\ninstead of Handle\u003c\u003e if they cannot cause thread suspension.\n\nTest: aosp_taimen-userdebug boots.\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nChange-Id: I8d5ebf5db76f0c8b1fec790a2f8621818d64b4dc\n" }, { "commit": "605c5914b9561c67b4e8b142715410a569f9ca45", "tree": "7b7f1a73d19ae4df007f50784e16f8f2b65f4f58", "parents": [ "32b24fdc3466d01f799e0ef39859b103d5c701bc" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Apr 08 15:12:39 2020 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Apr 09 09:13:47 2020 +0000" }, "message": "Add more DCHECKs to investigate build bot failure.\n\nTest: test.py\nChange-Id: I625564895dd701fb04f1ceb3b7bb21ffa273e776\n" }, { "commit": "fbf53b5e38fef38a2bfdccb433e61d5d4ee802bc", "tree": "fb731d75bcb0fa71d7fa85e664aa1fd34f40cbf5", "parents": [ "4fa07a5727551018e2dcd93d41dac98f20212e99" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Apr 01 15:20:14 2020 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Apr 02 13:02:04 2020 +0000" }, "message": "DCHECK to ensure processing instruction doesn\u0027t leave an exception.\n\nTest: test.py\nChange-Id: I254355c2e4682a94bea71053a19ea8e682e19871\n" }, { "commit": "4fa07a5727551018e2dcd93d41dac98f20212e99", "tree": "8214358e517601c67706a4fbbb4010408a45780a", "parents": [ "d31def587a914c1d306355a7331c24d7b13ad5ca" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Mar 31 20:52:09 2020 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Apr 01 17:19:07 2020 +0100" }, "message": "Add explicit compiler option to enable test-specific features.\n\nWe can no longer rely on checking the \"core.art\" image name,\nsince we plan to remove it and use the shipped boot image.\n\nThis option enables test-specific features, such as $noinline$.\n\nTest: ./art/test.py -r --optimizing --64\nBug: 147817558\nChange-Id: Iadac6e1b0f46e83efd0551fb8462a6b268ad33d8\n" }, { "commit": "fe57c2b63df652fe4eefd750e3566309bfe038fb", "tree": "839ff604e8baae86458642803bc2738d0ab7b5e3", "parents": [ "a467a6e81f5c6da589a5fb16fdb85f2604860623" ], "author": { "name": "David Sehr", "email": "sehr@google.com", "time": "Fri Mar 27 14:58:54 2020 +0000" }, "committer": { "name": "David Sehr", "email": "sehr@google.com", "time": "Fri Mar 27 19:23:23 2020 +0000" }, "message": "Revert^4 \"Add \"linkage\" test options\"\"\n\nThis reverts commit 16c08ca97486f535698f1a1b17f0332bfe78e95a.\n\nReason for revert: Disabled on device testing\n\nChange-Id: I8d5442e0ebb6383ebfbce98f1857b5e844e0d5e1\nBug: none\nTest: make test-art-host-gtest-dex2oat_test\n" }, { "commit": "16c08ca97486f535698f1a1b17f0332bfe78e95a", "tree": "81dc1613d8751db5e9c73031bdfe9725c361778c", "parents": [ "133987d8e3387395943f33ecc467ba0dbfed77e6" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Mar 27 10:07:19 2020 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Mar 27 10:07:40 2020 +0000" }, "message": "Revert \"Revert \"Revert \"Add \"linkage\" test options\"\"\"\n\nThis reverts commit 80c0c50de048da458c707adde5b0499d75f8253a.\n\nReason for revert: Test fails on device:\nhttps://ci.chromium.org/p/art/builders/ci/angler-armv8-ndebug/1306?\n\nChange-Id: I19e9b9e24023b2d7b6b86114c7a9e4018f65b2b8\n" }, { "commit": "80c0c50de048da458c707adde5b0499d75f8253a", "tree": "a8e5c0bda491c4e84b37fd483694fe9ab65766fb", "parents": [ "379503d0a12d4e22f0c04b4e7f295bfb9f6349fd" ], "author": { "name": "David Sehr", "email": "sehr@google.com", "time": "Tue Mar 24 22:02:57 2020 +0000" }, "committer": { "name": "David Sehr", "email": "sehr@google.com", "time": "Thu Mar 26 20:38:09 2020 +0000" }, "message": "Revert \"Revert \"Add \"linkage\" test options\"\"\n\nThis reverts commit 91a8e6f60c508c6e010b6ef8e4056e3a6f04c447.\n\nReason for revert: Moved tests to gtest and under compilation only.\n\nChange-Id: I60899694946353bfcd334473c20bb17c84f095e0\nBug: none\nTest: make test-art-host-gtest-dex2oat_test\n" }, { "commit": "f368882656cce265d732cba237fac7bc312934a6", "tree": "157fc1c36079d64f065d2a46d955f3d96ba5e352", "parents": [ "aacb4b84078eacbee31f168676750ca73514217e" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Mar 25 15:04:03 2020 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Mar 26 14:20:58 2020 +0000" }, "message": "Add more debugging info around ResolveField.\n\nTo better diagnose the DCHECK that we have hit here:\nhttps://android-build.googleplex.com/builds/git_master-art-host-linux-art-jit/6325844/logs/build.log\n\nTest: test.py\nChange-Id: If160b74055c27cd02bde27e29c7e7f731c458f4d\n" }, { "commit": "41617b18f1c09e3031710d58fdb93c5aa43399ac", "tree": "36a0f3e3dc27e97980b96e1150ede718aee775fa", "parents": [ "842555d72ee7511c193a65f34841cc92170a1850" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Mar 18 21:19:06 2020 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Mar 25 14:10:23 2020 +0000" }, "message": "Add more logging and sanity checks for JIT mini-debug-info.\n\nUsed when diagnosing b/151137723. Keep it around.\n\nBug: 151137723\nTest: test.py -r --jit\nChange-Id: I10cc613c7396607e221fdc1f5972d26c1ac03fa8\n" }, { "commit": "91a8e6f60c508c6e010b6ef8e4056e3a6f04c447", "tree": "42372667d930c57ef3384c1c4981fb5c1591ef8b", "parents": [ "873bb64b8815b3f6a350ce109eb54ec770369d22" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 23 08:34:15 2020 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 23 08:34:15 2020 +0000" }, "message": "Revert \"Add \"linkage\" test options\"\n\nThis reverts commit 873bb64b8815b3f6a350ce109eb54ec770369d22.\n\nReason for revert: Test in CL fails on device, see:\nhttps://ci.chromium.org/p/art/builders/ci/angler-armv7-ndebug/1302?\n\nChange-Id: I18d8204f40bbc0f89eb230656e14966035b0b1c3\n" }, { "commit": "873bb64b8815b3f6a350ce109eb54ec770369d22", "tree": "2059840d3930dc5bd19536150fb3ac3c15654fbc", "parents": [ "6e44830b65de39f5d20342109f7cbc47e4624fe0" ], "author": { "name": "David Sehr", "email": "sehr@google.com", "time": "Tue Mar 10 15:26:55 2020 -0700" }, "committer": { "name": "David Sehr", "email": "sehr@google.com", "time": "Fri Mar 20 09:48:11 2020 -0700" }, "message": "Add \"linkage\" test options\n\nAdd options to control \"linkage\" model. This involves checking for\nredefinitions and subclassing classloaders.\n\nBug: none\nTest: 1964-redefinition\nChange-Id: I0cb3c725b7d62f7c6c0958dc6d5f9b55d6258fd5\n" }, { "commit": "439528400e3a807d1696d70cf2e657612533830c", "tree": "1d6f57411ca78e1145cb2189627e90ffa4b7fcbe", "parents": [ "be50bc3e7eed84842d5d2302444270dd0d635d00" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Mar 18 21:00:04 2020 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Mar 19 10:56:58 2020 +0000" }, "message": "Consider thumb bit when repacking and compressing JIT mini-debug-info.\n\nARM uses least significant bit of function address to encode thumb mode.\nThis means the function address might not point to first byte of code.\n\nNormalize the addresses by rounding them down to instruction size.\nThis fixes memory leak (debug info would not be freed) on 32-bit ARM.\n\nBug: 151137723\nTest: ./art/test.py -r --target -t 137 --jit --32\nChange-Id: I6851c2ac874badec8b385eb0b3f21e8119178e22\n" } ], "next": "03008223bc443c2e7a411d6595671e376dea0a9b" }