)]}' { "log": [ { "commit": "3416601a9e9be81bb7494864287fd3602d18ef13", "tree": "dd228519bfb9733aa7627b9cea81ecb28974a1ab", "parents": [ "8558375377946aabbbda6ab584e13f754590bd89" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Dec 19 17:22:29 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Mon Jan 05 16:25:59 2015 +0000" }, "message": "Look at instruction set features when generating volatiles code\n\nChange-Id: Ia882405719fdd60b63e4102af7e085f7cbe0bb2a\n" }, { "commit": "52c489645b6e9ae33623f1ec24143cde5444906e", "tree": "a39667aa354645bd42a7a061d08ca82df3004143", "parents": [ "193c7a94822f765b0b6b0cecd54c9f08dfd26425" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Dec 16 17:02:57 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Dec 19 09:58:27 2014 +0000" }, "message": "[optimizing compiler] Add support for volatile\n\n- for backends: arm, x86, x86_64\n- added necessary instructions to assemblies\n- clean up code gen for field set/get\n- fixed InstructionDataEquals for some instructions\n- fixed comments in compiler_enums\n\n* 003-opcode test verifies basic volatile functionality\n\nChange-Id: I144393efa312dfb2c332cb84056b00edffee338a\n" }, { "commit": "6048838af46f41c08c4132ba242040dc49bd5f23", "tree": "5124300bf9a7106d534e126b1926cc9d787ae2dc", "parents": [ "ca747ea9951188dbc6f5217d49aca34aeadcc2a6", "5b4b898ed8725242ee6b7229b94467c3ea3054c8" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Dec 18 17:46:12 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Dec 18 17:46:13 2014 +0000" }, "message": "Merge \"Revert \"Don\u0027t block quick callee saved registers for optimizing.\"\"" }, { "commit": "5b4b898ed8725242ee6b7229b94467c3ea3054c8", "tree": "46f6df76e49f9a42dae89a6b9cf8336eae1da519", "parents": [ "6004796d6c630696127df2494dcd4f30d1367a34" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Dec 18 17:45:56 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Dec 18 17:45:56 2014 +0000" }, "message": "Revert \"Don\u0027t block quick callee saved registers for optimizing.\"\n\nX64 has one libcore test failing, and codegen_test on\narm is failing.\n\nThis reverts commit 6004796d6c630696127df2494dcd4f30d1367a34.\n\nChange-Id: I20e00431fa18e11ce4c0cb6fffa91977fa8e9b4f\n" }, { "commit": "e408f8c6ac0ee80543ee1a695695e8917e45eaf3", "tree": "8637636ea603b134b410cf535281fb56249f9d55", "parents": [ "452a8bec86e7795c99f774e81c02f12f1b1e502f", "6004796d6c630696127df2494dcd4f30d1367a34" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Dec 18 15:49:52 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Dec 18 15:49:53 2014 +0000" }, "message": "Merge \"Don\u0027t block quick callee saved registers for optimizing.\"" }, { "commit": "6004796d6c630696127df2494dcd4f30d1367a34", "tree": "850f3e82a47061200c4e34e2c7e7a934f4769a97", "parents": [ "407d77f344cfbdbbfb50531c5f0766bc0892e2fe" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Dec 15 00:01:18 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Dec 18 14:59:50 2014 +0000" }, "message": "Don\u0027t block quick callee saved registers for optimizing.\n\nThis change builds on:\nhttps://android-review.googlesource.com/#/c/118983/\n\n- Also fix x86_64 assembler bug triggered by this change.\n- Fix (and improve) x86\u0027s backend byte register usage.\n- Fix a bug in baseline register allocator: a fixed\n out register must prevent inputs from allocating it.\n\nChange-Id: I4883862e29b4e4b6470f1823cf7eab7e7863d8ad\n" }, { "commit": "4e44c829e282b3979a73bfcba92510e64fbec209", "tree": "42375a128b28bb886955214336f63391dfc41d5c", "parents": [ "390f59f9bec64fd81b05e796dfaeb03ab6d4cc81" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 17 12:25:12 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 17 12:25:12 2014 +0000" }, "message": "Revert \"Small optimization for recursive calls: avoid dex cache.\"\n\nFails on target.\n\nThis reverts commit 390f59f9bec64fd81b05e796dfaeb03ab6d4cc81.\n\nChange-Id: Ic3865b8897068ba20df0fbc2bcf561faf6c290c1\n" }, { "commit": "390f59f9bec64fd81b05e796dfaeb03ab6d4cc81", "tree": "d418b4a488390d718144bf5a5a180d965d1d762e", "parents": [ "240016da1d6615b26c8342bdeb4bae381570ac47" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Dec 12 19:22:03 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 17 11:53:33 2014 +0000" }, "message": "Small optimization for recursive calls: avoid dex cache.\n\nChange-Id: Ic4054b6c38f0a2a530ba6ef747647f86cee0b1b8\n" }, { "commit": "e53798a7e3267305f696bf658e418c92e63e0834", "tree": "8979bbed96b107a5a6bbae9285ff4e0c362dad95", "parents": [ "e6c0cdd11097dd72275ac24f1e98217c299d973e" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Dec 01 10:31:54 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Dec 15 22:52:27 2014 +0000" }, "message": "Inlining support in optimizing.\n\nCurrently only inlines simple things that don\u0027t require an\nenvironment, such as:\n- Returning a constant.\n- Returning a parameter.\n- Returning an arithmetic operation.\n\nChange-Id: Ie844950cb44f69e104774a3cf7a8dea66bc85661\n" }, { "commit": "d2ec87d84057174d4884ee16f652cbcfd31362e9", "tree": "9456c5851f157566380c37895407dfce4749bb4d", "parents": [ "f551efff34c20e2f0cf962c3fc267204d5e7611f" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Mon Dec 08 14:24:46 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Mon Dec 08 17:02:11 2014 +0000" }, "message": "[optimizing compiler] Add REM_FLOAT and REM_DOUBLE\n\n- for arm, x86, x86_64 backends\n- reinstated fmod quick entry points for x86. This is a partial revert\nof bd3682eada753de52975ae2b4a712bd87dc139a6 which added inline assembly\nfor floting point rem on x86. Note that Quick still uses the inline\nversion.\n- fix rem tests for longs\n\nChange-Id: I73be19a9f2f2bcf3f718d9ca636e67bdd72b5440\n" }, { "commit": "4c0b61f506644bb6b647be05d02c5fb45b9ceb48", "tree": "26ff4e14af3cae5f9b30f65177be258d8259ecee", "parents": [ "7c8ce29e97fb7873160ab8895d847e9643a1f8f6" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Dec 05 12:06:01 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Dec 05 12:06:01 2014 +0000" }, "message": "Add support for double-to-int \u0026 double-to-long in optimizing.\n\n- Add support for the double-to-int and double-to-long Dex\n instructions in the optimizing compiler.\n- Add S1 to the list of ARM FPU parameter registers so that\n a double value can be passed as parameter during a call\n to the runtime through D0.\n- Have art::x86_64::X86_64Assembler::cvttsd2si work with\n 64-bit operands.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n double to int and double to long HTypeConversion nodes.\n- Add related tests to test/422-type-conversion.\n\nChange-Id: Ic93b9ec6630c26e940f7966a3346ad3fd5a2ab3a\n" }, { "commit": "8964e2b689d80fe546604ac8c724078645095cf1", "tree": "9909dfb2f891d12cc9ad6aabebfba9f535014609", "parents": [ "833e903b7a9063f37bea3c505cf134fc4a4e2084" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Dec 04 12:10:50 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Dec 04 12:10:50 2014 +0000" }, "message": "Add support for float-to-double \u0026 double-to-float in optimizing.\n\nChange-Id: I41b0fee5a28c83757697c8d000b7e224cf5a4534\n" }, { "commit": "624279f3c70f9904cbaf428078981b05d3b324c0", "tree": "a81f8d8facfc28cac479a68a1042edc74c36d25b", "parents": [ "9a64a46e8edfa89402598d8650b8ebb337ba3d52" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Dec 04 11:54:28 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Dec 04 11:54:28 2014 +0000" }, "message": "Add support for float-to-long in the optimizing compiler.\n\n- Add support for the float-to-long Dex instruction in the\n optimizing compiler.\n- Add a Dex PC field to art::HTypeConversion to allow the\n x86 and ARM code generators to produce runtime calls.\n- Instruct art::CodeGenerator::RecordPcInfo not to record\n PC information for HTypeConversion instructions.\n- Add S0 to the list of ARM FPU parameter registers.\n- Have art::x86_64::X86_64Assembler::cvttss2si work with\n 64-bit operands.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n float to long HTypeConversion nodes.\n- Add related tests to test/422-type-conversion.\n\nChange-Id: I954214f0d537187883f83f7a83a1bb2dd8a21fd4\n" }, { "commit": "3f8f936aff35f29d86183d31c20597ea17e9789d", "tree": "3abc4e5f99cf7de74dbc65cafb6c045074e25381", "parents": [ "fc600dccd7797a9a10cdd457034ea8e148ccd631" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Dec 02 17:45:01 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Dec 03 12:09:28 2014 +0000" }, "message": "Add support for float-to-int in the optimizing compiler.\n\n- Add support for the float-to-int Dex instruction in the\n optimizing compiler.\n- Factor type conversion related lines in\n compiler/optimizing/builder.cc.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n float to int HTypeConversion nodes.\n- Add related tests to test/422-type-conversion.\n\nChange-Id: I2382dfc04bf394ed75f675148cfcf98216d65bc6\n" }, { "commit": "01fcc9ee556f98d0163cc9b524e989760826926f", "tree": "db932611fcfb1390c761ae589a99dee5e956c271", "parents": [ "dff1069220465f93dc2e3636a0acd7522a5ba639" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Dec 01 14:16:20 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Dec 01 14:38:56 2014 +0000" }, "message": "Remove type conversion nodes converting to the same type.\n\nWhen optimizing, we ensure these conversions do not reach the\ncode generators. When not optimizing, we cannot get such situations.\n\nChange-Id: I717247c957667675dc261183019c88efa3a38452\n" }, { "commit": "3bcc8ea079d867f26622defd0611d134a3b4ae49", "tree": "a1f3f3ad3ec1284d199eee6e57889b8c1e90b619", "parents": [ "eea79dd779ba199658ada7264f8f96d776e53f19" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Nov 28 15:00:02 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Nov 28 16:03:28 2014 +0000" }, "message": "Don\u0027t use CanHoldArm in the code generator.\n\nCanHoldArm was ARM32 specific. Instead use a virtual\nAssembler::ShifterOperandCanHold that both thumb2 and arm32\nimplement.\n\nChange-Id: I33794a93caf02ee5d78d32a8471d9fd6fe4f0a00\n" }, { "commit": "6d0e483dd2e0b63e952de060738c10e2abd12ff7", "tree": "b396377926d2645f0df982f0b03c41149632a3de", "parents": [ "7c97e855ceb9b45a1cc738fb144bd3312c4e09a8" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 27 18:31:21 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 27 18:36:14 2014 +0000" }, "message": "Add support for long-to-float in the optimizing compiler.\n\n- Add support for the long-to-float Dex instruction in the\n optimizing compiler.\n- Have art::x86_64::X86_64Assembler::cvtsi2ss work with\n 64-bit operands.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n long to float HTypeConversion nodes.\n- Add related tests to test/422-type-conversion.\n\nChange-Id: Ic983cbeb1ae2051add40bc519a8f00a6196166c9\n" }, { "commit": "199f336af1fc8212646fda67675df0361ece33d6", "tree": "e8709a668b285246ab7d7f4c3f8f2553fd5f39e2", "parents": [ "924632d2626b17b903bf7b851099f6d575ac534b" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 27 17:15:16 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 27 17:15:16 2014 +0000" }, "message": "Wrap long lines in the optimizing compiler.\n\nChange-Id: I5dee0c65e6652de574ae952b1f1dfc7355859e45\n" }, { "commit": "924632d2626b17b903bf7b851099f6d575ac534b", "tree": "e9f06a7a23aa6a8882aeb8c27671e78178b71c12", "parents": [ "e936f68824c441d07bd3a4d5dce4b9b18794a41f", "271ab9c916980209fbc6b26e5545d76e58471569" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 27 15:42:08 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 27 15:42:08 2014 +0000" }, "message": "Merge \"Ensure opt. compiler doesn\u0027t get core \u0026 FP registers mixed up.\"" }, { "commit": "32b2a52aa3d6dc25c18422514c7f88757f87d33c", "tree": "b819d171a509bde557fe1ffefc838d8573854f53", "parents": [ "d7fa3a7d26105dd112acf955a0c7a880a6027180" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 27 14:54:18 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 27 15:35:24 2014 +0000" }, "message": "Fix Move64 by using ParallelMoves.\n\nDestination and source might overlap in a Move64, so we have to\nuse a parallel move resolver.\n\nChange-Id: Ica6c72d91ab8e2e2ee4661b211ac1ee8f054b9ef\n" }, { "commit": "271ab9c916980209fbc6b26e5545d76e58471569", "tree": "fc07a28f5fd4b7a086ae90dd94778c16efd6dae3", "parents": [ "5368c219a462defc90c4b896b34eb7506ba5c142" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 27 15:23:57 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 27 15:23:57 2014 +0000" }, "message": "Ensure opt. compiler doesn\u0027t get core \u0026 FP registers mixed up.\n\nReplace Location::As\u003cT\u003e() with two method methods\n(Location::AsRegister\u003cT\u003e() and Location::AsFpuRegister\u003cT\u003e())\nchecking the kind of the location (register).\n\nChange-Id: I22b4abee1a124b684becd2dc1caf33652b911070\n" }, { "commit": "d7fa3a7d26105dd112acf955a0c7a880a6027180", "tree": "2230bd8ef1ab17e79b786c906f571222a76e9d67", "parents": [ "a9159b2e6b11ec92a1c20a6f3cfe0072f12bd389", "ddb7df25af45d7cd19ed1138e537973735cc78a5" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 27 13:13:34 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 27 13:13:35 2014 +0000" }, "message": "Merge \"[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}\"" }, { "commit": "ddb7df25af45d7cd19ed1138e537973735cc78a5", "tree": "c428e9482c7d9137c0965eed586969ae108b173f", "parents": [ "35ecc8ca8fba713728b8fc60e9e2a275da2028aa" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Nov 25 20:56:51 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 27 12:30:27 2014 +0000" }, "message": "[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}\n\nAdds:\n- float comparison for arm, x86, x86_64 backends.\n- ucomis{s,d} assembly to x86 and x86_64.\n- vmstat assebmly for thumb2\n- new assembly tests\n\nChange-Id: Ie3e19d0c08b3b875cd0a4be4ee4e9c8a4a076290\n" }, { "commit": "647b9ed41cdb7cf302fd356627a3ba372419b78c", "tree": "f1ca054aa20ae4c489f208982e7a6cba5d5ee21e", "parents": [ "35ecc8ca8fba713728b8fc60e9e2a275da2028aa" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 27 12:06:00 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 27 12:06:00 2014 +0000" }, "message": "Add support for long-to-double in the optimizing compiler.\n\n- Add support for the long-to-double Dex instruction in the\n optimizing compiler.\n- Enable requests of temporary FPU (double) registers during\n code generation.\n- Fix art::x86::X86Assembler::LoadLongConstant and extend\n it to int64_t values.\n- Have art::x86_64::X86_64Assembler::cvtsi2sd work with\n 64-bit operands.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n long to double HTypeConversion nodes.\n- Add related tests to test/422-type-conversion.\n\nChange-Id: Ie73d9e5e25bd2e15f585c371e8fc2dcb83438ccd\n" }, { "commit": "91debbc3da3e3376416e4394155d9f9e355255cb", "tree": "fd2181a2d4b8e7e8d26101a9a87b4f0c34fa990f", "parents": [ "fd861249f31ab360c12dd1ffb131d50f02b0bfc6" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Nov 26 19:01:09 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Nov 26 19:01:09 2014 +0000" }, "message": "Revert \"[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}\"\n\nFails on arm due to missing vmrs op after vcmp. I revert this instead of pushing the fix because I don\u0027t understand yet why it compiles with run-test but not with dex2oat.\n\nThis reverts commit fd861249f31ab360c12dd1ffb131d50f02b0bfc6.\n\nChange-Id: Idc2d30f6a0f39ddd3596aa18a532ae90f8aaf62f\n" }, { "commit": "fd861249f31ab360c12dd1ffb131d50f02b0bfc6", "tree": "1765db2b26337f8e96616ebfb769c95d7b421ad2", "parents": [ "fef1680241e85532919ecfaf42855d31ddb69361" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Nov 25 20:56:51 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Nov 26 16:49:23 2014 +0000" }, "message": "[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}\n\n- adds float comparison for arm, x86, x86_64 backends.\n- adds ucomis{s,d} assembly to x86 and x86_64.\n\nChange-Id: I232d2b6e9ecf373beb5cc63698dd97a658ff9c83\n" }, { "commit": "fef1680241e85532919ecfaf42855d31ddb69361", "tree": "fd2181a2d4b8e7e8d26101a9a87b4f0c34fa990f", "parents": [ "141d92c6abcc5057a4e586bfae801011bc4fefba", "799f506b8d48bcceef5e6cf50f3f5eb6bcea05e1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 26 14:46:09 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Nov 26 14:46:10 2014 +0000" }, "message": "Merge \"Revert \"[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}\"\"" }, { "commit": "799f506b8d48bcceef5e6cf50f3f5eb6bcea05e1", "tree": "078cd0518627673566727494b003fa671c027dc8", "parents": [ "cea28ec4b9e94ec942899acf1dbf20f8999b36b4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 26 14:45:52 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 26 14:45:52 2014 +0000" }, "message": "Revert \"[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}\"\n\nFails on x86_64 and target.\n\nThis reverts commit cea28ec4b9e94ec942899acf1dbf20f8999b36b4.\n\nChange-Id: I30c1d188c7ecfe765f137a307022ede84f15482c\n" }, { "commit": "141d92c6abcc5057a4e586bfae801011bc4fefba", "tree": "e0ca3be39ba519c3cf0fa39be9617b2228474a98", "parents": [ "94572c51dfbc1d48785ee340e602f0f8092afecf", "cea28ec4b9e94ec942899acf1dbf20f8999b36b4" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Nov 26 12:04:39 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Nov 26 12:04:40 2014 +0000" }, "message": "Merge \"[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}\"" }, { "commit": "cea28ec4b9e94ec942899acf1dbf20f8999b36b4", "tree": "893c062f6792688671519989a78065ecc7e79de9", "parents": [ "f0c001465371279355eeb7633b67ffcc6f6738e5" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Nov 25 20:56:51 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Nov 26 10:59:15 2014 +0000" }, "message": "[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}\n\n- adds float comparison for arm, x86, x86_64 backends.\n- adds ucomis{s,d} assembly to x86 and x86_64.\n\nChange-Id: Ie91e04bfb402025073054f3803a3a569e4705caa\n" }, { "commit": "eace45873190a27302b3644c32ec82854b59d299", "tree": "73fbf327839263b6847bdc4359ac1dbea2b897e3", "parents": [ "8ac8d5556fae9c728bcebcc9036a1bbf40087c76" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Nov 24 18:29:54 2014 -0800" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Tue Nov 25 16:02:04 2014 -0800" }, "message": "Move dexCacheStrings from ArtMethod to Class\n\nAdds one load for const strings which are not direct.\n\nSaves \u003e\u003d 60KB of memory avg per app.\nImage size: -350KB.\n\nBug: 17643507\nChange-Id: I2d1a3253d9de09682be9bc6b420a29513d592cc8\n\n(cherry picked from commit f521f423b66e952f746885dd9f6cf8ef2788955d)\n" }, { "commit": "9aec02fc5df5518c16f1e5a9b6cb198a192db973", "tree": "fe924b37f395af1bb50f55ee6c87c66b727f00af", "parents": [ "20032e512c003a8f42735c4e1eca19c1472bb95e" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Nov 18 23:06:35 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Mon Nov 24 16:06:55 2014 +0000" }, "message": "[optimizing compiler] Add shifts\n\nAdded SHL, SHR, USHR for arm, x86, x86_64.\n\nChange-Id: I971f594e270179457e6958acf1401ff7630df07e\n" }, { "commit": "86a8d7afc7f00ff0f5ea7b8aaf4d50514250a4e6", "tree": "3db61320369973e463f67927a8983d7eb0d9f860", "parents": [ "255a5bde2f0014dc86a564555106a4291c0867b4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 19 08:47:18 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 19 08:47:18 2014 +0000" }, "message": "Consistently use k{InstructionSet}WordSize.\n\nThese constants were defined prior to k{InstructionSet}PointerSize. So\nuse them consistently in optimizing as a first step. We can discuss\nwhether we should remove them in a second step.\n\nChange-Id: If129de1a3bb8b65f8d9c816a8ad466815fb202e6\n" }, { "commit": "2d7210188805292e463be4bcf7a133b654d7e0ea", "tree": "7705a3bf841ae44b2396728fa22ed0b5dcb44dbf", "parents": [ "e0491682d101c69bf88c3c24a965312129cbfa38" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Nov 10 11:08:06 2014 -0800" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Tue Nov 18 12:27:37 2014 -0800" }, "message": "Change 64 bit ArtMethod fields to be pointer sized\n\nChanged the 64 bit entrypoint and gc map fields in ArtMethod to be\npointer sized. This saves a large amount of memory on 32 bit systems.\nReduces ArtMethod size by 16 bytes on 32 bit.\n\nTotal number of ArtMethod on low memory mako: 169957\nImage size: 49203 methods -\u003e 787248 image size reduction.\nZygote space size: 1070 methods -\u003e 17120 size reduction.\nApp methods: ~120k -\u003e 2 MB savings.\n\nSavings per app on low memory mako: 125K+ per app\n(less active apps -\u003e more image methods per app).\n\nSavings depend on how often the shared methods are on dirty pages vs\nshared.\n\nTODO in another CL, delete gc map field from ArtMethod since we\nshould be able to get it from the Oat method header.\n\nBug: 17643507\n\nChange-Id: Ie9508f05907a9f693882d4d32a564460bf273ee8\n\n(cherry picked from commit e832e64a7e82d7f72aedbd7d798fb929d458ee8f)\n" }, { "commit": "67555f7e9a05a9d436e034f67ae683bbf02d072d", "tree": "9a01b7c69032b08b3c55c18076f68c1e397d8a35", "parents": [ "bf75c5cf32a47eecadcc5e4a324237c1f1d09cde" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@arm.com", "time": "Tue Nov 18 10:55:16 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 18 15:36:36 2014 +0000" }, "message": "Opt compiler: Add support for more IRs on arm64.\n\nChange-Id: I4b6425135d1af74912a206411288081d2516f8bf\n" }, { "commit": "cff137481eda0eb8dbdf9d2a303ae2bdac2c7322", "tree": "577692649599d8c5ffd9b235d18af22c2621f7fe", "parents": [ "7bfb3f8b1748b5bf7e217a1337176ad488dca66a" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Nov 17 14:32:17 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Nov 17 16:40:49 2014 +0000" }, "message": "Add support for int-to-float \u0026 int-to-double in optimizing.\n\n- Add support for the int-to-float and int-to-double Dex\n instructions in the optimizing compiler.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n byte to float, short to float, int to float, char to\n float, byte to double, short to double, int to double and\n char to double HTypeConversion nodes.\n- Add related tests to test/422-type-conversion.\n\nChange-Id: I963f9d0184a5d3721af2d8f593f133d5af7aa6a3\n" }, { "commit": "1c18d5d0141ffa76b0838fb99615186dcbefc50e", "tree": "3789d51fabf7fa297575d6ce485a03e16faa1903", "parents": [ "610b21cc7f62c61fcb7d88c1ffcc74bfa9ca5ef8", "bacfec30ee9f2f6fdfd190f11b105b609938efca" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Mon Nov 17 11:55:59 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Nov 17 11:55:59 2014 +0000" }, "message": "Merge \"[optimizing compiler] Add REM_INT, REM_LONG\"" }, { "commit": "bacfec30ee9f2f6fdfd190f11b105b609938efca", "tree": "1fb08fa38b27627ab59a54895ef098b43bb70ce1", "parents": [ "ff5298ff1640b730ee62c90ca78fc96b7ee82ec4" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Nov 14 15:54:36 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Mon Nov 17 11:19:35 2014 +0000" }, "message": "[optimizing compiler] Add REM_INT, REM_LONG\n\n- for arm, x86, x86_64\n- minor cleanup/fix in div tests\n\nChange-Id: I240874010206a5a9b3aaffbc81a885b94c248f93\n" }, { "commit": "610b21cc7f62c61fcb7d88c1ffcc74bfa9ca5ef8", "tree": "85314ec6521fd5e8be6b4f75f1dab3ecc16e5a02", "parents": [ "1ad824c1e2b91196fa5d6a4827322923c3046833", "01a8d7135c59b4a664d1e0c0e4d8db343d4118ef" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Nov 17 10:24:03 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Nov 17 10:24:03 2014 +0000" }, "message": "Merge \"Add support for int-to-short in the optimizing compiler.\"" }, { "commit": "c1d4ec95c9dc69a7373e2eca0e69965e54d9cf03", "tree": "7ded15095ee62d471fe1455ec915c1d68fb202f6", "parents": [ "44e6d985fddb3d921f054ff64c319c86005118e9", "af07bc121121d7bd7e8329c55dfe24782207b561" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Nov 17 09:42:23 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Nov 17 09:42:25 2014 +0000" }, "message": "Merge \"Minor object store optimizations.\"" }, { "commit": "01a8d7135c59b4a664d1e0c0e4d8db343d4118ef", "tree": "2a7470f7320f015e67da880e3cf51fd9d616c17d", "parents": [ "ff5298ff1640b730ee62c90ca78fc96b7ee82ec4" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Nov 14 16:27:39 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Nov 14 16:27:39 2014 +0000" }, "message": "Add support for int-to-short in the optimizing compiler.\n\n- Add support for the int-to-short Dex instruction in the\n optimizing compiler.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n byte to short, int to short and char to short\n HTypeConversion nodes.\n- Add related tests to test/422-type-conversion.\n\nChange-Id: If1829549708d9c3473efaa641f7f0bcfa6080ae9\n" }, { "commit": "af07bc121121d7bd7e8329c55dfe24782207b561", "tree": "51e93225aa77c3949a63104f8d48e4b6f6fb2b5b", "parents": [ "d0d805bad888857fe974142cbf3292b9747daae3" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 12 18:08:09 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Nov 14 13:45:02 2014 +0000" }, "message": "Minor object store optimizations.\n\n- Avoid emitting write barrier when the value is null.\n- Do not do a typecheck on an arraystore when storing something that\n was loaded from the same array.\n\nChange-Id: I902492928692e4553b5af0fc99cce3c2186c442a\n" }, { "commit": "981e45424f52735b1c61ae0eac7e299ed313f8db", "tree": "b52598c87d7e1cd030e570da2a59ee26199ae481", "parents": [ "4594ad627a48e249ee1680e954558dea15f0d133" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Nov 14 11:47:14 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Nov 14 11:51:41 2014 +0000" }, "message": "Add support for int-to-char in the optimizing compiler.\n\n- Add support for the int-to-char Dex instruction in the\n optimizing compiler.\n- Implement the ARM and Thumb-2 UBFX instructions and add\n tests for them.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n byte to char, short to char, int to char (and char to\n char!) HTypeConversion nodes.\n- Add related tests to test/422-type-conversion.\n\nChange-Id: I5cd4c6d86f0f6a966c059715b98db35cc8f9de76\n" }, { "commit": "7bdabab1b6a37248bcc0e16893e43f91b4218d29", "tree": "5087b4d6062deba3e105d1fd49f17bc0ea73db4c", "parents": [ "346bcbde27e4620ed1e7bce91728f22069a371f0", "51d3fc40637fc73d4156ad617cd451b844cbb75e" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 13 18:44:19 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 13 18:44:20 2014 +0000" }, "message": "Merge \"Add support for int-to-byte in the optimizing compiler.\"" }, { "commit": "51d3fc40637fc73d4156ad617cd451b844cbb75e", "tree": "21669a66124a23dfc78a8c3f1d8b89415bfb0271", "parents": [ "d94a0a1d2868baaab49f4d2835bca086d98cf763" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 13 14:11:42 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 13 17:30:06 2014 +0000" }, "message": "Add support for int-to-byte in the optimizing compiler.\n\n- Add support for the int-to-byte Dex instruction in the\n optimizing compiler.\n- Implement the ARM and Thumb-2 SBFX instructions.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n char to byte, short to byte and int to byte\n HTypeConversion nodes.\n- Add related tests to test/422-type-conversion.\n\nChange-Id: Ic8b8911b90d4b5281fad15bcee96bc3ee85dc577\n" }, { "commit": "dc87c1dd1d7a7192b03e87ffd07eec80e8c2ae24", "tree": "d5c9209dfb635aeb99346d91d87f3b930fe01bee", "parents": [ "172808c14506f4b46ebf0765e066306b7301760f", "a21f598fd4dfdb95dc8597d3156120cc20d94c02" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 13 16:28:16 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 13 16:28:17 2014 +0000" }, "message": "Merge \"[optimizing compiler] Fix Move for instruction with constant output\"" }, { "commit": "a21f598fd4dfdb95dc8597d3156120cc20d94c02", "tree": "b1f8ea8557a6c7edbeb4f05b0d642811e507a2e3", "parents": [ "d6fb6cfb6f2d0d9595f55e8cc18d2753be5d9a13" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 13 15:53:04 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 13 16:26:04 2014 +0000" }, "message": "[optimizing compiler] Fix Move for instruction with constant output\n\nChange-Id: I15d89292dc62f8dd8643530f95ace2e8be034411\n" }, { "commit": "d94a0a1d2868baaab49f4d2835bca086d98cf763", "tree": "48d0701d17445c9ae09ee521c6ac1fb9f614d3b0", "parents": [ "d77ae8a11e6493ac738864eae073ca4909e4d847", "d6fb6cfb6f2d0d9595f55e8cc18d2753be5d9a13" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 13 11:16:37 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 13 11:16:37 2014 +0000" }, "message": "Merge \"[optimizing compiler] Add DIV_LONG\"" }, { "commit": "d77ae8a11e6493ac738864eae073ca4909e4d847", "tree": "f6835a2f659cedfc47975bf82f52f05927f8b4b2", "parents": [ "39edb50e16334c8a4ebbfcf0efac38b25074a2dd", "f97f9fbfdf7f2e23c662f21081fadee6af37809d" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 13 11:16:27 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 13 11:16:28 2014 +0000" }, "message": "Merge \"[optimizing compiler] add HTemporary support for long and doubles\"" }, { "commit": "a3279c80b4f92e0cc96902cf069c09424ed94ed0", "tree": "2d566e00a4976fe72c54663192715f919d3fa1dd", "parents": [ "a1af1b59256820dde25ec21581e9e64f698e182f", "f0e3937b87453234d0d7970b8712082062709b8d" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 13 09:58:56 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 13 09:58:57 2014 +0000" }, "message": "Merge \"Do a parallel move in BoundsCheckSlowPath.\"" }, { "commit": "d6fb6cfb6f2d0d9595f55e8cc18d2753be5d9a13", "tree": "2f8192e49c9debeba18e73e28b9c789adf8d2eef", "parents": [ "f97f9fbfdf7f2e23c662f21081fadee6af37809d" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Nov 11 19:07:44 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Nov 12 19:43:32 2014 +0000" }, "message": "[optimizing compiler] Add DIV_LONG\n\n- for backends: arm, x86, x86_64\n- added cqo, idivq, testq assembly for x64_64\n- small cleanups\n\nChange-Id: I762ef37880749038ed25d6014370be9a61795200\n" }, { "commit": "f97f9fbfdf7f2e23c662f21081fadee6af37809d", "tree": "aa5c7b6d42fc1dcd26f4a4f4d75fa488c575091a", "parents": [ "0eaf65edf1b2af63a3eeb77ee1864d84d3154d1e" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Nov 11 15:38:19 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Nov 12 18:38:49 2014 +0000" }, "message": "[optimizing compiler] add HTemporary support for long and doubles\n\nChange-Id: I5247ecd71d0193050484b7632c804c9bfd20f924\n" }, { "commit": "f0e3937b87453234d0d7970b8712082062709b8d", "tree": "e552c1173ee90fea1d2ba11cc08878efe65ba0be", "parents": [ "59321e0e10ea09694efecf6154704e2743b9bffd" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 12 17:50:07 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 12 17:55:24 2014 +0000" }, "message": "Do a parallel move in BoundsCheckSlowPath.\n\nThe two locations of the index and length could overlap,\nso we need a parallel move. Also factorize the code for\ndoing a parallel move based on two locations.\n\nChange-Id: Iee8b3459e2eed6704d45e9a564fb2cd050741ea4\n" }, { "commit": "9574c4b5f5ef039d694ac12c97e25ca02eca83c0", "tree": "2ad3cb7ffaf3579b9ca2a7bb0d7d7e99b3c758b6", "parents": [ "59321e0e10ea09694efecf6154704e2743b9bffd" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 12 13:19:37 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 12 13:55:36 2014 +0000" }, "message": "Implement and/or/xor in optimizing.\n\nChange-Id: I7cf6da1fd334a7177a5580931b8f174dd40b7cec\n" }, { "commit": "b7baf5c58d0e864f8c3f889357c51288aed42e61", "tree": "a665b8b4935f99eab4bb81ad703fe0ec4efc1d10", "parents": [ "15136cb06f0a0fd5f60a832c33870de53c74696a" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 11 16:29:44 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 12 11:41:19 2014 +0000" }, "message": "Implement monitorenter/monitorexit.\n\nPretty simple as they just invoke the runtime.\n\nChange-Id: I5fcb2c783deac27e55e28d8b3da3e68ea4b77363\n" }, { "commit": "15136cb06f0a0fd5f60a832c33870de53c74696a", "tree": "ce01322ba56b4678f2a0320a3a5a45115511d89e", "parents": [ "9ffeab50f7675ba69c98efdf3815540eafe79a0e", "946e143941d456a4ec666f7f54719c65c5aa3f5d" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Nov 12 11:33:41 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Nov 12 11:33:42 2014 +0000" }, "message": "Merge \"Revert \"Revert \"Add support for long-to-int in the optimizing compiler.\"\"\"" }, { "commit": "57a88d4ac205874dc85d22f9f6a9ca3c4c373eeb", "tree": "af321a2f2d4555f56e0ffcbe31cb4e313b8d35c7", "parents": [ "401da919c67ceb8fbcac81596327ecc10b73389b" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Nov 10 15:09:21 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 12 09:18:41 2014 +0000" }, "message": "Implement checkcast for optimizing.\n\n- Ended up not using HTypeCheck because of how\n instanceof and checkcast end up having different logic\n for code generation.\n\n- Fix a x86_64 assembler bug triggered by now enabling\n more methods to be compiled. Difficult to test today\n without b/18117217.\n\nChange-Id: I3022e7ae03befb1d10bea9637ad21fadc430abe0\n" }, { "commit": "946e143941d456a4ec666f7f54719c65c5aa3f5d", "tree": "4535eb320a60043b18735a8496a288f6f8377cb7", "parents": [ "d6425d7bb909b668341d9781c567f35f6d10ea16" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Nov 11 17:35:19 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Nov 11 17:35:19 2014 +0000" }, "message": "Revert \"Revert \"Add support for long-to-int in the optimizing compiler.\"\"\n\nThis reverts commit 3adfd1b4fb20ac2b0217b5d2737bfe30ad90257a.\n\nChange-Id: Iacf0c6492d49267e24f1b727dbf6379b21fd02db\n" }, { "commit": "3adfd1b4fb20ac2b0217b5d2737bfe30ad90257a", "tree": "fe5ffa4519a798cf5de4dbb724f38541562d571d", "parents": [ "13e86ed02c6256b704ba669cfe5f2c44f9d9f91f" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Nov 11 14:48:08 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Nov 11 14:48:08 2014 +0000" }, "message": "Revert \"Add support for long-to-int in the optimizing compiler.\"\n\nThis reverts commit 647b96f29cb81832e698f863884fdba06674c9de.\n\nChange-Id: I552f23585463c676acbd547521b4d3ee5c0342eb\n" }, { "commit": "647b96f29cb81832e698f863884fdba06674c9de", "tree": "1a4b5d9c2dc0cec47387838eb33b55b01838b615", "parents": [ "666c732cfa211abf44ed90120a87bf8c18138e55" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Nov 11 12:26:26 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Nov 11 12:26:26 2014 +0000" }, "message": "Add support for long-to-int in the optimizing compiler.\n\n- Add support for the long-to-int Dex instruction in the\n optimizing compiler.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n long-to-int HTypeConversion nodes.\n- Add related tests to test/422-type-conversion.\n- Also fix comments in test/415-optimizing-arith-neg and\n in test/416-optimizing-arith-not.\n\nChange-Id: I3084af30f2a495d178362ae1154dc7ceb7bf3a58\n" }, { "commit": "666c732cfa211abf44ed90120a87bf8c18138e55", "tree": "be5eb89a51ce94314b5c0761171eb276faf1ec36", "parents": [ "bb5b390c3b7c1d6571e73672124f82cc40026f6a" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Nov 10 13:39:43 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Nov 10 13:39:43 2014 +0000" }, "message": "Support Java conversions from char to long in opt. compiler.\n\nThese char to long conversions generate int-to-long Dex\ninstructions.\n\nChange-Id: I6a8e71b57870cf5e8d5bc638fabce0fc7593f0b2\n" }, { "commit": "9806199033fc2fb61bfd2260f0156d1b38d56beb", "tree": "14a5cd067fb01ace19fb5e0f7d494bd9e8744845", "parents": [ "255507d9c695aa9c774b882308faa8278382006b", "52839d17c06175e19ca4a093fb878450d1c4310d" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Nov 10 10:36:59 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Nov 10 10:37:00 2014 +0000" }, "message": "Merge \"Support invoke-interface in optimizing.\"" }, { "commit": "52839d17c06175e19ca4a093fb878450d1c4310d", "tree": "552ea632ad4d1f688bdfd04b66102e25312bd237", "parents": [ "a453307957afdc3ef0a7988025539ab8919464bc" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Nov 07 17:47:25 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Nov 10 10:33:37 2014 +0000" }, "message": "Support invoke-interface in optimizing.\n\nChange-Id: Ic18d7c3d2810557231caf0571956e0c431f5d384\n" }, { "commit": "6f5c41f9e409bc4da53b5d7c385202255e391e72", "tree": "bea48b3f23fdac7d566dd3b32dde1f86014b5a02", "parents": [ "86fe4e41720cab85e3e40c45c0436521e56b25d5" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 06 08:59:20 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Nov 07 15:32:37 2014 +0000" }, "message": "Implement instanceof in optimizing.\n\n- Only fast-path for now: null or same class.\n- Use pQuickInstanceofNonTrivial for slow path.\n\nChange-Id: Ic5196b94bef792f081f3cb4d15157058e1381e6b\n" }, { "commit": "f43083d560565aea46c602adb86423daeefe589d", "tree": "6c812e88723c40ee77ab5c9ba38625a10cc9b364", "parents": [ "de87f405a5f8a4ffd57f01d0d667188e8f0ca8cd" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Nov 07 10:48:10 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Nov 07 14:43:19 2014 +0000" }, "message": "Do not update Out after it has a valid location.\n\nSlow paths use LocationSummary to know where to move\nthings around, and they are executed at the end of the\ncode generation.\n\nThis fix is needed for https://android-review.googlesource.com/#/c/113345/.\n\nChange-Id: Id336c6409479b1de6dc839b736a7234d08a7774a\n" }, { "commit": "52e832b1278449e62d9eb502d54d5ff18f8606ed", "tree": "14db2240db9d0cec5551f8588a5901bd1bc081fe", "parents": [ "eb71b3fc2a18ac649dc3743f4ec28f781932030a" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 06 15:15:31 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Nov 07 13:54:29 2014 +0000" }, "message": "Support floats and doubles in fields.\n\nChange-Id: I19832106633405403f0461b3fe13b268abe39db3\n" }, { "commit": "adc3e13db74c193302ac9d56735924cad32083cc", "tree": "738db270af4fbf33a6dfa1a025edc1b1c640848a", "parents": [ "9b6c62b82e3d40d70d541920d5f7f81ad517bc01", "3dbcb38a8b2237b0da290ae35dc0caab3cb47b3d" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 06 17:33:06 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 06 17:33:06 2014 +0000" }, "message": "Merge \"Support float \u0026 double negation in the optimizing compiler.\"" }, { "commit": "de58ab2c03ff8112b07ab827c8fa38f670dfc656", "tree": "c872bfbcad1e90845008140bbddcc43e56dc19d2", "parents": [ "3ed86e4e98dfe1b05c9a03aa2aee42c145a018c3" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 05 12:46:03 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 06 16:49:52 2014 +0000" }, "message": "Implement try/catch/throw in optimizing.\n\n- We currently don\u0027t run optimizations in the presence of a try/catch.\n- We therefore implement Quick\u0027s mapping table.\n- Also fix a missing null check on array-length.\n\nChange-Id: I6917dfcb868e75c1cf6eff32b7cbb60b6cfbd68f\n" }, { "commit": "3dbcb38a8b2237b0da290ae35dc0caab3cb47b3d", "tree": "98ed87e77213fc36fd72b2dbab71156f9176d4ee", "parents": [ "55dcfb5e0dd626993bb2b7b9f692c1b02b5d955f" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 28 17:30:07 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 06 16:40:59 2014 +0000" }, "message": "Support float \u0026 double negation in the optimizing compiler.\n\n- Add support for the neg-float and neg-double Dex\n instructions in the optimizing compiler.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n float and double HNeg nodes.\n- Add related tests to test/415-optimizing-arith-neg.\n\nChange-Id: I29739a86e13dbe6f64e191641d01637c867cba6c\n" }, { "commit": "803ad870017503849a22ef4fcb702847c18201c0", "tree": "26d7d8af0edd7fc3d40f30b3cf15b051f33a9ee7", "parents": [ "863b844e206cddbcd18c77d356766a5fd4e5df22", "d0d4852847432368b090c184d6639e573538dccf" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 06 14:49:23 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 06 14:49:24 2014 +0000" }, "message": "Merge \"[optimizing compiler] Add div-int and exception handling.\"" }, { "commit": "d0d4852847432368b090c184d6639e573538dccf", "tree": "47e31fe860ff1c3ace2f3f5945aa69689d42d998", "parents": [ "a88b7b93e28ea86969dd3ec6a6bf6929d697fc31" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Nov 04 16:40:20 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 06 14:42:58 2014 +0000" }, "message": "[optimizing compiler] Add div-int and exception handling.\n\n- for backends: arm, x86, x86_64\n- fixed a register allocator bug: the request for a fixed register for\nthe first input was ignored if the output was kSameAsFirstInput\n- added divide by zero exception\n- more tests\n- shuffle around some code in the builder to reduce the number of lines\nof code for a single function.\n\nChange-Id: Id3a515e02bfbc66cd9d16cb9746f7551bdab3d42\n" }, { "commit": "44b819e8d2ac48f1f66915ec1fab36ad247eb4d9", "tree": "40710d90f3ae82e14e6acb376f6a0d78069c97be", "parents": [ "508368cc013f146b4348793d72d66d4f0e96f07c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 06 12:00:54 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 06 12:14:21 2014 +0000" }, "message": "Don\u0027t use R4 for suspend check.\n\nChange-Id: I57ccfaa527e2676f21339860b28955468a87adfe\n" }, { "commit": "dff1f2812ecdaea89978c5351f0c70cdabbc0821", "tree": "5305173d341263ad32deb98c0299ee8bad03baa9", "parents": [ "5e5632ff1651adbf95faaf8fb3239a36f9f61124" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Nov 05 14:15:05 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Nov 05 16:51:59 2014 +0000" }, "message": "Support int-to-long conversions in the optimizing compiler.\n\n- Add support for the int-to-float Dex instruction in the\n optimizing compiler.\n- Add a HTypeConversion node type for control-flow graphs.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n int-to-float HTypeConversion nodes.\n- Add a 64-bit \"Move doubleword to quadword with\n sign-extension\" (MOVSXD) instruction to the x86-64\n assembler.\n- Add related tests to test/422-type-conversion.\n\nChange-Id: Ieb8ec5380f9c411857119c79aa8d0728fd10f780\n" }, { "commit": "78a3233313260665fe82ba56257855e043bca3d4", "tree": "46622bf088b3f30d2c6d8a5b548519137c88c867", "parents": [ "fe50a0f644bf57a92612d08ad21dc4ea5a2f652a", "277ccbd200ea43590dfc06a93ae184a765327ad0" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Nov 05 02:42:56 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Nov 05 02:42:56 2014 +0000" }, "message": "Merge \"ART: More warnings\"" }, { "commit": "277ccbd200ea43590dfc06a93ae184a765327ad0", "tree": "d89712e93da5fb2748989353c9ee071102cf3f33", "parents": [ "ad17d41841ba1fb177fb0bf175ec0e9f5e1412b3" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Nov 03 21:36:10 2014 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Nov 04 18:40:08 2014 -0800" }, "message": "ART: More warnings\n\nEnable -Wno-conversion-null, -Wredundant-decls and -Wshadow in general,\nand -Wunused-but-set-parameter for GCC builds.\n\nChange-Id: I81bbdd762213444673c65d85edae594a523836e5\n" }, { "commit": "424f676379f2f872acd1478672022f19f3240fc1", "tree": "bdd8fbb9c2401465d9a0536e94dec74acc8b4f3b", "parents": [ "793d1023785f81eb8e29a3eb67fec17d7ee7dcbe" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Nov 03 14:51:25 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 04 11:23:08 2014 +0000" }, "message": "Implement CONST_CLASS in optimizing compiler.\n\nChange-Id: Ia8c8dfbef87cb2f7893bfb6e178466154eec9efd\n" }, { "commit": "6a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866f", "tree": "9df58b57af13240a93a6da4eefcf03f70cce9ad9", "parents": [ "c6e0955737e15f7c0c3575d4e13789b3411f4993" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Fri Oct 31 00:33:20 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Mon Nov 03 20:01:04 2014 -0800" }, "message": "Remove -Wno-unused-parameter and -Wno-sign-promo from base cflags.\n\nFix associated errors about unused paramenters and implict sign conversions.\nFor sign conversion this was largely in the area of enums, so add ostream\noperators for the effected enums and fix tools/generate-operator-out.py.\nTidy arena allocation code and arena allocated data types, rather than fixing\nnew and delete operators.\nRemove dead code.\n\nChange-Id: I5b433e722d2f75baacfacae4d32aef4a828bfe1b\n" }, { "commit": "a9014f977ae90373f5bad4cf812c2bda810b10f8", "tree": "40f4bc76cb5e7cf9c95fced70b1ad5c2c2d39f4e", "parents": [ "8b557af85871e5086589afd2b3a17089d0f67df8", "b5f62b3dc5ac2731ba8ad53cdf3d9bdb14fbf86b" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 31 14:24:05 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 31 14:24:06 2014 +0000" }, "message": "Merge \"Support for CONST_STRING in optimizing compiler.\"" }, { "commit": "b5f62b3dc5ac2731ba8ad53cdf3d9bdb14fbf86b", "tree": "fb2d33e43de1476af33112f263fd3c3a775917d0", "parents": [ "29ce77f654412dbb5fb3d5949da4053952917101" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 30 10:58:41 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 31 12:21:53 2014 +0000" }, "message": "Support for CONST_STRING in optimizing compiler.\n\nChange-Id: Iab8517bdadd1d15ffbe570010f093660be7c51aa\n" }, { "commit": "26dcecb0ef620fb225cd5dd39f6e41b07e34c83d", "tree": "5f4d8b1584059dc9570be48030fe4c6aad82457b", "parents": [ "29ce77f654412dbb5fb3d5949da4053952917101", "3c03503d66df3b4440f851ae7d0c4fae5e7872df" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 30 18:20:07 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 30 18:20:07 2014 +0000" }, "message": "Merge \"Follow-up CL after hard float changes.\"" }, { "commit": "0a6c459f713ff61769a02204cd736167e062bf4c", "tree": "6e55afea5e0fd39eb4970b2ce3e689c4c0439857", "parents": [ "d8e231c0f3f7349c89b2323af6313384353e4cc5" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 30 16:37:57 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 30 16:41:36 2014 +0000" }, "message": "Fix for long parameter passed both in stack and register.\n\nFix for long parameter passed both in stack and register\non 32bits architectures.\nThe move to hard float ABI makes it so that the\nregister index does not necessarily match the stack index anymore.\n\nChange-Id: I26b483f68ac86d336b4a37d94c38b04917668659\n" }, { "commit": "19a19cffd197a28ae4c9c3e59eff6352fd392241", "tree": "265b971afd0e33afc8986317aea2f5a6fe817aec", "parents": [ "7c049c1f34220b0dc1a7f68f3b30f388bae7bdb9" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 22 16:07:05 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 29 13:01:48 2014 +0000" }, "message": "Add support for static fields in optimizing compiler.\n\nChange-Id: Id2f010589e2bd6faf42c05bb33abf6816ebe9fa9\n" }, { "commit": "7c4954d429626a6ceafbf05be41bf5f840894e44", "tree": "9d4a088cc2e259235819f105a21e5a3d58bd0139", "parents": [ "4816ecfc1b2d544685ec5edcdeaad6870f6bfd7e" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 28 16:57:40 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 28 17:53:33 2014 +0000" }, "message": "[optimizing compiler] Add division for floats and doubles\n\nbackends: x86, x86_64, arm.\n\nAlso:\n- ordered instructions based on their name.\n- add missing kNoOutputOverlap to add/sub/mul.\n\nChange-Id: Ie47cde3b15ac74e7a1660c67a2eed1d7871f0ad0\n" }, { "commit": "3c03503d66df3b4440f851ae7d0c4fae5e7872df", "tree": "6f10a0da8e1a06d4a0a88e015db091a824aec7fb", "parents": [ "d3271e8a48768ed53bfa2515474b57245e7d9a41" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 28 10:46:40 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 28 10:46:40 2014 +0000" }, "message": "Follow-up CL after hard float changes.\n\nAddressing comments from Zheng Xu.\n\nChange-Id: I8c599cdfab03373e82a1b90b711005c490bc6ca0\n" }, { "commit": "705664321a5cc1418255172f92d7d7195cf60a7b", "tree": "bdb7a60edff3e13c9bb6658d9ba20d3541a9c50d", "parents": [ "2deace28b16d3161ccd6a85a2c577e83f4b25364" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 24 16:20:17 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 27 17:33:47 2014 +0000" }, "message": "Add long bitwise not instruction in the optimizing compiler.\n\n- Add support for the not-long (long integer one\u0027s\n complement negation) instruction in the optimizing\n compiler.\n- Add a 64-bit NOT instruction (notq) to the x86-64\n assembler.\n- Generate ARM, x86 and x86-64 code for long HNot nodes.\n- Gather not-related tests in test/416-optimizing-arith-not.\n\nChange-Id: I2d5b75e9875664d6032d04f8401b2bbb84506948\n" }, { "commit": "1ba0f596e9e4ddd778ab431237d11baa85594eba", "tree": "c1d51616adf4d98aab3ebccf47ad5146635cb87f", "parents": [ "1ef3495abfa2a858b3cc7a1844383c8e7dff0b60" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 27 15:14:55 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 27 17:20:35 2014 +0000" }, "message": "Support hard float on arm in optimizing compiler.\n\nAlso bump oat version, needed after latest hard float switch.\n\nChange-Id: Idf5acfb36c07e74acff00edab998419a3c6b2965\n" }, { "commit": "2e07b4f0a84a7968b4690c2b1be2e2f75cc6fa8e", "tree": "2fc5c75594b2cf8be1d6bd295d36c627af1651fe", "parents": [ "02567379e7099682345fd59d45a23e17711c9ddd" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 18:12:09 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 24 11:22:59 2014 +0100" }, "message": "Revert \"Revert \"Implement long negate instruction in the optimizing compiler.\"\"\n\nThis reverts commit 30ca3d847fe72cfa33e1b2473100ea2d8bea4517.\n\nChange-Id: I188ca8d460d55d3a9966bcf31e0588575afa77d2\n" }, { "commit": "30ca3d847fe72cfa33e1b2473100ea2d8bea4517", "tree": "a66582c2cb6026be2f59ba66ff437429b67bbe44", "parents": [ "46fdec13b6dcaf932aa9fb1338f32df01aa0d959" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 18:07:44 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 18:07:44 2014 +0100" }, "message": "Revert \"Implement long negate instruction in the optimizing compiler.\"\n\nThis reverts commit 66ce173a40eff4392e9949ede169ccf3108be2db.\n" }, { "commit": "66ce173a40eff4392e9949ede169ccf3108be2db", "tree": "552bc6275388c3bc6ecd4f549ffcd1422c020f82", "parents": [ "e2b2cbf8bffdf9ee3ece487fde9ac78652b4abaf" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 16:38:33 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 17:08:48 2014 +0100" }, "message": "Implement long negate instruction in the optimizing compiler.\n\n- Add support for the neg-long (long integer two\u0027s\n complement negate) instruction in the optimizing compiler.\n- Add a 64-bit NEG instruction (negq) to the x86-64\n assembler.\n- Generate ARM, x86 and x86-64 code for integer HNeg nodes.\n- Put neg-related tests into test/415-optimizing-arith-neg.\n\nChange-Id: I1fbe9611e134408a6b8745d1df20ab6ffa5e50f2\n" }, { "commit": "1135168a1a9e2a6493657be8c5e91d67e5f224a7", "tree": "02d16c2aaaf0d0a3a31e47e9b219509b4840b3d6", "parents": [ "e833b110876fa8fe34a08f06d2521c74488180bb" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 15:38:15 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 16:25:09 2014 +0100" }, "message": "[optimizing compiler] Add float/double subtraction\n\n- for arm, x86, x86_64\n- add tests\n- a bit of clean up\n\nChange-Id: I3761b0d908aca3e3c5d60da481fafb423ff7c9b9\n" }, { "commit": "1cc5f251df558b0e22cea5000626365eb644c727", "tree": "5e65a32366261646edce02283a185928adba79b5", "parents": [ "b08f4dcf90215ed49e0b796ab3e609bd605be8ba" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 22 18:06:21 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 10:12:06 2014 +0100" }, "message": "Implement int bit-wise not operation in the optimizing compiler.\n\n- Add support for the not-int (integer one\u0027s complement\n negate) instruction in the optimizing compiler.\n- Extend the HNot control-flow graph node type and make it\n inherit from HUnaryOperation.\n- Generate ARM, x86 and x86-64 code for integer HNeg nodes.\n- Exercise these additions in the codegen_test gtest, as there\n is not direct way to assess the support of not-int from a\n Java source. Indeed, compiling a Java expression such as\n `~a\u0027 using javac and then dx generates an xor-int/lit8 Dex\n instruction instead of the expected not-int Dex instruction.\n This is probably because the Java bytecode has an `ixor\u0027\n instruction, but there\u0027s not instruction directly\n corresponding to a bit-wise not operation.\n\nChange-Id: I223aed75c4dac5785e04d99da0d22e8d699aee2b\n" }, { "commit": "b5bfa96ff20e86316961327dec5c859239dab6a0", "tree": "c37c4260f59a5eb79b33e3a81142eefc7bc49390", "parents": [ "46bf5e0759e80bbe69130d6731a95fd07e10507c" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 21 18:02:24 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Oct 22 15:20:25 2014 +0100" }, "message": "Add multiplication for floats/doubles in optimizing compiler\n\nChange-Id: I61de8ce1d9e37e30db62e776979b3f22dc643894\n" }, { "commit": "a3d05a40de076aabf12ea284c67c99ff28b43dbf", "tree": "acbe183e7637a333bdaaf0910731b053f2be0f26", "parents": [ "2da28f2a9e79a09a4044521dc4d00320fcdcd041" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 20 17:41:32 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 22 13:49:47 2014 +0000" }, "message": "Implement array creation related DEX instructions.\n\nImplement new-array, filled-new-array, and fill-array-data.\n\nChange-Id: I405560d66777a57d881e384265322617ac5d3ce3\n" }, { "commit": "b762d2ebf9dc604561d9915c96b377235c94960c", "tree": "aa6060b282db511651908d232a6b16ecbb22b755", "parents": [ "4ff20eba94a2519e5bac57b5f92e04741ea90141" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 22 10:11:06 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 22 10:11:06 2014 +0100" }, "message": "Various fixes related to integer negate operations.\n\n- Emit an RSB instruction for HNeg nodes in the ARM code\n generator instead of RSBS, as we do not need to update the\n condition code flags in this case.\n- Simply punt when trying to statically evaluate a long\n unary operation, instead of aborting.\n- Move a test case to the right place.\n\nChange-Id: I35eb8dea58ed35258d4d8df77181159c3ab07b6f\n" }, { "commit": "102cbed1e52b7c5f09458b44903fe97bb3e14d5f", "tree": "cb0a433c8f284021298c8a0c4dd0da97ca9d198a", "parents": [ "07f5c5edb7ef24ac35364e6ef9a8107a44e6564e" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 15 18:31:05 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 16:03:51 2014 +0100" }, "message": "Implement register allocator for floating point registers.\n\nAlso:\n- Fix misuses of emitting the rex prefix in the x86_64 assembler.\n- Fix movaps code generation in the x86_64 assembler.\n\nChange-Id: Ib6dcf6e7c4a9c43368cfc46b02ba50f69ae69cbe\n" }, { "commit": "fdc31730353f0b3d3064cdf8b6aacabea26eb4f7", "tree": "26a7a5f64a5e82c10ba7536952bbb9841f6b3a54", "parents": [ "41aae699515430c10ab662945657d98c0febd578", "88cb1755e1d6acaed0f66ce65d7a2a4465053342" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 21 13:28:20 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Oct 21 13:28:21 2014 +0000" }, "message": "Merge \"Implement int negate instruction in the optimizing compiler.\"" }, { "commit": "88cb1755e1d6acaed0f66ce65d7a2a4465053342", "tree": "6ffdd07aa75a38eae9376bd95d0991a789cd624c", "parents": [ "1e642b5e5b2958ffc1653f5f42f2d091bbd8549e" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 20 16:36:47 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 21 13:48:32 2014 +0100" }, "message": "Implement int negate instruction in the optimizing compiler.\n\n- Add support for the neg-int (integer two\u0027s complement\n negate) instruction in the optimizing compiler.\n- Add a HNeg node type for control-flow graphs and an\n intermediate HUnaryOperation base class.\n- Generate ARM, x86 and x86-64 code for integer HNeg nodes.\n\nChange-Id: I72fd3e1e5311a75c38a8cb665a9211a20325a42e\n" }, { "commit": "8e3964b766652a0478e8e0e303e8556c997675f1", "tree": "ebae22017d3d3c872642cbc56610f67ff32a861d", "parents": [ "5830247c351a1c40f37666584d6c390f32c31957" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 17 11:06:38 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 11:47:54 2014 +0100" }, "message": "Remove the notion of dies at entry.\n\n- Instead, explicitly say that the output does not overlap.\n- Inputs that must be in a fixed register do die at entry,\n as we know they have a location that others can not take.\n- There is also no need to differentiate between an input move\n and a connecting sibling move - those can be put in the\n same parallel move instruction.\n\nChange-Id: I1b2b2827906601f822b59fb9d6a21d48e43bae27\n" }, { "commit": "34bacdf7eb46c0ffbf24ba7aa14a904bc9176fb2", "tree": "e8ed8e40c5f7896a9ac01bf7dcc2e56f40cfc804", "parents": [ "7f758228f7904d2f65f06bfbd2b8ecbb8e8c6a9d" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 07 20:23:36 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Oct 17 11:46:45 2014 +0100" }, "message": "Add multiplication for integral types\n\nThis also fixes an issue where we could allocate a pair register even if\none of its parts was already blocked.\n\nChange-Id: I4869175933409add2a56f1ccfb369c3d3dd3cb01\n" }, { "commit": "dc43794b146283b2ba588db83d1fac1f8a3af6d3", "tree": "7b6befbdfe47071ebfde5b627edae339fe9ab6f3", "parents": [ "ec2ea6ff6e3d7816df889454866a28b58ce6e6f5", "92a73aef279be78e3c2b04db1713076183933436" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 16 14:20:58 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 16 14:20:59 2014 +0000" }, "message": "Merge \"Don\u0027t use assembler classes in code_generator.h.\"" } ], "next": "92a73aef279be78e3c2b04db1713076183933436" }