)]}'
{
  "log": [
    {
      "commit": "0a51605ddd81635135463dab08b6f7c21b58ffb0",
      "tree": "820f338333010f4d6e4b543ffea47e9ff7d2dd3f",
      "parents": [
        "e2727154f25e0db9a5bb92af494d8e47b181dfcf"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Oct 14 13:00:44 2019 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Oct 14 13:00:44 2019 +0000"
      },
      "message": "Revert \"Make compiler/optimizing/ symbols hidden.\"\n\nThis reverts commit e2727154f25e0db9a5bb92af494d8e47b181dfcf.\n\nReason for revert: Breaks ASAN tests (ODR violation).\nBug: 142365358\n\nChange-Id: I38103d74a1297256c81d90872b6902ff1e9ef7a4\n"
    },
    {
      "commit": "e2727154f25e0db9a5bb92af494d8e47b181dfcf",
      "tree": "0ddc6eec3ad9508d7eb1f2b941786dd0ed7d2cd8",
      "parents": [
        "c78860b91ae07eed92f86876e7a03132adea6fcd"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Oct 10 10:46:42 2019 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Oct 14 08:22:00 2019 +0000"
      },
      "message": "Make compiler/optimizing/ symbols hidden.\n\nMake symbols in compiler/optimizing hidden by a namespace\nattribute. The unit intrinsic_objects.{h,cc} is excluded as\nit is needed by dex2oat.\n\nAs the symbols are no longer exported, gtests are now linked\nwith the static version of the libartd-compiler library.\n\nlibart-compiler.so size:\n  - before:\n    arm: 2396152\n    arm64: 3345280\n  - after:\n    arm: 2016176 (-371KiB, -15.9%)\n    arm64: 2874480 (-460KiB, -14.1%)\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing --jit\nBug: 142365358\nChange-Id: I1fb04a33351f53f00b389a1642e81a68e40912a8\n"
    },
    {
      "commit": "bbc6e7edb5fca4a61ac53dd9bce79cb4f0bb3403",
      "tree": "0fbce767bc383358cf4cd65aafc74140e1850982",
      "parents": [
        "19379b58bd433da91230e4fe6cd96e7416d16adc"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Aug 24 16:58:47 2018 +0100"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Aug 28 11:06:07 2018 +0100"
      },
      "message": "Use \u0027final\u0027 and \u0027override\u0027 specifiers directly in ART.\n\nRemove all uses of macros \u0027FINAL\u0027 and \u0027OVERRIDE\u0027 and replace them with\n\u0027final\u0027 and \u0027override\u0027 specifiers. Remove all definitions of these\nmacros as well, which were located in these files:\n- libartbase/base/macros.h\n- test/913-heaps/heaps.cc\n- test/ti-agent/ti_macros.h\n\nART is now using C++14; the \u0027final\u0027 and \u0027override\u0027 specifiers have\nbeen introduced in C++11.\n\nTest: mmma art\nChange-Id: I256c7758155a71a2940ef2574925a44076feeebf\n"
    },
    {
      "commit": "d9e4d73b20d68aa387f5837e1535b6fc26b2859a",
      "tree": "b55a96e66f2db1482571788b33c6d3055cb47396",
      "parents": [
        "8dbb4ba7ffdf42cf08c55b117370efc0ec5357e8"
      ],
      "author": {
        "name": "Gupta Kumar, Sanjiv",
        "email": "sanjiv.kumar.gupta@intel.com",
        "time": "Mon Feb 05 13:35:03 2018 +0530"
      },
      "committer": {
        "name": "Gupta Kumar, Sanjiv",
        "email": "sanjiv.kumar.gupta@intel.com",
        "time": "Wed Feb 21 14:56:13 2018 +0530"
      },
      "message": "Fix iCache misses for GetKind on x86,x86_64\n\nGetKind() takes about 2.6% of total compilation time on x86_64.\nThe primary reason is that the target call GetKindInternal() is often\nbeyond the page boundary causing frequent i-cache misses.\nThis patch removes the virtual call to GetKindInternal () and instead\nkeeps the InstructionKind into each constructed instruction.\nSince we have about 121 instructions in total as of now,\nit takes about 7 extra bits in each instruction.\ndex2oat runs about 12% faster with --compiler-filter\u003deverything on an\nAPK of 25MB.\n\nTest: Tested the patch by running host art tests.\n\nRebased.\n\nChange-Id: Ia7bbcd67180151e4565507164a718acbb6284885\nSigned-off-by: Gupta Kumar, Sanjiv \u003csanjiv.kumar.gupta@intel.com\u003e\n"
    },
    {
      "commit": "cced8ba4245a061ab047a0a6882468d75d619dd9",
      "tree": "b379abfa48689c108e1cacedd2b13d4b5394baf2",
      "parents": [
        "96c76457d5c5af2d4243c78d74ada77de3223d88"
      ],
      "author": {
        "name": "Artem Serov",
        "email": "artem.serov@linaro.org",
        "time": "Wed Jul 19 18:18:09 2017 +0100"
      },
      "committer": {
        "name": "Artem Serov",
        "email": "artem.serov@linaro.org",
        "time": "Tue Nov 07 12:56:17 2017 +0000"
      },
      "message": "ART: Introduce individual HInstruction cloning.\n\nIntroduce API for HInstruction cloning, support it for a few\ninstructions. add a gtest.\n\nTest: cloner_test.cc, test-art-target, test-art-host.\n\nChange-Id: I8b6299be5d04a26390d9ef13a20ce82ee5ae4afe\n"
    },
    {
      "commit": "e0eb48353ddf0c1b79bfec2ba15c899a413c2c70",
      "tree": "71dfe896afa05c39d64373518d1e1e36cb8d8d43",
      "parents": [
        "3e6c13997373efac343a65740da0c4f6e77338b9"
      ],
      "author": {
        "name": "xueliang.zhong",
        "email": "xueliang.zhong@linaro.org",
        "time": "Mon Oct 30 13:43:14 2017 +0000"
      },
      "committer": {
        "name": "xueliang.zhong",
        "email": "xueliang.zhong@linaro.org",
        "time": "Thu Nov 02 16:17:17 2017 +0000"
      },
      "message": "Fix LSA hunt for original reference bug.\n\nFix a bug in LSA where it doesn\u0027t take IntermediateAddress\ninto account during hunting for original reference.\n\nIn following example, original reference i0 can be transformed\nby NullCheck, BoundType, IntermediateAddress, etc.\n  i0 NewArray\n  i1 HInstruction(i0)\n  i2 ArrayGet(i1, index)\n\nTest: test-art-host\nTest: test-art-target\nTest: load_store_analysis_test\nTest: 706-checker-scheduler\n\nChange-Id: I162dd8a86fcd31daee3517357c6af638c950b31b\n"
    },
    {
      "commit": "0ebe0d83138bba1996e9c8007969b5381d972b32",
      "tree": "a5ee66ebc5b587ade97e56ac8fc7d832fbbed4af",
      "parents": [
        "e1e347dace0ded83774999bb26c37527dcdb1d5a"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Sep 21 22:50:39 2017 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Sep 25 15:45:01 2017 +0100"
      },
      "message": "ART: Introduce compiler data type.\n\nReplace most uses of the runtime\u0027s Primitive in compiler\nwith a new class DataType. This prepares for introducing\nnew types, such as Uint8, that the runtime does not need\nto know about.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nBug: 23964345\nChange-Id: Iec2ad82454eec678fffcd8279a9746b90feb9b0c\n"
    },
    {
      "commit": "e1811ed6b57a54dc8ebd327e4bd2c4422092a3a0",
      "tree": "e3ce48e66190c11a8b5342f4ec0d1046ba28d788",
      "parents": [
        "7113885fcd983b33ee1e350865d21517d6297843"
      ],
      "author": {
        "name": "Artem Serov",
        "email": "artem.serov@linaro.org",
        "time": "Thu Apr 27 16:50:47 2017 +0100"
      },
      "committer": {
        "name": "Artem Serov",
        "email": "artem.serov@linaro.org",
        "time": "Thu May 11 10:06:04 2017 +0100"
      },
      "message": "ARM64: Share address computation across SIMD LDRs/STRs.\n\nFor array accesses the element address has the following structure:\nAddress \u003d CONST_OFFSET + base_addr + index \u003c\u003c ELEM_SHIFT\n\nTaking into account ARM64 LDR/STR addressing modes address part\n(CONST_OFFSET + index \u003c\u003c ELEM_SHIFT) can be shared across array\naccess with the same data type and index.\n\nFor example, for the following loop 5 accesses can share address\ncomputation:\n\nvoid foo(int[] a, int[] b, int[] c) {\n  for (i...) {\n    a[i] \u003d a[i] + 5;\n    b[i] \u003d b[i] + c[i];\n  }\n}\n\nTest: test-art-host, test-art-target\n\nChange-Id: I46af3b4e4a55004336672cdba3296b7622d815ca\n"
    },
    {
      "commit": "74234daabb28a4b9c804bf8bf908e7334bd4d400",
      "tree": "0b60cb00ab117c1a9a4b92983514962198b548bf",
      "parents": [
        "a7e9bfafeb64b1142433a41b05ddc263cadc61e3"
      ],
      "author": {
        "name": "Anton Kirilov",
        "email": "anton.kirilov@linaro.org",
        "time": "Fri Jan 13 14:42:47 2017 +0000"
      },
      "committer": {
        "name": "Anton Kirilov",
        "email": "anton.kirilov@linaro.org",
        "time": "Fri Feb 17 14:59:27 2017 +0000"
      },
      "message": "ARM: Merge data-processing instructions and shifts/(un)signed extensions\n\nThis commit mirrors the work that has already been done for ARM64.\n\nTest: m test-art-target-run-test-551-checker-shifter-operand\nChange-Id: Iec8c1563b035f40f0e18dcffde28d91dc21922f8\n"
    },
    {
      "commit": "ec88abde5944eaa94e1299cc2ec040b51977b1f4",
      "tree": "c3692184a4999b97ee36decf88c688786640e598",
      "parents": [
        "8cb366a7ba8f02094c7c3bd21e217fff52f6ad17",
        "91a6516103b8bf8bb75c3a2840cbdec7521e74a7"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Mon Sep 19 16:59:14 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon Sep 19 16:59:15 2016 +0000"
      },
      "message": "Merge \"Remove the `CanTriggerGC` side-effects on a few instructions.\""
    },
    {
      "commit": "ebc3280a765f1fc0f8a7a7f4393ff20586aa7b08",
      "tree": "0ffd99f28d0f186909ae289233ba92f3728dd24d",
      "parents": [
        "6a4abc633fa8580b06056ec6f80ced8ce7511277"
      ],
      "author": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@linaro.org",
        "time": "Mon Sep 19 13:56:18 2016 +0100"
      },
      "committer": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@linaro.org",
        "time": "Mon Sep 19 14:08:18 2016 +0100"
      },
      "message": "Include `nodes.h` in `nodes_shared.h` to help editing tools.\n\nThis include does not change anything to compilation, but it helps\nediting tools (e.g. YouCompleteMe) to show proper error messages when\nediting that file.\n\nTest: mma -j40\n\nChange-Id: I5ebd03040cfc90daa41faf85f273a86525207f19\n"
    },
    {
      "commit": "91a6516103b8bf8bb75c3a2840cbdec7521e74a7",
      "tree": "d93043f578bfa5b8d76e8c175e6441b378c4a7b2",
      "parents": [
        "6a4abc633fa8580b06056ec6f80ced8ce7511277"
      ],
      "author": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@linaro.org",
        "time": "Mon Sep 19 13:54:30 2016 +0100"
      },
      "committer": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@linaro.org",
        "time": "Mon Sep 19 13:54:30 2016 +0100"
      },
      "message": "Remove the `CanTriggerGC` side-effects on a few instructions.\n\nThe side-effect was specified for these instructions as they call\nruntime. We now have a list of entrypoints that we know cannot trigger\nGC. We can avoid requiring the side-effect for those.\n\nTest: Run ART test suite on Nexus 5X and host.\n\nChange-Id: I0e0e6a4d701ce6c75aff486cb0d1bc7fe2e8dda4\n"
    },
    {
      "commit": "328429ff48d06e2cad4ebdd3568ab06de916a10a",
      "tree": "6290ac8afc3e93488382727f6765f548a2cfff04",
      "parents": [
        "79e73245140f4115039a7284b3797d701f368fe6"
      ],
      "author": {
        "name": "Artem Serov",
        "email": "artem.serov@linaro.org",
        "time": "Wed Jul 06 16:23:04 2016 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Jul 21 09:16:43 2016 +0000"
      },
      "message": "ARM: Port instr simplification of array accesses.\n\nAfter changing the addressing mode for array accesses (in\nhttps://android-review.googlesource.com/248406) the \u0027add\u0027\ninstruction that calculates the base address for the array can be\nshared across accesses to the same array.\n\nBefore https://android-review.googlesource.com/248406:\n    add IP, r[Array], r[Index0], LSL #2\n    ldr r0, [IP, #12]\n    add IP, r[Array], r[Index1], LSL #2\n    ldr r0, [IP, #12]\n\nBefore this CL:\n    add IP. r[Array], #12\n    ldr r0, [IP, r[Index0], LSL #2]\n    add IP. r[Array], #12\n    ldr r0, [IP, r[Index1], LSL #2]\n\nAfter this CL:\n    add IP. r[Array], #12\n    ldr r0, [IP, r[Index0], LSL #2]\n    ldr r0, [IP, r[Index1], LSL #2]\n\nLink to the original optimization:\n    https://android-review.googlesource.com/#/c/127310/\n\nTest: Run ART test suite on Nexus 6.\nChange-Id: Iee26f9a0a7ca46abb90e3f60d19d22dc8dee4d8f\n"
    },
    {
      "commit": "372f10e5b0b34e2bb6e2b79aeba6c441e14afd1f",
      "tree": "1f29c2467c8909ef0e0147f37f176caa1bcd2ccc",
      "parents": [
        "1b66fdf3f33c72dfdda4d31f6f17b6a0d8607402"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue May 17 16:30:10 2016 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Jun 02 19:04:20 2016 +0100"
      },
      "message": "Refactor handling of input records.\n\nIntroduce HInstruction::GetInputRecords(), a new virtual\nfunction that returns an ArrayRef\u003c\u003e to all input records.\nImplement all other functions dealing with input records as\nwrappers around GetInputRecords(). Rewrite functions that\npreviously used multiple virtual calls to deal with input\nrecords, especially in loops, to prefetch the ArrayRef\u003c\u003e\nonly once for each instruction.  Besides avoiding all the\nextra calls, this also allows the compiler (clang++) to\nperform additional optimizations.\n\nThis speeds up the Nexus 5 boot image compilation by ~0.5s\n(4% of \"Compile Dex File\", 2% of dex2oat time) on AOSP ToT.\n\nChange-Id: Id8ebe0fb9405e38d918972a11bd724146e4ca578\n"
    },
    {
      "commit": "fcb503cba92133b72e29ab48af1c7e92be91e609",
      "tree": "4a16a0f1e1b798692664bb1b347de060b3042170",
      "parents": [
        "bd274fec102dc9652b6c3b7aef2e2401d27bb15b"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed May 18 12:48:17 2016 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed May 18 12:48:17 2016 +0100"
      },
      "message": "Mark concrete HIR instructions as FINAL.\n\nThis allows the compiler to apply more optimizations.\n\nChange-Id: Ic7d8a457ea4e7d5853195cc4b56482703a1176d5\n"
    },
    {
      "commit": "7fc6350f6f1ab04b52b9cd7542e0790528296cbe",
      "tree": "26a33ef7bb2e49a9b7c7d9436194a92cb447b317",
      "parents": [
        "b7f257f353b1eb2db2732939a0404c118316891d"
      ],
      "author": {
        "name": "Artem Serov",
        "email": "artem.serov@linaro.org",
        "time": "Tue Feb 09 17:15:29 2016 +0000"
      },
      "committer": {
        "name": "Artem Serov",
        "email": "artem.serov@linaro.org",
        "time": "Fri Mar 11 12:49:27 2016 +0000"
      },
      "message": "Integrate BitwiseNegated into shared framework.\n\nShare implementation between arm and arm64.\n\nChange-Id: I0dd12e772cb23b4c181fd0b1e2a447470b1d8702\n"
    },
    {
      "commit": "4a0dad67867f389e01a5a6c0fe381d210f687c0d",
      "tree": "91f1e70f4a2d0bd32aa7eb51e546f5330d72f772",
      "parents": [
        "d15ede2df7d157ea5480614fd18c2bf0d37a6c2a"
      ],
      "author": {
        "name": "Artem Udovichenko",
        "email": "artem.u@samsung.com",
        "time": "Tue Jan 26 12:28:31 2016 +0300"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Feb 25 10:14:30 2016 +0000"
      },
      "message": "Revert \"Revert \"ARM/ARM64: Extend support of instruction combining.\"\"\n\nThis reverts commit 6b5afdd144d2bb3bf994240797834b5666b2cf98.\n\nChange-Id: Ic27a10f02e21109503edd64e6d73d1bb0c6a8ac6\n"
    },
    {
      "commit": "6b5afdd144d2bb3bf994240797834b5666b2cf98",
      "tree": "d536cd7b3aaf55c563e82c2c522521a91b2bb953",
      "parents": [
        "debeb98aaa8950caf1a19df490f2ac9bf563075b"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jan 22 09:31:52 2016 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jan 22 09:31:52 2016 +0000"
      },
      "message": "Revert \"ARM/ARM64: Extend support of instruction combining.\"\n\nThe test fails its checker parts.\n\nThis reverts commit debeb98aaa8950caf1a19df490f2ac9bf563075b.\n\nChange-Id: I49929e15950c7814da6c411ecd2b640d12de80df\n"
    },
    {
      "commit": "debeb98aaa8950caf1a19df490f2ac9bf563075b",
      "tree": "b2a7a7cc6fb2f56d4bcc6cecaa80035668f38dc4",
      "parents": [
        "6aadaef35ea52506db61e463910c2520b702ca5e"
      ],
      "author": {
        "name": "Ilmir Usmanov",
        "email": "i.usmanov@samsung.com",
        "time": "Fri Dec 11 11:39:44 2015 +0300"
      },
      "committer": {
        "name": "Artem Udovichenko",
        "email": "artem.u@samsung.com",
        "time": "Thu Jan 21 11:07:38 2016 +0300"
      },
      "message": "ARM/ARM64: Extend support of instruction combining.\n\nCombine multiply instructions in the following way:\nARM64:\nMUL/NEG -\u003e MNEG\nARM32 (32-bit integers only):\nMUL/ADD -\u003e MLA\nMUL/SUB -\u003e MLS\n\nChange-Id: If20f2d8fb060145ab6fbceeb5a8f1a3d02e0ecdb\n"
    }
  ]
}
