)]}' { "log": [ { "commit": "c15a2f4f45661a7f5f542e406282c146ea1a968d", "tree": "50ad6104b0b8739f272782c35a7022cca64d2601", "parents": [ "9ae527f615f61aec4aaca310c52f373e8c3d8d58" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Apr 21 12:09:39 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Apr 21 16:48:00 2017 -0700" }, "message": "ART: Add object-readbarrier-inl.h\n\nMove some read-barrier code into a new header. This prunes the\ninclude tree for the concurrent-copying collector. Clean up other\nrelated includes.\n\nTest: mmma art\nChange-Id: I40ce4e74f2e5d4c692529ffb4df933230b6fd73e\n" }, { "commit": "2d4d161f26b06561c8f0118592c6a7291b3e1680", "tree": "272824cdb154e61a806279974b179000dcb22d01", "parents": [ "1cd51da49c7b3335bc9fbde86fbb1c1308096807", "8de5916666ab5d146ac1bdac7d7748e197ae347e" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Apr 21 20:01:32 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 21 20:01:33 2017 +0000" }, "message": "Merge \"Factor vector unary/binary shared code out into superclass.\"" }, { "commit": "1cd51da49c7b3335bc9fbde86fbb1c1308096807", "tree": "188a79fcdd41701169b1f54b89b62aa3564a5bb2", "parents": [ "6b8b07521125e7744327d00e64f897b4dd5d1db9", "0225b7712202d95ac7ba40ec96e95e14c4ce0895" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Apr 21 20:00:37 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 21 20:00:38 2017 +0000" }, "message": "Merge \"ARM64: Improve SIMD LDR/STR.\"" }, { "commit": "6b8b07521125e7744327d00e64f897b4dd5d1db9", "tree": "1a8d6cd6c50fdcb5edc388588e36eb41c78e1324", "parents": [ "e0ffd22714fd4bc4edf81000966b98eae59788dd", "a1d2f957a21319d1110bebb9a52f46fd1c67ffaf" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Apr 21 18:57:25 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 21 18:57:27 2017 +0000" }, "message": "Merge changes I6ff2d6f8,I8f60f116\n\n* changes:\n ART: Clean up art_field.h\n ART: Clean up art_method.h\n" }, { "commit": "8de5916666ab5d146ac1bdac7d7748e197ae347e", "tree": "87a7cfda1a91ef4335f78a59edf2d5fcca6e8e46", "parents": [ "f99f62f8e04aecbbe1615e242a19ac475f66e565" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Apr 21 09:42:01 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Apr 21 11:00:26 2017 -0700" }, "message": "Factor vector unary/binary shared code out into superclass.\n\nTest: test-art-target, test-art-host\nChange-Id: I42770d9a9142f2e53d3b5bd60bd25593b2154a7c\n" }, { "commit": "0225b7712202d95ac7ba40ec96e95e14c4ce0895", "tree": "cb5fdd6a7b95322ce7fa95b77aba8021e287c7fb", "parents": [ "6d3c61d8c6d2f96dec8345263c948fae3caa4e1a" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Wed Apr 19 15:43:53 2017 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Fri Apr 21 17:41:42 2017 +0100" }, "message": "ARM64: Improve SIMD LDR/STR.\n\nTest: 640-checker-*-simd\nTest: test-art-target, test-art-host\n\nChange-Id: I2bcdef3f5cb7c0e7d1b3d02910fbf89ac694d89a\n" }, { "commit": "b95c74b9788886b24b04db782ce64867cb4960d5", "tree": "f9b01a5b509d70bf66cfb69433f23d7019b892ce", "parents": [ "d68677c5fde1ace16ea58d65733776c954e7acb4" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Apr 20 19:43:21 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Apr 21 09:41:03 2017 -0700" }, "message": "ART: Move InlineMethodAnalyzer into compiler\n\nMove the infrastructure, which is now only used by the compiler.\n\nTest: mmma art\nChange-Id: I4a61e35f23736b226523d7349f49208ad852ad2f\n" }, { "commit": "a1d2f957a21319d1110bebb9a52f46fd1c67ffaf", "tree": "db9b6eda7cd4764e13c07256df14a7c14888ee75", "parents": [ "c6ea7d00ad069a2736f603daa3d8eaa9a1f8ea11" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Apr 20 22:53:58 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Apr 21 08:41:28 2017 -0700" }, "message": "ART: Clean up art_field.h\n\nClean up the header. Fix up other headers including the -inl file,\nin an effort to prune the include graph. Fix broken transitive\nincludes by making includes explicit.\n\nTest: m\nChange-Id: I6ff2d6f89b741d8188e19426eccf4743fec688fc\n" }, { "commit": "c6ea7d00ad069a2736f603daa3d8eaa9a1f8ea11", "tree": "a6d3332a8592fb806841314d55b206b573d37d86", "parents": [ "d68677c5fde1ace16ea58d65733776c954e7acb4" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Feb 01 16:46:28 2017 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Apr 21 08:40:33 2017 -0700" }, "message": "ART: Clean up art_method.h\n\nClean up the header. Fix up other headers including the -inl file,\nin an effort to prune the include graph. Fix broken transitive\nincludes by making includes explicit. Introduce new -inl files\nfor method handles and reference visiting.\n\nTest: source build/envsetup.sh \u0026\u0026 lunch aosp_angler-userdebug \u0026\u0026 mmma art\nTest: source build/envsetup.sh \u0026\u0026 lunch aosp_mips64-userdebug \u0026\u0026 mmma art\nChange-Id: I8f60f1160c2a702fdf3598149dae38f6fa6bc851\n" }, { "commit": "6d3c61d8c6d2f96dec8345263c948fae3caa4e1a", "tree": "8af7decb039fb8e11b9bd07a77d1b0bb09f3b41c", "parents": [ "d1a05c90882a3aa413b8bf5363b6ad90b3a1549b", "b1d0ee1e02e6c461e2291d8d00b21fd847e88adf" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Apr 21 11:17:46 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 21 11:17:46 2017 +0000" }, "message": "Merge \"Reuse DexCache and ClassLoader handles in inliner.\"" }, { "commit": "b1d0ee1e02e6c461e2291d8d00b21fd847e88adf", "tree": "9a28e23dbfc180437123bb35c2f416a95317b643", "parents": [ "38870a8a2717ccf1bcd3faddc53b1999985bb29f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Apr 20 19:50:32 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Apr 21 10:52:53 2017 +0100" }, "message": "Reuse DexCache and ClassLoader handles in inliner.\n\nMeasured memory usage with heaptrack for a large app:\n Before:\n bytes allocated in total (ignoring deallocations): 3.14GB\n calls to allocation functions: 8130596\n After:\n bytes allocated in total (ignoring deallocations): 3.12GB\n calls to allocation functions: 7750377\n\nTest: testrunner.py --host\nBug: 34053922\nChange-Id: I1ad7aaffccc6527cd4f409ca8fca75bab8d7439a\n" }, { "commit": "d1a05c90882a3aa413b8bf5363b6ad90b3a1549b", "tree": "ce69ac6e5a7a2bb5f84be7e5d7f9e63a281804cc", "parents": [ "bdbc63b892c571101a301ce805ca136acd769218", "13445e7176d67098a5d94754a9d3cd2928616bd8" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Apr 21 07:59:53 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 21 07:59:55 2017 +0000" }, "message": "Merge \"Handle catch phis in code sinking.\"" }, { "commit": "13445e7176d67098a5d94754a9d3cd2928616bd8", "tree": "1a2279af45211b5398cf261e71b8700f51bc80b9", "parents": [ "25009fdd7a5dccc957afc8178ca5d3733f899147" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Apr 20 15:19:46 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Apr 20 16:39:43 2017 +0100" }, "message": "Handle catch phis in code sinking.\n\nWhen the user of an instruction we want to sink is a catch\nphi, we should not look at predecessors (which don\u0027t map 1-1\nfor catch phis), but can only look at its dominator.\n\nbug:37247890\nTest: 647-sinking-catch\nChange-Id: Ib64bd6f95d3ef45c394137e76819fa8d7d3d960a\n" }, { "commit": "f34dd206d0073fb3949be872224420a8488f551f", "tree": "b24b451af6efdd9f67c4cbd5c37ebb4ec6a4aaad", "parents": [ "1f56cb5c594f5757085820b1042988d10f02bb0b" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Apr 10 17:41:46 2017 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Thu Apr 20 00:21:29 2017 +0100" }, "message": "ARM64: Support MultiplyAccumulate for SIMD.\n\nTest: test-art-host, test-art-target.\n\nChange-Id: I06af8415e15352d09d176cae828163cbe99ae7a7\n" }, { "commit": "ed5d0ee21e2b8ebf2fca332bb482a4c7a3b58fb6", "tree": "742d733b8027c11a353db68d059c35ba82f8beb0", "parents": [ "88b7c37163836b4c26dbd05733bfc116987e58bc", "f3e61ee363fe7f82ef56704f06d753e2034a67dd" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Apr 19 19:19:00 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Apr 19 19:19:02 2017 +0000" }, "message": "Merge \"Implement halving add idiom (with checker tests).\"" }, { "commit": "88b7c37163836b4c26dbd05733bfc116987e58bc", "tree": "6c994128e8e4719017adea4fbb87556b1ddcb7bf", "parents": [ "59715029ae5cc69f5be91bbe00ba45e53a0ecf12", "5863f85483c8cc0f21adbd44698fa1018c72f9f7" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Apr 19 18:15:58 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Apr 19 18:15:59 2017 +0000" }, "message": "Merge \"MIPS64: java.lang.System.arraycopy() for copying char[] to char[].\"" }, { "commit": "f3e61ee363fe7f82ef56704f06d753e2034a67dd", "tree": "a00f1fce4a2e284b0a03f941f530afc5b5c56b59", "parents": [ "741a81af441cbcb7255229bf250bc009d2894e92" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Apr 12 17:09:20 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Apr 19 10:30:57 2017 -0700" }, "message": "Implement halving add idiom (with checker tests).\n\nRationale:\nFirst of several idioms that map to very efficient SIMD instructions.\nNote that the is-zero-ext and is-sign-ext are general-purpose utilities\nthat will be widely used in the vectorizer to detect low precision\nidioms, so expect that code to be shared with many CLs to come.\n\nTest: test-art-host, test-art-target\nChange-Id: If7dc2926c72a2e4b5cea15c44ef68cf5503e9be9\n" }, { "commit": "d1ef87339c5af782652678d5849d1dfab14d79ce", "tree": "8b8b936ce58043248b2b58497e7b210c49a704b1", "parents": [ "1cae72e6cfc0b4cd4ad20467dfea243139296998" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Apr 18 13:55:13 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 19 10:31:50 2017 +0100" }, "message": "ARM64: Heap poisoning for link-time Baker CC read barrier thunks.\n\nAnd fix running out of scratch registers for HArraySet\nwith large constant index and a reference to poison.\n\nTest: Nexus 6P boots with heap poisoning enabled.\nTest: testrunner.py --target with heap poisoning enabled on Nexus 6P.\nBug: 29516974\nBug: 30126666\nBug: 36141117\nChange-Id: Ifb38f4a0e23a2963468772f34f294febfc340b8c\n" }, { "commit": "1cae72e6cfc0b4cd4ad20467dfea243139296998", "tree": "2eee9c21982847223d06f467a591dea6a237aafc", "parents": [ "e58b971b574fe5655ddb3ae62766082f8eb1a801", "1ca955d09015e04339431023e4417f336c83337a" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Apr 18 12:37:10 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Apr 18 12:37:10 2017 +0000" }, "message": "Merge \"Fix ARM64 SystemArrayCopy intrinsic with large constant dest position.\"" }, { "commit": "1ca955d09015e04339431023e4417f336c83337a", "tree": "f461fe21e7c29c5be065e554cde9b869d1d659e8", "parents": [ "b1a52116a1ca418dcccad2ca2acd6cb36f8ca0e7" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Apr 13 19:34:30 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Apr 18 11:45:25 2017 +0100" }, "message": "Fix ARM64 SystemArrayCopy intrinsic with large constant dest position.\n\nMake sure we do not deplete the whole VIXL scratch register pool, so\nthat VIXL can still use IP0 as a temporary when emitting\nmacro-instructions.\n\nTest: art/test/testrunner/testrunner.py --optimizing --target --64\nBug: 37256530\nChange-Id: I5da22e552297fad87db5763e2dab60ae6a7a43af\n" }, { "commit": "dda7360caf19d44cfef5307e8a6ec4d7cba6b474", "tree": "9f9a7f0c7197b72c9eca9665efae0d4fe17d9268", "parents": [ "27fb1dc467effbd8df43e6207743fdb7bcee4044" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Apr 17 12:50:45 2017 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Apr 17 12:50:45 2017 -0700" }, "message": "Disable read barrier thunks for heap poisoning\n\nLogic to unpoison is not yet implemented, this causes SIGSEGVs in\nvarious places.\n\nBug: 29516974\nBug: 30126666\nBug: 36141117\n\nTest: ./test/testrunner/testrunner.py -j4 --optimizing --debuggable --ndebuggable --target --verbose\nChange-Id: I8317a142d07af36090d5f05ce46100dfa07c17e7\n" }, { "commit": "27fb1dc467effbd8df43e6207743fdb7bcee4044", "tree": "8fbac3e292fe9cdb0f30e28a1bc9007d503827cf", "parents": [ "35fc819cd95fbd25eef5d729b81976987a8c6c7d", "d86c08555905dbc42233a506683e3995446fc113" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Apr 17 16:34:52 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Apr 17 16:34:54 2017 +0000" }, "message": "Merge \"Fixed bug on pending environment use of termination condition. With regression test.\"" }, { "commit": "d86c08555905dbc42233a506683e3995446fc113", "tree": "1cc9187dbbcd9b8082b1ffc8a063094303945321", "parents": [ "66e226ac2fb525c7a7cbbb21a9cbbe347f531a1c" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Apr 14 12:00:15 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Apr 14 12:00:15 2017 -0700" }, "message": "Fixed bug on pending environment use of termination condition.\nWith regression test.\n\nTest: test-art-host\nBug: 37247891\nChange-Id: I55b06939d465d3ddb736d1ba659b1df179a5c390\n" }, { "commit": "2f6ad9da84dc28fc715cdc5df0b007c39f952b1b", "tree": "ea6a5c9610a11e42e04833b0ea4d909f617adafb", "parents": [ "111eefd043465e947ab178288224dbebc59360ab" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Thu Mar 23 15:37:03 2017 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Thu Apr 13 09:01:41 2017 -0700" }, "message": "MIPS32: java.lang.System.arraycopy() for copying char[] to char[].\n\nTest: run-test --no-prebuild --optimizing 011-array-copy\nTest: run-test --no-prebuild 011-array-copy\nTest: run-test --optimizing 011-array-copy\nTest: run-test 011-array-copy\nTest: mma -j2 ART_TEST_OPTIMIZING\u003dtrue test-art-target-run-test\nTest: booted MIPS32R2 emulator.\n\nNote: Tested against both the MIPS32R2, and MIPS64R6 emulators.\n\nChange-Id: I0fc59fe8a242692b52cf8e8413d28397e210bb65\n" }, { "commit": "111eefd043465e947ab178288224dbebc59360ab", "tree": "e0da5f77daf1c24b54747dafcf3ac22efedc2b9c", "parents": [ "7b331261c6bdb6316a649ab591813f4dd1a5892f", "ba1a48edf6296a8016afb0b55f63aa61fa7f17b0" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Apr 13 14:38:54 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Apr 13 14:38:55 2017 +0000" }, "message": "Merge \"ARM/VIXL: Fix TypeConversion of large long constants to int.\"" }, { "commit": "ba1a48edf6296a8016afb0b55f63aa61fa7f17b0", "tree": "32ad5a3444736a8c0ca8986542e9002c5aab185e", "parents": [ "4766f2cd27c3de80eb74c302a9eb4cc7c97e5de1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Apr 13 11:50:14 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Apr 13 13:58:42 2017 +0100" }, "message": "ARM/VIXL: Fix TypeConversion of large long constants to int.\n\nThe ARM VIXL backend was using Int32ConstantFrom() to get\nthe value of a HLongConstant for TypeConversion to int.\nThat function has DCHECK()s that the constant fits into a\n32-bit int which is bogus in this particular case.\n\nThis was out of sync with the old ARM backend, so bring the\ntwo in sync by using the approach from the old backend.\n\nBug: 37236345\nTest: 646-checker-lon-const-to-int\nChange-Id: I675ebd7bbaa14d5dfc3f280f62867d342cbab683\n" }, { "commit": "7b331261c6bdb6316a649ab591813f4dd1a5892f", "tree": "22b60227265c73903428ea55cde3123ea992ac4e", "parents": [ "b1a52116a1ca418dcccad2ca2acd6cb36f8ca0e7", "f4f2daafb38c9c07ea74044a0fb89a2a19288b7a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Apr 13 12:54:22 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Apr 13 12:54:23 2017 +0000" }, "message": "Merge \"ARM64: Use link-time generated thunks for Baker CC read barrier.\"" }, { "commit": "b1a52116a1ca418dcccad2ca2acd6cb36f8ca0e7", "tree": "21c315941ce943d4522c1108f74ec2830792ac4b", "parents": [ "89d424832002732983fa40df244a087e0dd21028", "b9005fa3d370198fea7a750b645954d618594139" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Apr 13 11:17:06 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Apr 13 11:17:07 2017 +0000" }, "message": "Merge \"MIPS32: Add direct calls to math intrinsics.\"" }, { "commit": "5863f85483c8cc0f21adbd44698fa1018c72f9f7", "tree": "1587ea108c9d74b725b467983e0ac231aef70fc9", "parents": [ "89d424832002732983fa40df244a087e0dd21028" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Thu Mar 23 15:41:37 2017 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Wed Apr 12 22:09:12 2017 -0700" }, "message": "MIPS64: java.lang.System.arraycopy() for copying char[] to char[].\n\nTest: run-test --64 --no-prebuild --optimizing 011-array-copy\nTest: run-test --64 --no-prebuild 011-array-copy\nTest: run-test --64 --optimizing 011-array-copy\nTest: run-test --64 011-array-copy\nTest: ART_TEST_OPTIMIZING\u003dtrue test-art-target-run-test\nTest: booted MIPS64R6 emulator.\n\nChange-Id: I418571c639b2776869b3c8f3f67c09aadbb30133\n" }, { "commit": "dbe35eddc4324468e08afc0829787f02ee736cea", "tree": "80af29b8a1e9efedbec26603a2bee9a482b9b98b", "parents": [ "de833ef742ccfc0d23921fa43086fd07d80ca5ba", "74c2058ed83f43aa59f467ac4ecc730edbe42e41" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Apr 12 18:39:45 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Apr 12 18:39:46 2017 +0000" }, "message": "Merge \"MIPS64: Add direct calls to math intrinsics.\"" }, { "commit": "b9005fa3d370198fea7a750b645954d618594139", "tree": "17013ee81fb25be28820ad61afac30138ccc3e15", "parents": [ "de833ef742ccfc0d23921fa43086fd07d80ca5ba" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Fri Mar 24 12:11:54 2017 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Wed Apr 12 11:08:24 2017 -0700" }, "message": "MIPS32: Add direct calls to math intrinsics.\n\n- cos - sin - acos - asin\n- atan - atan2 - cbrt - cosh\n- exp - expm1 - hypot - log\n- log10 - nextAfter - sinh - tan\n- tanh\n\nTest: run-test --no-prebuild --optimizing 123-inline-execute2\nTest: run-test --no-prebuild 123-inline-execute2\nTest: run-test --optimizing 123-inline-execute2\nTest: run-test 123-inline-execute2\nTest: Booted MIPS32R2 and MIPS64R6 emulators.\n\nNote: Ran tests under both emulators, and on CI20 hardware.\n\nChange-Id: I4c1782d609a985ae49737f47c43caa5b0b6a10e3\n" }, { "commit": "f4f2daafb38c9c07ea74044a0fb89a2a19288b7a", "tree": "13fd63a65c12e60074bc2bc1e693fbb3b788ed8e", "parents": [ "26c25d5da32fe1bdd94dd1404197c14994ecab60" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Mar 20 18:26:59 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 12 17:02:06 2017 +0100" }, "message": "ARM64: Use link-time generated thunks for Baker CC read barrier.\n\nRemaining work for follow-up CLs:\n - array loads,\n - volatile field loads,\n - use implicit null check in field thunk.\n\nTest: Added tests to relative_patcher_arm64\nTest: New run-test 160-read-barrier-stress\nTest: m test-art-target-gtest on Nexus 6P.\nTest: testrunner.py --target on Nexus 6P.\nBug: 29516974\nBug: 30126666\nBug: 36141117\nChange-Id: Id68ff171c55a3f1bf1ac1b657f480531aa7b3710\n" }, { "commit": "4766f2cd27c3de80eb74c302a9eb4cc7c97e5de1", "tree": "3d48ecee6d98502c25fba27e854c89ae02e169b7", "parents": [ "279fbab663f3d9f58047fd57197a710e08e4c693", "b31f91fd1811c9047591282dd003cf22b54938a1" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Apr 12 15:52:08 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Apr 12 15:52:08 2017 +0000" }, "message": "Merge changes I1d4db176,Ifb931a99\n\n* changes:\n ARM64: Support vectorization for double and long.\n ARM64: Support 128-bit registers for SIMD.\n" }, { "commit": "279fbab663f3d9f58047fd57197a710e08e4c693", "tree": "71cf5cd5441e69eda77558eacd67bc4381918595", "parents": [ "da7d1bc58e7de4ff6ca2c87019bcb9837896abed", "cd0295d81b6d53bbade117a0531b2453e8cb7c7f" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Apr 12 12:17:44 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Apr 12 12:17:46 2017 +0000" }, "message": "Merge \"MIPS: Use Lsa/Dlsa when possible.\"" }, { "commit": "60efed530d38893eb6c1ff2c4135ecf5320f8fff", "tree": "62694f043981758f678b236d485b2185042a17a7", "parents": [ "e2dfd30e752ed94944cb6f614f1a4cf18d038677", "3101e58114b21876f77940d716385c54f697761b" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Apr 11 19:46:48 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Apr 11 19:46:53 2017 +0000" }, "message": "Merge \"Fix bug in vectorization of charAt, with regression test\"" }, { "commit": "e2dfd30e752ed94944cb6f614f1a4cf18d038677", "tree": "259f65bf636e726fda89d9933886f6d11be9aee7", "parents": [ "07f8d8619f9a90fad17c261c3025a6eb6c0c94c1", "032cacdbf32c50d3c43590600ed1e171a35fa93c" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Tue Apr 11 18:39:59 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Apr 11 18:40:01 2017 +0000" }, "message": "Merge \"optimizing: do not illegally remove constructor barriers after inlining\"" }, { "commit": "3101e58114b21876f77940d716385c54f697761b", "tree": "d0435faf4d2763e24b45fe402aa2155b7d450788", "parents": [ "921c5f9479c83bd1f046213377faf1d2be14e26b" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Apr 11 10:15:44 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Apr 11 10:58:04 2017 -0700" }, "message": "Fix bug in vectorization of charAt, with regression test\n\nRationale:\nString array get instruction cannot be vectorized\nin a straightforward way, since compression has\nto be dealt with. So rejected for now.\n\nTest: test-art-target, test-art-host\nBug: 37151445\nChange-Id: I16112cb8b1be30babd8ec07af5976db0369f8c28\n" }, { "commit": "9899026fcba9bb57dc8adac5df3f5069782eb418", "tree": "351ac2735f708b062a65da8bf99a11560280f5bc", "parents": [ "8aaa601d88660d4653d64ea822197e72a43bf768" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Apr 10 13:15:57 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Apr 10 23:51:49 2017 +0000" }, "message": "Add checker part of test, fix intrinsic copying\n\nRationale:\nI forgot to add the check test part of this test,\nand incidentally found an omission: intrinsic\ninformation should be set in the scalar loop\n(to get best code there too, not just a lib call).\n\nTest: test-art-host, test-art-target\nChange-Id: I94aa4cdf042f72690d10efee3a9dc7c476d5c5e0\n" }, { "commit": "032cacdbf32c50d3c43590600ed1e171a35fa93c", "tree": "c3e3eb480f46de2224fe58e8c30d8d5698238998", "parents": [ "8827cec4193238c2261d83c4d2c0404cc20641f0" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Thu Apr 06 14:40:08 2017 -0700" }, "committer": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Mon Apr 10 14:59:19 2017 -0700" }, "message": "optimizing: do not illegally remove constructor barriers after inlining\n\nRemove the illegal optimization that destroyed constructor barriers\nafter inlining invoke-super constructor calls.\n\n---\n\nAccording to JLS 7.5.1,\n\n\"Note that if one constructor invokes another constructor, and the\ninvoked constructor sets a final field, the freeze for the final field\ntakes place at the end of the invoked constructor.\"\n\nThis means if an object is published (stored to a location potentially\nvisible to another thread) inside of an outer constructor, all final\nfield stores from any inner constructors must be visible to other\nthreads.\n\nTest: art/test.py\nBug: 37001605\nChange-Id: I3b55f6c628ff1773dab88022a6475d50a1a6f906\n" }, { "commit": "cd0295d81b6d53bbade117a0531b2453e8cb7c7f", "tree": "eceada4e7329ce8fc2e993f414f515c186b81f10", "parents": [ "ef6787bd892b55588ebb2835cc3a3bc4e9e08d04" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Fri Mar 31 15:26:54 2017 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Mon Apr 10 10:19:30 2017 -0700" }, "message": "MIPS: Use Lsa/Dlsa when possible.\n\nFor MIPS32R6 replace instances of \"sll/addu\" to calculate the\naddress of an item in an array with \"lsa\". For other versions of\nMIPS32 use the \"sll/addu\" sequence. Encapsulate this logic in an\nassembler method to eliminate having a lot of statements like\n\"if (IsR6()) { ... } else { ... }\" scattered throughout the code.\n\nMIPS64 always supports R6. This means that all instances of\n\"dsll/daddu\" used to calculate the address of an item in an array\ncan be replaced by \"dlsa\" so there is no need to encapsulate\nconditional logic in a special method. The code can just emit\n\"dlsa\" directly.\n\nTest: mma -j2 ART_TEST_OPTIMIZING\u003dtrue test-art-target-run-test\nTested on MIPS32, and MIPS64 QEMU.\nTest: \"make test-art-target-gtest32\" on CI20 board.\nTest: \"cd art; test/testrunner/testrunner.py --target --optimizing --32\"\n on CI20 board.\n\nChange-Id: Ibe5facc1bc2a6a7a6584e23d3a48e163ae38077d\n" }, { "commit": "b31f91fd1811c9047591282dd003cf22b54938a1", "tree": "4178afdf3b28f00aa986a5f8392114352fffa87d", "parents": [ "d4bccf1ece319a3a99e03ecbcbbf40bb82b9e331" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Wed Apr 05 11:31:19 2017 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Apr 10 14:53:24 2017 +0100" }, "message": "ARM64: Support vectorization for double and long.\n\nTest: test-art-host, test-art-target\nChange-Id: I1d4db1763b64737766f9756e5d0f85c5736e3522\n" }, { "commit": "d4bccf1ece319a3a99e03ecbcbbf40bb82b9e331", "tree": "2890740d9cab3eee2be223666f528c6707b89f90", "parents": [ "903b8169074c01590ab3f5ad9190d9c7e3fe795b" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Apr 03 18:47:32 2017 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Apr 10 11:43:33 2017 +0100" }, "message": "ARM64: Support 128-bit registers for SIMD.\n\nTest: test-art-host, test-art-target\n\nChange-Id: Ifb931a99d34ea77602a0e0781040ed092de9faaa\n" }, { "commit": "fa76296bc624bc2c879167c260ad6925238efb3d", "tree": "045c4488fec66806982a62aa4cfd7d3a2183e958", "parents": [ "6f005931d0a0db65128db803df38d59d205dd218" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Apr 07 11:33:37 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Apr 07 23:03:42 2017 +0000" }, "message": "Fixed missing context while detecting unit strides.\n\nWith regression test (found by fuzz testing).\n\nBug: 37033123\nTest: test-art-target\nChange-Id: Id738b2a3a353985c3d0bf3beeb581a31f1fcbc3f\n" }, { "commit": "672082ab6edf7c12a1d7b1d9303aa0aa4fcce089", "tree": "5630ff3c123c9ab3f2d861fc3461560e33047aa5", "parents": [ "7ff60caf021124ac4f79fd45bd6f0fb904a2b8dc", "716d0738c0ed8f924a44e5c645fa89c1a6079c95" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Apr 07 15:01:50 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 07 15:01:56 2017 +0000" }, "message": "Merge \"MIPS64: Fix Math.ceil/floor intrinsics\"" }, { "commit": "7ff60caf021124ac4f79fd45bd6f0fb904a2b8dc", "tree": "094d62743eecbea82b7a3004f5a77814ba4415cc", "parents": [ "f040074c2b9ca348196c176e11491f603a151006", "7957d9500ca53b78acb1eba754416535d4418a89" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Apr 07 14:28:47 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 07 14:28:49 2017 +0000" }, "message": "Merge \"ARM64: Saves 128-bit regs state along SuspendCheckSlowPath.\"" }, { "commit": "716d0738c0ed8f924a44e5c645fa89c1a6079c95", "tree": "eb16f7564328d18cf51b415d771a45e58616a8f2", "parents": [ "f040074c2b9ca348196c176e11491f603a151006" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Fri Apr 07 11:18:59 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Fri Apr 07 11:18:59 2017 +0200" }, "message": "MIPS64: Fix Math.ceil/floor intrinsics\n\nThe latest MIPS64R6 emulator supports NAN2008 standard. When\nFCSR.NAN2008\u003d1 (required from R6) ceil.l.d and floor.l.d instructions\nwill return -2^63 when the input value is smaller than -2^63. This\nwasn\u0027t the case when FCSR.NAN2008\u003d0. In that case, result from the\ninstructions was 2^63-1 when the input value was smaller than -2^63.\n\nThis fixes test 082-inline-execute.\n\nTest: ./testrunner.py --target --optimizing --64 -j1 (in QEMU)\n\nChange-Id: I3d2cdd1d55b3694549f88f4f5b903a0c4f1c0d09\n" }, { "commit": "74b8ec0797e74ae2e65ba82c03cbb751a1448459", "tree": "5c4727f9f716aa172cc60113471fc2d4a4a7b313", "parents": [ "25e668b6c758cfc897a411530d36a9fe57b74a06", "24b905f4c4b3fd6eff6ba55e33ed4f81073e5327" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Apr 06 18:53:56 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Apr 06 18:53:56 2017 +0000" }, "message": "Merge \"Fix a few comments in vectorization code that were incorrect or incomplete.\"" }, { "commit": "25e668b6c758cfc897a411530d36a9fe57b74a06", "tree": "834d6ea2c4b5875b414c64a9d3226f4640f18654", "parents": [ "8309d9b173b205bb9530dbd94e48731c20b8e4f4", "8e33e84072c6d22788e61a0b1a7db56f0ca14c26" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Apr 06 17:44:07 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Apr 06 17:44:09 2017 +0000" }, "message": "Merge \"CHA: Don\u0027t return a non resolved class to the inliner.\"" }, { "commit": "24b905f4c4b3fd6eff6ba55e33ed4f81073e5327", "tree": "93e03e0c84976f84072fbc2f78a284183515af58", "parents": [ "6bca1c6389bb002d44f1c0cabf7641de8c935c4b" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Apr 06 09:59:06 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Apr 06 10:11:40 2017 -0700" }, "message": "Fix a few comments in vectorization code that were incorrect or incomplete.\n\nTest: test-art-target\nChange-Id: I7c6a5a2d29edd0b2782abc303d8d8cb09c1c2f91\n" }, { "commit": "7957d9500ca53b78acb1eba754416535d4418a89", "tree": "518792ef3c5556686d7b075dbc4f2e3dc8af8632", "parents": [ "8309d9b173b205bb9530dbd94e48731c20b8e4f4" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Tue Apr 04 15:44:09 2017 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Thu Apr 06 16:38:32 2017 +0100" }, "message": "ARM64: Saves 128-bit regs state along SuspendCheckSlowPath.\n\nWe need to save 128 bits of data (default ABI of ART runtime\nonly saves 64 bits). Note that this is *only* done for Q-registers\nthat are live, so overhead is not too big.\n\nTest: test-art-target, test-art-host.\nChange-Id: I1f018a708c316f9d426db13b2e3b3071aa4c999b\n" }, { "commit": "9c4f0d8ffd8fb1ce31b3f8de5ca8da497e0bee9a", "tree": "e72395eb564f86dbc2d620ba03879a2ff1d56067", "parents": [ "7851a5339d5ebd6fd2a3a8d40abc15aad694d024" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Wed Apr 05 16:27:25 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Thu Apr 06 10:42:52 2017 +0200" }, "message": "Clean up after MIPS got read barriers support\n\nThis enables checker tests, as well as compiler_driver_test and\nreflection_test for MIPS32 and MIPS64.\n\nTest: mma test-art-host-gtest\nTest: mma test-art-target-gtest in QEMU (MIPS64)\nTest: ./testrunner.py --optimizing --target in QEMU (MIPS64)\n\nChange-Id: Ic6fe5b17f7f2cd7e38e12fef25afccf9358b80e0\n" }, { "commit": "6bca1c6389bb002d44f1c0cabf7641de8c935c4b", "tree": "b06aba0e2b2c8e183b6ccc76497483110904abe5", "parents": [ "30b262c298fe7bd08f28d2f0f23a97cb1a1eb2fe", "b07d1bcf055d3eb8c6b4c45b359ad8ef30909af7" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Apr 06 00:02:23 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Apr 06 00:02:23 2017 +0000" }, "message": "Merge \"Ensure environment is ready when populating loop.\"" }, { "commit": "b07d1bcf055d3eb8c6b4c45b359ad8ef30909af7", "tree": "e925d6df31a3da17757c5d3f1b4f32c341847ce5", "parents": [ "f6e11e9e218e5e70463b5b3a94c89309936601d7" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Apr 05 10:03:15 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Apr 05 10:03:15 2017 -0700" }, "message": "Ensure environment is ready when populating loop.\n\nRationale:\nOSR requires the suspend check to already have an environment,\nalbeit just for testing irreducible loops. This CL fixes the\nomission. Note, the error is spurious on OSR and writing a\nunit or regression test for this is hard.\n\nTest: test-art-host\nBug: 36950873\nChange-Id: Ica89e18e10deb438dead79e2cc40dd00a60b529f\n" }, { "commit": "6daebeba6ceab4e7dff5a3d65929eeac9a334004", "tree": "6aa2948896c6a731531451840a9a8bb26854cdd8", "parents": [ "7cd18fb5a7ce83d98b1bbc3c55583fc5f93dc16f" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Apr 03 14:35:41 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Apr 05 09:24:01 2017 -0700" }, "message": "Implemented ABS vectorization.\n\nRationale:\nThis CL adds the concept of vectorizing intrinsics\nto the ART vectorizer. More can follow (MIN, MAX, etc).\n\nTest: test-art-host, test-art-target (angler)\nChange-Id: Ieed8aa83ec64c1250ac0578570249cce338b5d36\n" }, { "commit": "8e33e84072c6d22788e61a0b1a7db56f0ca14c26", "tree": "d9308c99a0a9baaa90ff44ef28aee48d6518058b", "parents": [ "fcab6513b5e635f3fbf4f875b9530086371f5dac" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Apr 03 16:55:16 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Apr 03 21:34:46 2017 +0100" }, "message": "CHA: Don\u0027t return a non resolved class to the inliner.\n\nThis fixes a race with class loading that updates CHA info\nbefore setting a class to resolved.\n\nbug:36848868\nTest: relocate-npatchoat\nChange-Id: I662d63e60de4921a942c5a1fecfbff34b57928e4\n" }, { "commit": "74c2058ed83f43aa59f467ac4ecc730edbe42e41", "tree": "ba76a521be2f6c7633eed21338efb86636ad335c", "parents": [ "fc1361d322e34c16dde6b0deaa710c8dd23e2bd9" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Tue Mar 28 22:17:35 2017 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Fri Mar 31 11:08:40 2017 -0700" }, "message": "MIPS64: Add direct calls to math intrinsics.\n\n- cos - sin - acos - asin\n- atan - atan2 - cbrt - cosh\n- exp - expm1 - hypot - log\n- log10 - nextAfter - sinh - tan\n- tanh\n\nTest: run-test --64 --no-prebuild --optimizing 123-inline-execute2\nTest: run-test --64 --no-prebuild 123-inline-execute2\nTest: run-test --64 --optimizing 123-inline-execute2\nTest: run-test --64 123-inline-execute2\nTest: Booted MIPS64R6 emulator.\n\nChange-Id: I989a5469e6732dd42f39e8305c3d12c32a75eab4\n" }, { "commit": "f8f5a16ed7bad1e18179e38453e59c96a944de10", "tree": "53369083a97103563467cc5910a439a1864dd0b1", "parents": [ "7298b1ae3e9af5fdb46d168302a26cfbf5d475f5" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Feb 06 15:35:29 2017 -0800" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Mar 31 10:58:11 2017 -0700" }, "message": "ART vectorizer.\n\nRationale:\nMake SIMD great again with a retargetable and easily extendable vectorizer.\n\nProvides a full x86/x86_64 and a proof-of-concept ARM implementation. Sample\nimprovement (without any perf tuning yet) for Linpack on x86 is about 20% to 50%.\n\nTest: test-art-host, test-art-target (angler)\nBug: 34083438, 30933338\n\nChange-Id: Ifb77a0f25f690a87cd65bf3d5e9f6be7ea71d6c1\n" }, { "commit": "8af70893e4f44367cc40837b0411d84a36c7ad7f", "tree": "ccbd5d6e80f07ef5c47443671beeb3f4ad86090d", "parents": [ "f1e1c7e9b90662282615e165d6a1b06e05df8393" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Mar 28 15:31:44 2017 -0700" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Mar 29 16:19:53 2017 -0700" }, "message": "(Re)enable the use of inline caches in AOT\n\nTest: m test-art-host (638-checker-inline-caches, 644-checker-deopt)\nBug: 36371709\nChange-Id: Ic6e1b58845e7f7107be5a7041c47c44702af7b02\n" }, { "commit": "d07f2ba2c60cb8aa920d2b428e414628078e233e", "tree": "e81cc276b4d7c460fa154537e86fd4310decd5c0", "parents": [ "1e45a522ea1944d3470de971649ad0c3dc6f4884", "4c0b4bc2653be370c7ba9f34a39e29e60382dff1" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Mar 29 18:17:04 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Mar 29 18:17:05 2017 +0000" }, "message": "Merge \"Gracefully handle bogus profiling info for inline caches.\"" }, { "commit": "1595815c2a914a78df7dfb6f0082f47d4e82bb36", "tree": "8fd53c3c91158b33e744e43cc655b2e2a180a3fc", "parents": [ "4ba18fdfc2581a2328ab745c2707e3ed375d9e64" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Thu Feb 09 19:08:30 2017 -0800" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Mar 28 23:35:34 2017 -0700" }, "message": "MIPS: Implement read barriers.\n\nThis is the core functionality. Further improvements\nwill be done separately.\n\nThis also adds/moves memory barriers where they belong and\nremoves the UnsafeGetLongVolatile and UnsafePutLongVolatile\nMIPS32 intrinsics as they need to load/store a pair of\nregisters atomically, which is not supported directly by\nthe CPU.\n\nTest: booted MIPS32R2 in QEMU\nTest: test-art-target-run-test\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: \"testrunner.py --target --optimizing -j1\"\nTest: same MIPS64 boot/test with ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\nTest: \"testrunner.py --target --optimizing --32 -j2\" on CI20\nTest: same CI20 test with ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\n\nChange-Id: I0ff91525fefba3ec1cc019f50316478a888acced\n" }, { "commit": "4c0b4bc2653be370c7ba9f34a39e29e60382dff1", "tree": "e1ad40bcca2b016304550fcd1aeefaf405dc7031", "parents": [ "f8d00ff206e33ff66fcabcf75d6b5bbe30cddb98" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Mar 17 13:08:26 2017 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Mar 28 14:42:01 2017 -0700" }, "message": "Gracefully handle bogus profiling info for inline caches.\n\nTest: 643-checker-bogus-ic\nBug: 36371709\nChange-Id: I2a52ac67a45a6bb5ddefb053a35e6edf5bc2da2f\n" }, { "commit": "7b7f8b4e07b57962cacbd9a05d9f5fad4f0a91aa", "tree": "c3bb9f99befcac1b1bbcdc8718a815eef8d410cf", "parents": [ "fbffc6706a826ef3a6f0839cb75393a34f0c2ef1", "c70d1d99654b25491997589b6ecfa431679ea2e3" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Mar 28 17:47:25 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Mar 28 17:47:25 2017 +0000" }, "message": "Merge \"Fix arm64 and x86_64 code generator assertion\"" }, { "commit": "1082e0e46ddfae2ed9cc3d0a3d6025e7335ac239", "tree": "efd47e9a513486a79ed1efc6fed8d0dda15f326c", "parents": [ "7359649f638859e265f252b2301a15c4b7bbafa4", "53463ba8717fc93379ebf2b0c04a9a2c85382973" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Mar 28 12:46:53 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Mar 28 12:46:54 2017 +0000" }, "message": "Merge \"Math.round float intrinsic for ARM.\"" }, { "commit": "53463ba8717fc93379ebf2b0c04a9a2c85382973", "tree": "552b7b99e0f45239a3c1777ffacb00bb6fff2956", "parents": [ "f4546792385ece9dd0ba956a6c9580027cfc8fdd" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Thu Feb 16 15:18:03 2017 +0000" }, "committer": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Tue Mar 28 09:50:09 2017 +0100" }, "message": "Math.round float intrinsic for ARM.\n\nTest: m test-art-target\nTest: m 082-inline-execute\nChange-Id: I1b384e388b9959eca662922bffa8675cdbfe6e6b\n" }, { "commit": "7359649f638859e265f252b2301a15c4b7bbafa4", "tree": "5ea16cb6e50976e4754ea092f9761cb0eba97bd4", "parents": [ "da3f60aed24d6e804f3b6393e74c62b8de0b4a26", "6f8e2c9913b24f746a154dda700f609cee3095f9" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Mar 28 07:55:30 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Mar 28 07:55:31 2017 +0000" }, "message": "Merge \"Make data dependency around HDeoptimize correct.\"" }, { "commit": "c70d1d99654b25491997589b6ecfa431679ea2e3", "tree": "a6cac410c977ba669b666853b799075eabaab98a", "parents": [ "ae60e48f1077a2221549c733623c25f79733caf0" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Mon Mar 27 18:10:04 2017 -0700" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Mon Mar 27 18:10:04 2017 -0700" }, "message": "Fix arm64 and x86_64 code generator assertion\n\nTest: m test-art-host\nChange-Id: I273d2dab079b60707a8ffb72227cac5788d1a3bc\n" }, { "commit": "d9911eeca13f609c885e0f6a5ce81af9b6340bfa", "tree": "f850510643ee120dba140bf0bb3e1c1b9c9ce4db", "parents": [ "46bfb7c047a590ac5c24b658f31c170631556bb6" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Mar 27 13:27:24 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Mar 27 13:53:48 2017 -0700" }, "message": "ART: Clean up field initialization\n\nAdd explicit field initialization to default value where necessary.\nAlso clean up interpreter intrinsics header.\n\nTest: m\nChange-Id: I7a850ac30dcccfb523a5569fb8400b9ac892c8e5\n" }, { "commit": "6f8e2c9913b24f746a154dda700f609cee3095f9", "tree": "463b5925a1c87ef75ceab807e4c238a3e44a555a", "parents": [ "3bd2346db702894ef6c61372e7a83930b1c613ac" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Mar 23 14:37:26 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 27 15:14:40 2017 +0100" }, "message": "Make data dependency around HDeoptimize correct.\n\nWe use HDeoptimize in a few places, but when it comes to data\ndependency we either:\n- don\u0027t have any (BCE, CHA), in which case we should make sure no\n code that the deoptimzation guards moves before the HDeoptimize\n- have one on the receiver (inline cache), in which case we can\n update the dominated users with the HDeoptimize to get the data\n dependency correct.\n\nbug:35661819\nbug:36371709\ntest: 644-checker-deopt\nChange-Id: I4820c6710b06939e7f5a59606971693e995fb958\n" }, { "commit": "53fec08731de956fc68e6edb27e8266607b1a5f2", "tree": "21d0ea79508e5a0b52ad9d37413f752f1bc92854", "parents": [ "047871f579524e183357363c284d54f3ec2e4610" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 27 12:56:16 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 27 12:57:53 2017 +0100" }, "message": "Initialize art_method_ in HGraph.\n\nSpotted by Ivan Maidanski!\n\nBenign as HGraph is allocated on the arena, and arenas\nare always zero initialized.\n\ntest: test-art-host\nChange-Id: Id8abe421e732dcf7a760f118b16b85fe1fac7c78\n" }, { "commit": "047871f579524e183357363c284d54f3ec2e4610", "tree": "e788a125eb39ef8385a6b1323e6f022b3284f7a9", "parents": [ "85f884104c3427c14874132a88c17faf6a5cb3b9", "e104d6e48fba004658f94a81ffd1211b6d2a5bff" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon Mar 27 10:59:44 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Mar 27 10:59:45 2017 +0000" }, "message": "Merge \"MIPS64: Improve method entry/exit code\"" }, { "commit": "85f884104c3427c14874132a88c17faf6a5cb3b9", "tree": "aa128093ed6f633141445217a45613ee6c20a768", "parents": [ "7f56a7459f946731391452d152b060695783c87c", "18ea1c9e9281b5c143b8c376d76c3ff9cae885fb" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 27 10:53:39 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Mar 27 10:53:40 2017 +0000" }, "message": "Merge \"\"Revert^6 \"CHA for interface method.\"\"\"\"" }, { "commit": "41b67fb85a34d0e75ac6d5d9a6296f1f086e47d9", "tree": "61c1639fa761a3dc73b4f4073dd9c60c534072de", "parents": [ "6a2d5960da76b8d2e2c37ca8aea97a27b753d621", "217b2ce15674cb3cf2373110711d74aefb6c91e4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 27 08:10:13 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Mar 27 08:10:13 2017 +0000" }, "message": "Merge \"ARM: Reduce the number of branches generated for HCondition and HSelect\"" }, { "commit": "6a2d5960da76b8d2e2c37ca8aea97a27b753d621", "tree": "1b65f152c8b143bf65de5855aea191a270d9d763", "parents": [ "ffac46009fb6e32797d9a9fd979a66fda83c0d77", "1e7bb5a3fd3591121e00c9ebf71e628e450af72b" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 27 08:09:43 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Mar 27 08:09:43 2017 +0000" }, "message": "Merge \"ARM: Improve the code generated for HInstanceOf\"" }, { "commit": "18ea1c9e9281b5c143b8c376d76c3ff9cae885fb", "tree": "1b2a4a2d8c15fc9a01e539f29275a05833cb44f9", "parents": [ "624dc59e7d0ab8b916a986b502cb358d16182234" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 27 08:00:18 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 27 09:02:22 2017 +0100" }, "message": "\"Revert^6 \"CHA for interface method.\"\"\"\n\nUpdate test expectations for CHA tests flaking on no-dex2oat.\n\nbug:36344221\n\nThis reverts commit 27ef25f084017421ca05508208f436b5fc11df73.\n\nChange-Id: Ie92adc7a2ec3b3081a1c57d71f8c89247e58cd46\n" }, { "commit": "624dc59e7d0ab8b916a986b502cb358d16182234", "tree": "df4f49fc0a2099fa353a4a67f07dff7855055a4e", "parents": [ "5b8f4e952f17df3ef28c2d06b3a2e890e1d2b708", "f6d4668c42933e2f85ddbc94e276c49db4e2b1dd" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Mar 27 07:57:46 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Mar 27 07:57:47 2017 +0000" }, "message": "Merge \"Improvements in the Inliner.\"" }, { "commit": "d94562d281811389eb9d3edbf5e656a22ff715cc", "tree": "bdb42b58fe998eea2773fce85a05752f24ce8623", "parents": [ "d5482fe89a407225339297f259312512257259fe", "5576f3741c58cb8b5fb2f68f3b3a9415efe05f4f" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Mar 24 17:02:49 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Mar 24 17:02:49 2017 +0000" }, "message": "Merge \"Implement a SIMD spilling slot.\"" }, { "commit": "a6cefa7de1b2712680396a1c7efb25851b8d7bac", "tree": "5789070aa220f2ac2763aef5c2969bec658969d0", "parents": [ "fc01c0ff87170ac2da9fe981bacabdce078f563e", "f25cc730ff70f085daf527f69a02fdee69aee16b" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Mar 24 15:57:02 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Mar 24 15:57:04 2017 +0000" }, "message": "Merge \"Deterministic DexCache in heap images.\"" }, { "commit": "f6d4668c42933e2f85ddbc94e276c49db4e2b1dd", "tree": "3343addb8cde45eb4070d4876f26bef1002248dc", "parents": [ "0bbb750f6ff9a52bc4649995fc78ebea87e31dd1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Feb 28 17:41:45 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Mar 24 14:02:54 2017 +0000" }, "message": "Improvements in the Inliner.\n\n- Change from a depth limit to a total number of HInstructions\n inlined limit. Remove the dex2oat depth limit argument.\n- Add more stats to diagnose reasons for not inlining.\n- Clean up logging to easily parse output.\n\nIndividual Ritz benchmarks improve from 3 to 10%.\n\nNo change in other heuristics. There was already an instruction budget.\nNote that the instruction budget is rarely hit in the \"apps\" I\u0027ve tried\nwith.\n\nCompile-times improve from 5 to 15%.\nCode size go from 4% increase (Gms) to 1% decrease (Docs).\n\nbug:35724239\ntest: test-art-host test-art-target\n\nChange-Id: I5a35c4bd826cf21fead77859709553c5b57608d6\n" }, { "commit": "0bbb750f6ff9a52bc4649995fc78ebea87e31dd1", "tree": "a969d676ff3c5d269ebcbd8fa509e146400c49f0", "parents": [ "3d6194fcfa8272c8fa4d3bae952c5944f9e812b8", "366d43387f8e31fb64b31419126c88d36b6ca491" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Mar 24 11:49:55 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Mar 24 11:49:56 2017 +0000" }, "message": "Merge \"MIPS64: Remove memcpy() from java.lang.String.getChars intrinsic.\"" }, { "commit": "3d6194fcfa8272c8fa4d3bae952c5944f9e812b8", "tree": "1910f293bf0b82e78f9aebbb21fdf9d8fdd7ad32", "parents": [ "da9f7eb3e7734b58576f71bad6d90aeea112f408", "fe4ff44798b92a2ed8738ce2466cacb97c87f1d5" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Mar 24 11:46:55 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Mar 24 11:46:57 2017 +0000" }, "message": "Merge \"MIPS32: Remove memcpy() from java.lang.String.getChars intrinsic.\"" }, { "commit": "da9f7eb3e7734b58576f71bad6d90aeea112f408", "tree": "cd837794175dee75b2c5dd253b20daac9efba25d", "parents": [ "ca32c317eeb989d9cbe330bab6ea35a8fd2ca18f", "27ef25f084017421ca05508208f436b5fc11df73" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Mar 24 08:59:45 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Mar 24 08:59:46 2017 +0000" }, "message": "Merge \"Revert \"Revert^4 \"CHA for interface method.\"\"\"" }, { "commit": "27ef25f084017421ca05508208f436b5fc11df73", "tree": "2059bf861c7992cfa195e7301451b98908c8abc6", "parents": [ "fb185130f35bbfe2ba1875974ed39ef0b3c7a77f" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Mar 24 08:59:22 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Mar 24 08:59:22 2017 +0000" }, "message": "Revert \"Revert^4 \"CHA for interface method.\"\"\n\nStill failing on the bots.\n\nThis reverts commit fb185130f35bbfe2ba1875974ed39ef0b3c7a77f.\n\nChange-Id: I1629e237dd41ce4784ccadbfc346352dfcbdb137\n" }, { "commit": "5576f3741c58cb8b5fb2f68f3b3a9415efe05f4f", "tree": "2187c109d24ae3634416b551e83fef310e975a74", "parents": [ "6efac9929f8952e4871e8c423c923989fc6f2ad2" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Mar 23 16:17:37 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Mar 23 16:51:52 2017 -0700" }, "message": "Implement a SIMD spilling slot.\n\nRationale:\nThe last ART vectorizer break-out CL \\O/\nThis ensures spilling on x86 and x86_4 is correct.\nAlso, it paves the way to wider SIMD on ARM and MIPS.\n\nTest: test-art-host\nBug: 34083438\n\nChange-Id: I5b27d18c2045f3ab70b64c335423b3ff2a507ac2\n" }, { "commit": "e104d6e48fba004658f94a81ffd1211b6d2a5bff", "tree": "f3e1d464610c52c73647a2397053d16f7dcaab75", "parents": [ "bfb438a330e887b7e63e659a890098eb05420a10" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Mar 21 20:16:05 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Thu Mar 23 13:27:57 2017 -0700" }, "message": "MIPS64: Improve method entry/exit code\n\nImprovements:\n- the stack frame is (de)allocated in one step instead of two\n- the return address register, RA, is restored early for better\n instruction scheduling\n- eliminate unused delay slot\n\nTest: test-art-host-gtest\nTest: booted MIPS64 (with 2nd arch MIPS32R2) in QEMU\n\nChange-Id: I55172bd167ed1baced82bc1d542213b93b13c2ce\n" }, { "commit": "366d43387f8e31fb64b31419126c88d36b6ca491", "tree": "4e5418aa66702b448ef46681d30bfc39b5af1145", "parents": [ "51e5474b7b8e4e80e791403e937470f575340dc1" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Thu Mar 23 09:02:56 2017 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Thu Mar 23 12:39:58 2017 -0700" }, "message": "MIPS64: Remove memcpy() from java.lang.String.getChars intrinsic.\n\nTest: run-test --64 --optimizing 020-string\nTest: run-test --64 020-string\nTest: run-test --64 --no-prebuild --optimizing 020-string\nTest: run-test --64 --no-prebuild 020-string\nTest: mma -j2 ART_TEST_OPTIMIZING\u003dtrue test-art-target-run-test\nTest: mma test-art-target-gtest -j2\nTest: booted MIPS64R6 emulator.\n\nNote: All tests run against MIPS64 QEMU.\n\nChange-Id: I8ad3e39c66a489779476f7e9f9f88cd0c6270c20\n" }, { "commit": "fe4ff44798b92a2ed8738ce2466cacb97c87f1d5", "tree": "bee2b02d524a51a04f0d946a293f2c47b5c330a5", "parents": [ "51e5474b7b8e4e80e791403e937470f575340dc1" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Thu Mar 23 11:25:12 2017 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Thu Mar 23 12:37:37 2017 -0700" }, "message": "MIPS32: Remove memcpy() from java.lang.String.getChars intrinsic.\n\nTest: run-test --optimizing 020-string\nTest: run-test 020-string\nTest: run-test --no-prebuild --optimizing 020-string\nTest: run-test --no-prebuild 020-string\nTest: mma -j2 ART_TEST_OPTIMIZING\u003dtrue test-art-target-run-test\nTest: booted MIPS32R2 emulator.\n\nNote: Tested against both the MIPS32R2, and MIPS64R6 emulators.\n\nChange-Id: I3219bc47a3657b82c82b6ac94d0b8c82eb6f9bb9\n" }, { "commit": "f13821e90275f90279a4211891102237f89f8415", "tree": "4ff3b08d082eb283bf5978f363a8a1de10f30ef0", "parents": [ "594e8b13a6b9aca4670b819b3fb6e59fbaf6ddb4", "fb185130f35bbfe2ba1875974ed39ef0b3c7a77f" ], "author": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Thu Mar 23 19:26:50 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Mar 23 19:26:51 2017 +0000" }, "message": "Merge \"Revert^4 \"CHA for interface method.\"\"" }, { "commit": "594e8b13a6b9aca4670b819b3fb6e59fbaf6ddb4", "tree": "2fd838360396930bc6a10e483eb835c67b2d0a9e", "parents": [ "af818fab0a861899c8b932fab4c9eacaf92c6ba1", "b13c65bb46544821a84ff2106d0710d77b0fb463" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Mar 23 16:00:04 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Mar 23 16:00:04 2017 +0000" }, "message": "Merge \"Saves full XMM state along suspend check\u0027s slow path.\"" }, { "commit": "f25cc730ff70f085daf527f69a02fdee69aee16b", "tree": "2f36f61990add16e7519d8b93506d6049dd7764c", "parents": [ "7591bdadf72a2fe155f937b8dc66f6249cedd014" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Mar 16 16:18:15 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Mar 23 15:25:27 2017 +0000" }, "message": "Deterministic DexCache in heap images.\n\nPreload each slot in dex cache arrays with the candidate\nentry with the lowest index.\n\nAlso fix a discrepancy where we used to keep an ArtField*\nin the DexCache if we kept the declaring class rather than\nbased on the class referenced in the corresponding FieldId.\nThis can result in accessing a field through a FieldId with\nan unresolved class as demonstrated by the regression test.\n\nTest: 159-app-image-fields\nTest: testrunner.py --host\nBug: 30627598\nChange-Id: I34735047cb064ff462cd9859e86a61ddf8615ecd\n" }, { "commit": "1e7bb5a3fd3591121e00c9ebf71e628e450af72b", "tree": "fc5ce885331bdde2eaf1b011011eba87e66283fd", "parents": [ "f4546792385ece9dd0ba956a6c9580027cfc8fdd" ], "author": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Fri Mar 17 12:30:44 2017 +0000" }, "committer": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Thu Mar 23 14:13:00 2017 +0000" }, "message": "ARM: Improve the code generated for HInstanceOf\n\nTest: m test-art-target-run-test-009-instanceof\nTest: m test-art-target-run-test-422-instanceof\nTest: m test-art-target-run-test-494-checker-instanceof-tests\nTest: m test-art-target-run-test-500-instanceof\nTest: m test-art-target-run-test-530-instanceof-checkcast\nTest: m test-art-target-run-test-603-checker-instanceof\nChange-Id: Ia5e1421403605659d0f53bc794acb5e5b0af0c5e\n" }, { "commit": "cc89525c13894247cb82a1973617da6cba286f0c", "tree": "dc67bee8e66f9b34f979fae67624336a0ece3753", "parents": [ "2b864659d4399de6c17e93b8df8cdbf08c6a7ac9" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Mar 21 10:55:15 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Mar 22 23:41:21 2017 +0000" }, "message": "Change 1/2 spill slots to more general number of spill slots.\n\nRationale:\nThis prepares requesting a different number of spill slots\nduring SIMD vectorization.\n\nBug: 34083438\nTest: test-art-host, test-art-host-gtest-register_allocator_test\nChange-Id: I6d22966ba483deec72b5eea5061c403c12b2ada7\n" }, { "commit": "fb185130f35bbfe2ba1875974ed39ef0b3c7a77f", "tree": "47cab7e151d7de2d86d9499e264273f7262699b9", "parents": [ "a861b0daacd508dacfdac6c337c1128904e5b386" ], "author": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Thu Mar 16 16:19:15 2017 -0700" }, "committer": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Wed Mar 22 14:26:20 2017 -0700" }, "message": "Revert^4 \"CHA for interface method.\"\n\nThis reverts commit 43e99be9db10111a2d6e094882cd06c248c69e11.\n\nAlso fix the issue that tries to change invoke-interface to\nan invoke-virtual of a cross-dexfile proxy method. Added a\ntestcase.\n\nTest: run-libcore-tests.sh --mode\u003dhost --variant\u003dX64 --debug\nTest: ART_TEST_JIT\u003dtrue m -j20 test-art-host-run-test\nChange-Id: Iacdf9d7ad93590e8163ed59d5838d70700a69018\n" }, { "commit": "b13c65bb46544821a84ff2106d0710d77b0fb463", "tree": "46ef54ce881e32c80901528cf21a7951cf219023", "parents": [ "2b864659d4399de6c17e93b8df8cdbf08c6a7ac9" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Mar 21 20:14:07 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Mar 22 20:11:05 2017 +0000" }, "message": "Saves full XMM state along suspend check\u0027s slow path.\n\nRationale:\nBreak-out CL of ART Vectorizer. We need to save 128-bit\nof data (default ABI of ART runtime only saves 64-bit)\nNote that this is *only* done for xmm registers that\nare live, so overhead is not too big.\n\nBug: 34083438\nTest: test-art-host\nChange-Id: Ic89988b0acb0c104634271d0c6c3e29b6596d59b\n" }, { "commit": "217b2ce15674cb3cf2373110711d74aefb6c91e4", "tree": "430009a54624d3e10e689e47d0a9af6e3bd9d543", "parents": [ "f633fb0f1b959410dbb7ce114e203aba1cfa4059" ], "author": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Thu Mar 16 11:47:12 2017 +0000" }, "committer": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Wed Mar 22 18:26:43 2017 +0000" }, "message": "ARM: Reduce the number of branches generated for HCondition and HSelect\n\nTest: m test-art-target-run-test-570-checker-select\nChange-Id: I87d2e87eb2fd30355101df07eb3754b013cedf63\n" }, { "commit": "e21c9af9a8e3493411e718ad1499e1f247f69178", "tree": "8c1f74c37394881b862151a69ab114e81aac36eb", "parents": [ "48f7a5b08583e2917d66f8dede909f48c6410b78", "6f64420701c1e1af3bb51bce6a9b608b5bb79fb5" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Mar 22 10:26:17 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Mar 22 10:26:17 2017 +0000" }, "message": "Merge \"ARM: Avoid branches to branches\"" }, { "commit": "e2492d43bfff9123de843fd3e424da438e33d793", "tree": "c0adf4a913138e0566f265cbe6936ffb87f19ade", "parents": [ "f9806373ca50896ac54cb9da49a030c13ec14769" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Mon Mar 20 11:42:13 2017 -0700" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Mon Mar 20 11:47:52 2017 -0700" }, "message": "Disable the use of inline caches in AOT mode\n\nUntil we figure out why we see the crashes in b/36371709.\n\nTest: m test-art-host\nBug: 36371709\nChange-Id: If47f917373d26825f0b8121bb8b5e0b77ff83c01\n" }, { "commit": "211d0cdee08c7fe98ea64d6c5f117859fda8bde0", "tree": "caaba85d8f2adb51fda90762b1288359be80c5a4", "parents": [ "414c5c1158a796c55f898821904575bd25a2b7b2", "1663d16e87f35246a2858e5ef1237b9907edbe6f" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Sun Mar 19 16:15:33 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Sun Mar 19 16:15:35 2017 +0000" }, "message": "Merge \"Fix the artificial dependency in ARM/ARM64 SystemArrayCopy intrinsics.\"" }, { "commit": "414c5c1158a796c55f898821904575bd25a2b7b2", "tree": "b6d2693605fb9adff9f616ebeddfd015f8439e8f", "parents": [ "c4861e63558839391f868e24cbb1f3a710148f6c", "9cc0ea8140e0106e132efc3c1c5c458fa196ae41" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Sat Mar 18 23:42:14 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Sat Mar 18 23:42:15 2017 +0000" }, "message": "Merge \"Refactor SystemArrayCopy intrinsics.\"" }, { "commit": "1663d16e87f35246a2858e5ef1237b9907edbe6f", "tree": "5f1cfb67ca08e7cadff0a2bd5ee8ca6539df076f", "parents": [ "9cc0ea8140e0106e132efc3c1c5c458fa196ae41" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 17 15:15:21 2017 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 17 18:25:48 2017 +0000" }, "message": "Fix the artificial dependency in ARM/ARM64 SystemArrayCopy intrinsics.\n\nEnsure that the base source address register (`src_curr_addr`) is\nassigned from the `src` register after `src` is made dependent on the\nlock word of `src`.\n\nBefore this CL, the artificial (or \"fake\") dependency of `src` on\n`tmp` was present, but because `src_curr_addr` was computed from `src`\n*before* that artificial dependency, it meant that it was basically\nuseless. This could explain some stale reference bugs.\n\nAfter this CL, `src_curr_addr` is computed from `src` *after* the\nartificial dependency.\n\nTest: m test-art-target on Baker read barrier configuration.\nBug: 12687968\nChange-Id: If30a2e35ca04b0b6d054e2a6c6b1e9c6879cf4a9\n" }, { "commit": "9cc0ea8140e0106e132efc3c1c5c458fa196ae41", "tree": "ff150a59096800e503073926dd56b9b4470db490", "parents": [ "41e604aac001ef023ad61f672239b76ccf33489b" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Mar 16 11:25:59 2017 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 17 18:20:41 2017 +0000" }, "message": "Refactor SystemArrayCopy intrinsics.\n\nTest: m test-art-host\nTest: m test-art-target\nChange-Id: I2f9ccdbb831030e670996b97e0c422f505b3abf6\n" } ], "next": "6f64420701c1e1af3bb51bce6a9b608b5bb79fb5" }