)]}' { "log": [ { "commit": "804b03ffb9b9dc6cc3153e004c2cd38667508b13", "tree": "91c7fd54b5000e041bf9d3d5b233dabce1fad614", "parents": [ "80eb0bc2757274816a014a2997848d288c9ee553" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Sep 14 16:26:36 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 20 14:55:44 2016 +0100" }, "message": "Change remaining slow path throw entrypoints to save everything.\n\nChange DivZeroCheck, BoundsCheck and explicit NullCheck\nslow path entrypoints to conform to kSaveEverything.\n\nOn Nexus 9, AOSP ToT, the boot.oat size reduction is\n prebuilt multi-part boot image:\n - 32-bit boot.oat: -12KiB (-0.04%)\n - 64-bit boot.oat: -24KiB (-0.06%)\n on-device built single boot image:\n - 32-bit boot.oat: -8KiB (-0.03%)\n - 64-bit boot.oat: -16KiB (-0.04%)\n\nTest: Run ART test suite including gcstress on host and Nexus 9.\nTest: Manually disable implicit null checks and test as above.\nChange-Id: If82a8082ea9ae571c5d03b5e545e67fcefafb163\n" }, { "commit": "d300d8fa3cf696c459eaf05ffd374c11eb3e9d78", "tree": "a234adc5e0e9695d35bf8396a693e9998979b85d", "parents": [ "ae9ed26e8db9123a6a3542ea00767977531d4f1a" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Fri Jul 15 14:00:56 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 20 12:05:36 2016 +0000" }, "message": "ARM: Use vstm/vldm for live floating point registers save/restore in SlowPathCode.\n\nTest: m test-art-target; m test-art-host\n\nChange-Id: Id22271c572bb698728444bef90d5c7487ab84b1a\n" }, { "commit": "9364383522de6aa996a42c6866354e7a402d1b33", "tree": "250008eebae9721b9cfe94e302db14d7ec7c4f3b", "parents": [ "0186b64cfcf36d07cbdcb6eb1e8031086ab0dc1a", "f4d6aee7786176df65b093690686617725f08378" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Sep 20 10:36:22 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Sep 20 10:36:22 2016 +0000" }, "message": "Merge \"ARM: Use stm/ldm for live registers save/restore in SlowPathCode.\"" }, { "commit": "f4d6aee7786176df65b093690686617725f08378", "tree": "14aae464b9214c822736a61272da090fafd47512", "parents": [ "f65366918e0cec5ca2c5214128f0a65a3f1bddd6" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Jul 11 10:41:45 2016 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Sep 19 15:03:45 2016 +0100" }, "message": "ARM: Use stm/ldm for live registers save/restore in SlowPathCode.\n\nIn case when there is more than 4 register to save/restore in the\nSlowPathCode stm/ldm can save some code size.\n\nTest: m test-art-target; m test-art-host\n\nChange-Id: I2d5b44bab58b67207105302cd7d8ee3300b9040a\n" }, { "commit": "91a6516103b8bf8bb75c3a2840cbdec7521e74a7", "tree": "d93043f578bfa5b8d76e8c175e6441b378c4a7b2", "parents": [ "6a4abc633fa8580b06056ec6f80ced8ce7511277" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Mon Sep 19 13:54:30 2016 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Mon Sep 19 13:54:30 2016 +0100" }, "message": "Remove the `CanTriggerGC` side-effects on a few instructions.\n\nThe side-effect was specified for these instructions as they call\nruntime. We now have a list of entrypoints that we know cannot trigger\nGC. We can avoid requiring the side-effect for those.\n\nTest: Run ART test suite on Nexus 5X and host.\n\nChange-Id: I0e0e6a4d701ce6c75aff486cb0d1bc7fe2e8dda4\n" }, { "commit": "3b7537bfc5a6b7ccb18b3970d8edf14b72464af7", "tree": "49996e22e36a64ea862e7b173e9626d862a4d595", "parents": [ "c11d1b42828475ea1e7319fc3eb9402edc5b1c13" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 13 11:56:01 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Sep 14 10:42:08 2016 +0100" }, "message": "Revert \"Revert \"Use implicit null checks inside try blocks.\"\"\n\nFix implicit checks in try blocks to emit stack maps.\nFix arm64 null expection from signal entrypoint to call\nthe runtime handler instead or simply jumping there.\n\nOn Nexus 9, AOSP ToT, the boot.oat size reduction is\n prebuilt multi-part boot image:\n - 32-bit boot.oat: -448KiB (-1.3%)\n - 64-bit boot.oat: -528KiB (-1.2%)\n on-device built single boot image:\n - 32-bit boot.oat: -448KiB (-1.4%)\n - 64-bit boot.oat: -528KiB (-1.3%)\nNote that the oat files no longer contain dex files which\nhave been moved to vdex, so the percentages are not directly\ncomparable with the those reported in the original commit.\n\nTest: Run ART test suite including gc-stress on host and Nexus 9.\nBug: 30212852\nBug: 31468464\n\nThis reverts commit 0719b5b9b458cb3eb9f0823f0dacdfe1a71214dd.\n\nChange-Id: If8a9da8c11adf2aad203e93b6684ce16ed776285\n" }, { "commit": "e204051d3cc3b1be2e91f26621966c79c82fa74c", "tree": "63270cd53f278140c7aef246925b39c858ccc55e", "parents": [ "f0c41505e1d241cf2191d3db377a26ce0bb43b51", "0719b5b9b458cb3eb9f0823f0dacdfe1a71214dd" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 12 22:07:09 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Sep 12 22:07:10 2016 +0000" }, "message": "Merge \"Revert \"Use implicit null checks inside try blocks.\"\"" }, { "commit": "0719b5b9b458cb3eb9f0823f0dacdfe1a71214dd", "tree": "cf0844758239b6ec41fa070e4fb4b4fbcbb9e506", "parents": [ "7aa7560683626c7893011271c241b3265ded1dc3" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 12 22:05:33 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 12 22:05:33 2016 +0000" }, "message": "Revert \"Use implicit null checks inside try blocks.\"\n\nFails gcstress tests.\n\nThis reverts commit 7aa7560683626c7893011271c241b3265ded1dc3.\n\nChange-Id: I4f5c89048b9ffddbafa02f3001e329ff87058ca2\n" }, { "commit": "a60a7053cd9a25c89dedc810b8a539cad3d56b36", "tree": "bd01f1c185885e719776d67f510820f437d55dd7", "parents": [ "6ee9a333553b7e7268b5bdab14974475ff385106" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 12 18:11:28 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 12 18:42:19 2016 +0100" }, "message": "Remove custom CheckCast slow path caller saves for Baker CC.\n\nFor Baker CC, CheckCast has both a read-barrier marking slow\npath and a pCheckCast slow path. When the latter is known to\nleave the method, i.e. known to throw outside a try-block,\nwe do not need to save live registers for retrieval for the\nexception delivery and since the read-barrier marking does\nnot need to save any registers either we were setting the\ncustom slow path caller saves to empty to avoid reserving\nunnecessary spill space. Hovewer, this also leads to marking\nlive references in caller-save registers in the register\nmask and while the read-barrier marking entrypoint doesn\u0027t\ncare, it causes a stack walk for the pCheckCast to try and\nretrieve an unsaved register.\n\nFor the time being, revert to the default caller saves.\n\nThis is a partial revert of\n https://android-review.googlesource.com/254920\n\nTest: Run ART test suite on host and Nexus 9.\nBug: 29231980\nBug: 30212852\nChange-Id: I4e22125f3d8903c97506aa2e6e66bea8e8e6baef\n" }, { "commit": "6ee9a333553b7e7268b5bdab14974475ff385106", "tree": "ed38b36182bfb48bf8f5aed5c7f3fd78aaea2c48", "parents": [ "a5d718a9f8ef51e41a1485a0f6ab201aec4c0c82", "7aa7560683626c7893011271c241b3265ded1dc3" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon Sep 12 15:48:22 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Sep 12 15:48:23 2016 +0000" }, "message": "Merge \"Use implicit null checks inside try blocks.\"" }, { "commit": "7aa7560683626c7893011271c241b3265ded1dc3", "tree": "8c9839456149d2320995764ebab5d227a6dea8e7", "parents": [ "ae6ba1fd36ef6cd6520354fa874cf9cc2fc5877b" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Sep 07 15:09:21 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 12 14:52:17 2016 +0100" }, "message": "Use implicit null checks inside try blocks.\n\nMake implicit null check entrypoint save all registers, use\nplatform-specific approach to still pass the fault address.\nAllow implicit null checks in try blocks.\n\nOn Nexus 9, AOSP ToT, the boot.oat size reduction is\n prebuilt multi-part boot image:\n - 32-bit boot.oat: -452KiB (-0.7%)\n - 64-bit boot.oat: -482KiB (-0.7%)\n on-device built single boot image:\n - 32-bit boot.oat: -444KiB (-0.7%)\n - 64-bit boot.oat: -488KiB (-0.7%)\n\nTest: Run ART test suite on host and Nexus 9.\nTest: Build aosp_mips64-eng.\nChange-Id: I279f3ab57e2e2f338131c5cac45c51b673bdca19\n" }, { "commit": "e0576d15f3ad0e9316f96838af01f7cc7acf6c3c", "tree": "abc6ce4677243c84a4c70ecd0240056f95e874fb", "parents": [ "280764498fdba371f972301daa870e33bef31d6a" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Fri Sep 09 12:49:55 2016 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Fri Sep 09 13:28:02 2016 -0700" }, "message": "Re-enable boot image direct string loads for read barriers\n\nBoot.oat code size with CC baker:\nARM32: 70775656 -\u003e 69817028 (-1.35%)\nARM64: 80819424 -\u003e 79417072 (-1.74%)\nX86 unmeasured.\nX86_64 unmeasured.\n\nPerformance unmeasured, should be faster.\n\nBug: 29516974\n\nTest: test-art-host CC baker, N6P booting CC baker\n\nChange-Id: I219faaca9ed17af81d2815fb5e124120f307af83\n" }, { "commit": "1dd61766fb245c2d2d7c759411b2b7b203fe0681", "tree": "02a932d971bb0d789be1accfd87fcf82f1a074d2", "parents": [ "d14d515df39cd963179088b8721768f9645243aa", "9d6e1f892768b0a0cf273ca455070f462a766a06" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Sep 08 16:08:34 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Sep 08 16:08:34 2016 +0000" }, "message": "Merge \"Do type checks in ArraySet without read barriers.\"" }, { "commit": "d8ec6dba03e61734a398e9cd6e017dd90eec6101", "tree": "b4042881a319129205d0ddfa2d870ab8898f20e3", "parents": [ "e96bda10b33c34e068a8847f6a31f7a3dbc486aa" ], "author": { "name": "Christina Wadsworth", "email": "cwadsworth@google.com", "time": "Tue Aug 30 17:19:14 2016 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Wed Sep 07 14:10:51 2016 -0700" }, "message": "ART: Generate path to entrypoints in VisitLoadString for arm\n\nARM32 boot.oat with CC: 72534816 -\u003e 71888864 (-0.9%)\n\nMove code that branches to entrypoints from GenerateSlowPaths to\nVisitLoadString. Since we\u0027re doing this every time, we shouldn\u0027t have it\nat the end with all of the slow paths.\n\nTest: N6P booting with CC, test-art-target32 on shamu\nChange-Id: I9c3307629015c9f6460506519339d4f275abe5a9\n" }, { "commit": "31b12e32073f458950e96d0d1b44e48508cf67e4", "tree": "b6f818dfa6b45342d6b69283c10e1db9817b8b0e", "parents": [ "038cb84f792501ae01561fe5ea4e8144f1918b7e" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Fri Sep 02 17:11:57 2016 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Wed Sep 07 10:13:48 2016 -0700" }, "message": "Avoid read barrier for image HLoadClass\n\nConcurrent copying baker:\n\nX86_64 core-optimizing-pic.oat: 28583112 -\u003e 27906824 (2.4% smaller)\n\nAround 0.4% of 2.4% is from re-enabling kBootImageLinkTimeAddress,\nkBootImageLinkTimePcRelative, and kBootImageAddress.\n\nN6P boot.oat 32: 73042140 -\u003e 71891956 (1.57% smaller)\nN6P boot.oat 64: 83831608 -\u003e 82531456 (1.55% smaller)\n\nEAAC: 1252 -\u003e 1245 (32 samples)\n\nBug: 29516974\n\nTest: test-art-host CC baker, N6P booting\n\nChange-Id: I9a196cf0157058836981c43c93872e9f0c4919aa\n" }, { "commit": "9d6e1f892768b0a0cf273ca455070f462a766a06", "tree": "fea5326fd36e3869a1d6d5fc0d0c8d80e2bca445", "parents": [ "66d4779c8381db2dd5c0fbe92b3c3a45a7a57ef3" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Sep 05 15:57:33 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Sep 07 11:55:13 2016 +0100" }, "message": "Do type checks in ArraySet without read barriers.\n\nThis approach is valid in the case of Baker and non-Baker\nread barriers.\n\nBenchmarks (ARM64) score variations on Nexus 5X with CPU\ncores clamped at 960000 Hz (aosp_bullhead-userdebug build,\nmedians of 10 runs for each suite):\n- Ritzperf - average (lower is better): -0.44% (virtually unchanged)\n- CaffeineMark - average (higher is better): -0.20% (virtually unchanged)\n- DeltaBlue (lower is better): -4.08% (slightly better)\n- Richards - average (lower is better): -0.57% (virtually unchanged)\n- SciMark2 - average (higher is better): -0.52% (virtually unchanged)\n\nDetails about Ritzperf benchmarks with meaningful variations\n(lower is better):\n- GenericCalcActions.MemAllocTest: +3.02% (slightly worse)\n\nDetails about Richards benchmarks with meaningful variations\n(lower is better):\n- gibbons -5.01% (better)\n\nBoot image code size variation on Nexus 5X\n(aosp_bullhead-userdebug build):\n- total ARM64 framework Oat files size change:\n 83127840 bytes -\u003e 83082656 bytes (-45184 bytes, -0.05%)\n- total ARM framework Oat files size change:\n 72571872 bytes -\u003e 72522796 bytes (-49076 bytes, -0.07%)\n\nTest: ART_USE_READ_BARRIER\u003dtrue ART_HEAP_POISONING\u003dtrue m test-art-host\nTest: ART_USE_READ_BARRIER\u003dtrue ART_HEAP_POISONING\u003dtrue m test-art-target\nBug: 29516974\nBug: 12687968\nChange-Id: I8fe130156ace87dd2e4a15d9f8b4111287e735b3\n" }, { "commit": "239d6eaff0cbb5c4c0139f7053a012758799f186", "tree": "8de26b30a2dfd94f849a38c8901437facbbc53b3", "parents": [ "9d185da3bef8caf015d3dbf4ad79c520af7ce3b1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 05 10:44:04 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 06 17:37:41 2016 +0100" }, "message": "Change deoptimize entrypoint to save everything.\n\nAnd implement FPU register retrieval from stack on x86.\n\nOn Nexus 9, AOSP ToT, the boot.oat size reduction is\n prebuilt multi-part boot image:\n - 32-bit boot.oat: -20KiB (-0.03%)\n - 64-bit boot.oat: -45KiB (-0.06%)\n on-device built single boot image:\n - 32-bit boot.oat: -24KiB (-0.04%)\n - 64-bit boot.oat: -36KiB (-0.05%)\n\nTest: Run ART test suite on host and Nexus 9.\nBug: 30212852\nChange-Id: I5d98e2a24363136d73dfec6100ab02f8eb101911\n" }, { "commit": "86dc59ebe25cfe36d4edb39c2b7b2653f079448b", "tree": "446d80551ab72701914ed08ac18fcaeffd6555b1", "parents": [ "b0f443217306b8a307f73d35cb27c1cac2e1c360", "70e97462116a47ef2e582ea29a037847debcc029" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon Sep 05 18:12:13 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Sep 05 18:12:13 2016 +0000" }, "message": "Merge \"Avoid excessive spill slots for slow paths.\"" }, { "commit": "70e97462116a47ef2e582ea29a037847debcc029", "tree": "ee587e35b9b9483c35875ccc8ddea139978ca823", "parents": [ "521691ae4dfad47cf6b46858347fa5fa32fd7bcc" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 09 11:04:26 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 05 17:27:41 2016 +0100" }, "message": "Avoid excessive spill slots for slow paths.\n\nReducing the frame size makes stack maps smaller as we need\nfewer bits for stack masks and some dex register locations\nmay use short location kind rather than long. On Nexus 9,\nAOSP ToT, the boot.oat size reduction is\n prebuilt multi-part boot image:\n - 32-bit boot.oat: -416KiB (-0.6%)\n - 64-bit boot.oat: -635KiB (-0.9%)\n prebuilt multi-part boot image with read barrier:\n - 32-bit boot.oat: -483KiB (-0.7%)\n - 64-bit boot.oat: -703KiB (-0.9%)\n on-device built single boot image:\n - 32-bit boot.oat: -380KiB (-0.6%)\n - 64-bit boot.oat: -632KiB (-0.9%)\n on-device built single boot image with read barrier:\n - 32-bit boot.oat: -448KiB (-0.6%)\n - 64-bit boot.oat: -692KiB (-0.9%)\n\nThe other benefit is that at runtime, threads may need fewer\npages for their stacks, reducing overall memory usage.\n\nWe defer the calculation of the maximum spill size from\nthe main register allocator (linear scan or graph coloring)\nto the RegisterAllocationResolver and do it based on the\nlive registers at slow path safepoints. The old notion of\nan artificial slow path safepoint interval is removed as\nit is no longer needed.\n\nTest: Run ART test suite on host and Nexus 9.\nBug: 30212852\nChange-Id: I40b3d114e278e2c5807982904fa49bf6642c6275\n" }, { "commit": "19a3f556e777de889d8f377b4d1be143f25f39c3", "tree": "b59a42c9c9e02520f53dae73f84994612dabdee1", "parents": [ "d7eabc2cc1a88c1f7f927da61246ae65aab0626c", "da8ffec70e9019fe1208ac38444a7048958fc206" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Aug 31 09:41:23 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 31 09:41:23 2016 +0000" }, "message": "Merge \"Add entrypoint type information.\"" }, { "commit": "cc55a7ce2aa0f10c2da9efaa89855cf075e56e20", "tree": "9bf090506ab95337f9029be4e4c8453b7d01a488", "parents": [ "c9c055f96005b319d6c582b23432ba3ef0bd7488", "68c981fad87720fae9c799b240141ce3c12cd5bf" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Aug 26 16:19:59 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Aug 26 16:19:59 2016 +0000" }, "message": "Merge \"ARM/MIPS: Avoid dead dex cache arrays base for intrinsics.\"" }, { "commit": "da8ffec70e9019fe1208ac38444a7048958fc206", "tree": "a6dc41bc2dfe6c5afc6fcc3bdd77c35063ad4e6a", "parents": [ "c0ee1f5af12298e11aaadab4c9838b2f1395972e" ], "author": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Wed Mar 09 12:02:11 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Aug 26 16:07:58 2016 +0100" }, "message": "Add entrypoint type information.\n\nFor some of the runtime calls we do not need to generate stack maps. For\nexample, the Optimizing compiler implements HRem Floating Point by\ncalling libm\u0027s fmod().\n\nSince this is a leaf method that does not suspend the execution, we do\nnot need to treat the fmod() invoke as a possible suspend point and thus\nwe do not need to create a stack map for the particular PC.\n\nFor now conservatively only tag the maths runtime entrypoints with this\ninformation.\n\nTest: m test-art-target\nChange-Id: Iab73dcf8047d2edaa7a570113ee792e46ccbc464\n" }, { "commit": "68c981fad87720fae9c799b240141ce3c12cd5bf", "tree": "e55099aca20d8e7be13cf8eb3e48f37b0afd38bb", "parents": [ "c4db1d10c586627d6c3af01e399b333a15344969" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Aug 26 13:13:33 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Aug 26 15:35:53 2016 +0100" }, "message": "ARM/MIPS: Avoid dead dex cache arrays base for intrinsics.\n\nTest: Run ART test suite on host and Nexus 6.\nChange-Id: Ie2ad70f1e3f125eae5dad53a6384d405e0311505\n" }, { "commit": "4bb30ac111d2d9d57a504597520454e05cdee3ed", "tree": "e831b74aaa598e48752b6cc31c10c751cf0eed4e", "parents": [ "c4db1d10c586627d6c3af01e399b333a15344969" ], "author": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Wed Jun 22 17:04:45 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Aug 26 10:38:56 2016 +0000" }, "message": "ARM: Make runtime invokes use InvokeRuntime().\n\nThis patch refactors all of the ARM Optimizing compiler runtime\ninvokes to use InvokeRuntime(). It also fixes some misuses of\nRecordPcInfo().\n\nChange-Id: I722bc2ba95e42ff69ca12c3edc09326e0de2881f\n" }, { "commit": "cf073b3528f86fd4bf28617e9b770a4229054e42", "tree": "8ca2fa054fd0c0988fac870f4181920a257c99bb", "parents": [ "6fe468835c528f65d0e4793e9da57f01eb6ba62b", "16d9f949698faed28435af7aa9c9ebacbfd5d1a8" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Aug 26 09:51:01 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Aug 26 09:51:02 2016 +0000" }, "message": "Merge \"Re-enable the ArraySet fast path with Baker read barriers.\"" }, { "commit": "16d9f949698faed28435af7aa9c9ebacbfd5d1a8", "tree": "870fbd499c10f70cecc5f62246b26e1332b600da", "parents": [ "7c95b4e22897a6f14ef79ec6e547e2eed686814a" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Aug 25 17:27:56 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Aug 25 17:27:56 2016 +0100" }, "message": "Re-enable the ArraySet fast path with Baker read barriers.\n\nBenchmarks (ARM64) score variations on Nexus 5X with CPU\ncores clamped at 960000 Hz (aosp_bullhead-userdebug build):\n- Ritzperf - average (lower is better): -0.95% (virtually unchanged)\n- CaffeineMark - average (higher is better): +2.50% (slightly better)\n- DeltaBlue (lower is better): -0.55% (virtually unchanged)\n- Richards - average (lower is better): +0.67% (virtually unchanged)\n- SciMark2 - average (higher is better): -0.10% (virtually unchanged)\n\nDetails about Ritzperf benchmarks with meaningful variations\n(lower is better):\n- GenericCalcActions.MemAllocTest: -5.05% (better)\n\nDetails about CaffeineMark benchmarks with meaningful variations\n(higher is better):\n- Method: +16.88% (better)\n\nDetails about Richards benchmarks with meaningful variations\n(lower is better):\n- deutsch_acc_interface: +9.86% (worse)\n\nBoot image code size variation on Nexus 5X\n(aosp_bullhead-userdebug build):\n- total ARM64 framework Oat files size change:\n 105933472 bytes -\u003e 106027680 bytes (+0.09%)\n- total ARM framework Oat files size change:\n 89157936 bytes -\u003e 89239856 bytes (+0.09%)\n\nTest: ART host and target (ARM, ARM64) tests.\nBug: 29516974\nBug: 29506760\nBug: 12687968\nChange-Id: Ib9e9709712295e17804b8888ac10e3d518ff2e70\n" }, { "commit": "8d49fd7b1087fba274a844cbf180349c528cf912", "tree": "128be6aa83734b09ecf189a70525570555a4d8cb", "parents": [ "082bfec57684bd93dcca0800d030c12fd448127f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 25 15:20:47 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 25 15:24:05 2016 +0100" }, "message": "ArraySet without type check does not need read barrier.\n\nTest: Run ART test suite with ART_USE_READ_BARRIER\u003dtrue on host and Nexus 9.\nBug: 12687968\nChange-Id: Ie04a34b2149f4fc6fe995f3e43e76986a3f6330f\n" }, { "commit": "953437bd51059801d92079295f728d0260efca31", "tree": "b52816b5092a143361ea3878ef0e06d311c4a56f", "parents": [ "c67d22ac6db73aaa9540294c86344bf8021495b3" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 24 08:30:46 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 24 13:20:32 2016 +0100" }, "message": "Revert \"Revert \"x86/x86-64: Avoid temporary for read barrier field load.\"\"\n\nFixed the fault handler recognizing the TEST instruction and\nfault address within the lock word. Added tests to 439-npe.\n\nBug: 29966877\nBug: 12687968\nTest: Tested with ART_USE_READ_BARRIER\u003dtrue on host.\nTest: Tested with ART_USE_READ_BARRIER\u003dtrue ART_HEAP_POISONING\u003dtrue on host.\n\nThis reverts commit ccf15bca330f9a23337b1a4b5850f7fcc6c1bf15.\n\nChange-Id: I8990def5f719c9205bf6e5fdba32027fa82bec50\n" }, { "commit": "ccf15bca330f9a23337b1a4b5850f7fcc6c1bf15", "tree": "8e271269eb0f3e40388311478fe441bfeb47ab47", "parents": [ "ccf06d8f19a37432de4a3b768747090adfbd18ec" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 23 17:48:38 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 23 17:48:38 2016 +0000" }, "message": "Revert \"x86/x86-64: Avoid temporary for read barrier field load.\"\n\nFault handler does not recognize the instruction\n F6 /0 ib TEST r/m8, imm8\nso we get crashes instead of NPEs.\n\nBug: 29966877\nBug: 12687968\n\nThis reverts commit ccf06d8f19a37432de4a3b768747090adfbd18ec.\n\nChange-Id: Ib7db3b59f44c0d3ed5e24a20b6c6ee596a89d709\n" }, { "commit": "ccf06d8f19a37432de4a3b768747090adfbd18ec", "tree": "fcb3ba46184db6882e695cecf1cfe495417593ae", "parents": [ "cf834d00de838272cf28f2382ffc26fe716aae5c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Aug 12 13:37:55 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 23 11:41:44 2016 +0100" }, "message": "x86/x86-64: Avoid temporary for read barrier field load.\n\nAdd TEST instructions for memory and immediate. Use the byte\nversion to avoid a temporary in read barrier field load.\n\nTest: Tested with ART_USE_READ_BARRIER\u003dtrue on host.\nTest: Tested with ART_USE_READ_BARRIER\u003dtrue ART_HEAP_POISONING\u003dtrue on host.\nBug: 29966877\nBug: 12687968\nChange-Id: Ia415d3c2e1ae1ff6dff11d72bbb7d96d5deed6ee\n" }, { "commit": "9c07ab332b8ebbcb1586c311bfcb75e19b8a35b4", "tree": "26a300b803f77e64c17e3d239a1880a4c5960666", "parents": [ "6670bd2098264d4c4e19750ab4741121da7ee54b", "bf44e0e5281de91f2e38a9378b94ef8c50ad9b23" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Fri Aug 19 17:33:03 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Aug 19 17:33:03 2016 +0000" }, "message": "Merge \"ART: Implement a fixed size string dex cache\"" }, { "commit": "0b671c0408e98824e1f92b1ee951b210c090fe7a", "tree": "0bc58c031cd899aa856677fe8c9ffa376228806f", "parents": [ "36bf3a2d281892e7906d3eaf9d7455b0656c9a25" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Aug 19 12:02:34 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Aug 19 16:00:09 2016 +0100" }, "message": "Add support for Baker read barriers in SystemArrayCopy intrinsics.\n\nBenchmarks (ARM64) score variations on Nexus 5X with CPU\ncores clamped at 960000 Hz (aosp_bullhead-userdebug build):\n- Ritzperf - average (lower is better): -3.03% (slightly better)\n- CaffeineMark - average (higher is better): +1.26% (slightly better)\n- DeltaBlue (lower is better): -10.50% (better)\n- Richards - average (lower is better): -3.36% (slightly better)\n- SciMark2 - average (higher is better): +0.26% (virtually unchanged)\n\nDetails about Ritzperf benchmarks with meaningful variations\n(lower is better):\n- FormulaEvaluationActions.EvaluateAndApplyChanges: -13.26% (better)\n- FormulaEvaluationActions.EvaluateCascadingSums: -10.94% (better)\n- FormulaEvaluationActions.EvaluateComplexFormulas: -15.50% (better)\n- FormulaEvaluationActions.EvaluateFibonacci: -10.41% (better)\n- FormulaEvaluationActions.EvaluateLargeSums: +6.02% (worse)\n\nBoot image code size variation on Nexus 5X\n(aosp_bullhead-userdebug build):\n- total ARM64 framework Oat files size change:\n 107047632 bytes -\u003e 107154128 bytes (+0.10%)\n- total ARM framework Oat files size change:\n 90932028 bytes -\u003e 91009852 bytes (+0.09%)\n\nTest: ART host and target (ARM, ARM64) tests + Nexus 5X boot.\nBug: 29516905\nBug: 29506760\nBug: 12687968\nChange-Id: I85431368d09965687a0301ae2eb3c991f276ce5d\n" }, { "commit": "bf44e0e5281de91f2e38a9378b94ef8c50ad9b23", "tree": "bb6e65a3434806dc58f286ee75ad3b78ba9d6c36", "parents": [ "d99565069c64fefc069005286de04599dc2619b8" ], "author": { "name": "Christina Wadsworth", "email": "cwadsworth@google.com", "time": "Thu Aug 18 10:37:42 2016 -0700" }, "committer": { "name": "Christina Wadsworth", "email": "cwadsworth@google.com", "time": "Thu Aug 18 16:18:36 2016 -0700" }, "message": "ART: Implement a fixed size string dex cache\n\nPreviously, the string dex cache was dex_file-\u003eNumStringIds() size, and\n@ruhler found that only ~1% of that cache was ever getting filled. Since\nmany of these string dex caches were previously 100,000+ indices in\nlength, we\u0027re wasting a few hundred KB per app by storing null pointers.\nThe intent of this project was to reduce the space the string dex cache\nis using, while not regressing on time that much. This is the first of a\nfew CLs, which implements the new fixed size array and disables the\ncompiled code so it always goes slow path. In four other CLs, I\nimplemented a \"medium path\" that regresses from the previous \"fast path\"\nonly a bit in assembly in the entrypoints. @vmarko will introduce new\ncompiled code in the future so that we ultimately won\u0027t be regressing on\ntime at all. Overall, space savings have been confirmed as on the order\nof 100 KB per application.\n\nA 4-5% slow down in art-opt on Golem, and no noticeable slow down in the\ninterpreter. The opt slow down should be diminished once the new\ncompiled code is introduced.\n\nTest: m test-art-host\n\nBug: 20323084\n\nChange-Id: Ic654a1fb9c1ae127dde59290bf36a23edb55ca8e\n" }, { "commit": "554b6fb8759d186eba1046c220c9cff9a8610525", "tree": "0b28f10d2235c82ba13f75829a018457d2ce9a66", "parents": [ "fe74ba9ea6c2c47a02d2ba7436b3a603b459468c", "4a3aa578eff94eb10450fae1772deb7cb8ddc6a6" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon Aug 15 14:35:48 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Aug 15 14:35:48 2016 +0000" }, "message": "Merge \"Revert \"Enable IntermediateAddress for primitive arrays with read barriers.\"\"" }, { "commit": "4a3aa578eff94eb10450fae1772deb7cb8ddc6a6", "tree": "abb3aa17279c6a9edc9dd1c0691738a7f7c69a10", "parents": [ "12ecf0800d465acdaa3deccd383ff8ed3428a183" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Aug 15 13:17:06 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Aug 15 13:17:06 2016 +0000" }, "message": "Revert \"Enable IntermediateAddress for primitive arrays with read barriers.\"\n\nThis CL breaks the angler-userdebug build with\n`ART_USE_READ_BARRIER\u003dtrue`.\n\nTest: Build angler-userdebug with `ART_USE_READ_BARRIER\u003dtrue`.\nBug: 30762467\nBug: 26601270\nBug: 12687968\n\nThis reverts commit 12ecf0800d465acdaa3deccd383ff8ed3428a183.\n\nChange-Id: Ia2069ac9436d2336311dd8d0f183c02e587586ae\n" }, { "commit": "7cbd27fe778f2c348136540d52b5473e28f5769d", "tree": "80c0fa4ff2a223c061245c6799d992cd4d863fa0", "parents": [ "3d1d18d74dfac5039b6093ddf04f74eee4f157a3" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Aug 11 23:53:33 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Aug 12 13:19:51 2016 +0100" }, "message": "Adjust spacing before NOLINT comments in ART.\n\nNote that neither clang-tidy nor cpplint.py complain about\nthese style \"issues\", precisely because of the NOLINT\ncomments.\n\nTest: WITH_TIDY\u003d1 WITH_TIDY_CHECKS\u003d\u0027-*,misc-macro-parentheses\u0027 mmma art\nChange-Id: Id692fd394ffbd4fe208cbbe4407b4d5e208462bb\n" }, { "commit": "4997d14c8d0404269993986deff5ae1ae45ab712", "tree": "b125ba1053f987e13eb2890e342e37b872c524cf", "parents": [ "c218427ab96e521e0c4e9a3ffeb87e6c57eea0a5", "59751a7375196c530fbd048e72750aa94ab90431" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 10 13:29:15 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 10 13:29:15 2016 +0000" }, "message": "Merge \"ARM: Embed constants in add/sub-long.\"" }, { "commit": "51616fb233df2760fd6002a02dce692f24b93fb6", "tree": "61766bfa4bb53bf8f57a6c2645e81d375aa902bf", "parents": [ "c10ad423024432df36f6360eafca8332d07b946a", "12ecf0800d465acdaa3deccd383ff8ed3428a183" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Aug 08 10:16:43 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Aug 08 10:16:43 2016 +0000" }, "message": "Merge \"Enable IntermediateAddress for primitive arrays with read barriers.\"" }, { "commit": "12ecf0800d465acdaa3deccd383ff8ed3428a183", "tree": "229f7438b82c945f4b3221f6c1033eaf96a9a1c6", "parents": [ "d16ae7fe70d74091778e5952b7920df14866287f" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Aug 08 10:18:37 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Aug 08 10:18:37 2016 +0100" }, "message": "Enable IntermediateAddress for primitive arrays with read barriers.\n\nTest: ART host and target (ARM, ARM64) tests.\nBug: 26601270\nBug: 12687968\nChange-Id: I6736ba7b1809bece1bf3cd82c69e4f42a0d3c4a7\n" }, { "commit": "59751a7375196c530fbd048e72750aa94ab90431", "tree": "98c1649266004d0b9c26a5f5e53613a9d1608a8b", "parents": [ "9526d13c791b3c95ae3f22e0be4d695e8be5708c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Aug 05 14:37:27 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Aug 05 19:17:53 2016 +0100" }, "message": "ARM: Embed constants in add/sub-long.\n\nTest: 538-checker-embed-constants\nTest: Run ART test suite on Nexus 5.\nChange-Id: Ib9639748c74d5c56dc354a6830987b613b922654\n" }, { "commit": "965c0b9f98a4acbec7be148291196e30784bba2d", "tree": "c9b53c36226535f2941d47a1ea222da114266680", "parents": [ "2e98023165349ab91855555f63fed8dad3c471fe", "952dbb19cd094b8bfb01dbb33e0878db429e499a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 04 14:44:10 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Aug 04 14:44:10 2016 +0000" }, "message": "Merge \"Change suspend entrypoint to save all registers.\"" }, { "commit": "952dbb19cd094b8bfb01dbb33e0878db429e499a", "tree": "82932c2b00245042e2c129f3d4133f6431657da3", "parents": [ "df638c66d1f385d4e217b2ab22c5e48a7eefdef4" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 28 12:01:51 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 04 14:51:52 2016 +0100" }, "message": "Change suspend entrypoint to save all registers.\n\nWe avoid the need to save/restore registers in slow paths\nand get significant code size savings. On Nexus 9, AOSP:\n - 32-bit boot.oat: -1.4MiB (-1.9%)\n - 64-bit boot.oat: -2.0MiB (-2.3%)\n - other 32-bit oat files in dalvik-cache: -200KiB (-1.7%)\n - other 64-bit oat files in dalvik-cache: -2.3MiB (-2.1%)\n\nTest: Run ART test suite on host and Nexus 9 with gc stress.\nBug: 30212852\nChange-Id: I7015afc1e7d30341618c9200a3dc9ae277afd134\n" }, { "commit": "3719016185859778fa562d02140d04004c21d9a7", "tree": "30a2401e0576370bff32375fc87856739559379e", "parents": [ "3d6094531e3790b25c43e59fd6cd0b6b99d3447c", "37dd80d701fc5f55ed5a88ce2a495bf6eeb4a321" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 02 12:31:10 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Aug 02 12:31:10 2016 +0000" }, "message": "Merge \"ARM: Embed 0.0 in VCMP.\"" }, { "commit": "37dd80d701fc5f55ed5a88ce2a495bf6eeb4a321", "tree": "2129c5f6fb822e0ca5c5671494c35aaadd78ef9c", "parents": [ "6e5e3b2e914cf4bdc5f17a6011fc2b1937eb9641" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Aug 01 17:41:45 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 02 11:21:49 2016 +0100" }, "message": "ARM: Embed 0.0 in VCMP.\n\nTest: Run ART test suite on Nexus 5.\nChange-Id: I5cbbd98c4d64a4d9213e27adcae929ead5099a39\n" }, { "commit": "542451cc546779f5c67840e105c51205a1b0a8fd", "tree": "11e09bb5abaee12dddffefbe7e425291076dfa7a", "parents": [ "85c4a4b8c9eabfe16e4e49f9b4aa78c1bf4be023" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Jul 26 09:02:02 2016 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Aug 01 18:54:48 2016 -0700" }, "message": "ART: Convert pointer size to enum\n\nMove away from size_t to dedicated enum (class).\n\nBug: 30373134\nBug: 30419309\nTest: m test-art-host\nChange-Id: Id453c330f1065012e7d4f9fc24ac477cc9bb9269\n" }, { "commit": "dec8f63fdf50815f24efe1c03af64208da15f339", "tree": "36c8dec8c2c93312d17c6d9d1452d4b133212dbd", "parents": [ "41c7e2e6ac0a59da2f3e066e20630b295fbe4661" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jul 22 17:10:06 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jul 22 18:54:35 2016 +0100" }, "message": "Do not emit stack maps for runtime calls to ReadBarrierMarkRegX.\n\n* Boot image code size variation on Nexus 5X\n (aosp_bullhead-userdebug build):\n - total ARM64 framework Oat files size change:\n 115584120 bytes -\u003e 109124728 bytes (-5.59%)\n - total ARM framework Oat files size change:\n 97387728 bytes -\u003e 92517584 (-5.00%)\n\nTest: ART host and target (ARM, ARM64) tests.\nBug: 29506760\nBug: 12687968\nChange-Id: I979d9fb2b4e09f4c0c7bf33af2cd91750a67f989\n" }, { "commit": "057361ca33625ed14b33ffd8e641e27916fb2fea", "tree": "cf13a0b5c0e5504fdcf320ab9a9936d0d489bdf5", "parents": [ "65ad9b3516c4f4bc4e7abf5c6e065a675cf024d8", "4359e61927866c254bc2d701e3ea4c48de10b79c" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jul 21 12:11:15 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jul 21 12:11:15 2016 +0000" }, "message": "Merge \"Move caller-saves saving/restoring to ReadBarrierMarkRegX.\"" }, { "commit": "4359e61927866c254bc2d701e3ea4c48de10b79c", "tree": "05d274ecd6b5ff6eb890f64cd3bb670c7170bf15", "parents": [ "2be946bbf995496fe56364d9b7c4957fcb6aeec5" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jul 20 11:32:19 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jul 21 11:21:20 2016 +0100" }, "message": "Move caller-saves saving/restoring to ReadBarrierMarkRegX.\n\nInstead of saving/restoring live caller-save registers\nbefore/after the call to read barrier mark entry points\nReadBarrierMarkRegX, have these entry points save/restore\nall the caller-save registers themselves (except register\nrX, which contains the return value).\n\nAlso refactor the assembly code of these entry points\nusing macros.\n\n* Boot image code size variation on Nexus 5X\n (aosp_bullhead-userdebug build):\n - total ARM64 framework Oat files size change:\n 119196792 bytes -\u003e 115575920 bytes (-3.04%)\n - total ARM framework Oat files size change:\n 100435212 bytes -\u003e 97621188 bytes (-2.80%)\n\n* Benchmarks (ARM64) score variations on Nexus 5X\n (aosp_bullhead-userdebug build):\n - RitzPerf (lower is better)\n - average score difference: -2.71%\n - CaffeineMark (higher is better)\n - no real difference for most tests\n (absolute variation lower than 1%)\n - better score on the \"Method\" benchmark:\n score variation 41253 -\u003e 44891 (+8.82%)\n\nTest: ART host and target (ARM, ARM64) tests.\nBug: 29506760\nBug: 12687968\nChange-Id: I881bf73139a3f1c2bee9ffc6fc8c00f9a392afa6\n" }, { "commit": "a92938a17b75eed3213030faaff9cfb321d47f37", "tree": "c6db649f7c1f6b6a86eb568212a721aac4ee6d96", "parents": [ "89b03e0cfb03e3194e39f07fa8c1bd46e3b28a34", "328429ff48d06e2cad4ebdd3568ab06de916a10a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 21 09:17:15 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jul 21 09:17:16 2016 +0000" }, "message": "Merge \"ARM: Port instr simplification of array accesses.\"" }, { "commit": "328429ff48d06e2cad4ebdd3568ab06de916a10a", "tree": "6290ac8afc3e93488382727f6765f548a2cfff04", "parents": [ "79e73245140f4115039a7284b3797d701f368fe6" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Wed Jul 06 16:23:04 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 21 09:16:43 2016 +0000" }, "message": "ARM: Port instr simplification of array accesses.\n\nAfter changing the addressing mode for array accesses (in\nhttps://android-review.googlesource.com/248406) the \u0027add\u0027\ninstruction that calculates the base address for the array can be\nshared across accesses to the same array.\n\nBefore https://android-review.googlesource.com/248406:\n add IP, r[Array], r[Index0], LSL #2\n ldr r0, [IP, #12]\n add IP, r[Array], r[Index1], LSL #2\n ldr r0, [IP, #12]\n\nBefore this CL:\n add IP. r[Array], #12\n ldr r0, [IP, r[Index0], LSL #2]\n add IP. r[Array], #12\n ldr r0, [IP, r[Index1], LSL #2]\n\nAfter this CL:\n add IP. r[Array], #12\n ldr r0, [IP, r[Index0], LSL #2]\n ldr r0, [IP, r[Index1], LSL #2]\n\nLink to the original optimization:\n https://android-review.googlesource.com/#/c/127310/\n\nTest: Run ART test suite on Nexus 6.\nChange-Id: Iee26f9a0a7ca46abb90e3f60d19d22dc8dee4d8f\n" }, { "commit": "e4b1c86d13c3f60362708f4a128b62db156f5fde", "tree": "4920c33f3510a21dba212650659174a7bb44c855", "parents": [ "ce1ba111bfa122247ac186e7d2c6cf5943ba28cd", "465ecc86ff65ca546629630c9469deb6d2d8137e" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Jul 21 00:04:52 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jul 21 00:04:52 2016 +0000" }, "message": "Merge \"Revert \"Revert \"Refactor GetIMTIndex\"\"\"" }, { "commit": "360b4b0137ce5f0bb771e2ddbfd4735cae932565", "tree": "d96daf2b7c8a206541790163d398e5eeec5b33c8", "parents": [ "522da11a6cc8178f413b5ad5b12c4ed608f6e204", "6740997e6934bbca27d5830a32352d82aabbd38b" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jul 20 12:01:15 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jul 20 12:01:15 2016 +0000" }, "message": "Merge \"ART: Change return types of field access entrypoints\"" }, { "commit": "6740997e6934bbca27d5830a32352d82aabbd38b", "tree": "684ab2e46ddeaaf251fb6919bf64295810e46afa", "parents": [ "dc4f4d42aa1712a7ac2e4c24c0aebe58b71ae2c0" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Jul 19 22:34:53 2016 -0700" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jul 20 11:44:25 2016 +0100" }, "message": "ART: Change return types of field access entrypoints\n\nEnsure that return types guarantee full-width data as the compiled\ncode and mterp expect by using size_t and ssize_t.\n\nThis fixes Clang no longer sign-/zero-extending small return types.\n\nBug: 30232671\nTest: m ART_TEST_RUN_TEST_NDEBUG\u003dtrue ART_TEST_INTERPRETER\u003dtrue test-art-host-run-test\nChange-Id: Ic505befc6c94e2dccbc8abf2b13d4c2d662e68d1\n" }, { "commit": "6c91679ad9802764c8bc45508fedbb9d59fab377", "tree": "18dd4b3a3d74d6706ef321437249490b35d31141", "parents": [ "bae13af2fc2fa89985d0466cedf155cb96767910" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Jul 11 14:02:34 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jul 20 09:20:08 2016 +0000" }, "message": "ARM: Change mem address mode for array accesses.\n\nSwitch from:\n add IP, r[Array], r[Index], LSL #2\n ldr r0, [IP, #12]\nTo:\n add IP. r[Array], #12\n ldr r0, [IP, r[Index], LSL #2]\n\nThese is a base for the future TryExtractArrayAccessAddress\noptimization port to arm.\n\nTest: aosp_shamu-userdebug boots and passes \"m test-art-target\".\nChange-Id: I6ab01ba3271a8f79599ddd91a6b63cd1b37d2d67\n" }, { "commit": "465ecc86ff65ca546629630c9469deb6d2d8137e", "tree": "3a0ed3f2d3ab9fd2cffec44a659036efab35fb4e", "parents": [ "bae13af2fc2fa89985d0466cedf155cb96767910" ], "author": { "name": "Matthew Gharrity", "email": "gharrma@google.com", "time": "Tue Jul 19 21:32:52 2016 +0000" }, "committer": { "name": "Matthew Gharrity", "email": "gharrma@google.com", "time": "Tue Jul 19 21:48:06 2016 +0000" }, "message": "Revert \"Revert \"Refactor GetIMTIndex\"\"\n\nOriginally reverted in order to revert\nhttps://android-review.googlesource.com/#/c/244190/\nbut can now be merged again.\n\nThis reverts commit d4ceecc85a5aab2ec23ea1bd010692ba8c8aaa0c.\n\nTest: m test-art-host\n\nChange-Id: Id9205f2b77a378fc0f06088e78c66e81a49f712d\n" }, { "commit": "2c30a373428b8d19bf97866d5d323c4ca2fbca72", "tree": "8927430b0ae7185b0583615e8dbd7481ac13c6c7", "parents": [ "7598736db0647eb963e77fafc22af6c0a5747d20", "02b75806a80f8b75c3d6ba2ff97c995117630f36" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jul 14 09:32:34 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jul 14 09:32:34 2016 +0000" }, "message": "Merge \"Introduce more compact ReadBarrierMark slow-paths.\"" }, { "commit": "ff484b95b25a5181a6a8a191cbd11da501c97651", "tree": "a14875e1a28afd1c5f7bd6a0a80414674253e593", "parents": [ "1fd347303275a424d114c9833f954e8e27812554" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jul 13 14:13:48 2016 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jul 13 16:13:03 2016 +0100" }, "message": "Fix a bug in ClassTableGet code generation for IMTs.\n\nIntroduced by:\n https://android-review.googlesource.com/#/c/244980/\n\ntest:566-polymorphic-inling for fixing x86 crash. Also\nfixes a performance regression.\nbug:29188168\n\nChange-Id: Id90cb819c88e7ba3db1cb3c50c517a112ab7d784\n" }, { "commit": "02b75806a80f8b75c3d6ba2ff97c995117630f36", "tree": "ecdb1852c3e33f120110091cc2d07a9737fbd3b5", "parents": [ "5f485719b166ceb8e591329d40e76c5e50988022" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jul 13 11:54:35 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jul 13 11:54:35 2016 +0100" }, "message": "Introduce more compact ReadBarrierMark slow-paths.\n\nReplace entry point ReadBarrierMark with 32\nReadBarrierMarkRegX entry points, using register\nnumber X as input and output (instead of the standard\nruntime calling convention) to save two moves in Baker\u0027s\nread barrier mark slow-path code.\n\nTest: ART host and target (ARM, ARM64) tests.\nBug: 29506760\nBug: 12687968\nChange-Id: I73cfb82831cf040b8b018e984163c865cc44ed87\n" }, { "commit": "5f4f6cfe4603133b4b746d9e4e061575bbf880e0", "tree": "f991ca0a84e65ef27dae8d2ea3f4decc5961771d", "parents": [ "d8f5f56f2dd90e2bcb6d41cb48403320b9eb04b9", "194bcfea4a29db2c529de333c6a00b32608dd4e5" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jul 12 12:03:02 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jul 12 12:03:03 2016 +0000" }, "message": "Merge \"ARM: Shorter fast-path for read barrier field load.\"" }, { "commit": "d8f5f56f2dd90e2bcb6d41cb48403320b9eb04b9", "tree": "6c0c43f98f6c50c799c45449a4a45fa121ab1ba3", "parents": [ "6caea66f9d73b9fe4693090e3b3ceb1cf0b248d1", "54ff482710910929900f8348a19c5b875e519237" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jul 12 11:07:50 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jul 12 11:07:50 2016 +0000" }, "message": "Merge \"Rename kCall to kCallOnMainOnly\"" }, { "commit": "194bcfea4a29db2c529de333c6a00b32608dd4e5", "tree": "83c8c87448730de7d8a0a4ac51414806ae0b9090", "parents": [ "dedde3f10d7801ad862d1ca1de89135decff6a60" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jul 11 15:52:00 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jul 12 12:04:19 2016 +0100" }, "message": "ARM: Shorter fast-path for read barrier field load.\n\nReduces the aosp_hammerhead-userdebug boot.oat by 2.2MiB,\ni.e. ~2.2%, in the ART_USE_READ_BARRIER\u003dtrue configuration.\n\nTest: Tested with ART_USE_READ_BARRIER\u003dtrue on Nexus 5.\nBug: 29966877\nBug: 12687968\nChange-Id: I4454150003e12a1aa7f0cf451627dc1ee9a495ae\n" }, { "commit": "54ff482710910929900f8348a19c5b875e519237", "tree": "82667795ef43a33a87a585f9bc841c88ff3460f1", "parents": [ "2e7acaffda05db1df6e0631468f10726e898a20a" ], "author": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Thu Jul 07 18:03:19 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Jul 11 17:59:29 2016 +0000" }, "message": "Rename kCall to kCallOnMainOnly\n\nThis patch renames kCall to kCallOnMainOnly in preparation for\nthe next patch in this series which will be adding kCallOnMainAndSlowPath.\n\nNote: With this patch there will be places where we use kCallOnMainOnly\neven though we call on the slow path too. The next patch in this series\nwill fix that.\n\nTest: ART host tests.\nChange-Id: Iabfdb0901990d163be5d780f3bdd2fab6fa17b32\n" }, { "commit": "83e4903f9f966b52d758b52ac1d522e13fd43e60", "tree": "966df75b9d69f43bb18ece89b1ef16db6c546e45", "parents": [ "dadc075149eb322bf28ba35a75a70157147c1c30", "a62cb9bb6cb2278cb41ab0664191623e178c6a4f" ], "author": { "name": "Jeff Hao", "email": "jeffhao@google.com", "time": "Fri Jul 08 20:06:58 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jul 08 20:06:58 2016 +0000" }, "message": "Merge \"Revert \"Revert \"Optimize IMT\"\"\"" }, { "commit": "8c5d310b8ac3bdce41cdc680fcad791c321eaec2", "tree": "fb3e2055fb8afd580ab740e29d73b1eb3be6f8d8", "parents": [ "74c0d1bb67f9c6ee8306f0318ab7251d56dc99d6" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 07 12:07:44 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 07 14:01:26 2016 +0100" }, "message": "ARM: Remove unnecessary VMOV from float/double-to-int.\n\nTest: Run standard ART test suite on Nexus 5.\nChange-Id: I780fd0cca68f89401d2a114e1022bed498d02979\n" }, { "commit": "a62cb9bb6cb2278cb41ab0664191623e178c6a4f", "tree": "62263dac644e2d80a34a04f2649e4741a1bed6f4", "parents": [ "bb8d501c9bb882a8927c6ceda07bf9577e06c3e1" ], "author": { "name": "Artem Udovichenko", "email": "artem.u@samsung.com", "time": "Thu Jun 30 09:18:25 2016 +0000" }, "committer": { "name": "Artem Udovichenko", "email": "artem.u@samsung.com", "time": "Thu Jul 07 10:01:04 2016 +0000" }, "message": "Revert \"Revert \"Optimize IMT\"\"\n\nThis reverts commit 88f288e3564d79d87c0cd8bb831ec5a791ba4861.\n\nChange-Id: I49605d53692cbec1e2622e23ff2893fc51ed4115\n" }, { "commit": "88f288e3564d79d87c0cd8bb831ec5a791ba4861", "tree": "dd051a7b2985d1af3fea91ad6000de4bdc701a19", "parents": [ "e36389f20c83083c0aaba2dcac0888951e55cae1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 29 08:17:52 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 29 08:41:25 2016 +0000" }, "message": "Revert \"Optimize IMT\"\n\nBug: 29188168 (for initial CL)\nBug: 29778499 (reason for revert)\n\nThis reverts commit badee9820fcf5dca5f8c46c3215ae1779ee7736e.\n\nChange-Id: I32b8463122c3521e233c34ca95c96a5078e88848\n" }, { "commit": "e36389f20c83083c0aaba2dcac0888951e55cae1", "tree": "3fe74b637f8dc90e3cbc8ad3949f3f340236537f", "parents": [ "abf64415cf99a9a7ee048ae26c76f7bbe972a6b9", "d4ceecc85a5aab2ec23ea1bd010692ba8c8aaa0c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 29 08:40:14 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jun 29 08:40:14 2016 +0000" }, "message": "Merge \"Revert \"Refactor GetIMTIndex\"\"" }, { "commit": "d4ceecc85a5aab2ec23ea1bd010692ba8c8aaa0c", "tree": "982948a67a88a1f9a734c935f919f8d307969f48", "parents": [ "50706437d8216e41f0fea1e413cda7891324d397" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 29 08:39:47 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 29 08:39:47 2016 +0000" }, "message": "Revert \"Refactor GetIMTIndex\"\n\nI need to revert this to get https://android-review.googlesource.com/#/c/244190/ to cleanly revert. Matthew, do you mind rewriting it?\n\nThis reverts commit 50706437d8216e41f0fea1e413cda7891324d397.\n\nChange-Id: I5c1435f5dffb46dbb5b613b22adb88c7770304f2\n" }, { "commit": "31167a5785f7a5124de96535066db9890559f546", "tree": "3d0ddb1bb390389532b5fc94dd6f2f5c8d648582", "parents": [ "bad21cb538d76105712c967b62d1cf677777a956", "3d31242300c3525e5c85665d9e34acf87002db63" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jun 24 13:04:36 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 24 13:04:37 2016 +0000" }, "message": "Merge changes I4d8da7ce,I4da5be01,Idfbead82\n\n* changes:\n Re-enable most intrinsics with read barriers.\n Fix ARM \u0026 ARM64 UnsafeGetObject intrinsics with read barriers.\n Fix x86 \u0026 x86-64 UnsafeGetObject intrinsics with read barriers.\n" }, { "commit": "3d31242300c3525e5c85665d9e34acf87002db63", "tree": "c7f66d95fa3d65241a1c9f10381c1e0ec0989a4e", "parents": [ "bfea33585e229973f7887afbf51fe45c2ba41e91" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jun 23 13:53:42 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jun 23 14:05:17 2016 +0100" }, "message": "Re-enable most intrinsics with read barriers.\n\nAlso extend sun.misc.Unsafe test coverage to exercise\nsun.misc.Unsafe.{get,put}{Int,Long,Object}Volatile.\n\nBug: 26205973\nBug: 29516905\nChange-Id: I4d8da7cee5c8a310c8825c1631f71e5cb2b80b30\nTest: Covered by ART\u0027s run-tests.\n" }, { "commit": "bfea33585e229973f7887afbf51fe45c2ba41e91", "tree": "018aff4a08f760fc489e5784a2b71e90a29a9084", "parents": [ "0fcd2b84210db2bcf8b2d7a2b98a1a2bca367cac" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jun 23 13:48:47 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jun 23 14:05:17 2016 +0100" }, "message": "Fix ARM \u0026 ARM64 UnsafeGetObject intrinsics with read barriers.\n\nThe implementation was incorrectly interpreting the \u0027offset\u0027\ninput as an index in a (4-byte) object reference array,\nwhereas it is a (1-byte) offset to an object reference field\nwithin the \u0027base\u0027 (object) input.\n\nBug: 29516905\nChange-Id: I4da5be0193217965f25e5d141c242592dea6ffe8\nTest: Covered by test/004-UnsafeTest.\n" }, { "commit": "4692c35c151951aa1fa901ca24bfa302a9beeacf", "tree": "8d28d7714dd7fa0ae1ff44888ae61f3c8786bfeb", "parents": [ "f6d4f6e0e61977777b7a9ca18b75bcd26e98e9f9", "87f3fcbd0db352157fc59148e94647ef21b73bce" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jun 21 16:18:10 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jun 21 16:18:10 2016 +0000" }, "message": "Merge \"Replace String.charAt() with HIR.\"" }, { "commit": "87f3fcbd0db352157fc59148e94647ef21b73bce", "tree": "5bdeabb246f5de86704333b3fcbccc6e9146d246", "parents": [ "b94b5706f0b8e2e1c7e1db22274f9f4bae0c4b5a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Apr 28 15:52:11 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jun 21 15:17:38 2016 +0100" }, "message": "Replace String.charAt() with HIR.\n\nReplace String.charAt() with HArrayLength, HBoundsCheck and\nHArrayGet. This allows GVN on the HArrayLength and BCE on\nthe HBoundsCheck as well as using the infrastructure for\nHArrayGet, i.e. better handling of constant indexes than\nthe old intrinsic and using the HArm64IntermediateAddress.\n\nBug: 28330359\nChange-Id: I32bf1da7eeafe82537a60416abf6ac412baa80dc\n" }, { "commit": "dbb7f5bef10138ade0fb202da1d61f562b2df649", "tree": "f0aa4b390c534b215a6e000c865783cdd9852353", "parents": [ "b94b5706f0b8e2e1c7e1db22274f9f4bae0c4b5a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Mar 30 13:23:58 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jun 21 15:11:57 2016 +0100" }, "message": "Improve HLoadClass code generation.\n\nFor classes in the boot image, use either direct pointers\nor PC-relative addresses. For other classes, use PC-relative\naccess to the dex cache arrays for AOT and direct address of\nthe type\u0027s dex cache slot for JIT.\n\nFor aosp_flounder-userdebug:\n - 32-bit boot.oat: -252KiB (-0.3%)\n - 64-bit boot.oat: -412KiB (-0.4%)\n - 32-bit dalvik cache total: -392KiB (-0.4%)\n - 64-bit dalvik-cache total: -2312KiB (-1.0%)\n (contains more files than the 32-bit dalvik cache)\nFor aosp_flounder-userdebug forced to compile PIC:\n - 32-bit boot.oat: -124KiB (-0.2%)\n - 64-bit boot.oat: -420KiB (-0.5%)\n - 32-bit dalvik cache total: -136KiB (-0.1%)\n - 64-bit dalvik-cache total: -1136KiB (-0.5%)\n (contains more files than the 32-bit dalvik cache)\n\nBug: 27950288\nChange-Id: I4da991a4b7e53c63c92558b97923d18092acf139\n" }, { "commit": "50706437d8216e41f0fea1e413cda7891324d397", "tree": "23c7c5d1198b8cdde6261198626cfe443eab59ba", "parents": [ "badee9820fcf5dca5f8c46c3215ae1779ee7736e" ], "author": { "name": "Matthew Gharrity", "email": "gharrma@google.com", "time": "Tue Jun 14 11:31:04 2016 -0700" }, "committer": { "name": "Matthew Gharrity", "email": "gharrma@google.com", "time": "Wed Jun 15 09:08:35 2016 -0700" }, "message": "Refactor GetIMTIndex\n\nThis allows us to more easily maintain and experiment with\ninterface method table indexing and hashing.\n\nChange-Id: I719920fae7490dcedcda7c1c36db225c2b8b16df\n" }, { "commit": "badee9820fcf5dca5f8c46c3215ae1779ee7736e", "tree": "982948a67a88a1f9a734c935f919f8d307969f48", "parents": [ "614968198625a6693666bdc1e5609e2f663f5638" ], "author": { "name": "Nelli Kim", "email": "nelli.kim@samsung.com", "time": "Fri May 13 13:08:53 2016 +0300" }, "committer": { "name": "Matthew Gharrity", "email": "gharrma@google.com", "time": "Tue Jun 14 10:05:47 2016 -0700" }, "message": "Optimize IMT\n\n* Remove IMT for classes which do not implement interfaces\n* Remove IMT for array classes\n* Share same IMT\n\nSaved memory (measured on hammerhead):\nboot.art:\nTotal number of classes: 3854\nNumber of affected classes: 1637\nSaved memory: 409kB\n\nChrome (excluding classes in boot.art):\nTotal number of classes: 2409\nNumber of affected classes: 1259\nSaved memory: 314kB\n\nGoogle Maps (excluding classes in boot.art):\nTotal number of classes: 6988\nNumber of affected classes: 2574\nSaved memory: 643kB\n\nPerformance regression on benchmarks/InvokeInterface.java benchmark\n(measured timeCall10Interface)\n1st launch: 9.6%\n2nd launch: 6.8%\n\nChange-Id: If07e45390014a6ee8f3c1c4ca095b43046f0871f\n" }, { "commit": "372f10e5b0b34e2bb6e2b79aeba6c441e14afd1f", "tree": "1f29c2467c8909ef0e0147f37f176caa1bcd2ccc", "parents": [ "1b66fdf3f33c72dfdda4d31f6f17b6a0d8607402" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 17 16:30:10 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jun 02 19:04:20 2016 +0100" }, "message": "Refactor handling of input records.\n\nIntroduce HInstruction::GetInputRecords(), a new virtual\nfunction that returns an ArrayRef\u003c\u003e to all input records.\nImplement all other functions dealing with input records as\nwrappers around GetInputRecords(). Rewrite functions that\npreviously used multiple virtual calls to deal with input\nrecords, especially in loops, to prefetch the ArrayRef\u003c\u003e\nonly once for each instruction. Besides avoiding all the\nextra calls, this also allows the compiler (clang++) to\nperform additional optimizations.\n\nThis speeds up the Nexus 5 boot image compilation by ~0.5s\n(4% of \"Compile Dex File\", 2% of dex2oat time) on AOSP ToT.\n\nChange-Id: Id8ebe0fb9405e38d918972a11bd724146e4ca578\n" }, { "commit": "fba39972d99701c80bf3beb7451aca508d67593c", "tree": "0d80ecb6997290140503926b08a72e7418915526", "parents": [ "718d4e269810c17d03df909c84b2f7bbd4f61fb9" ], "author": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Wed May 11 11:26:48 2016 -0700" }, "committer": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Fri May 13 10:38:56 2016 -0700" }, "message": "Fix misc-macro-parentheses warnings.\n\n* Add parentheses to fix warnings.\n* Use NOLINT to suppress wrong clang-tidy warnings.\n\nBug: 28705665\nChange-Id: Icc8bc9b59583dee0ea17ab83e0ff0383b8599c3e\n" }, { "commit": "dce016eab87302f02b0bd903dd2cd86ae512df2d", "tree": "3af3c0e6b9d845e611b560484882e6b438ef439a", "parents": [ "a246510965fc57ec51d1b202649304535adfe9f3" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Apr 28 13:10:02 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon May 09 20:40:32 2016 +0100" }, "message": "Intrinsify String.length() and String.isEmpty() as HIR.\n\nUse HArrayLength for String.length() in anticipation of\nchanging the String.charAt() to HBoundsCheck+HArrayGet to\nallow the existing BCE to seamlessly work for strings.\nUse HArrayLength+HEqual for String.isEmpty().\n\nWe previously relied on inlining but we now want to apply\nthe new intrinsics even when we do not inline, i.e. when\ncompiling debuggable (as is currently the case for boot\nimage) or when we hit inlining limits, i.e. depth, size,\nor the number of accumulated dex registers.\n\nBug: 28330359\nChange-Id: Iab9d2f6d2967bdd930a72eb461f27efe8f37c103\n" }, { "commit": "ffc87076dda9878cb2cc098149bae441d38b9268", "tree": "e587208d6a8e62532792add3e1ace6b4e6d73e0f", "parents": [ "97cbc9206e9adc473a90650ebdb5d620f517ff04" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Apr 20 14:22:09 2016 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Apr 28 16:15:04 2016 +0100" }, "message": "Split profile recording from jit compilation\n\nWe still use ProfileInfo objects to record profile information. That\ngives us the flexibility to add the inline caches in the future and the\nconvenience of the already implemented GC.\n\nIf UseJIT is false and SaveProfilingInfo true, we will only record the\nProfileInfo and never launch compilation tasks.\n\nBug: 27916886\n\n(cherry picked from commit e5de54cfab5f14ba0b8ff25d8d60901c7021943f)\n\nChange-Id: I68afc181d71447895fb12346c1806e99bcab1de2\n" }, { "commit": "93205e395f777c1dd81d3f164cf9a4aec4bde45f", "tree": "1d08efd9b7bca9fe23df9ae9489c5dd575d3c6df", "parents": [ "6990775e323cd9164d6cc10955a047b9d9f15f32" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 13 11:59:46 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 13 17:50:16 2016 +0100" }, "message": "Move Assemblers to the Arena.\n\nAnd clean up some APIs to return std::unique_ptr\u003c\u003e instead\nof raw pointers that don\u0027t communicate ownership.\n\nChange-Id: I3017302307a0253d661240750298802fb0d9585e\n" }, { "commit": "dee58d6bb6d567fcd0c4f39d8d690c3acaf0e432", "tree": "5a2f20546ca3c1544c44bee560062580e22dc79c", "parents": [ "391e155a6936a05bd39b171031ec21d2dee62133" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Apr 07 09:54:26 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Apr 07 16:03:16 2016 +0000" }, "message": "Revert \"Revert \"Refactor HGraphBuilder and SsaBuilder to remove HLocals\"\"\n\nThis patch merges the instruction-building phases from HGraphBuilder\nand SsaBuilder into a single HInstructionBuilder class. As a result,\nit is not necessary to generate HLocal, HLoadLocal and HStoreLocal\ninstructions any more, as the builder produces SSA form directly.\n\nSaves 5-15% of arena-allocated memory (see bug for more data):\n GMS 20.46MB \u003d\u003e 19.26MB (-5.86%)\n Maps 24.12MB \u003d\u003e 21.47MB (-10.98%)\n YouTube 28.60MB \u003d\u003e 26.01MB (-9.05%)\n\nThis CL fixed an issue with parsing quickened instructions.\n\nBug: 27894376\nBug: 27998571\nBug: 27995065\n\nChange-Id: I20dbe1bf2d0fe296377478db98cb86cba695e694\n" }, { "commit": "40ecb12f8eeb97b810e11f895278abbf7988ed4d", "tree": "54d999605c0eaf3b4d311f83f8162684506f4a31", "parents": [ "5827507da8efdaf4536c70dfdc54407c28e37852" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 06 17:33:41 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 06 17:33:41 2016 +0100" }, "message": "Optimizing: Fix codegens for MethodLoadKind::kDexCacheViaMethod.\n\nUse the original method index instead of the target method\nindex because the target method may point to a different dex\nfile.\n\nNo regression test: this currently happens only if the\ncodegen uses the kDexCacheViaMethod as a fallback for\nanother load kind and we aim to avoid that fallback, so it\nwould be difficult to write a reliable regression test. We\ncould try and exploit current fallbacks for irreducible\nloops on x86 and arm but those fallbacks will eventually\ndisappear anyway.\n\nBug: 28036230\nChange-Id: I4cc9e046480d3d60a7fb521f0ca6a98914625cdc\n" }, { "commit": "60328910cad396589474f8513391ba733d19390b", "tree": "01702f6df5c39925b354a3152dd04289e7d97062", "parents": [ "e3ff7b293be2a6791fe9d135d660c0cffe4bd73f" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Apr 04 17:47:42 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Apr 04 17:47:42 2016 +0000" }, "message": "Revert \"Refactor HGraphBuilder and SsaBuilder to remove HLocals\"\n\nBug: 27995065\nThis reverts commit e3ff7b293be2a6791fe9d135d660c0cffe4bd73f.\n\nChange-Id: I5363c7ce18f47fd422c15eed5423a345a57249d8\n" }, { "commit": "e3ff7b293be2a6791fe9d135d660c0cffe4bd73f", "tree": "d578d27cb78e6d2caef683cd8ac94c9a9752b192", "parents": [ "86ea7eeabe30c98bbe1651a51d03cb89776724e7" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Mar 02 16:48:20 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Apr 04 11:21:30 2016 +0100" }, "message": "Refactor HGraphBuilder and SsaBuilder to remove HLocals\n\nThis patch merges the instruction-building phases from HGraphBuilder\nand SsaBuilder into a single HInstructionBuilder class. As a result,\nit is not necessary to generate HLocal, HLoadLocal and HStoreLocal\ninstructions any more, as the builder produces SSA form directly.\n\nSaves 5-15% of arena-allocated memory (see bug for more data):\n GMS 20.46MB \u003d\u003e 19.26MB (-5.86%)\n Maps 24.12MB \u003d\u003e 21.47MB (-10.98%)\n YouTube 28.60MB \u003d\u003e 26.01MB (-9.05%)\n\nBug: 27894376\nChange-Id: Iefe28d40600c169c5d306fd2c77034ae19476d90\n" }, { "commit": "cac5a7e871f1f346b317894359ad06fa7bd67fba", "tree": "2df7d4892216a7c976dfe848c9893cb5eb8fa6a5", "parents": [ "6f51d7756a9c66007fe7666b19399e1f60ff6092" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Feb 22 10:39:50 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Mar 29 19:27:40 2016 +0100" }, "message": "Optimizing: Improve const-string code generation.\n\nFor strings in the boot image, use either direct pointers\nor pc-relative addresses. For other strings, use PC-relative\naccess to the dex cache arrays for AOT and direct address of\nthe string\u0027s dex cache slot for JIT.\n\nFor aosp_flounder-userdebug:\n - 32-bit boot.oat: -692KiB (-0.9%)\n - 64-bit boot.oat: -948KiB (-1.1%)\n - 32-bit dalvik cache total: -900KiB (-0.9%)\n - 64-bit dalvik cache total: -3672KiB (-1.5%)\n (contains more files than the 32-bit dalvik cache)\nFor aosp_flounder-userdebug forced to compile PIC:\n - 32-bit boot.oat: -380KiB (-0.5%)\n - 64-bit boot.oat: -928KiB (-1.0%)\n - 32-bit dalvik cache total: -468KiB (-0.4%)\n - 64-bit dalvik cache total: -1928KiB (-0.8%)\n (contains more files than the 32-bit dalvik cache)\n\nBug: 26884697\nChange-Id: Iec7266ce67e6fedc107be78fab2e742a8dab2696\n" }, { "commit": "0ced281ae6216c29f57ca0f8b7388a722e8da97b", "tree": "b7f8273bb117c8ec8f8546ed937a8c0a96d2e5de", "parents": [ "843a65556616183a36792bbcc1632c6d8d0e78b2", "1a65388f1d86bb232c2e44fecb44cebe13105d2e" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Mar 24 10:25:51 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Mar 24 10:25:51 2016 +0000" }, "message": "Merge \"Clean up art::HConstant predicates.\"" }, { "commit": "5b5b9319ff970979ed47d41a41283e4faeffb602", "tree": "e7795abf120cf512627786fd6302efd34535724b", "parents": [ "0c25da0276f5b6f6119793ae9d45d1bca8172c2b" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Mar 22 14:57:31 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Mar 22 14:57:31 2016 +0000" }, "message": "Fix and improve shift and rotate operations.\n\n- Define maximum int and long shift \u0026 rotate distances as\n int32_t constants, as shift \u0026 rotate distances are 32-bit\n integer values.\n- Consider the (long, long) inputs case as invalid for\n static evaluation of shift \u0026 rotate rotations.\n- Add more checks in shift \u0026 rotate operations constructors\n as well as in art::GraphChecker.\n\nChange-Id: I754b326c3a341c9cc567d1720b327dad6fcbf9d6\n" }, { "commit": "1a65388f1d86bb232c2e44fecb44cebe13105d2e", "tree": "515e3000b3ad6d195101f20f33f3c9498e536593", "parents": [ "f808e8a0cc218c2b98023ef0e91f3c5b74ad2962" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 18 18:05:57 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 18 18:05:57 2016 +0000" }, "message": "Clean up art::HConstant predicates.\n\n- Make the difference between arithmetic zero and zero-bit\n pattern non ambiguous.\n- Introduce Boolean predicates in art::HIntConstant for when\n they are used as Booleans.\n- Introduce aritmetic positive and negative zero predicates\n for floating-point constants.\n\nBug: 27639313\nChange-Id: Ia04ecc6f6aa7450136028c5362ed429760c883bd\n" }, { "commit": "38ceb62339514a8012695673b9e1110d13546f02", "tree": "9505047a0de423a270bd40cd13308f3fe5ce8557", "parents": [ "b1aff6c7f248632028b6a62a17f02675007c9ce3", "22c4922c6b31e154a6814c4abe9015d9ba156911" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 18 16:16:41 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Mar 18 16:16:41 2016 +0000" }, "message": "Merge \"Ensure art::HRor support boolean, byte, short and char inputs.\"" }, { "commit": "22c4922c6b31e154a6814c4abe9015d9ba156911", "tree": "8e871f67e327322d24d0c2e4588b165005414077", "parents": [ "0205b58a0d7a9ce5832393857c19c086c78996e9" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 18 14:04:28 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 18 14:04:28 2016 +0000" }, "message": "Ensure art::HRor support boolean, byte, short and char inputs.\n\nAlso extend tests covering the IntegerRotateLeft,\nLongRotateLeft, IntegerRotateRight and LongRotateRight\nintrinsics and their translation into an art::HRor\ninstruction.\n\nBug: 27682579\nChange-Id: I89f6ea6a7315659a172482bf09875cfb7e7422a1\n" }, { "commit": "e943c3b831dc0da4a6b09e940ae25c3285850e96", "tree": "b4756bbc16f49d50087a881b40722657451e6eac", "parents": [ "7c06aef061fa176331b77a88c1ff2c6ae401a5f0", "d28f4a00933a4a3b8d5e9db73b8532924d0f989d" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Mar 18 12:37:03 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Mar 18 12:37:03 2016 +0000" }, "message": "Merge \"Generate native debug stackmaps before calls as well.\"" }, { "commit": "d28f4a00933a4a3b8d5e9db73b8532924d0f989d", "tree": "1205844a68ee9e2c502f8ecbfd2d5cf96acd4190", "parents": [ "fbc61e19578d281d05728bcd120e1ace57c2fbd8" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Mar 14 17:14:24 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Mar 17 16:58:55 2016 +0000" }, "message": "Generate native debug stackmaps before calls as well.\n\nThe debugger looks up PC of the call instruction, so the runtime\u0027s\nstackmap is not sufficient since it is at PC after the instruction.\n\nChange-Id: I0dd06c0b52e8079ea5d064ea10beb12c93584092\n" }, { "commit": "a5c4a4060edd03eda017abebc85f24cffb083ba7", "tree": "85f69512d33c19d82e172a490a241f3a17d66560", "parents": [ "713c519db15aaa8d6f33b744fd28adddb97a07c2" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Mar 15 15:02:50 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Mar 16 16:49:36 2016 +0000" }, "message": "Make art::HCompare support boolean, byte, short and char inputs.\n\nAlso extend tests covering the IntegerSignum, LongSignum,\nIntegerCompare and LongCompare intrinsics and their\ntranslation into an art::HCompare instruction.\n\nBug: 27629913\nChange-Id: I0afc75ee6e82602b01ec348bbb36a08e8abb8bb8\n" }, { "commit": "914d71ead70bb6f2084b2ed39a9fd58fd014f67d", "tree": "50f30d6e47d18aa6c3ccec9f05727b4898268b20", "parents": [ "1583e624d4c970d8e571b265b9a8f08402d91f82", "2ae48182573da7087bffc2873730bc758ec29696" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Mar 16 14:40:08 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Mar 16 14:40:08 2016 +0000" }, "message": "Merge \"Clean up NullCheck generation and record stats about it.\"" }, { "commit": "2ae48182573da7087bffc2873730bc758ec29696", "tree": "d6955329ad876aefd477f7ef8905b070b9ab95dd", "parents": [ "6915898b28cea6c9836ca1be6814d87e89cc6d76" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Mar 16 14:05:09 2016 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Mar 16 14:10:27 2016 +0000" }, "message": "Clean up NullCheck generation and record stats about it.\n\nThis removes redundant code from the generators and allows for easier\nstat recording.\n\nChange-Id: Iccd4368f9e9d87a6fecb863dee4e2145c97851c4\n" }, { "commit": "e5671618d19489ad0781ec0d204c7765317170cf", "tree": "317d451ebf639f89e91d4c1e482d950579da0a0f", "parents": [ "d35f4a2eacf9ee9c9d75bb0c00eec7ae31ad1949" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Mar 16 11:03:54 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Mar 16 11:14:20 2016 +0000" }, "message": "Accept boolean as an input of HDivZeroCheck.\n\nAll our arithmetic operations accept it.\n\nbug:27624718\nChange-Id: I1f6bb95dc77ecb3fb2fcabb35a93b31c524bfa0a\n" }, { "commit": "7fc6350f6f1ab04b52b9cd7542e0790528296cbe", "tree": "26a33ef7bb2e49a9b7c7d9436194a92cb447b317", "parents": [ "b7f257f353b1eb2db2732939a0404c118316891d" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Tue Feb 09 17:15:29 2016 +0000" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Fri Mar 11 12:49:27 2016 +0000" }, "message": "Integrate BitwiseNegated into shared framework.\n\nShare implementation between arm and arm64.\n\nChange-Id: I0dd12e772cb23b4c181fd0b1e2a447470b1d8702\n" }, { "commit": "a1de9188a05afdecca8cd04ecc4fefbac8b9880f", "tree": "a671c8aef814ccf194e5c3950a551f2711516c53", "parents": [ "950d063395c7cecbbe372fd607468018d661a35c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Feb 25 11:37:38 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Feb 26 16:01:59 2016 +0000" }, "message": "Optimizing: Reduce memory usage of HInstructions.\n\nPack narrow fields and flags into a single 32-bit field.\n\nChange-Id: Ib2f7abf987caee0339018d21f0d498f8db63542d\n" }, { "commit": "4a0dad67867f389e01a5a6c0fe381d210f687c0d", "tree": "91f1e70f4a2d0bd32aa7eb51e546f5330d72f772", "parents": [ "d15ede2df7d157ea5480614fd18c2bf0d37a6c2a" ], "author": { "name": "Artem Udovichenko", "email": "artem.u@samsung.com", "time": "Tue Jan 26 12:28:31 2016 +0300" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Feb 25 10:14:30 2016 +0000" }, "message": "Revert \"Revert \"ARM/ARM64: Extend support of instruction combining.\"\"\n\nThis reverts commit 6b5afdd144d2bb3bf994240797834b5666b2cf98.\n\nChange-Id: Ic27a10f02e21109503edd64e6d73d1bb0c6a8ac6\n" } ], "next": "9cd6d378bd573cdc14d049d32bdd22a97fa4d84a" }