)]}'
{
  "log": [
    {
      "commit": "45b83aff85a8a8dfcae0da90d010fa2d7eb299a7",
      "tree": "ab9859f385b166831204d002878677d3cd30a031",
      "parents": [
        "f7aa6c05a1c7d70182d43abaf3ff43b6d463eec0"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jul 06 15:12:53 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jul 06 16:20:59 2015 +0100"
      },
      "message": "Revert \"Revert \"Fix LSRA bug with explicit register temporaries\"\"\n\nThis reverts commit a5fc140ff315dda9bc0a8e59963ed547676cd941.\n\nChange-Id: Ic322484176e55d0c7cd7250d629b9e5046006a4f\n"
    },
    {
      "commit": "a5fc140ff315dda9bc0a8e59963ed547676cd941",
      "tree": "fd82c469e06a21bd1274dccc2d98f0613e45c51f",
      "parents": [
        "283b8541546e7673d33d104241623d07c91cf500"
      ],
      "author": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Mon Jul 06 15:09:54 2015 +0000"
      },
      "committer": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Mon Jul 06 15:09:54 2015 +0000"
      },
      "message": "Revert \"Fix LSRA bug with explicit register temporaries\"\n\nregister_allocator_test32 fails.\n\nThis reverts commit 283b8541546e7673d33d104241623d07c91cf500.\n\nChange-Id: I2a46f3c68de3e8273e402102065c13797045c481\n"
    },
    {
      "commit": "283b8541546e7673d33d104241623d07c91cf500",
      "tree": "ef57722d3b0ea62c079b014c6ca3636fb4e5d54d",
      "parents": [
        "51f38e3adf58ba4e35b5374fb8c4b87cb3112abd"
      ],
      "author": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Fri Jul 03 08:26:41 2015 -0400"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jul 06 14:50:50 2015 +0100"
      },
      "message": "Fix LSRA bug with explicit register temporaries\n\nA temporary with an explicit RegisterLocation, such as ESI on x86 didn\u0027t\nhave the register marked as allocated.  This caused it to not be\nsaved/restored in the prologue/epilogue, causing problems in the caller\nroutine, which expected it to be saved.  Found while implementing\nhttps://android-review.googlesource.com/#/c/157522/.\n\nChange-Id: I22ca2b24c2d21b1c6ab6cfb7dec26cb38034a891\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n"
    },
    {
      "commit": "eb7b7399dbdb5e471b8ae00a567bf4f19edd3907",
      "tree": "a0a488040883c14cc6cbec3186654137459d44ff",
      "parents": [
        "8ec0e20347e13592539a8c0786b1db1735149800"
      ],
      "author": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@linaro.org",
        "time": "Fri Jun 19 14:47:01 2015 +0100"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Jun 22 11:57:36 2015 +0100"
      },
      "message": "Opt compiler: Add disassembly to the \u0027.cfg\u0027 output.\n\nThis is automatically added to the \u0027.cfg\u0027 output when using the usual\n`--dump-cfg` option.\n\nChange-Id: I864bfc3a8299c042e72e451cc7730ad8271e4deb\n"
    },
    {
      "commit": "9931f319cf86c56c2855d800339a3410697633a6",
      "tree": "94e98f4a670d9bded4ed3fbc194c31e4c733d198",
      "parents": [
        "edb83c606e034d76bed1331f34cdc435df47bb95"
      ],
      "author": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@linaro.org",
        "time": "Fri Jun 19 14:47:01 2015 +0100"
      },
      "committer": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@linaro.org",
        "time": "Fri Jun 19 14:47:01 2015 +0100"
      },
      "message": "Opt compiler: Add a description to slow paths.\n\nChange-Id: I22160d90de3fe0ab3e6a2acc440bda8daa00e0f0\n"
    },
    {
      "commit": "cf93a5cd9c978f59113d42f9f642fab5e2cc8877",
      "tree": "55162627fcbf2cb7913a735c7ed89e8e4b5e84d7",
      "parents": [
        "db40ea768bd914125c3754dacb9b6f534a2e2399"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Jun 16 11:33:24 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Jun 17 09:43:51 2015 +0100"
      },
      "message": "Revert \"Revert \"ART: Implement literal pool for arm, fix branch fixup.\"\"\n\nThis reverts commit fbeb4aede0ddc5b1e6a5a3a40cc6266fe8518c98.\n\nAdjust block label positions. Bad catch block labels were the\nreason for the revert.\n\nChange-Id: Ia6950d639d46b9da6b07f3ade63ab46d03d63310\n"
    },
    {
      "commit": "fbeb4aede0ddc5b1e6a5a3a40cc6266fe8518c98",
      "tree": "76ab28cf259def4dccec529df217fd760f27d2aa",
      "parents": [
        "f38caa68cce551fb153dff37d01db518e58ed00f"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Jun 16 11:32:01 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Jun 16 11:32:01 2015 +0000"
      },
      "message": "Revert \"ART: Implement literal pool for arm, fix branch fixup.\"\n\nThis reverts commit f38caa68cce551fb153dff37d01db518e58ed00f.\n\nChange-Id: Id88b82cc949d288cfcdb3c401b96f884b777fc40\nReason: broke the tests.\n"
    },
    {
      "commit": "f38caa68cce551fb153dff37d01db518e58ed00f",
      "tree": "723612f20666f429b7c67321f0353d57425b1c63",
      "parents": [
        "bd8c725e465cc7f44062745a6f2b73248f5159ed"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri May 29 15:50:18 2015 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Jun 15 15:13:28 2015 +0100"
      },
      "message": "ART: Implement literal pool for arm, fix branch fixup.\n\nChange-Id: Iecc91418bb4ee1c957f42fefb737d0ee2ba960e7\n"
    },
    {
      "commit": "bd8c725e465cc7f44062745a6f2b73248f5159ed",
      "tree": "76ab28cf259def4dccec529df217fd760f27d2aa",
      "parents": [
        "6a1c92f1e4a455d802ab0d0ac47504cdd7c12f0f"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Jun 12 10:06:32 2015 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Jun 12 10:28:34 2015 +0100"
      },
      "message": "Optimizing: Remove PcInfo, use the StackMapStream instead.\n\nChange-Id: I474f3a89f6c7ee5c7accd21791b1c1e311104158\n"
    },
    {
      "commit": "fd88f16100cceafbfde1b4f095f17e89444d6fa8",
      "tree": "fdb6d0520ca419acef9e953e74dcbd7d908bc4dd",
      "parents": [
        "1aebdae18678403bdac078cbbe1f7dd4243c44f3"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jun 03 11:23:52 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jun 03 11:23:52 2015 +0100"
      },
      "message": "Factorize code for common LocationSummary of HInvoke.\n\nThis is one step forward, we could factorize more, but\nI wanted to get this out of the way first.\n\nChange-Id: I6ae411a737eebaecb64974f47af507ce0cfbae85\n"
    },
    {
      "commit": "e401d146407d61eeb99f8d6176b2ac13c4df1e33",
      "tree": "17927f9bfe7d2041b5942c89832d55f9dedb24c5",
      "parents": [
        "2006b7b9b8e32722bd0d640c62549d8a0ac624b6"
      ],
      "author": {
        "name": "Mathieu Chartier",
        "email": "mathieuc@google.com",
        "time": "Wed Apr 22 13:56:20 2015 -0700"
      },
      "committer": {
        "name": "Mathieu Chartier",
        "email": "mathieuc@google.com",
        "time": "Fri May 29 18:45:49 2015 -0700"
      },
      "message": "Move mirror::ArtMethod to native\n\nOptimizing + quick tests are passing, devices boot.\n\nTODO: Test and fix bugs in mips64.\n\nSaves 16 bytes per most ArtMethod, 7.5MB reduction in system PSS.\nSome of the savings are from removal of virtual methods and direct\nmethods object arrays.\n\nBug: 19264997\nChange-Id: I622469a0cfa0e7082a2119f3d6a9491eb61e3f3d\n"
    },
    {
      "commit": "2f9d1379fdebcdeeac52eaeff25ad5697c6b6ffb",
      "tree": "6fe7dd64fc17928540cac48162c4b6471fc2ab6a",
      "parents": [
        "5969307a254fb731a464119506b2cef9404871b9",
        "da40309f61f98c16d7d58e4c34cc0f5eef626f93"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon May 18 15:25:39 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon May 18 15:25:40 2015 +0000"
      },
      "message": "Merge \"Opt compiler: ARM64: Use ldp/stp on arm64 for slow paths.\""
    },
    {
      "commit": "17f1bc531ea2f8c1a6fac3def13dee1b901949dd",
      "tree": "52c00a20bd620cce4df94d297cb001dd7e7e62ce",
      "parents": [
        "9ee371e2324d979ff7d11ac58b8201f29888c682",
        "b1d0f3f7e92fdcc92fe2d4c48cbb1262c005583f"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon May 18 13:00:29 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon May 18 13:00:29 2015 +0000"
      },
      "message": "Merge \"Support InlineInfo in StackMap.\""
    },
    {
      "commit": "b1d0f3f7e92fdcc92fe2d4c48cbb1262c005583f",
      "tree": "0e3ce752f82ff5d7f10d37d46bda058ca54d7e40",
      "parents": [
        "119b21a6dfdb09d983a9e56a837fbf5c98e57096"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu May 14 12:41:51 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon May 18 13:00:29 2015 +0100"
      },
      "message": "Support InlineInfo in StackMap.\n\nChange-Id: I9956091775cedc609fdae7dec1433fcb8858a477\n"
    },
    {
      "commit": "e82549b14c7def0a45461183964f7e6a34cbb70c",
      "tree": "9293e5bf58657883923fe08ff1964e92e81e8851",
      "parents": [
        "c3912c8a2db109a15603554fd456f56cd0a69ad0"
      ],
      "author": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Wed May 06 10:55:34 2015 -0400"
      },
      "committer": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Wed May 13 16:20:48 2015 -0400"
      },
      "message": "[optimizing] Fold HTypeConversion of constants\n\nWhile looking into optimizing long shifts on x86, I found that the\ncompiler wasn\u0027t folding HTypeConversion of constants.  Add simple\nconversions of constants, taking care of float/double values\nwith NaNs and small/large values, ensuring Java conversion semantics.\n\nAdd checker cases to see that constant folding of HTypeConversion is\ndone.\n\nEnsure 422-type-conversion type conversion routiness don\u0027t get\ninlined to avoid compile time folding.\n\nChange-Id: I5a4eb376b64bc4e41bf908af5875bed312efb228\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n"
    },
    {
      "commit": "ec525fc30848189051b888da53ba051bc0878b78",
      "tree": "b2cf56e0279a584344fc07eb019da14bba2b9a6f",
      "parents": [
        "b6829c2ee05124d64a19c7a52ada4a23f624fb91"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Apr 28 15:50:20 2015 +0100"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Apr 29 15:31:13 2015 +0100"
      },
      "message": "Factor MoveArguments methods in Optimizing\u0027s intrinsics handlers.\n\nAlso add a precondition similar to the one present in code\ngenerators, regarding static invoke related explicit clinit\ncheck elimination in non-baseline compilations.\n\nChange-Id: I26f4dcb5d02824d7556f90b4b0c85b08b737fa53\n"
    },
    {
      "commit": "2d27c8e338af7262dbd4aaa66127bb8fa1758b86",
      "tree": "e01e0bc57359df0bdf00c3da694c5403fb7fc9e6",
      "parents": [
        "3adfc4bbe6c42d574bd2069d8e38a13d5ad98ccf"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Apr 28 15:48:45 2015 +0100"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Apr 29 14:09:17 2015 +0100"
      },
      "message": "Refactor InvokeDexCallingConventionVisitor in Optimizing.\n\nChange-Id: I7ede0f59d5109644887bf5d39201d4e1bf043f34\n"
    },
    {
      "commit": "3e3d73349a2de81d14e2279f60ffbd9ab3f3ac28",
      "tree": "69ad3378263c9a4b967cb7e27de0027264c12eb6",
      "parents": [
        "a0ee862288b702468f8c2b6d0ad0f1c61be0b483"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Apr 28 11:00:54 2015 +0100"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Apr 28 11:00:54 2015 +0100"
      },
      "message": "Have HInvoke instructions know their number of actual arguments.\n\nAdd an art::HInvoke::GetNumberOfArguments routine so that\nart::HInvoke and its subclasses can return the number of\nactual arguments of the called method.  Use it in code\ngenerators and intrinsics handlers.\n\nConsequently, no longer remove a clinit check as last input\nof a static invoke if it is still present during baseline\ncode generation, but ensure that static invokes have no such\ncheck as last input in optimized compilations.\n\nChange-Id: Iaf9e07d1057a3b15b83d9638538c02b70211e476\n"
    },
    {
      "commit": "da40309f61f98c16d7d58e4c34cc0f5eef626f93",
      "tree": "7525c544dc9acae0e1041757149be2eabb733dc8",
      "parents": [
        "021190bf584662e75b269ef47cd48e2044e34fe4"
      ],
      "author": {
        "name": "Zheng Xu",
        "email": "zheng.xu@arm.com",
        "time": "Fri Apr 24 17:35:39 2015 +0800"
      },
      "committer": {
        "name": "Zheng Xu",
        "email": "zheng.xu@arm.com",
        "time": "Fri Apr 24 17:38:13 2015 +0800"
      },
      "message": "Opt compiler: ARM64: Use ldp/stp on arm64 for slow paths.\n\nIt should be a bit faster than load/store single registers and reduce\nthe code size.\n\nChange-Id: I67b8302adf6174b7bb728f7c2afd2c237e34ffde\n"
    },
    {
      "commit": "9021825d1e73998b99c81e89c73796f6f2845471",
      "tree": "13e1038931cbb8bf8b8d0f4e3f51553ba1bfa983",
      "parents": [
        "858d28ca2e73a785977f53141e775a7d4841b89d"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Apr 15 11:56:51 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Apr 15 12:53:42 2015 +0100"
      },
      "message": "Type MoveOperands.\n\nThe ParallelMoveResolver implementation needs to know if a move\nis for 64bits or not, to handle swaps correctly.\n\nBug found, and test case courtesy of Serguei I. Katkov.\n\nChange-Id: I9a0917a1cfed398c07e57ad6251aea8c9b0b8506\n"
    },
    {
      "commit": "c6b4dd8980350aaf250f0185f73e9c42ec17cd57",
      "tree": "ef8d73e37abc04aecb430072a8bc463c73398fee",
      "parents": [
        "dd97393aca1a3ff2abec4dc4f78d7724300971bc"
      ],
      "author": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Tue Apr 07 20:32:43 2015 +0100"
      },
      "committer": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Thu Apr 09 16:47:50 2015 +0100"
      },
      "message": "Implement CFI for Optimizing.\n\nCFI is necessary for stack unwinding in gdb, lldb, and libunwind.\n\nChange-Id: I1a3480e3a4a99f48bf7e6e63c4e83a80cfee40a2\n"
    },
    {
      "commit": "da4d79bc9a4aeb9da7c6259ce4c9c1c3bf545eb8",
      "tree": "151dd61c4b6a8fd512ea4c2c862af28b02f4ed9c",
      "parents": [
        "af87659f462ac650009fce295097cae3dabce171"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Mar 24 14:36:11 2015 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Mar 24 16:02:21 2015 +0000"
      },
      "message": "Unify ART\u0027s various implementations of bit_cast.\n\nART had several implementations of art::bit_cast:\n\n1. one in runtime/base/casts.h, declared as:\n\n   template \u003cclass Dest, class Source\u003e\n   inline Dest bit_cast(const Source\u0026 source);\n\n2. another one in runtime/utils.h, declared as:\n\n   template\u003ctypename U, typename V\u003e\n   static inline V bit_cast(U in);\n\n3. and a third local version, in runtime/memory_region.h,\n   similar to the previous one:\n\n   template\u003ctypename Source, typename Destination\u003e\n   static Destination MemoryRegion::local_bit_cast(Source in);\n\nThis CL removes versions 2. and 3. and changes their callers\nto use 1. instead.  That version was chosen over the others\nas:\n- it was the oldest one in the code base; and\n- its syntax was closer to the standard C++ cast operators,\n  as it supports the following use:\n\n    bit_cast\u003cDestination\u003e(source)\n\n  since `Source\u0027 can be deduced from `source\u0027.\n\nChange-Id: I7334fd5d55bf0b8a0c52cb33cfbae6894ff83633\n"
    },
    {
      "commit": "522e2241f5b5f331d0aa2f8508f4c97973f7f012",
      "tree": "7b438281eb239aee475b1d7d4c87c13621626055",
      "parents": [
        "94e480778b0946d1ab405ecf901e5d41ed54cc17"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Tue Mar 17 18:48:28 2015 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Tue Mar 17 18:57:24 2015 +0000"
      },
      "message": "ART: Fix condition for StoreNeedsWriteBarrier\n\nCodegen\u0027s StoreNeedsWriteBarrier assumed nulls are represented as\ninteger constants and generated a barrier when not needed. This patch\nfixes the bug.\n\nChange-Id: I79247f1009b1fe6f24dba0d57e846ecc55806d4d\n"
    },
    {
      "commit": "eeefa1276e83776f08704a3db4237423b0627e20",
      "tree": "d7c647ca77703f3712f567704f40b00d59a125de",
      "parents": [
        "02c0bac34c246c1bd974dbb86d292d4b52ba98e4"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Mar 13 18:52:59 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Mar 16 10:48:21 2015 +0000"
      },
      "message": "Update locations of registers after slow paths spilling.\n\nChange-Id: Id9aafcc13c1a085c17ce65d704c67b73f9de695d\n"
    },
    {
      "commit": "02c0bac34c246c1bd974dbb86d292d4b52ba98e4",
      "tree": "83774758f02a48a0b59e042d2c6f4a4a7edf60a2",
      "parents": [
        "ccac273186a7f624ee20d1a3e19ea34bb3fd305f",
        "fead4e4f397455aa31905b2982d4d861126ab89d"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Mar 13 18:46:44 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Fri Mar 13 18:46:44 2015 +0000"
      },
      "message": "Merge \"[optimizing] Don\u0027t record None locations in the stack maps.\""
    },
    {
      "commit": "fead4e4f397455aa31905b2982d4d861126ab89d",
      "tree": "21e4ccd99472bbf5cf1fac3bc20d0bca6f176022",
      "parents": [
        "cc22e3946baf035c8732e9417ab132bfe663aa45"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Mar 13 14:39:40 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Mar 13 18:28:19 2015 +0000"
      },
      "message": "[optimizing] Don\u0027t record None locations in the stack maps.\n\n- moved environment recording from code generator to stack map stream\n- added creation/loading factory methods for the DexRegisterMap (hides\ninternal details)\n- added new tests\n\nChange-Id: Ic8b6d044f0d8255c6759c19a41df332ef37876fe\n"
    },
    {
      "commit": "a8ac9130b872c080299afacf5dcaab513d13ea87",
      "tree": "2bd0a2a88cbb6e7a3ae79dff84c466bed9189eb5",
      "parents": [
        "cc22e3946baf035c8732e9417ab132bfe663aa45"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Mar 13 16:36:36 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Mar 13 16:47:44 2015 +0000"
      },
      "message": "Refactor code in preparation of correct stack maps in slow path.\n\nMove the logic of saving/restoring live registers in slow path\nin the SlowPathCode method. Also add a RecordPcInfo helper to\nSlowPathCode, that will act as the placeholder of saving correct\nstack maps.\n\nChange-Id: I25c2bc7a642ef854bbc8a3eb570e5c8c8d2d030c\n"
    },
    {
      "commit": "234d69d075d1608f80adb647f7935077b62b6376",
      "tree": "f6b68ff38722dc91bd0de2387609ee0ce950e0ce",
      "parents": [
        "31df246d330c45f5691e226d176d0c59450f8435"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Mar 09 10:28:50 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Mar 11 14:23:38 2015 +0000"
      },
      "message": "Revert \"Revert \"[optimizing] Enable x86 long support.\"\"\n\nThis reverts commit 154552e666347d41d95d7619c6ee56249ff4feca.\n\nChange-Id: Idc726551c249a888b7ff5fde8508ae50e81b2e13\n"
    },
    {
      "commit": "154552e666347d41d95d7619c6ee56249ff4feca",
      "tree": "b8bdb820be33317f23ef1d3e43d13b2b6bfb3ba5",
      "parents": [
        "b4ba354cf8d22b261205494875cc014f18587b50"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Mar 06 16:10:14 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Mar 06 16:10:14 2015 +0000"
      },
      "message": "Revert \"[optimizing] Enable x86 long support.\"\n\nFew libcore failures.\n\nThis reverts commit b4ba354cf8d22b261205494875cc014f18587b50.\n\nChange-Id: I4a28d853e730dff9b69aec9555505803cf2fcd63\n"
    },
    {
      "commit": "b4ba354cf8d22b261205494875cc014f18587b50",
      "tree": "b6ce1e89f56f4d5adf238188df5b02fd7e2c23ac",
      "parents": [
        "af8db2ea18135588b267fe9a0b2f7af734b906cc"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Mar 05 11:28:58 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Mar 06 11:37:33 2015 +0000"
      },
      "message": "[optimizing] Enable x86 long support.\n\nChange-Id: I9006972a65a1f191c45691104a960366747f9d16\n"
    },
    {
      "commit": "5f8741860d465410bfed495dbb5f794590d338da",
      "tree": "cf295594b5b018e96959ddf474e7c8b7374006b5",
      "parents": [
        "c670efd6ba9dbd1166bfd8c805bb6b2df7d4313a"
      ],
      "author": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Wed Mar 04 15:42:45 2015 -0500"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Mar 05 11:08:33 2015 +0000"
      },
      "message": "[optimizing] Use callee-save registers for x86\n\nAdd ESI, EDI, EBP to available registers for non-baseline mode. Ensure\nthat they aren\u0027t used when byte addressible registers are needed.\n\nChange-Id: Ie7130d4084c2ae9cfcd1e47c26eb3e5dcac1ebd6\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n"
    },
    {
      "commit": "d6138ef1ea13d07ae555542f8898b30d89e9ac9a",
      "tree": "a8ffd5fd966512fd280bc1b3214f4e57a9e1805f",
      "parents": [
        "92095533ac28879ddd8b44b559d700527ca12b8a"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Feb 18 14:48:53 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Feb 19 14:01:18 2015 +0000"
      },
      "message": "Ensure the graph is correctly typed.\n\nWe used to be forgiving because of HIntConstant(0) also being\nused for null. We now create a special HNullConstant for such uses.\n\nAlso, we need to run the dead phi elimination twice during ssa\nbuilding to ensure the correctness.\n\nChange-Id: If479efa3680d3358800aebb1cca692fa2d94f6e5\n"
    },
    {
      "commit": "aa9b7c48069699e2aabedc6c0f62cb131fee0c73",
      "tree": "dafc6b514825490e65ecee4385f08f066add8c95",
      "parents": [
        "cf3fb94a90d74361b13e7bae5aa6e0e4ae58479d"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Feb 17 15:40:09 2015 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Thu Feb 19 12:13:09 2015 +0000"
      },
      "message": "Have the opt. compiler set the size of \"empty\" frames to zero.\n\nThis is to mimic Quick\u0027s behavior and honor stack frame\nalignment constraints after changes introduced by Change-Id\nI0fdb31e8c631e99091b818874a558c9aa04b1628.\n\nThis issue use to make oatdump crash on oat files produced by\nthe optimized compiler (e.g.\nout/host/linux-x86/framework/x86_64/core-optimizing.oat).\n\nChange-Id: I8ba52601edb0a0993eaf8923eba55aafdce5043e\n"
    },
    {
      "commit": "dc23d8318db08cb42e20f1d16dbc416798951a8b",
      "tree": "e7a883bb3263ccb971898df98bc58700604c1d1d",
      "parents": [
        "e5f5953e744060fde3b4489cea4d934d529e3e32"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Feb 16 11:15:43 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Feb 18 09:53:32 2015 +0000"
      },
      "message": "Avoid generating jmp +0.\n\nWhen a block branches to a non-following block, but blocks\nin-between do branch to it, we can avoid doing the branch.\n\nChange-Id: I9b343f662a4efc718cd4b58168f93162a24e1219\n"
    },
    {
      "commit": "c0572a451944f78397619dec34a38c36c11e9d2a",
      "tree": "2cc6f3c6f5ad45b4b85fb62627e797fe7e7734e1",
      "parents": [
        "0f2433bfcb02a662fe739e8e2b068abc2958e4c1"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Feb 06 14:35:25 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Feb 06 17:37:57 2015 +0000"
      },
      "message": "Optimize leaf methods.\n\nAvoid suspend checks and stack changes when not needed.\n\nChange-Id: I0fdb31e8c631e99091b818874a558c9aa04b1628\n"
    },
    {
      "commit": "4c204bafbc8d596894f8cb8ec696f5be1c6f12d8",
      "tree": "3608d188815a8a80e86f98611edcfe3bbaad8b17",
      "parents": [
        "08029544d72bd9bec162956978afcb59204ea97b"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Feb 03 15:12:35 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Feb 03 17:13:17 2015 +0000"
      },
      "message": "Use a different block order when not compiling baseline.\n\nUse the linearized order instead, as it puts blocks logically\nnext to each other in a better way. Also, it does not contain\ndead blocks.\n\nChange-Id: Ie65b56041a093c8155e6c1e06351cb36a4053505\n"
    },
    {
      "commit": "4dee636d21d9ce54386cdfbb824e5eb2a9c1af0d",
      "tree": "ee8650cc14ec18ce0d7abf089c7d2e0dfc9e079d",
      "parents": [
        "336247fa6deba2948f5ede1df806f48cf67c790a"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jan 23 18:23:14 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Sat Jan 24 14:34:01 2015 +0000"
      },
      "message": "Support callee-save registers on ARM.\n\nChange-Id: I7c519b7a828c9891b1141a8e51e12d6a8bc84118\n"
    },
    {
      "commit": "d97dc40d186aec46bfd318b6a2026a98241d7e9c",
      "tree": "5cf0257eda25e2722a1adafb9de22690c06a56d8",
      "parents": [
        "c698b78a17043d8898deb817098181595fbe734e"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jan 22 13:50:01 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jan 23 09:20:42 2015 +0000"
      },
      "message": "Support callee save floating point registers on x64.\n\n- Share the computation of core_spill_mask and fpu_spill_mask\n  between backends.\n- Remove explicit stack overflow check support: we need to adjust\n  them and since they are not tested, they will easily bitrot.\n\nChange-Id: I0b619b8de4e1bdb169ea1ae7c6ede8df0d65837a\n"
    },
    {
      "commit": "988939683c26c0b1c8808fc206add6337319509a",
      "tree": "876e94428276547a29c27ccf17509a42dfe7cda1",
      "parents": [
        "59add47cabce3735ccd470cd3b5dac8b112e09ab"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 21 12:32:32 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 21 18:50:25 2015 +0000"
      },
      "message": "Enable core callee-save on x64.\n\nWill work on other architectures and FP support in other CLs.\n\nChange-Id: I8cef0343eedc7202d206f5217fdf0349035f0e4d\n"
    },
    {
      "commit": "77520bca97ec44e3758510cebd0f20e3bb4584ea",
      "tree": "2e3be6fdc182e5cf5ae390019457af5e9c1ed242",
      "parents": [
        "4d2c611bf17ff309abfa152e56c0b98a21ec8787"
      ],
      "author": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Mon Jan 12 18:45:46 2015 +0000"
      },
      "committer": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Wed Jan 21 14:26:35 2015 +0000"
      },
      "message": "Record implicit null checks at the actual invoke time.\n\nImplicitNullChecks are recorded only for instructions directly (see NB\nbelow) preceeded by NullChecks in the graph. This way we avoid recording\nredundant safepoints and minimize the code size increase.\n\nNB: ParallalelMoves might be inserted by the register allocator between\nthe NullChecks and their uses. These modify the environment and the\ncorrect action would be to reverse their modification. This will be\naddressed in a follow-up CL.\n\nChange-Id: Ie50006e5a4bd22932dcf11348f5a655d253cd898\n"
    },
    {
      "commit": "cd6dffedf1bd8e6dfb3fb0c933551f9a90f7de3f",
      "tree": "0d83e9fdf65bded684d6e836078f253e63b7e11f",
      "parents": [
        "12c03ac7575db242a6f35739bb459e8277115da4"
      ],
      "author": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Thu Jan 08 17:35:35 2015 +0000"
      },
      "committer": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Fri Jan 16 17:27:03 2015 +0000"
      },
      "message": "Add implicit null checks for the optimizing compiler\n\n- for backends: arm, arm64, x86, x86_64\n- fixed parameter passing for CodeGenerator\n- 003-omnibus-opcodes test verifies that NullPointerExceptions work as\nexpected\n\nChange-Id: I1b302acd353342504716c9169a80706cf3aba2c8\n"
    },
    {
      "commit": "f85a9ca9859ad843dc03d3a2b600afbaf2e9bbdd",
      "tree": "a802042fa7a3a8cb820916d558e630596daaa9b4",
      "parents": [
        "8fccea249b1a6f1469eeea42c2b2cca06ce1c70d"
      ],
      "author": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Tue Jan 13 09:20:58 2015 -0500"
      },
      "committer": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Thu Jan 15 11:21:37 2015 -0500"
      },
      "message": "[optimizing compiler] Compute live spill size\n\nThe current stack frame calculation assumes that each live register to\nbe saved/restored has the word size of the machine.  This fails for X86,\nwhere a double in an XMM register takes up 8 bytes.  Change the\ncalculation to keep track of the number of core registers and number of\nfp registers to handle this distinction.\n\nThis is slightly pessimal, as the registers may not be active at the\nsame time, but the only way to handle this would be to allocate both\nclasses of registers simultaneously, or remember all the active\nintervals, matching them up and compute the size of each safepoint\ninterval.\n\nChange-Id: If7860aa319b625c214775347728cdf49a56946eb\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n"
    },
    {
      "commit": "11adb76fbc2dc3d8cbb6665945ff5d6733e2a8e6",
      "tree": "f1a5cb2ce14e1592dd557c28bd1e1ba3c5ea071e",
      "parents": [
        "f3401f7a21c99ebec7355de27ab7bc0840f28726",
        "12df9ebf72255544b0147c81b1dca6644a29764e"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 12 10:46:18 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon Jan 12 10:46:18 2015 +0000"
      },
      "message": "Merge \"Move code around in OptimizingCompiler::Compile to reduce stack space.\""
    },
    {
      "commit": "12df9ebf72255544b0147c81b1dca6644a29764e",
      "tree": "93a47865d0c93922cfc036fba1f2490b64549912",
      "parents": [
        "4270e74152d8a7cd979ab5a92fe2a8f84adb8a42"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jan 09 14:53:50 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 12 08:49:25 2015 +0000"
      },
      "message": "Move code around in OptimizingCompiler::Compile to reduce stack space.\n\nAlso fix an (intentional) memory leak, by allocating the CodeGenerator\non the heap instead of the arena: they construct an Assembler object\nthat requires destruction.\n\nBUG:18787334\n\nChange-Id: I8cf0667cb70ce5b14d4ac334bd4487a562635f1b\n"
    },
    {
      "commit": "840e5461a85f8908f51e7f6cd562a9129ff0e7ce",
      "tree": "ea8b4cbc5a0e3dea96fefcd9247e6c06b17ac518",
      "parents": [
        "893e8881e31180721512c1b9e5ffacb03aad2e45"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 07 16:01:24 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jan 08 13:57:51 2015 +0000"
      },
      "message": "Implement double and float support for arm in register allocator.\n\nThe basic approach is:\n- An instruction that needs two registers gets two intervals.\n- When allocating the low part, we also allocate the high part.\n- When splitting a low (or high) interval, we also split the high\n  (or low) equivalent.\n- Allocation follows the (S/D register) requirement that low\n  registers are always even and the high equivalent is low + 1.\n\nChange-Id: I06a5148e05a2ffc7e7555d08e871ed007b4c2797\n"
    },
    {
      "commit": "3416601a9e9be81bb7494864287fd3602d18ef13",
      "tree": "dd228519bfb9733aa7627b9cea81ecb28974a1ab",
      "parents": [
        "8558375377946aabbbda6ab584e13f754590bd89"
      ],
      "author": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Fri Dec 19 17:22:29 2014 +0000"
      },
      "committer": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Mon Jan 05 16:25:59 2015 +0000"
      },
      "message": "Look at instruction set features when generating volatiles code\n\nChange-Id: Ia882405719fdd60b63e4102af7e085f7cbe0bb2a\n"
    },
    {
      "commit": "e21dc3db191df04c100620965bee4617b3b24397",
      "tree": "2ad762c6afb024bf95e1eced3d584649a4d57d23",
      "parents": [
        "6d1a047b4b3f9707d4ee1cc19e99717ee021ef48"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Dec 08 16:59:43 2014 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Dec 22 10:01:27 2014 -0800"
      },
      "message": "ART: Swap-space in the compiler\n\nIntroduce a swap-space and corresponding allocator to transparently\nswitch native allocations to memory backed by a file.\n\nBug: 18596910\n\n(cherry picked from commit 62746d8d9c4400e4764f162b22bfb1a32be287a9)\n\nChange-Id: I131448f3907115054a592af73db86d2b9257ea33\n"
    },
    {
      "commit": "5b4b898ed8725242ee6b7229b94467c3ea3054c8",
      "tree": "46f6df76e49f9a42dae89a6b9cf8336eae1da519",
      "parents": [
        "6004796d6c630696127df2494dcd4f30d1367a34"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Dec 18 17:45:56 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Dec 18 17:45:56 2014 +0000"
      },
      "message": "Revert \"Don\u0027t block quick callee saved registers for optimizing.\"\n\nX64 has one libcore test failing, and codegen_test on\narm is failing.\n\nThis reverts commit 6004796d6c630696127df2494dcd4f30d1367a34.\n\nChange-Id: I20e00431fa18e11ce4c0cb6fffa91977fa8e9b4f\n"
    },
    {
      "commit": "6004796d6c630696127df2494dcd4f30d1367a34",
      "tree": "850f3e82a47061200c4e34e2c7e7a934f4769a97",
      "parents": [
        "407d77f344cfbdbbfb50531c5f0766bc0892e2fe"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Dec 15 00:01:18 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Dec 18 14:59:50 2014 +0000"
      },
      "message": "Don\u0027t block quick callee saved registers for optimizing.\n\nThis change builds on:\nhttps://android-review.googlesource.com/#/c/118983/\n\n- Also fix x86_64 assembler bug triggered by this change.\n- Fix (and improve) x86\u0027s backend byte register usage.\n- Fix a bug in baseline register allocator: a fixed\n  out register must prevent inputs from allocating it.\n\nChange-Id: I4883862e29b4e4b6470f1823cf7eab7e7863d8ad\n"
    },
    {
      "commit": "624279f3c70f9904cbaf428078981b05d3b324c0",
      "tree": "a81f8d8facfc28cac479a68a1042edc74c36d25b",
      "parents": [
        "9a64a46e8edfa89402598d8650b8ebb337ba3d52"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Thu Dec 04 11:54:28 2014 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Thu Dec 04 11:54:28 2014 +0000"
      },
      "message": "Add support for float-to-long in the optimizing compiler.\n\n- Add support for the float-to-long Dex instruction in the\n  optimizing compiler.\n- Add a Dex PC field to art::HTypeConversion to allow the\n  x86 and ARM code generators to produce runtime calls.\n- Instruct art::CodeGenerator::RecordPcInfo not to record\n  PC information for HTypeConversion instructions.\n- Add S0 to the list of ARM FPU parameter registers.\n- Have art::x86_64::X86_64Assembler::cvttss2si work with\n  64-bit operands.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n  float to long HTypeConversion nodes.\n- Add related tests to test/422-type-conversion.\n\nChange-Id: I954214f0d537187883f83f7a83a1bb2dd8a21fd4\n"
    },
    {
      "commit": "3f8f936aff35f29d86183d31c20597ea17e9789d",
      "tree": "3abc4e5f99cf7de74dbc65cafb6c045074e25381",
      "parents": [
        "fc600dccd7797a9a10cdd457034ea8e148ccd631"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Dec 02 17:45:01 2014 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Dec 03 12:09:28 2014 +0000"
      },
      "message": "Add support for float-to-int in the optimizing compiler.\n\n- Add support for the float-to-int Dex instruction in the\n  optimizing compiler.\n- Factor type conversion related lines in\n  compiler/optimizing/builder.cc.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n  float to int HTypeConversion nodes.\n- Add related tests to test/422-type-conversion.\n\nChange-Id: I2382dfc04bf394ed75f675148cfcf98216d65bc6\n"
    },
    {
      "commit": "32f5b4d2c8c9b52e9522941c159577b21752d0fa",
      "tree": "1b30de145c7865fd8a79f17a4cfe67b1b890878c",
      "parents": [
        "eea79dd779ba199658ada7264f8f96d776e53f19"
      ],
      "author": {
        "name": "Serban Constantinescu",
        "email": "serban.constantinescu@arm.com",
        "time": "Tue Nov 25 20:05:46 2014 +0000"
      },
      "committer": {
        "name": "Serban Constantinescu",
        "email": "serban.constantinescu@arm.com",
        "time": "Fri Nov 28 12:02:58 2014 +0000"
      },
      "message": "Vixl: Update the VIXL interface to VIXL 1.7 and enable VIXL debug.\n\nThis patch updates the interface to VIXL 1.7 and enables the debug version of\nVIXL when ART is built in debug mode.\n\nChange-Id: I443fb941bec3cffefba7038f93bb972e6b7d8db5\nSigned-off-by: Serban Constantinescu \u003cserban.constantinescu@arm.com\u003e\n"
    },
    {
      "commit": "6d0e483dd2e0b63e952de060738c10e2abd12ff7",
      "tree": "b396377926d2645f0df982f0b03c41149632a3de",
      "parents": [
        "7c97e855ceb9b45a1cc738fb144bd3312c4e09a8"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Thu Nov 27 18:31:21 2014 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Thu Nov 27 18:36:14 2014 +0000"
      },
      "message": "Add support for long-to-float in the optimizing compiler.\n\n- Add support for the long-to-float Dex instruction in the\n  optimizing compiler.\n- Have art::x86_64::X86_64Assembler::cvtsi2ss work with\n  64-bit operands.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n  long to float HTypeConversion nodes.\n- Add related tests to test/422-type-conversion.\n\nChange-Id: Ic983cbeb1ae2051add40bc519a8f00a6196166c9\n"
    },
    {
      "commit": "900f6eb15db5215deeea23e4e087b553b4f696f7",
      "tree": "ee2a824d581098147b5410539b294473f3b55c82",
      "parents": [
        "6d541424eb0cb82ec3c2262d9c27d5fd97530cb8"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Nov 17 09:51:16 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Nov 17 09:51:16 2014 +0000"
      },
      "message": "Fix lint error.\n\nChange-Id: Ia0fa12f2208507b6bec0581edf4345025b877580\n"
    },
    {
      "commit": "c1d4ec95c9dc69a7373e2eca0e69965e54d9cf03",
      "tree": "7ded15095ee62d471fe1455ec915c1d68fb202f6",
      "parents": [
        "44e6d985fddb3d921f054ff64c319c86005118e9",
        "af07bc121121d7bd7e8329c55dfe24782207b561"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Nov 17 09:42:23 2014 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon Nov 17 09:42:25 2014 +0000"
      },
      "message": "Merge \"Minor object store optimizations.\""
    },
    {
      "commit": "af07bc121121d7bd7e8329c55dfe24782207b561",
      "tree": "51e93225aa77c3949a63104f8d48e4b6f6fb2b5b",
      "parents": [
        "d0d805bad888857fe974142cbf3292b9747daae3"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Nov 12 18:08:09 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Nov 14 13:45:02 2014 +0000"
      },
      "message": "Minor object store optimizations.\n\n- Avoid emitting write barrier when the value is null.\n- Do not do a typecheck on an arraystore when storing something that\n  was loaded from the same array.\n\nChange-Id: I902492928692e4553b5af0fc99cce3c2186c442a\n"
    },
    {
      "commit": "d582fa4ea62083a7598dded5b82dc2198b3daac7",
      "tree": "c76704c266ef4687eab425612ddf3fd24f93fe8d",
      "parents": [
        "f20076ff813b8012096ff31af236d59db3c0f4e1"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Wed Nov 05 23:46:43 2014 -0800"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Thu Nov 13 16:17:46 2014 -0800"
      },
      "message": "Instruction set features for ARM64, MIPS and X86.\n\nAlso, refactor how feature strings are handled so they are additive or\nsubtractive.\nMake MIPS have features for FPU 32-bit and MIPS v2. Use in the quick compiler\nrather than #ifdefs that wouldn\u0027t have worked in cross-compilation.\nAdd SIMD features for x86/x86-64 proposed in:\n  https://android-review.googlesource.com/#/c/112370/\n\nBug: 18056890\n\nChange-Id: Ic88ff84a714926bd277beb74a430c5c7d5ed7666\n"
    },
    {
      "commit": "f0e3937b87453234d0d7970b8712082062709b8d",
      "tree": "e552c1173ee90fea1d2ba11cc08878efe65ba0be",
      "parents": [
        "59321e0e10ea09694efecf6154704e2743b9bffd"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Nov 12 17:50:07 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Nov 12 17:55:24 2014 +0000"
      },
      "message": "Do a parallel move in BoundsCheckSlowPath.\n\nThe two locations of the index and length could overlap,\nso we need a parallel move. Also factorize the code for\ndoing a parallel move based on two locations.\n\nChange-Id: Iee8b3459e2eed6704d45e9a564fb2cd050741ea4\n"
    },
    {
      "commit": "de58ab2c03ff8112b07ab827c8fa38f670dfc656",
      "tree": "c872bfbcad1e90845008140bbddcc43e56dc19d2",
      "parents": [
        "3ed86e4e98dfe1b05c9a03aa2aee42c145a018c3"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Nov 05 12:46:03 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Nov 06 16:49:52 2014 +0000"
      },
      "message": "Implement try/catch/throw in optimizing.\n\n- We currently don\u0027t run optimizations in the presence of a try/catch.\n- We therefore implement Quick\u0027s mapping table.\n- Also fix a missing null check on array-length.\n\nChange-Id: I6917dfcb868e75c1cf6eff32b7cbb60b6cfbd68f\n"
    },
    {
      "commit": "6a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866f",
      "tree": "9df58b57af13240a93a6da4eefcf03f70cce9ad9",
      "parents": [
        "c6e0955737e15f7c0c3575d4e13789b3411f4993"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Fri Oct 31 00:33:20 2014 -0700"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Mon Nov 03 20:01:04 2014 -0800"
      },
      "message": "Remove -Wno-unused-parameter and -Wno-sign-promo from base cflags.\n\nFix associated errors about unused paramenters and implict sign conversions.\nFor sign conversion this was largely in the area of enums, so add ostream\noperators for the effected enums and fix tools/generate-operator-out.py.\nTidy arena allocation code and arena allocated data types, rather than fixing\nnew and delete operators.\nRemove dead code.\n\nChange-Id: I5b433e722d2f75baacfacae4d32aef4a828bfe1b\n"
    },
    {
      "commit": "26dcecb0ef620fb225cd5dd39f6e41b07e34c83d",
      "tree": "5f4d8b1584059dc9570be48030fe4c6aad82457b",
      "parents": [
        "29ce77f654412dbb5fb3d5949da4053952917101",
        "3c03503d66df3b4440f851ae7d0c4fae5e7872df"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Oct 30 18:20:07 2014 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Thu Oct 30 18:20:07 2014 +0000"
      },
      "message": "Merge \"Follow-up CL after hard float changes.\""
    },
    {
      "commit": "19a19cffd197a28ae4c9c3e59eff6352fd392241",
      "tree": "265b971afd0e33afc8986317aea2f5a6fe817aec",
      "parents": [
        "7c049c1f34220b0dc1a7f68f3b30f388bae7bdb9"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Oct 22 16:07:05 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Oct 29 13:01:48 2014 +0000"
      },
      "message": "Add support for static fields in optimizing compiler.\n\nChange-Id: Id2f010589e2bd6faf42c05bb33abf6816ebe9fa9\n"
    },
    {
      "commit": "3c03503d66df3b4440f851ae7d0c4fae5e7872df",
      "tree": "6f10a0da8e1a06d4a0a88e015db091a824aec7fb",
      "parents": [
        "d3271e8a48768ed53bfa2515474b57245e7d9a41"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Oct 28 10:46:40 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Oct 28 10:46:40 2014 +0000"
      },
      "message": "Follow-up CL after hard float changes.\n\nAddressing comments from Zheng Xu.\n\nChange-Id: I8c599cdfab03373e82a1b90b711005c490bc6ca0\n"
    },
    {
      "commit": "1ba0f596e9e4ddd778ab431237d11baa85594eba",
      "tree": "c1d51616adf4d98aab3ebccf47ad5146635cb87f",
      "parents": [
        "1ef3495abfa2a858b3cc7a1844383c8e7dff0b60"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Oct 27 15:14:55 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Oct 27 17:20:35 2014 +0000"
      },
      "message": "Support hard float on arm in optimizing compiler.\n\nAlso bump oat version, needed after latest hard float switch.\n\nChange-Id: Idf5acfb36c07e74acff00edab998419a3c6b2965\n"
    },
    {
      "commit": "102cbed1e52b7c5f09458b44903fe97bb3e14d5f",
      "tree": "cb0a433c8f284021298c8a0c4dd0da97ca9d198a",
      "parents": [
        "07f5c5edb7ef24ac35364e6ef9a8107a44e6564e"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Oct 15 18:31:05 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Oct 21 16:03:51 2014 +0100"
      },
      "message": "Implement register allocator for floating point registers.\n\nAlso:\n- Fix misuses of emitting the rex prefix in the x86_64 assembler.\n- Fix movaps code generation in the x86_64 assembler.\n\nChange-Id: Ib6dcf6e7c4a9c43368cfc46b02ba50f69ae69cbe\n"
    },
    {
      "commit": "92a73aef279be78e3c2b04db1713076183933436",
      "tree": "e73b214fb7d740588f5d065b2e4ff3eb8c527e34",
      "parents": [
        "5c5efc253507eb43265997c9afcd778f72b6cef4"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Oct 16 11:12:52 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Oct 16 15:17:44 2014 +0100"
      },
      "message": "Don\u0027t use assembler classes in code_generator.h.\n\nThe arm64 backend uses its own assembler and does not share\nthe same classes as the other backends. To avoid conflicts\nor unnecessary mappings, just don\u0027t use those classes in the\nshared part of the code generator.\n\nChange-Id: I9e5fa40c1021d2e83a4ef14c52cd1ccd03f2f73d\n"
    },
    {
      "commit": "71175b7f19a4f6cf9cc264feafd820dbafa371fb",
      "tree": "5370e7c7c9f7d1edf148a00548cb1334d5118f8d",
      "parents": [
        "b76c5495c4879fcfa0866b1490031a3123baf9ee"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Oct 09 22:13:55 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Oct 10 11:36:03 2014 +0000"
      },
      "message": "Cleanup baseline register allocator.\n\n- Use three arrays for blocking regsters instead of\n  one and computing offsets in that array.]\n- Don\u0027t pass blocked_registers_ to methods, just use the field.\n\nChange-Id: Ib698564c31127c59b5a64c80f4262394b8394dc6\n"
    },
    {
      "commit": "56b9ee6fe1d6880c5fca0e7feb28b25a1ded2e2f",
      "tree": "34e5163967f59a98e64f2c89489ed7b76334b48a",
      "parents": [
        "a3c4d72210de174552f47b2d117b1946f274af1e"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Oct 09 11:47:51 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Oct 09 14:42:13 2014 +0100"
      },
      "message": "Stop converting from Location to ManagedRegister.\n\nNow the source of truth is the Location object that knows\nwhich register (core, pair, fpu) it needs to refer to.\n\nChange-Id: I62401343d7479ecfb24b5ed161ec7829cda5a0b1\n"
    },
    {
      "commit": "7fb49da8ec62e8a10ed9419ade9f32c6b1174687",
      "tree": "8b1bec67452b84809cecd5645543e1f885ccbd44",
      "parents": [
        "4a1b4679cda2f0d2893b8e3f910c21231849291c"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Oct 06 09:12:41 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Oct 07 20:19:47 2014 +0100"
      },
      "message": "Add support for floats and doubles.\n\n- Follows Quick conventions.\n- Currently only works with baseline register allocator.\n\nChange-Id: Ie4b8e298f4f5e1cd82364da83e4344d4fc3621a3\n"
    },
    {
      "commit": "3c04974a90b0e03f4b509010bff49f0b2a3da57f",
      "tree": "52649104e3e80272c3774793350f4d9f260ae732",
      "parents": [
        "c0d36abb12cdbb9469039c1dc153a586bd984015"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Sep 24 18:10:46 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Sep 25 12:23:40 2014 +0100"
      },
      "message": "Optimize suspend checks in optimizing compiler.\n\n- Remove the ones added during graph build (they were added\n  for the baseline code generator).\n- Emit them at loop back edges after phi moves, so that the test\n  can directly jump to the loop header.\n- Fix x86 and x86_64 suspend check by using cmpw instead of cmpl.\n\nChange-Id: I6fad5795a55705d86c9e1cb85bf5d63dadfafa2a\n"
    },
    {
      "commit": "3bca0df855f0e575c6ee020ed016999fc8f14122",
      "tree": "15e15c8290ad314c29ca608f51d89d4db68fd9ba",
      "parents": [
        "d41491adb23764f28a80cbb7f2bd7af6491cd892"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Sep 19 11:01:00 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Sep 23 13:57:30 2014 +0100"
      },
      "message": "Support for saving and restoring live registers in a slow path.\n\nAnd use it in suspend check slow paths.\n\nChange-Id: I79caf28f334c145a36180c79a6e2fceae3990c31\n"
    },
    {
      "commit": "3946844c34ad965515f677084b07d663d70ad1b8",
      "tree": "0d85bfba2ff69c34a2897351d1e50a1464509305",
      "parents": [
        "e2c23739c6395a83b30ece38f8a2e9e1bf7cf3ce"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Sep 02 15:17:15 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Sep 08 12:15:07 2014 +0100"
      },
      "message": "Runtime support for the new stack maps for the opt compiler.\n\nNow most of the methods supported by the compiler can be optimized,\ninstead of using the baseline.\n\nChange-Id: I80ab36a34913fa4e7dd576c7bf55af63594dc1fa\n"
    },
    {
      "commit": "4361beff5bc540c43ab7c072c99994adc4ed78f9",
      "tree": "32479614a34831b549ac93965f0c0fab3cf4f6d3",
      "parents": [
        "10dac8ee833a297ad0ffc5877305f2d132259478"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Aug 20 04:59:12 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Aug 20 05:01:31 2014 +0100"
      },
      "message": "Fix bug introduced in https://android-review.googlesource.com/102610.\n\nAlso make oatdump work again.\n\nChange-Id: Iab96971645f40585bc04769d410f2273d3977f51\n"
    },
    {
      "commit": "e3ea83811d47152c00abea24a9b420651a33b496",
      "tree": "dd3b8018176ada85d51b2f8ca46e515fbf55b50f",
      "parents": [
        "9dcf75c80187504ec88e7ef91d64a6a68279eb9d"
      ],
      "author": {
        "name": "Yevgeny Rouban",
        "email": "yevgeny.y.rouban@intel.com",
        "time": "Fri Aug 08 16:29:38 2014 +0700"
      },
      "committer": {
        "name": "Tong Shen",
        "email": "endlessroad@google.com",
        "time": "Fri Aug 15 15:04:12 2014 -0700"
      },
      "message": "ART source line debug info in OAT files\n\nOAT files have source line information enough for ART runtime needs like\njump to/from interpreter and thread suspension. But this information\nis not enough for finer grained source level debugging and low-level\nprofiling (VTune or perf).\n\nThis patch adds to OAT files two additional sections:\n.debug_line - DWARF formatted Elf32 section with detailed source line\n              information (mapping from native PC to Java source lines).\n\nIn addition to the debugging symbols added using the dex2oat option\n--include-debug-symbols, the source line information is added to\nthe section .debug_line.\n\nThe source line info can be read by many Elf reading tools like objdump,\nreadelf, dwarfdump, gdb, perf, VTune, ...\n\ngdb can use this debug line information in x86. In 64-bit mode\nthe information can be used if the oat file is mapped in the lower\naddress space (address has higher 32 bits zeroed). Relocation works.\n\nTesting:\n1. art/test/run-test --host --gdb [--64] 001-HelloWorld\n2. in gdb: break Main.java:19\n3. in gdb: break Runtime.java:111\n4. in gdb: run  - stops at void java.lang.Runtime.\u003cinit\u003e()\n5. in gdb: backtrace  - shows call stack down to main()\n6. in gdb: continue - stops at void Main.main() (only in 32-bit mode)\n7. in gdb: backtrace  - shows call stack down to main()\n8. objdump -W \u003coat-file\u003e - addresses are from VMA range of .text\n   section reported by objdump -h \u003cfile\u003e\n9. dwarfdump -ka \u003coat-file\u003e - no errors expected\n\nSize of aosp-x86-eng boot.oat increased by 11% from 80.5Mb to 89.2Mb\nwith two sections added .debug_line (7.2Mb) and .rel.debug (1.5Mb).\n\nChange-Id: Ib8828832686e49782a63d5529008ff4814ed9cda\nSigned-off-by: Yevgeny Rouban \u003cyevgeny.y.rouban@intel.com\u003e\n"
    },
    {
      "commit": "73e80c3ae76fafdb53afe3a85306dcb491fb5b00",
      "tree": "6c437ad0e24f0ed66251e8f37c13b6e6675db1f2",
      "parents": [
        "16fc9f617e395758eb95b5f2124c79a828186b55"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Jul 22 17:47:56 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Jul 22 17:47:56 2014 +0100"
      },
      "message": "Make unit test tell if a method is a leaf.\n\nThe runtime is not initialized completely in gtests, so we\ncannot run code (such as explicit stack overflow checks) that\nlook at tls values.\n\nChange-Id: I74a4449b01eb203f1b411dda700e9459878d0d55\n"
    },
    {
      "commit": "f12feb8e0e857f2832545b3f28d31bad5a9d3903",
      "tree": "0a7320caf995441ea4577875abaf731fc37dd0a9",
      "parents": [
        "ebb6b5c90857f390db5a4f840bbe67b3a59a22d8"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jul 17 18:32:41 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Jul 22 16:07:59 2014 +0100"
      },
      "message": "Stack overflow checks and NPE checks for optimizing.\n\nChange-Id: I59e97448bf29778769b79b51ee4ea43f43493d96\n"
    },
    {
      "commit": "ab032bc1ff57831106fdac6a91a136293609401f",
      "tree": "5891daefe635283443a255a811ab6a3f3b8a62cd",
      "parents": [
        "635561b86ac03f5562bdb779baa6db12f31b3cae"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Jul 15 12:55:21 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Jul 15 12:58:29 2014 +0100"
      },
      "message": "Fix a braino in the stack layout.\n\nAlso do some refactoring to have this code be just in CodeGenerator.\n\nChange-Id: I88de109889138af8d60027973c12a64bee813cb7\n"
    },
    {
      "commit": "e50383288a75244255d3ecedcc79ffe9caf774cb",
      "tree": "8858489463a57c7b50f7db4d972abec21302b7a7",
      "parents": [
        "cf90ba7ebe00346651f3b7ce1e5b1f785f7caabd"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jul 04 09:41:32 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jul 14 10:06:11 2014 +0100"
      },
      "message": "Support fields in optimizing compiler.\n\n- Required support for temporaries, to be only used by baseline compiler.\n- Also fixed a few invalid assumptions around locations and instructions\n  that don\u0027t need materialization. These instructions should not have an Out.\n\nChange-Id: Idc4a30dd95dd18015137300d36bec55fc024cf62\n"
    },
    {
      "commit": "412f10cfed002ab617c78f2621d68446ca4dd8bd",
      "tree": "bbd9dddd0436da566365ada5deb1840e315e1b11",
      "parents": [
        "d6ab04646d8eec6f24b200f8649f3d942d9ad17e"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jun 19 10:00:34 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jul 02 16:00:32 2014 +0100"
      },
      "message": "Support longs in the register allocator for x86_64.\n\nChange-Id: I7fb6dfb761bc5cf9e5705682032855a0a70ca867\n"
    },
    {
      "commit": "9cf35523764d829ae0470dae2d5dd99be469c841",
      "tree": "889459a8ecf8fdf801ea46dd58d15268dfb25af8",
      "parents": [
        "b08f63c21de64f8b74003e3638e100471bd099f3"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jun 09 18:40:10 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jun 13 09:49:30 2014 +0100"
      },
      "message": "Add x86_64 support to the optimizing compiler.\n\nChange-Id: I4462d9ae15be56c4a3dc1bd4d1c0c6548c1b94be\n"
    },
    {
      "commit": "e27f31a81636ad74bd3376ee39cf215941b85c0e",
      "tree": "12dd6a1153b78b831c887f65f0bcef715e89719d",
      "parents": [
        "dfc2091d2fb8a7694f69acf8bd39ce4953e026c2"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jun 12 17:53:14 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jun 12 18:05:00 2014 +0100"
      },
      "message": "Enable the register allocator on ARM.\n\n- Also fixes a few bugs/wrong assumptions in code not hit by x86.\n- We need to differentiate between moves due to connecting siblings within\n  a block, and moves due to control flow resolution.\n\nChange-Id: Idd05cf138a71c8f36f5531c473de613c0166fe38\n"
    },
    {
      "commit": "86dbb9a12119273039ce272b41c809fa548b37b6",
      "tree": "a4626e21ae16a9a5e133ea3e5e95b58d2ea4d8e5",
      "parents": [
        "c936622863a50bdda9b10062515dfc02a8c8b652"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jun 04 11:12:39 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jun 12 10:02:06 2014 +0100"
      },
      "message": "Final CL to enable register allocation on x86.\n\nThis CL implements:\n1) Resolution after allocation: connecting the locations\n   allocated to an interval within a block and between blocks.\n2) Handling of fixed registers: some instructions require\n   inputs/output to be at a specific location, and the allocator\n   needs to deal with them in a special way.\n3) ParallelMoveResolver::EmitNativeCode for x86.\n\nChange-Id: I0da6bd7eb66877987148b87c3be6a983b4e3f858\n"
    },
    {
      "commit": "a7062e05e6048c7f817d784a5b94e3122e25b1ec",
      "tree": "a5d6b64ae6d5352f761fc2547bda863281adbe40",
      "parents": [
        "8b5b1e5593ffa77c393e4172b71a3d5a821d2ed8"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu May 22 12:50:17 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon May 26 11:31:38 2014 +0100"
      },
      "message": "Add a linear scan register allocator to the optimizing compiler.\n\nThis is a \"by-the-book\" implementation. It currently only deals\nwith allocating registers, with no hint optimizations.\n\nThe changes remaining to make it functional are:\n- Allocate spill slots.\n- Resolution and placements of Move instructions.\n- Connect it to the code generator.\n\nChange-Id: Ie0b2f6ba1b98da85425be721ce4afecd6b4012a4\n"
    },
    {
      "commit": "4e3d23aa1523718ea1fdf3a32516d2f9d81e84fe",
      "tree": "78593d033513a98486a409e7b23678ccced12cd5",
      "parents": [
        "59f3f62534581311c7c403c832f56c272426a17c"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu May 22 18:32:45 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri May 23 10:00:44 2014 +0100"
      },
      "message": "Import Dart\u0027s parallel move resolver.\n\nAnd write a few tests while at it.\n\nA parallel move resolver will be needed for performing multiple moves\nthat are conceptually parallel, for example moves at a block\nexit that branches to a block with phi nodes.\n\nChange-Id: Ib95b247b4fc3f2c2fcab3b8c8d032abbd6104cd7\n"
    },
    {
      "commit": "804d09372cc3d80d537da1489da4a45e0e19aa5d",
      "tree": "b226350fdf3dc0c55a11e1615010c8475f167f90",
      "parents": [
        "0095e0b8380a8802f40a21928800b9df6e11f1d7"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri May 02 08:46:00 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed May 07 10:32:11 2014 +0100"
      },
      "message": "Build live-in, live-out and kill sets for each block.\n\nThis information will be used when computing live ranges of\ninstructions.\n\nChange-Id: I345ee833c1ccb4a8e725c7976453f6d58d350d74\n"
    },
    {
      "commit": "a7aca370a7d62ca04a1e24423d90e8020d6f1a58",
      "tree": "65d501b0f9711abddbea1a9d06623baafa4ae2b3",
      "parents": [
        "5dee5df89aa2cefef6c886d5b9b642cc6f1c595b"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Apr 28 17:47:12 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Apr 29 10:55:30 2014 +0100"
      },
      "message": "Setup policies for register allocation.\n\nChange-Id: I857e77530fca3e2fb872fc142a916af1b48400dc\n"
    },
    {
      "commit": "c32e770f21540e4e9eda6dc7f770e745d33f1b9f",
      "tree": "56a76d7399bf749a4500fb60483e0dc075a24ee7",
      "parents": [
        "618a87009202dc959c935ed8f237ae32bdec57d0"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Apr 24 12:43:16 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Apr 28 16:21:40 2014 +0100"
      },
      "message": "Add a Transform to SSA phase to the optimizing compiler.\n\nChange-Id: Ia9700756a0396d797a00b529896487d52c989329\n"
    },
    {
      "commit": "a747a392fb5f88d2ecc4c6021edf9f1f6615ba16",
      "tree": "fc5f08b127f3cf6bfb933504070109d46a455bb9",
      "parents": [
        "c2b2bbf1bbdf6273298b79d6006611593ed9f3a0"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Apr 17 14:56:23 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Apr 17 15:16:00 2014 +0100"
      },
      "message": "Code cleanup in preparation for x64 backend.\n\n- Use InvokeDexCallingConventionVisitor for setting\n  up HParameterValues\n- Use kVregSize instead of kX86WordSize when dealing with\n  virtual registers.\n\nChange-Id: Ia520223010194c70a3ff0ed659077f55cec4e7d8\n"
    },
    {
      "commit": "01bc96d007b67fdb7fe349232a83e4b354ce3d08",
      "tree": "1ed36c2d7c0fb204e6f276bd9853153d9350ad1d",
      "parents": [
        "2be6fc74bce10ac68d3d1b39a5019f520ad170ea"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Apr 11 17:43:50 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Apr 16 14:21:12 2014 +0100"
      },
      "message": "Long support in optimizing compiler.\n\n- Add stack locations to the Location class.\n- Change logic of parameter passing/setup by setting the\n  location of such instructions the ones for the calling\n  convention.\n\nChange-Id: I4730ad58732813dcb9c238f44f55dfc0baa18799\n"
    },
    {
      "commit": "b55f835d66a61e5da6fc1895ba5a0482868c9552",
      "tree": "44659a826aeadcf2bf176c2e8d31108ba64c88eb",
      "parents": [
        "427ca38b0a6c6fd7dc0dbb380619e2b91b56cf1c"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Apr 07 15:26:35 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Apr 08 08:43:50 2014 +0100"
      },
      "message": "Test control flow instruction with optimizing compiler.\n\nAdd support for basic instructions to implement these tests.\n\nChange-Id: I3870bf9301599043b3511522bb49dc6364c9b4c0\n"
    },
    {
      "commit": "707c809f661554713edfacf338365adca8dfd3a3",
      "tree": "21aaa53a3beb7d73fb2af9ab55bee7a538254fcb",
      "parents": [
        "7efad5d3a806a15166109837439f2e149031feef"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Apr 04 10:50:14 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Apr 04 10:50:14 2014 +0100"
      },
      "message": "Use target-specific word instead of runtime word.\n\nChange-Id: Ia11dc3cc520a1a5c7bd017013e5699af9570ce91\n"
    },
    {
      "commit": "4a34a428c6a2588e0857ef6baf88f1b73ce65958",
      "tree": "a9f025c17752a175c4e6a203c01e935cb438efb1",
      "parents": [
        "8549cf9d83688f7decbbea2a8de761ce29e95f3c"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Apr 03 10:38:37 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Apr 03 17:09:22 2014 +0100"
      },
      "message": "Support passing arguments to invoke-static* instructions.\n\n- Stop using the frame pointer for accessing locals.\n- Stop emulating a stack when doing code generation. Instead,\n  rely on dex register model, where instructions only reference\n  registers.\n\nChange-Id: Id51bd7d33ac430cb87a53c9f4b0c864eeb1006f9\n"
    },
    {
      "commit": "8ccc3f5d06fd217cdaabd37e743adab2031d3720",
      "tree": "ec8c904baafb4d9b9bfd582245e2d780bcdfaade",
      "parents": [
        "ad174d1b54bf2fa477bec71a0ca93595f54b8fe9"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Mar 19 10:34:11 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Mar 31 09:44:40 2014 +0100"
      },
      "message": "Add support for invoke-static in optimizing compiler.\n\nSupport is limited to calls without parameters and returning\nvoid. For simplicity, we currently follow the Quick ABI.\n\nChange-Id: I54805161141b7eac5959f1cae0dc138dd0b2e8a5\n"
    },
    {
      "commit": "92cf83e001357329cbf41fa15a6e053fab6f4933",
      "tree": "1dc03f1fb8c3f9af4021c1b82f0c5b0baee39600",
      "parents": [
        "a48850ba1f48066785768d2dd296448cd430d494"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Mar 18 17:59:20 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Mar 19 08:47:01 2014 +0000"
      },
      "message": "Run Java tests with the optimizing compiler.\n\nAlso fix a vector.reserve -\u003e vector.resize braino, and build\na GC map that dex2oat expects.\n\nChange-Id: I6acf2f90a4c32f90b79bf7709bf2e43931b98757\n"
    },
    {
      "commit": "787c3076635cf117eb646c5a89a9014b2072fb44",
      "tree": "3c9c6c6d56e3900cf2255a5d1ade008ec6a40681",
      "parents": [
        "b9d50a9829b795932eac4cc50a99b4ce80b0ecb4"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Mar 17 10:20:19 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Mar 18 11:20:20 2014 +0000"
      },
      "message": "Plug new optimizing compiler in compilation pipeline.\n\nAlso rename accessors to ART\u0027s conventions.\n\nChange-Id: I344807055b98aa4b27215704ec362191464acecc\n"
    },
    {
      "commit": "bab4ed7057799a4fadc6283108ab56f389d117d4",
      "tree": "ea1bf495458fd9f7a3ffbed0ea4e1dda5a0b8184",
      "parents": [
        "37d4c1db4d705f5a28001f65afdd68d0527948d8"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Mar 11 17:53:17 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Mar 13 09:23:12 2014 +0000"
      },
      "message": "More code generation for the optimizing compiler.\n\n- Add HReturn instruction\n- Generate code for locals/if/return\n- Setup infrastructure for register allocation. Currently\n  emulate a stack.\n\nChange-Id: Ib28c2dba80f6c526177ed9a7b09c0689ac8122fb\n"
    },
    {
      "commit": "d4dd255db1d110ceb5551f6d95ff31fb57420994",
      "tree": "93c9dfff8d16f2b9675c35477cc4bcd8ea3f630c",
      "parents": [
        "b565506a63e75dac4a8bb9dd54dabf5259e5b95f"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Feb 28 10:23:58 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Mar 04 16:19:11 2014 +0000"
      },
      "message": "Add codegen support to the optimizing compiler.\n\nChange-Id: I9aae76908ff1d6e64fb71a6718fc1426b67a5c28\n"
    }
  ]
}