)]}' { "log": [ { "commit": "bbc6e7edb5fca4a61ac53dd9bce79cb4f0bb3403", "tree": "0fbce767bc383358cf4cd65aafc74140e1850982", "parents": [ "19379b58bd433da91230e4fe6cd96e7416d16adc" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Aug 24 16:58:47 2018 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Aug 28 11:06:07 2018 +0100" }, "message": "Use \u0027final\u0027 and \u0027override\u0027 specifiers directly in ART.\n\nRemove all uses of macros \u0027FINAL\u0027 and \u0027OVERRIDE\u0027 and replace them with\n\u0027final\u0027 and \u0027override\u0027 specifiers. Remove all definitions of these\nmacros as well, which were located in these files:\n- libartbase/base/macros.h\n- test/913-heaps/heaps.cc\n- test/ti-agent/ti_macros.h\n\nART is now using C++14; the \u0027final\u0027 and \u0027override\u0027 specifiers have\nbeen introduced in C++11.\n\nTest: mmma art\nChange-Id: I256c7758155a71a2940ef2574925a44076feeebf\n" }, { "commit": "0ebe0d83138bba1996e9c8007969b5381d972b32", "tree": "a5ee66ebc5b587ade97e56ac8fc7d832fbbed4af", "parents": [ "e1e347dace0ded83774999bb26c37527dcdb1d5a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 21 22:50:39 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 25 15:45:01 2017 +0100" }, "message": "ART: Introduce compiler data type.\n\nReplace most uses of the runtime\u0027s Primitive in compiler\nwith a new class DataType. This prepares for introducing\nnew types, such as Uint8, that the runtime does not need\nto know about.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nBug: 23964345\nChange-Id: Iec2ad82454eec678fffcd8279a9746b90feb9b0c\n" }, { "commit": "225b6464a58ebe11c156144653f11a1c6607f4eb", "tree": "3f1c6067c3841c892edaa1a60a61af9c559cb4e4", "parents": [ "6a9984e62c08bcd78c8e49dd40b1f0f9d53513b7" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 28 12:17:40 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 29 10:49:35 2015 +0100" }, "message": "Optimizing: Tag arena allocations in code generators.\n\nAnd completely remove the deprecated GrowableArray.\n\nReplace GrowableArray with ArenaVector in code generators\nand related classes and tag arena allocations.\n\nLabel arrays use direct allocations from ArenaAllocator\nbecause Label is non-copyable and non-movable and as such\ncannot be really held in a container. The GrowableArray\nnever actually constructed them, instead relying on the\nzero-initialized storage from the arena allocator to be\ncorrect. We now actually construct the labels.\n\nAlso avoid StackMapStream::ComputeDexRegisterMapSize() being\npassed null references, even though unused.\n\nChange-Id: I26a46fdd406b23a3969300a67739d55528df8bf4\n" }, { "commit": "80afd02024d20e60b197d3adfbb43cc303cf29e0", "tree": "ef054c7b4f2a739f7cf063e0bc4c501c2c7e41b5", "parents": [ "559b178e34c5d92e7932f92e5d8a981ac334606f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 19 18:08:00 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 26 15:59:02 2015 +0100" }, "message": "ART: Clean up arm64 kNumberOfXRegisters usage.\n\nAvoid undefined behavior for arm64 stemming from 1u \u003c\u003c 32 in\nloops with upper bound kNumberOfXRegisters.\n\nCreate iterators for enumerating bits in an integer either\nfrom high to low or from low to high and use them for\n\u003carch\u003eContext::FillCalleeSaves() on all architectures.\n\nRefactor runtime/utils.{h,cc} by moving all bit-fiddling\nfunctions to runtime/base/bit_utils.{h,cc} (together with\nthe new bit iterators) and all time-related functions to\nruntime/base/time_utils.{h,cc}. Improve test coverage and\nfix some corner cases for the bit-fiddling functions.\n\nBug: 13925192\nChange-Id: I704884dab15b41ecf7a1c47d397ab1c3fc7ee0f7\n" }, { "commit": "ad4450e5c3ffaa9566216cc6fafbf5c11186c467", "tree": "eecf36e8e9d8112e765ad8840eb2d27f8d0415ab", "parents": [ "f8bdd9f3a002970e4b8fdcf6fe6730116f1626c3" ], "author": { "name": "Zheng Xu", "email": "zheng.xu@arm.com", "time": "Fri Apr 17 18:48:56 2015 +0800" }, "committer": { "name": "Zheng Xu", "email": "zheng.xu@arm.com", "time": "Fri Apr 17 18:54:08 2015 +0800" }, "message": "Opt compiler: Implement parallel move resolver without using swap.\n\nThe algorithm of ParallelMoveResolverNoSwap() is almost the same with\nParallelMoveResolverWithSwap(), except the way we resolve the circular\ndependency. NoSwap() uses additional scratch register to resolve the\ncircular dependency. For example, (0-\u003e1) (1-\u003e2) (2-\u003e0) will be performed\nas (2-\u003escratch) (1-\u003e2) (0-\u003e1) (scratch-\u003e0).\n\nOn architectures without swap register support, NoSwap() can reduce the\nnumber of moves from 3x(N-1) to (N+1) when there is circular dependency\nwith N moves.\n\nAnd also, NoSwap() algorithm does not depend on architecture register\nlayout information, which means it can support register pairs on arm32\nand X/W, D/S registers on arm64 without additional modification.\n\nChange-Id: Idf56bd5469bb78c0e339e43ab16387428a082318\n" }, { "commit": "669d8a1edbb2a78e08731a9cd6d8e815b0ec49db", "tree": "240d26edb4af28ccd7fa65a9fecc39f718d3d603", "parents": [ "ee2da343bb2a54d9d77e29226e0317ccc913c8c1", "e14590bdfed24df30e6b7545fc819ba03ff8bba1" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Apr 16 09:40:38 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Apr 16 09:40:39 2015 +0000" }, "message": "Merge \"Revert \"[optimizing] Improve x86 parallel moves/swaps\"\"" }, { "commit": "e14590bdfed24df30e6b7545fc819ba03ff8bba1", "tree": "1fe89a424c91dae7adc07ebd620dce8297a0854e", "parents": [ "a5c19ce8d200d68a528f2ce0ebff989106c4a933" ], "author": { "name": "Guillaume Sanchez", "email": "guillaumesa@google.com", "time": "Wed Apr 15 18:57:27 2015 +0000" }, "committer": { "name": "Guillaume Sanchez", "email": "guillaumesa@google.com", "time": "Wed Apr 15 18:57:27 2015 +0000" }, "message": "Revert \"[optimizing] Improve x86 parallel moves/swaps\"\n\nThis reverts commit a5c19ce8d200d68a528f2ce0ebff989106c4a933.\n\nThis commit introduces a performance regression on CaffeineLogic of 30%.\n\nChange-Id: I917e206e249d44e1748537bc1b2d31054ea4959d\n" }, { "commit": "9021825d1e73998b99c81e89c73796f6f2845471", "tree": "13e1038931cbb8bf8b8d0f4e3f51553ba1bfa983", "parents": [ "858d28ca2e73a785977f53141e775a7d4841b89d" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Apr 15 11:56:51 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Apr 15 12:53:42 2015 +0100" }, "message": "Type MoveOperands.\n\nThe ParallelMoveResolver implementation needs to know if a move\nis for 64bits or not, to handle swaps correctly.\n\nBug found, and test case courtesy of Serguei I. Katkov.\n\nChange-Id: I9a0917a1cfed398c07e57ad6251aea8c9b0b8506\n" }, { "commit": "a5c19ce8d200d68a528f2ce0ebff989106c4a933", "tree": "4638a8d8e5b1562ec5ed05967490fec1ef7f0d17", "parents": [ "6d80318c382a3490ab605b46fa7cb22c5e823fec" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed Apr 01 12:51:05 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri Apr 10 12:08:31 2015 -0400" }, "message": "[optimizing] Improve x86 parallel moves/swaps\n\nAdd a new constructor to ScratchRegisterScope that will supply a\nregister if there is a free one, but not spill to force one. Use this\nto generated alternate code that doesn\u0027t use a temporary, as the\nspill/restore of a register generates extra instructions that aren\u0027t\nnecessary on x86.\n\nHere is the benefit for a 32 bit memory-to-memory exchange with no\nfree registers:\n\u003c 50 \t push eax\n\u003c 53 \t push ebx\n\u003c 8B44244C \t mov eax, [esp + 76]\n\u003c 8B5C246C \t mov ebx, [esp + 108]\n\u003c 8944246C \t mov [esp + 108], eax\n\u003c 895C244C \t mov [esp + 76], ebx\n\u003c 5B \t pop ebx\n\u003c 58 \t pop eax\n---\n\u003e FF742444 \t push [esp + 68]\n\u003e FF742468 \t push [esp + 104]\n\u003e 8F44244C \t pop [esp + 72]\n\u003e 8F442468 \t pop [esp + 100]\n\nAvoid using xchg instruction, as it is slow on smaller processors.\n\nChange-Id: Id29ee3abd998577baaee552d55d23e60ae0c7871\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "f7a0c4e421b5edaad5b7a15bfff687da28d0b287", "tree": "5423a2357661b80d75cb2e3a2b5395a3fe3cd9b5", "parents": [ "0f2433bfcb02a662fe739e8e2b068abc2958e4c1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Feb 10 17:08:47 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Feb 10 19:12:59 2015 +0000" }, "message": "Improve ParallelMoveResolver to work with pairs.\n\nChange-Id: Ie2a540ffdb78f7f15d69c16a08ca2d3e794f65b9\n" }, { "commit": "48c310c431b110f6ab54907da20c4fa39a8f76b8", "tree": "3f8e75544539544feda353a1f225145e5ee41fa0", "parents": [ "c40a4350daac81ddbfc5f6ceab934f2180dc4ec6" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jan 14 10:45:05 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jan 14 14:45:40 2015 +0000" }, "message": "Remove constant moves after emitting them in parallel resolver.\n\nThis fixes the case where a constant move requires a scratch\nregister. Note that there is no backend that needs this for now,\nbut X86 might with the move to hard float.\n\nChange-Id: I37f6b8961b48f2cf6fbc0cd281e70d58466d018e\n" }, { "commit": "0279ebb3efd653e6bb255470c99d26949c7bcd95", "tree": "d58b29754f7b3c88616e6e4d6c19346821d244ae", "parents": [ "f1f05d303988a5c071c87b760056be8358276c94" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Wed Oct 08 17:27:48 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Thu Oct 09 08:25:34 2014 -0700" }, "message": "Tidy ELF builder.\n\nDon\u0027t do \"if (ptr)\". Use const. Use DISALLOW_COPY_AND_ASSIGN. Avoid public\nmember variables.\nMove ValueObject to base and use in ELF builder.\nTidy VectorOutputStream to not use non-const reference arguments.\n\nChange-Id: I2c727c3fc61769c3726de7cfb68b2d6eb4477e53\n" }, { "commit": "e27f31a81636ad74bd3376ee39cf215941b85c0e", "tree": "12dd6a1153b78b831c887f65f0bcef715e89719d", "parents": [ "dfc2091d2fb8a7694f69acf8bd39ce4953e026c2" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 12 17:53:14 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 12 18:05:00 2014 +0100" }, "message": "Enable the register allocator on ARM.\n\n- Also fixes a few bugs/wrong assumptions in code not hit by x86.\n- We need to differentiate between moves due to connecting siblings within\n a block, and moves due to control flow resolution.\n\nChange-Id: Idd05cf138a71c8f36f5531c473de613c0166fe38\n" }, { "commit": "86dbb9a12119273039ce272b41c809fa548b37b6", "tree": "a4626e21ae16a9a5e133ea3e5e95b58d2ea4d8e5", "parents": [ "c936622863a50bdda9b10062515dfc02a8c8b652" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 04 11:12:39 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 12 10:02:06 2014 +0100" }, "message": "Final CL to enable register allocation on x86.\n\nThis CL implements:\n1) Resolution after allocation: connecting the locations\n allocated to an interval within a block and between blocks.\n2) Handling of fixed registers: some instructions require\n inputs/output to be at a specific location, and the allocator\n needs to deal with them in a special way.\n3) ParallelMoveResolver::EmitNativeCode for x86.\n\nChange-Id: I0da6bd7eb66877987148b87c3be6a983b4e3f858\n" }, { "commit": "aa037b52a2eef463dab7b3a7e3c7cb441d28533a", "tree": "52c3150eb0353acf22a8de387a25fff5e8bdaecb", "parents": [ "74d055cc4337ed69d6b57179a449701207097ec4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri May 23 10:40:42 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri May 23 10:40:42 2014 +0100" }, "message": "Add virtual destructor to please one of our compilers.\n\nChange-Id: I931d130caa75ab90b677e14f1a2d0c438c43ed4f\n" }, { "commit": "4e3d23aa1523718ea1fdf3a32516d2f9d81e84fe", "tree": "78593d033513a98486a409e7b23678ccced12cd5", "parents": [ "59f3f62534581311c7c403c832f56c272426a17c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu May 22 18:32:45 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri May 23 10:00:44 2014 +0100" }, "message": "Import Dart\u0027s parallel move resolver.\n\nAnd write a few tests while at it.\n\nA parallel move resolver will be needed for performing multiple moves\nthat are conceptually parallel, for example moves at a block\nexit that branches to a block with phi nodes.\n\nChange-Id: Ib95b247b4fc3f2c2fcab3b8c8d032abbd6104cd7\n" } ] }