)]}'
{
  "log": [
    {
      "commit": "546243375d7e129aa02ca7ea9663ed7c40b4880e",
      "tree": "adc158db1f6d6d6c482ac88462ad687a63d8267d",
      "parents": [
        "7ffab8106445905d30fdef6291ebd18765c961f0"
      ],
      "author": {
        "name": "Yabin Cui",
        "email": "yabinc@google.com",
        "time": "Fri Jun 25 17:37:32 2021 -0700"
      },
      "committer": {
        "name": "Yabin Cui",
        "email": "yabinc@google.com",
        "time": "Thu Jul 01 00:37:35 2021 +0000"
      },
      "message": "libelffile: move to DWARF3 when writing .debug_frame.\n\nzR augmentation in .debug_frame isn\u0027t recognized by llvm-dwarfdump.\nThis leads to below test failure after compiler update:\n  DwarfTest.DebugFrame\n  DwarfTest.x86_64_RegisterMapping\n\nSo switch to DWARF3, which supports 64-bit format without using zR\naugmentation.\n\nBug: 192012848\nTest: run art-test\nChange-Id: Ib37c0bba7a293ae7b04c8cc0e9e09c045bcc0287\n"
    },
    {
      "commit": "03e871678db7585a621740fb1ce65a75fdc44319",
      "tree": "3d984535c3ec7d10fbad28b9890d205223a1eaca",
      "parents": [
        "bbec8a6fc720ee5ce572d3fb63617fb0af6addc7"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Feb 25 16:29:21 2020 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Feb 26 08:36:18 2020 +0000"
      },
      "message": "Remove MIPS support from libelffile.\n\nTest: m\nChange-Id: I01e6c6abb845baa4763929f5b9b6b3b36ac0e8b0\n"
    },
    {
      "commit": "1a225a76ee6bc29833aee048b6cfae20242bdc8b",
      "tree": "069bfc01d827fcbf9aa4415c4d63d354648f396c",
      "parents": [
        "323844002e54243e295497e7f829e46a533da621"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Jul 05 13:37:42 2019 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Jul 18 13:37:15 2019 +0000"
      },
      "message": "ARM/ARM64: Improve frame entry/exit codegen.\n\nOn ARM64, use STP pre-index for the method and the lowest\nspilled core register for method entry if there\u0027s no gap or\nFP spills in between. On exit, use LDP post-index to restore\nin this case, ignoring the method by loading to XZR. Thus,\nwe save one instruction for both entry end exit for such\nmethods and the performance should be the same or better.\n\nOn ARM, use a single PUSH/POP for method entry and core\nspills if the gap between them is 2 words or less and and we\nhave one or no FP spill, spill args as filler if needed. On\nexit, load the FP spill if any and do a single POP for core\nregisters and return in this situation, clobbering as many\nregisters from r2-r4 as needed; these caller-save registers\nare not used to pass return values. If we cannot do this\nbecause of FP spills but the gap between the method and FP\nspills is 2 words or less, we adjust SP and save the method\nin one PUSH after spilling; there is no similar handling\nfor method exit as the method does not need to be restored.\nThis may improve or degrade performance a bit depending on\nthe particular situation; in the worst case we PUSH/POP\nthree additional registers as a cost for smaller code size.\n\naosp_taimen-userdebug prebuils:\n - before:\n   arm/boot*.oat: 19147484\n   arm64/boot*.oat: 22558344\n   oat/arm/services.odex: 21922256\n - after:\n   arm/boot*.oat: 19105436 (-41KiB, -0.2%)\n   arm64/boot*.oat: 22549624 (-9KiB, -0.04%)\n   oat/arm/services.odex: 21914128 (-8KiB, -0.04%)\n\nTest: aosp_taimen-userdebug boots.\nTest: run-gtests.sh\nTest: testrunner.py --target --optimizing\nBug: 136144107\nChange-Id: Id36c67b4e735418fb18bcd3269b72b25695fbaa2\n"
    },
    {
      "commit": "2faab0064bccdf06a454ba5fc37f2cfeceab78bc",
      "tree": "bc51a211068019d77e7739164adf5be5c6333b7b",
      "parents": [
        "5f1465ff689eccbb1b6d15160d1a3700793956da"
      ],
      "author": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Tue Feb 12 16:35:48 2019 +0000"
      },
      "committer": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Wed Mar 20 15:20:54 2019 +0000"
      },
      "message": "Create libelffile library for ELF file manipulation.\n\nMove some of our tooling to library to make it reusable.\n\nRemove MIPS support from the ELF builder.  This is slightly\neasier than making it independent of the runtime.\n\nBug: 110133331\nTest: test.py -b --host\nChange-Id: I93343808d0e27ee8e1117e713a2503e8179fc245\n"
    }
  ]
}