)]}' { "log": [ { "commit": "957c538a4d712066e6d7a309ee07f013c8d2e0cd", "tree": "82cd8631e707df89fcaf4acaabf9a258f474b702", "parents": [ "552a13415573da19eafa46e1ac00fb0eb68f2b23" ], "author": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Mon Mar 18 12:37:58 2019 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 16 14:45:09 2019 +0000" }, "message": "ART: Refactor SchedulingGraph for consistency and clarity\n\nThe CL moves functionality from SchedulingGraph to other classes,\ndeletes unused code and moves code used for testing to the tests source\nfile:\n1. SchedulingGraph::AddDependency: move checks whether a dependency has\nbeen added to SchedulingNode::Add*Predecessor as it is a SchedulingNode\nresponsibility to keep a unique set of predecessors.\n2. Create SideEffectDependencyAnalysis class. Code doing side effect dependency\nanalysis is moved from SchedulingGraph into the class.\n3. Remove SchedulingGraph::HasImmediate*Dependency methods as there are\nSchedulingNode::Has*Dependency methods for such kind of checks.\n4. SchedulingGraph::HasImmediate*Dependency(HInstruction,HInstruction) methods\nare only used by tests. Their code is moved to a new class TestSchedulingGraph in\nthe tests source file.\n\nTest: test.py --host --optimizing --jit --gtest\nTest: test.py --target --optimizing --jit\nTest: run-gtests.sh\n\nChange-Id: Id16eb6e9f8b9706e616dff0ccc1d0353ed968367\n" }, { "commit": "3db70689e3e1c92344d436a8ea4265046bdef449", "tree": "3db08743e968062ed5bdc143233cdb3c4564696b", "parents": [ "1650dafad62578a1766bd617d78458a4cf1e2a9a" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Dec 26 15:12:03 2018 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Dec 27 12:56:39 2018 -0800" }, "message": "ART: Refactor for bugprone-argument-comment\n\nHandles compiler.\n\nBug: 116054210\nTest: WITH_TIDY\u003d1 mmma art\nChange-Id: I5cdfe73c31ac39144838a2736146b71de037425e\n" }, { "commit": "09d041b214f54e0866516b18b44e44f28d7be70b", "tree": "607da2425d2a6d7920ad344f5a16126c0d3c49ce", "parents": [ "d7a0192ffa9c9015f0980b1aaa694e914a37d57f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jul 30 12:51:59 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 16 16:13:44 2018 +0100" }, "message": "Reduce memory usage by other deps in scheduler.\n\nRely on transitive dependencies instead of adding the full\nset of side effect dependencies.\n\nCompiling a certain apk, the most memory hungry method has\nthe scheduler memory allocations in ArenaStack hidden by\nthe register allocator:\n - before:\n MEM: used: 155744672, allocated: 168446408, lost: 12036488\n Scheduler 155744672\n - after:\n MEM: used: 5181680, allocated: 7096776, lost: 114752\n SsaLiveness 4683440\n RegAllocator 314312\n RegAllocVldt 183928\nThe total arena memory used, including the ArenaAllocator\nnot listed above, goes from 167170024 to 16607032 (-90%).\n(Measured with kArenaAllocatorCountAllocations\u003dtrue,\nkArenaAllocatorPreciseTracking\u003dfalse.)\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nBug: 64312607\nChange-Id: I825bcfb490171070c46ad6d1f460785f4e75cfd7\n" }, { "commit": "ced04835d8e3cd3f68576cfffc1d21283ca151b4", "tree": "125ddd1d222f4fb1710e17c76803ad3e92572a5c", "parents": [ "350b6a312222b9b27bfee0e72ce261a45cb60e1c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 26 14:42:17 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 02 15:47:02 2018 +0100" }, "message": "Reuse arena memory for each block in scheduler.\n\nThis reduces the peak memory used for large methods with\nmultiple blocks to schedule.\n\nCompiling the aosp_taimen-userdebug boot image, the most\nmemory hungry method BatteryStats.dumpLocked has the\nScheduler memory allocations in ArenaStack hidden by the\nregister allocator:\n - before:\n MEM: used: 8300224, allocated: 9175040, lost: 197360\n Scheduler 8300224\n - after:\n MEM: used: 5914296, allocated: 7864320, lost: 78200\n SsaLiveness 5532840\n RegAllocator 144968\n RegAllocVldt 236488\nThe total arena memory used, including the ArenaAllocator\nnot listed above, goes from 44333648 to 41950324 (-5.4%).\n(Measured with kArenaAllocatorCountAllocations\u003dtrue,\nkArenaAllocatorPreciseTracking\u003dfalse.)\n\nAlso remove one unnecessary -Wframe-larger-than\u003d workaround\nand add one workaround for large frame with the above arena\nalloc tracking flags.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nBug: 34053922\nChange-Id: I7fd8d90dcc13b184b1e5bd0bcac072388710a129\n" }, { "commit": "b765a3f7f7b7c7efaab5fb331796b53439dbe04c", "tree": "feba405a8f483f2dcf14ceab0528848f24468e91", "parents": [ "487ad46b7ee79eb4a03d3560072c309280069c04" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu May 10 14:47:48 2018 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue May 15 13:23:29 2018 -0700" }, "message": "Refactoring LSE/LSA: introduce heap location type\n\nRationale:\nThis refactoring introduces data types to heap locations.\nThis will allow better type disambiguation in the future.\nAs a first showcase, it already removes rather error-prone\n\"exceptional\" code in LSE dealing with array types on null\nvalues. Furthermore, many LSA specific details started to \"leak\"\ninto clients, which is also error-prone. This refactoring moves\nsuch details back into just LSA, where it belongs.\n\nTest: test-art-host,target\n\nBug: b/77906240\n\nChange-Id: Id327bbe86dde451a942c9c5f9e83054c36241882\n" }, { "commit": "2477320a8d9de58ede68e2645ea53c10f71dcd57", "tree": "f428a6856e10d8ebaff0bb2da544a8d41c35ab77", "parents": [ "5a87e19e4bf1b6719c2aad3effde1b38d2c3085c" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Apr 26 10:28:51 2018 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Apr 26 10:28:51 2018 -0700" }, "message": "Step 1 of 2: conditional passes.\n\nRationale:\nThe change adds a return value to Run() in preparation of\nconditional pass execution. The value returned by Run() is\nbest effort, returning false means no optimizations were\napplied or no useful information was obtained. I filled\nin a few cases with more exact information, others\nstill just return true. In addition, it integrates inlining\nas a regular pass, avoiding the ugly \"break\" into\noptimizations1 and optimziations2.\n\nBug: b/78171933, b/74026074\n\nTest: test-art-host,target\nChange-Id: Ia39c5c83c01dcd79841e4b623917d61c754cf075\n" }, { "commit": "1f8d51bc03cbc607ae32fadf3a90f385adeffb95", "tree": "70e18902051ce47e0d524525b83709efbe6f250f", "parents": [ "7a02c66fd9ed174fc2e49ccc9f582dd661b7de9e" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Feb 15 10:42:37 2018 -0800" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Mar 07 09:22:09 2018 -0800" }, "message": "Introduce MIN/MAX/ABS as HIR nodes.\n\nRationale:\nHaving explicit MIN/MAX/ABS operations (in contrast\nwith intrinsics) simplifies recognition and optimization\nof these common operations (e.g. constant folding, hoisting,\ndetection of saturation arithmetic). Furthermore, mapping\nconditionals, selectors, intrinsics, etc. (some still TBD)\nonto these operations generalizes the way they are optimized\ndownstream substantially.\n\nBug: b/65164101\n\nTest: test-art-host,target\n\nChange-Id: I69240683339356e5a012802f179298f0b04c6726\n" }, { "commit": "3dad341ed027b760d9b4ee402cb2c93ac484a07a", "tree": "a69817c3b2d455273b23d083267ef08c8b9adaee", "parents": [ "d961043ff1dd6fddb68aa90c1f939cfafec24219" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Feb 28 12:01:46 2018 -0800" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Mar 01 13:07:04 2018 -0800" }, "message": "Introduce ABS as HIR nodes.\n\nNOTE: step 1 of 2 for\n\"Introduce MIN/MAX/ABS as HIR nodes.\"\n\nRationale:\nHaving explicit MIN/MAX/ABS operations (in contrast\nwith intrinsics) simplifies recognition and optimization\nof these common operations (e.g. constant folding, hoisting,\ndetection of saturation arithmetic). Furthermore, mapping\nconditionals, selectors, intrinsics, etc. (some still TBD)\nonto these operations generalizes the way they are optimized\ndownstream substantially.\n\nBug: b/65164101\n\nTest: test-art-host,target\nChange-Id: I9c93987197216158ba02c8aca2385086adedabc4\n" }, { "commit": "b50b16a68ababbc9acab6102bf0bb63bd5083763", "tree": "f440f12f8ab3b14b8c4b02c978561f43356e61b0", "parents": [ "2202d56061941b4fecbdb018d84bcefb05b6c683" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Tue Sep 19 17:43:29 2017 +0100" }, "committer": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Thu Nov 09 15:48:04 2017 -0800" }, "message": "Support VecLoad and VecStore in LSA.\n\nTest: test-art-host\nTest: test-art-target\nTest: load_store_analysis_test\n\nChange-Id: I7d819061ec9ea12f86a926566c3845231fce6e26\n" }, { "commit": "33bff25bcd7a02d35c54f63740eadb1a4833fc92", "tree": "553db4f60878acf2a0fa7036a739d406df9a29b7", "parents": [ "321b3ca9a36d769283c64d4bdee0798db80af524" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Nov 01 14:35:42 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 02 10:11:02 2017 +0000" }, "message": "ART: Make InstructionSet an enum class and add kLast.\n\nAdding InstructionSet::kLast shall make it easier to encode\nthe InstructionSet in fewer bits using BitField\u003c\u003e. However,\nintroducing `kLast` into the `art` namespace is not a good\nidea, so we change the InstructionSet to an enum class.\nThis also uncovered a case of InstructionSet::kNone being\nerroneously used instead of vixl32::Condition::None(), so\nit\u0027s good to remove `kNone` from the `art` namespace.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nChange-Id: I6fa6168dfba4ed6da86d021a69c80224f09997a6\n" }, { "commit": "69d310e0317e2fce97bf8c9c133c5c2c0332e61d", "tree": "fba05a1530e6fc4a2e6950303c1f7c6b0ffbb936", "parents": [ "e764d2e50c544c2cb98ee61a15d613161ac6bd17" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 09 14:12:23 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Oct 11 09:44:26 2017 +0100" }, "message": "Use ScopedArenaAllocator for building HGraph.\n\nMemory needed to compile the two most expensive methods for\naosp_angler-userdebug boot image:\n BatteryStats.dumpCheckinLocked() : 21.1MiB -\u003e 20.2MiB\n BatteryStats.dumpLocked(): 42.0MiB -\u003e 40.3MiB\nThis is because all the memory previously used by the graph\nbuilder is reused by later passes.\n\nAnd finish the \"arena\"-\u003e\"allocator\" renaming; make renamed\nallocator pointers that are members of classes const when\nappropriate (and make a few more members around them const).\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nBug: 64312607\nChange-Id: Ia50aafc80c05941ae5b96984ba4f31ed4c78255e\n" }, { "commit": "e764d2e50c544c2cb98ee61a15d613161ac6bd17", "tree": "112aa7ca459d2edb4f800897060a2407fcc622c7", "parents": [ "ca6fff898afcb62491458ae8bcd428bfb3043da1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 05 14:35:55 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 09 10:39:22 2017 +0100" }, "message": "Use ScopedArenaAllocator for register allocation.\n\nMemory needed to compile the two most expensive methods for\naosp_angler-userdebug boot image:\n BatteryStats.dumpCheckinLocked() : 25.1MiB -\u003e 21.1MiB\n BatteryStats.dumpLocked(): 49.6MiB -\u003e 42.0MiB\nThis is because all the memory previously used by Scheduler\nis reused by the register allocator; the register allocator\nhas a higher peak usage of the ArenaStack.\n\nAnd continue the \"arena\"-\u003e\"allocator\" renaming.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nBug: 64312607\nChange-Id: Idfd79a9901552b5147ec0bf591cb38120de86b01\n" }, { "commit": "ca6fff898afcb62491458ae8bcd428bfb3043da1", "tree": "195a6b16d3a4b34acc2faf91ce56f448efb15e07", "parents": [ "aa7273e56fbafc2692c8d20a31b50d2f4bdd2aa1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Oct 03 14:49:14 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Oct 06 17:53:50 2017 +0100" }, "message": "ART: Use ScopedArenaAllocator for pass-local data.\n\nPasses using local ArenaAllocator were hiding their memory\nusage from the allocation counting, making it difficult to\ntrack down where memory was used. Using ScopedArenaAllocator\nreveals the memory usage.\n\nThis changes the HGraph constructor which requires a lot of\nchanges in tests. Refactor these tests to limit the amount\nof work needed the next time we change that constructor.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: Build with kArenaAllocatorCountAllocations \u003d true.\nBug: 64312607\nChange-Id: I34939e4086b500d6e827ff3ef2211d1a421ac91a\n" }, { "commit": "0ebe0d83138bba1996e9c8007969b5381d972b32", "tree": "a5ee66ebc5b587ade97e56ac8fc7d832fbbed4af", "parents": [ "e1e347dace0ded83774999bb26c37527dcdb1d5a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 21 22:50:39 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 25 15:45:01 2017 +0100" }, "message": "ART: Introduce compiler data type.\n\nReplace most uses of the runtime\u0027s Primitive in compiler\nwith a new class DataType. This prepares for introducing\nnew types, such as Uint8, that the runtime does not need\nto know about.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nBug: 23964345\nChange-Id: Iec2ad82454eec678fffcd8279a9746b90feb9b0c\n" }, { "commit": "eac21ef2617cc02e6a093d811a926115fb69bd05", "tree": "b9ea86a35a870669029e6375e2a01e5f90297212", "parents": [ "73de4a8f0936bfb8b74db0465f277a2b68d16905", "1545ccc4852255870b5c4676203fc7c2f2fa393f" ], "author": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Thu Aug 10 22:45:45 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Aug 10 22:45:45 2017 +0000" }, "message": "Merge \"scheduler should not schedule volatile field accesses.\"" }, { "commit": "1545ccc4852255870b5c4676203fc7c2f2fa393f", "tree": "5e983b1ece6e6d7af3cd2d476bdbcac6ebb49631", "parents": [ "3b21019edb5586a73516833482fc203e75309dbe" ], "author": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Tue Aug 08 15:24:26 2017 -0700" }, "committer": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Thu Aug 10 14:10:06 2017 -0700" }, "message": "scheduler should not schedule volatile field accesses.\n\nUnresolved field accesses are not scheduled either since it\u0027s not know\nwhether they are volatile or not, and they are already expensive anyway.\n\nTest: 706-checker-scheduler\nChange-Id: Ie736542590a2459ee9b597e090fbedd4b527782a\n" }, { "commit": "179861c7e8bb4f5f1b44e7588fc8791446c30ae5", "tree": "b4310dc30bfb5f161af6e8bcee8b8a39baa449ad", "parents": [ "3b21019edb5586a73516833482fc203e75309dbe" ], "author": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Fri Aug 04 13:21:31 2017 -0700" }, "committer": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Wed Aug 09 13:30:21 2017 -0700" }, "message": "Run HeapLocationCollector once in scheduler instead of locally.\n\nHeapLocationCollector does alias analysis globally instead of at block\nscale. For example doing it locally breaks the pre-existence based alias\nanalysis. It\u0027s also expensive to do it for each basic block.\n\nTest: run-test/gtest on target/host, 662-regression-alias\nBug: 64018485\nChange-Id: If001e2961b5a52b50b1bcefd5e4a89d9c25f25b8\n" }, { "commit": "2a3471fc83383bfe3e060799482e372420ba6150", "tree": "7b7764521a0b67392e023f1efacc0dbae64fe675", "parents": [ "89ae0f42e38a2f985ac404830f2a05fecf9547e2" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Mon May 08 18:36:40 2017 +0100" }, "committer": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Fri Jun 30 16:32:54 2017 +0100" }, "message": "Disambiguate memory accesses in instruction scheduling\n\nBased on aliasing information from heap location collector,\ninstruction scheduling can further eliminate side-effect\ndependencies between memory accesses to different locations,\nand perform better scheduling on memory loads and stores.\n\nPerformance improvements of this CL, measured on Cortex-A53:\n| benchmarks | ARM64 backend | ARM backend |\n|----------------+---------------|-------------|\n| algorithm | 0.1 % | 0.1 % |\n| benchmarksgame | 0.5 % | 1.3 % |\n| caffeinemark | 0.0 % | 0.0 % |\n| math | 5.1 % | 5.0 % |\n| stanford | 1.1 % | 0.6 % |\n| testsimd | 0.4 % | 0.1 % |\n\nCompilation time impact is negligible, because this\nheap location load store analysis is only performed\non loop basic blocks that get instruction scheduled.\n\nTest: m test-art-host\nTest: m test-art-target\nTest: 706-checker-scheduler\n\nChange-Id: I43d7003c09bfab9d3a1814715df666aea9a7360b\n" }, { "commit": "757b26c2442ae792039bc50153bef91145f3c7b4", "tree": "4d8798405364a51bb7dd6f2c365bfdffca26f791", "parents": [ "fe9a4f061841a3c597aac6817a47c799c54fcad7" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 29 16:11:41 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 29 16:13:06 2017 +0100" }, "message": "Add CHECKs to help diagnose a crash seen internally.\n\nbug: 62855731\nTest: test.py\nChange-Id: I7904257174ce11a138ca769172dbc2e33e10ef76\n" }, { "commit": "7d157fcaaae137cc98dbfb872aa1bdc0105a898f", "tree": "2b7d8affda23908e5bfbfaad446079db2ef1ee09", "parents": [ "58d7ddc678e5bcd2364c24c4bdc8a3cfbcfc5358" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 10 16:29:23 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 11 11:14:54 2017 +0100" }, "message": "Clean up some uses of \"auto\".\n\nMake actual types more explicit, either by replacing \"auto\"\nwith actual type or by assigning std::pair\u003c\u003e elements of\nan \"auto\" variable to typed variables. Avoid binding const\nreferences to temporaries. Avoid copying a container.\n\nTest: m test-art-host-gtest\nChange-Id: I1a59f9ba1ee15950cacfc5853bd010c1726de603\n" }, { "commit": "f7caf682c6b4769b2a3dd2f2241532b98709c1a3", "tree": "88ecbd1fa756e722fd79e2b696620cd61ac3305f", "parents": [ "91f956c925f015b8cd355e8ec2a697a4ba69f7ab" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Wed Mar 01 16:07:02 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon May 08 08:33:07 2017 +0000" }, "message": "Instruction scheduling for ARM.\n\nPerformance improvements on various benchmarks with this CL:\n\nbenchmarks improvements\n---------------------------\nalgorithm 1%\nbenchmarksgame 2%\ncaffeinemark 2%\nmath 3%\nstanford 4%\n\nTested on ARM Cortex-A53 CPU.\n\nThe code size impact is negligible.\n\nTest: m test-art-host\nTest: m test-art-target\nChange-Id: I314c90c09ce27e3d224fc686ef73c7d94a6b5a2c\n" }, { "commit": "22aa54bf8469689c7c6c33f15ff4df2ffba8fa15", "tree": "14204d55784dce3ffdd2641382a763afee85ced0", "parents": [ "8116003cc9dd1e74fac1682eec547b8bb0afb061" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Tue Oct 18 09:32:29 2016 +0100" }, "committer": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Wed Jan 25 14:25:20 2017 +0000" }, "message": "AArch64: Add HInstruction scheduling support.\n\nThis commit adds a new `HInstructionScheduling` pass that performs\nbasic scheduling on the `HGraph`.\n\nCurrently, scheduling is performed at the block level, so no\n`HInstruction` ever leaves its block in this pass.\n\nThe scheduling process iterates through blocks in the graph. For\nblocks that we can and want to schedule:\n1) Build a dependency graph for instructions. It includes data\n dependencies (inputs/uses), but also environment dependencies and\n side-effect dependencies.\n2) Schedule the dependency graph. This is a topological sort of the\n dependency graph, using heuristics to decide what node to schedule\n first when there are multiple candidates. Currently the heuristics\n only consider instruction latencies and schedule first the\n instructions that are on the critical path.\n\nTest: m test-art-host\nTest: m test-art-target\n\nChange-Id: Iec103177d4f059666d7c9626e5770531fbc5ccdc\n" } ] }