)]}'
{
  "log": [
    {
      "commit": "7f88c1a269754001bfcaf311b378cf1cc71acf84",
      "tree": "147bb988929e8bd8827c4b148f28da4c28c0ea70",
      "parents": [
        "5247113f3277fd679e3e1beeb6fbfb30797aa481"
      ],
      "author": {
        "name": "xueliang.zhong",
        "email": "xueliang.zhong@linaro.org",
        "time": "Tue Nov 06 11:42:41 2018 +0000"
      },
      "committer": {
        "name": "Evgeny Astigeevich",
        "email": "evgeny.astigeevich@linaro.org",
        "time": "Wed Jan 30 14:09:25 2019 +0000"
      },
      "message": "ART: Enable ISA features run-time detection for ARM64\n\nOn a target run-time detected ISA features can be more accurate than\ninstruction set features based on a build-time information such as an\ninstruction set variant or C++ defines. Build-time based features can\nbe too generic and do not include all features a target CPU supports.\n\nThis CL enables instruction feature run-time detection in the JIT/AOT\ncompilers:\n\n- The value \"runtime\" to the option \"--instruction-set-features\" to try\nto detect CPU features at run time. If a target does not support run-time\ndetection it has the same effect as the value \"default\".\n- Runtime uses \"--instruction-set-features\u003druntime\" if run-time detection is\nsupported.\n\nThe CL also cleans up how an instruction set feature string is processed\nby InstructionSetFeatures::AddFeaturesFromString. It used to make redundant\nuses of Trim in subclasses. The calls are replaced with DCHECKs\nverifying that feature names are already trimmed.\n\nTest: m test-art-target-gtest\nTest: m test-art-host-gtest\nTest: art/test.py --target --optimizing --interpreter --jit\nTest: art/test.py --host --optimizing --interpreter --jit\nTest: Pixel 3 UI booted\n\nChange-Id: I223d5bc968d589dba5c09f6b03ee8c25987610b0\n"
    },
    {
      "commit": "8764dc3b3eda7f6f13ed7b584475503fe5bedd59",
      "tree": "e8f6e3a4a2596595ffdc8a517daaf37030482eae",
      "parents": [
        "49b74a8c685acfe43dd33e3f51a24c486388bee1"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Jan 07 15:20:12 2019 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Wed Jan 09 12:38:30 2019 -0800"
      },
      "message": "ART: Use iosfwd more\n\nUse iosfwd where an include of ostream is unnecessary. Also move\ncallee_save_type.h to runtime.\n\nBug: 119869270\nTest: mmma art\nChange-Id: Id8995d6f524e4c491eb6f57fdffb940cf35d291f\n"
    },
    {
      "commit": "c431b9dc4b23cc950eb313695258df5d89f53b22",
      "tree": "422273559c3ae52caff0c6b1cf1a62a8312f0e26",
      "parents": [
        "f46f46cf5bd32788d5252b7107628a66594a5e98"
      ],
      "author": {
        "name": "David Sehr",
        "email": "sehr@google.com",
        "time": "Fri Mar 02 12:01:51 2018 -0800"
      },
      "committer": {
        "name": "David Sehr",
        "email": "sehr@google.com",
        "time": "Mon Mar 05 13:58:20 2018 -0800"
      },
      "message": "Move most of runtime/base to libartbase/base\n\nEnforce the layering that code in runtime/base should not depend on\nruntime by separating it into libartbase.  Some of the code in\nruntime/base depends on the Runtime class, so it cannot be moved yet.\nAlso, some of the tests depend on CommonRuntimeTest, which itself needs\nto be factored (in a subsequent CL).\n\nBug: 22322814\nTest: make -j 50 checkbuild\n      make -j 50 test-art-host\n\nChange-Id: I8b096c1e2542f829eb456b4b057c71421b77d7e2\n"
    },
    {
      "commit": "33bff25bcd7a02d35c54f63740eadb1a4833fc92",
      "tree": "553db4f60878acf2a0fa7036a739d406df9a29b7",
      "parents": [
        "321b3ca9a36d769283c64d4bdee0798db80af524"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Nov 01 14:35:42 2017 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Nov 02 10:11:02 2017 +0000"
      },
      "message": "ART: Make InstructionSet an enum class and add kLast.\n\nAdding InstructionSet::kLast shall make it easier to encode\nthe InstructionSet in fewer bits using BitField\u003c\u003e. However,\nintroducing `kLast` into the `art` namespace is not a good\nidea, so we change the InstructionSet to an enum class.\nThis also uncovered a case of InstructionSet::kNone being\nerroneously used instead of vixl32::Condition::None(), so\nit\u0027s good to remove `kNone` from the `art` namespace.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nChange-Id: I6fa6168dfba4ed6da86d021a69c80224f09997a6\n"
    },
    {
      "commit": "8cf9cb386cd9286d67e879f1ee501ec00d72a4e1",
      "tree": "88e86e214b425e444760fe4e0ffeee677e1558a2",
      "parents": [
        "914b7b6a6c9f399b26b41e9160e9871ef749e0db"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Wed Jul 19 09:28:38 2017 -0700"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Jul 24 16:07:10 2017 -0700"
      },
      "message": "ART: Include cleanup\n\nLet clang-format reorder the header includes.\n\nDerived with:\n\n* .clang-format:\n BasedOnStyle: Google\n IncludeIsMainRegex: \u0027(_test|-inl)?$\u0027\n\n* Steps:\n find . -name \u0027*.cc\u0027 -o -name \u0027*.h\u0027 | xargs sed -i.bak -e \u0027s/^#include/ #include/\u0027 ; git commit -a -m \u0027ART: Include cleanup\u0027\n git-clang-format -style\u003dfile HEAD^\n manual inspection\n git commit -a --amend\n\nTest: mmma art\nChange-Id: Ia963a8ce3ce5f96b5e78acd587e26908c7a70d02\n"
    },
    {
      "commit": "8d01c3708c4becb186979ed9377aed0fc2954d06",
      "tree": "ace37d594a9fdd4ccf8e407596277f5e07a1c139",
      "parents": [
        "1171deea4cb2f2db67a310ea8797d06206b2bdea"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Tue May 30 13:21:28 2017 -0700"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Tue May 30 14:15:50 2017 -0700"
      },
      "message": "ART: Remove unique_ptr release warnings\n\nDo not release and create, just use assignment or constructor.\n\nBug: 32619234\nTest: m test-art-host\nChange-Id: I8b2bb87a0b6587ead41458ef00e27b7e61eeaff7\n"
    },
    {
      "commit": "b595b40c151c7e6de5e95944f6b993c57e780dd5",
      "tree": "6b66aec7d041d5ab49b5061f0af2e5776284f596",
      "parents": [
        "6d2741f18be435c686bd774eecb7359c17ae2132"
      ],
      "author": {
        "name": "Serban Constantinescu",
        "email": "serban.constantinescu@linaro.org",
        "time": "Fri Sep 23 11:06:03 2016 +0100"
      },
      "committer": {
        "name": "Scott Wakeling",
        "email": "scott.wakeling@linaro.org",
        "time": "Mon Jan 09 15:18:41 2017 +0000"
      },
      "message": "Remove the unused SMP instruction set feature option.\n\nThe SMP option is currently not used in the ART codebase\n(and it rots away).\nSingle CPU systems that run SMP code should be able to deal\nwith it nicely (otherwise the CPU has some serious problems).\n\nTest: mma test-art-target \u0026\u0026 mma test-art-host\n\nChange-Id: Ifaab42b29de1062866a0af7525de2f834a4a5a57\n"
    },
    {
      "commit": "9186ced255f2e7402646b5b286deebb540640734",
      "tree": "833c25fd3bbb47749265947705b4fc0f0c1ba796",
      "parents": [
        "aa2657d6d9dda2e44c6452e5f5901db78ef9b3cc"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Dec 12 14:28:21 2016 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Tue Dec 13 11:43:48 2016 -0800"
      },
      "message": "ART: Clean up utils.h\n\nRemove functionality provided by libbase. Move some single-use\nfunctions to their respective users.\n\nTest: m test-art-host\nChange-Id: I75594035fa975200d638cc29bb9f31bc6e6cb29f\n"
    },
    {
      "commit": "0415b4e2169272f94f4aba9f3d56ec8105831f8b",
      "tree": "7caf8fce823d3b3ebe00cca06ce3f874786cae55",
      "parents": [
        "75dccb7238714358fca9e5e993e4daabe24af085"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Tue Jan 06 15:17:07 2015 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Wed Oct 26 08:44:55 2016 -0700"
      },
      "message": "ART: Change InstructionSetFeatures to return unique_ptr\n\nThis makes clear the ownership of the object.\n\nTest: m test-art-host\nChange-Id: I55fa734f04bc3046d370f4dcf98ce6b17c59e234\n"
    },
    {
      "commit": "24a05f449a6b4b0e4944c2055f0c7490d6a09861",
      "tree": "6d05d580ae522e858a28b9d6c62b9ac9095548dd",
      "parents": [
        "425587d25832145a45a0b76beaa93996b0226f0d"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Fri Apr 03 13:46:54 2015 -0700"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Fri Apr 03 14:22:56 2015 -0700"
      },
      "message": "ART: Add support for \"silvermont\" variant\n\nThe variant is already supported in the build system and wired up\nfor the Nexus Player (fugu). The values are copied from the build\nsystem and correspond to documentation in, e.g.,\nhttp://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-optimization-manual.pdf\nchapter 15, section 1.1.\n\nChange-Id: I9facaa9d5b8bae3d98cf48f2969d02d11ebfe0e4\n"
    },
    {
      "commit": "a7d38fc6702d2a763e8187b4773d02b63b3229ac",
      "tree": "37d90ef5acad977c8fe1c4049be7316375c58af3",
      "parents": [
        "2a39584820c46c18c3b013e13d758c707e9f363e"
      ],
      "author": {
        "name": "Goran Jakovljevic",
        "email": "goran.jakovljevic@imgtec.com",
        "time": "Thu Mar 12 15:32:55 2015 +0100"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Fri Mar 20 13:13:01 2015 -0700"
      },
      "message": "ART: Fix expectations for instruction-set-features string\n\nOnly check for an empty features vector if we found \"default.\" The\nvector can be empty if this is already handled, e.g., for \"smp.\"\n\nChange-Id: I0d07faf38d0b50f151b5d29e6993d8224034254e\n"
    },
    {
      "commit": "57b34294758e9c00993913ebe43c7ee4698a5cc6",
      "tree": "981821619027686f83fbe00445299b0522f1df05",
      "parents": [
        "4945bfef00ac446d9c5458e55500229d463ab4c3"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Wed Jan 14 15:45:59 2015 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Thu Jan 15 11:32:48 2015 -0800"
      },
      "message": "ART: Allow to compile interpret-only mips64 files\n\nInclude enough infrastructure to allow cross-compiling for mips64,\ninterpret-only. This includes the instruction-set-features, frame\nsize info and utils assembler.\n\nAlso add a disassembler for oatdump, and support in patchoat.\n\nNote: the runtime cannot run mips64, yet.\n\nChange-Id: Id106581fa76b478984741c62a8a03be0f370d992\n"
    },
    {
      "commit": "d582fa4ea62083a7598dded5b82dc2198b3daac7",
      "tree": "c76704c266ef4687eab425612ddf3fd24f93fe8d",
      "parents": [
        "f20076ff813b8012096ff31af236d59db3c0f4e1"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Wed Nov 05 23:46:43 2014 -0800"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Thu Nov 13 16:17:46 2014 -0800"
      },
      "message": "Instruction set features for ARM64, MIPS and X86.\n\nAlso, refactor how feature strings are handled so they are additive or\nsubtractive.\nMake MIPS have features for FPU 32-bit and MIPS v2. Use in the quick compiler\nrather than #ifdefs that wouldn\u0027t have worked in cross-compilation.\nAdd SIMD features for x86/x86-64 proposed in:\n  https://android-review.googlesource.com/#/c/112370/\n\nBug: 18056890\n\nChange-Id: Ic88ff84a714926bd277beb74a430c5c7d5ed7666\n"
    }
  ]
}