)]}' { "log": [ { "commit": "c6175610512141a7d70e3a50e09ffac1606c3097", "tree": "50484eaf702569bcd636cad0f61fec080a8b4f66", "parents": [ "e9455f61f7e45963c7056b51dbaf8bb42c47454a" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Fri Jul 05 19:50:52 2019 +0100" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Aug 16 19:05:23 2019 +0000" }, "message": "ART: Add support for SVE feature for ARM64.\n\nImplement basic ISA feature configuration for SVE.\n\nTest: instruction_set_features_test\nTest: instruction_set_features_arm64_test\nChange-Id: I84963c6f896c435ecfb898f7f251039dfed8878a\n" }, { "commit": "918e9af6a7259e7178ec10257f568a60e832a962", "tree": "1f56177ca84debc27f942db38821d7eae10a4985", "parents": [ "c94b44cee8376b86da85c2452e74edfe5ad4b2cf" ], "author": { "name": "Peter Collingbourne", "email": "pcc@google.com", "time": "Wed Aug 07 17:15:24 2019 -0700" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Aug 09 02:25:29 2019 +0000" }, "message": "Add assembly support for -fsanitize\u003dhwaddress tagged globals.\n\nAs of LLVM r368102, Clang will set a pointer tag in bits 56-63 of the\naddress of a global when compiling with -fsanitize\u003dhwaddress. This requires\nan adjustment to assembly code that takes the address of such globals: the\ncode cannot use the regular R_AARCH64_ADR_PREL_PG_HI21 relocation to refer\nto the global, since the tag would take the address out of range. Instead,\nthe code must use the non-checking (_NC) variant of the relocation (the\nlink-time check is substituted by a runtime check).\n\nThis change makes the necessary adjustment in all of the places where it is\nneeded when compiling with -fsanitize\u003dhwaddress. The __clang_major__ \u003e\u003d 10\nis temporary (required because prebuilt Clang doesn\u0027t support :pg_hi21_nc:)\nand we should be able to remove it once we update Clang past r368102.\n\nTest: walleye_hwasan-userdebug boots\nChange-Id: Ide7f513baac42fdeb637e95a7f7c1c083441884d\n" }, { "commit": "8e1106587f0273116302afe06956129b5d82784a", "tree": "e1869e8da9ab9a6bfdf89a34f4e8cedd44045005", "parents": [ "5a11036542fbd2c00de1896c0ae2477f655e8ed3" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jul 30 10:14:41 2019 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 01 08:35:08 2019 +0000" }, "message": "Use ClassStatus::kVisiblyInitialized for allocations.\n\nAnd move the \"intialized but not visibly initialized\" check\nto ClassLinker::EnsureIntialized().\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: aosp_taimen-userdebug boots.\nTest: run-gtests.sh\nTest: testrunner.py --target --optimizing\nBug: 36692143\nChange-Id: Ib5e19326b1149b2aef586b905ce89470c3a8e405\n" }, { "commit": "743600d5ae654817a5d81179fb480816e0cd139d", "tree": "b7d32337b7edda269d9ebc72b73551eff1b791f7", "parents": [ "bd613eced14bc56ece6beb276addab0f40337163" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jun 04 10:49:52 2019 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jun 04 14:58:29 2019 +0000" }, "message": "ARM/ARM64: Clean up artFindNativeMethod().\n\nPass the Thread::Current() as an argument just like we\ndo for other architectures.\n\nTest: aosp_taimen-userdebug boots.\nTest: testrunner.py --target --optimizing\nChange-Id: I1dfb019da1018f493ee55ff28bd20e2db2258eb9\n" }, { "commit": "552a13415573da19eafa46e1ac00fb0eb68f2b23", "tree": "8cae5f3602d8f8e65cd3cbc349af17d785128605", "parents": [ "0dda8c84938d6bb4ce5a1707e5e109ea187fc33d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Oct 31 10:56:47 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 16 14:44:09 2019 +0000" }, "message": "ART: Optimize StringBuilder append pattern.\n\nRecognize appending with StringBuilder and replace the\nentire expression with a runtime call that perfoms the\nappend in a more efficient manner.\n\nFor now, require the entire pattern to be in a single block\nand be very strict about the StringBuilder environment uses.\nAlso, do not accept StringBuilder/char[]/Object/float/double\narguments as they throw non-OOME exceptions and/or require a\ncall from the entrypoint back to a helper function in Java;\nthese shall be implemented later.\n\nBoot image size for aosp_taimen-userdebug:\n - before:\n arm/boot*.oat: 19653872\n arm64/boot*.oat: 23292784\n oat/arm64/services.odex: 22408664\n - after:\n arm/boot*.oat: 19432184 (-216KiB)\n arm64/boot*.oat: 22992488 (-293KiB)\n oat/arm64/services.odex: 22376776 (-31KiB)\nNote that const-string in compiled boot image methods cannot\nthrow, but for apps it can and therefore its environment can\nprevent the optimization for apps. We could implement either\na simple carve-out for const-string or generic environment\npruning to allow this pattern to be applied more often.\n\nResults for the new StringBuilderAppendBenchmark on taimen:\n timeAppendLongStrings: ~700ns -\u003e ~200ns\n timeAppendStringAndInt: ~220ns -\u003e ~140ns\n timeAppendStrings: ~200ns -\u003e 130ns\n\nBug: 19575890\nTest: 697-checker-string-append\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: aosp_taimen-userdebug boots.\nTest: run-gtests.sh\nTest: testrunner.py --target --optimizing\nTest: vogar --benchmark art/benchmark/stringbuilder-append/src/StringBuilderAppendBenchmark.java\nChange-Id: I51789bf299f5219f68ada4c077b6a1d3fe083964\n" }, { "commit": "956f9fadb33619edb3480d2fe1de144b56814b7e", "tree": "27cbc3202918948b500b22f2bb785186c193ffe7", "parents": [ "b4e65074f148214a61f94c12fed54f4d113c35d6" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Apr 25 18:25:56 2019 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Apr 29 11:46:49 2019 +0000" }, "message": "Save floating point registers in art_quick_osr_stub\n\nWe need to save callee save floating-point registers on ARM/ARM64.\nNo x86/x86-64 floating point registers are callee save.\n\nBug: 130313339\nTest: test.py -r --target -t 570-checker-osr\nChange-Id: I53dfd60edb136bd305389e3b4bd51b636875d429\n" }, { "commit": "51c655847f2f7d2a9127574d3aeda12755014608", "tree": "b46ad0067f5efb98a19764650a53e68cfc9d7182", "parents": [ "81dc7ab1df59021463757e06a95b2abc937a73db" ], "author": { "name": "Christopher Ferris", "email": "cferris@google.com", "time": "Tue Apr 23 13:59:28 2019 -0700" }, "committer": { "name": "Christopher Ferris", "email": "cferris@google.com", "time": "Thu Apr 25 19:05:59 2019 +0000" }, "message": "Add cfi instructions.\n\nBug: 131093040\n\nTest: Builds, step through function and verify unwinding works at every point.\nChange-Id: Ie213615bebe8dd3a091c4ddef561f2a609b8c4ec\n" }, { "commit": "20d1c942c0e841920eac92f68c6d3e7f2a2135b4", "tree": "931aed7f4639a4b0a6ab8e3cd7765295a1883be3", "parents": [ "d32f8aadd37aab5b89ffccc86f7d8d07447a213a" ], "author": { "name": "jaishank", "email": "jaishankar.rajendran@intel.com", "time": "Fri Mar 08 15:08:17 2019 +0530" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Apr 25 09:05:09 2019 +0000" }, "message": "Patch supports Intel(R) AVX/AVX2 MOV Instruction\n\nThis patch enhances the existing ART-Compiler\nto generate Intel(R) AVX/AVX2 MOV Instructions for\ndoing SIMD Operations on Intel(R) Architecture CPUs.\nIt also provides the framework for AVX/AVX2 Instruction\nencoding and dissassembly\n\nBUG: 127881558\nTest: run-test gtest\nChange-Id: I9386aecc134941a2d907f9ec6b2d5522ec5ff8b5\n" }, { "commit": "1eb5d8770a533b86269e503a842f6b45591e87cf", "tree": "222728b3902587c45ad7c294c7ba69393f8d7cfa", "parents": [ "9b70ee0fdb1969a9a5cad2052b35c2fa04509bc2" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Apr 03 13:56:22 2019 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Apr 16 12:53:02 2019 +0000" }, "message": "Prefix entrypoints with 0xFF so we can do extra checks.\n\nAdd check to ensure we do not read method header from libart.so\n\nBug: 123510633\nTest: m -j40 cts \u0026\u0026 cts-tradefed run cts \\\n --test android.jvmti.cts.JvmtiHostTest1927#testJvmti \\\n --module CtsJvmtiRunTest1927HostTestCases\nChange-Id: Ic3e42e3bd4fbda3b11c7e265ed114770139151b9\n" }, { "commit": "dfc0de7696a50a9aeee95dcf74dac036e3334314", "tree": "20a6edd33cca852f8e65ce8d20a85949b566904c", "parents": [ "9ef308da0ea8d1df2edf65d4957599fafcc56aeb" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Apr 01 10:57:55 2019 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Apr 02 07:57:27 2019 +0000" }, "message": "Partially ObjPtr\u003c\u003e-ify Object, fix stale ref in test.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nBug: 31113334\nChange-Id: I0c0bc669c0ab8d99185e662a2fec16f32a42a0a2\n" }, { "commit": "179b7c61ea6769b99f70c80a7a89cbb212423ec2", "tree": "06130898bfb2d8c3f71f4fe181277f20e1942726", "parents": [ "c8b7d445e02b752a68d824e2bc69658dfb76288a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Mar 22 13:38:57 2019 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Mar 25 16:54:37 2019 +0000" }, "message": "ObjPtr\u003c\u003e-ify String allocations, fix stale refs.\n\nObjPtr\u003c\u003e-ify String allocation functions and related code\nand remove some unnecessary calls to ObjPtr\u003c\u003e::Ptr(). Fix\nstale reference uses in reference_table_test and stub_test.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nBug: 31113334\nChange-Id: I42927fb8b7240e5132188f73318b2ccb218748fd\n" }, { "commit": "7909e1e4cc741b38b25328e2f9077beb7ecd018b", "tree": "b59583aa7e9d865d46c5bc8dec00729c649d4756", "parents": [ "ca3c6d9231aa8e4a9ca7c9040398d57f130441a0", "7f88c1a269754001bfcaf311b378cf1cc71acf84" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Feb 05 12:50:51 2019 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Feb 05 12:50:51 2019 +0000" }, "message": "Merge \"ART: Enable ISA features run-time detection for ARM64\"" }, { "commit": "b87eedcec661cb2e3d4d4fb359f764f187580cac", "tree": "41116f0a5ad831fe7b4881a8f311a0b123165f1f", "parents": [ "53a41ac9305f3c435cbb975d773bbdb5490d8321" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jan 31 16:58:51 2019 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jan 31 17:45:46 2019 +0000" }, "message": "x86/x86-64: Fix IMT conflict trampoline for obsolete methods.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nBug: 123693178\nChange-Id: I06c08151fc3045824610d3d2e177cc13243b7e0a\n" }, { "commit": "7f88c1a269754001bfcaf311b378cf1cc71acf84", "tree": "147bb988929e8bd8827c4b148f28da4c28c0ea70", "parents": [ "5247113f3277fd679e3e1beeb6fbfb30797aa481" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Tue Nov 06 11:42:41 2018 +0000" }, "committer": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Wed Jan 30 14:09:25 2019 +0000" }, "message": "ART: Enable ISA features run-time detection for ARM64\n\nOn a target run-time detected ISA features can be more accurate than\ninstruction set features based on a build-time information such as an\ninstruction set variant or C++ defines. Build-time based features can\nbe too generic and do not include all features a target CPU supports.\n\nThis CL enables instruction feature run-time detection in the JIT/AOT\ncompilers:\n\n- The value \"runtime\" to the option \"--instruction-set-features\" to try\nto detect CPU features at run time. If a target does not support run-time\ndetection it has the same effect as the value \"default\".\n- Runtime uses \"--instruction-set-features\u003druntime\" if run-time detection is\nsupported.\n\nThe CL also cleans up how an instruction set feature string is processed\nby InstructionSetFeatures::AddFeaturesFromString. It used to make redundant\nuses of Trim in subclasses. The calls are replaced with DCHECKs\nverifying that feature names are already trimmed.\n\nTest: m test-art-target-gtest\nTest: m test-art-host-gtest\nTest: art/test.py --target --optimizing --interpreter --jit\nTest: art/test.py --host --optimizing --interpreter --jit\nTest: Pixel 3 UI booted\n\nChange-Id: I223d5bc968d589dba5c09f6b03ee8c25987610b0\n" }, { "commit": "639b2b1f3a675135d443fc380323fbc48639a7eb", "tree": "0aba54938e712e5dd95b525c92f836c59cca49c6", "parents": [ "8764dc3b3eda7f6f13ed7b584475503fe5bedd59" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Jan 08 10:32:50 2019 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Jan 09 12:38:30 2019 -0800" }, "message": "ART: Remove instruction_set.h from thread.h\n\nMove the function definitions relying on it to the -inl. Some\nfollow-up transitive-include cleanup, as well as some more\nforward-declarations.\n\nBug: 119869270\nTest: mmma art\nChange-Id: I820f395e6cb8343a4bb9bf02da271fbec067109f\n" }, { "commit": "8764dc3b3eda7f6f13ed7b584475503fe5bedd59", "tree": "e8f6e3a4a2596595ffdc8a517daaf37030482eae", "parents": [ "49b74a8c685acfe43dd33e3f51a24c486388bee1" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Jan 07 15:20:12 2019 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Jan 09 12:38:30 2019 -0800" }, "message": "ART: Use iosfwd more\n\nUse iosfwd where an include of ostream is unnecessary. Also move\ncallee_save_type.h to runtime.\n\nBug: 119869270\nTest: mmma art\nChange-Id: Id8995d6f524e4c491eb6f57fdffb940cf35d291f\n" }, { "commit": "5a0430d0239481f4efb252d60ec9641703b8d456", "tree": "cd7bdb45d94e7af3aa3e1bbb5958f930bcee29f6", "parents": [ "b9b995738c8f53d68446d14553c1befd487877e7" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Jan 04 14:33:57 2019 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Jan 09 12:38:20 2019 -0800" }, "message": "ART: Introduce runtime_globals\n\nSplit libartbase\u0027s globals.h into actual globals, and runtime-\ndependent globals which should live in runtime.\n\nBlanket-convert all runtime/ inclusions.\n\nIn future CLs, the number of global constants should be reduced.\nFor example, GC types are only relevant to GC/alloc functionality.\n\nBug: 119869270\nTest: mmma art\nChange-Id: I2d8cd32e0e7ab4084d2f2e96864b5338a78da94e\n" }, { "commit": "11a250b0bcd130b5fd3f925d912f86f2e45067cc", "tree": "fdcf24e780186e3d1e8c70676124e66ca02be86d", "parents": [ "883931d0cc9c48573c13836b80fbad465bdaa0c9" ], "author": { "name": "Haibo Huang", "email": "hhb@google.com", "time": "Tue Dec 04 20:42:34 2018 -0800" }, "committer": { "name": "Haibo Huang", "email": "hhb@google.com", "time": "Fri Dec 07 01:58:25 2018 +0000" }, "message": "Remove denver from art\n\nTest: build\nChange-Id: If301a4ce0f1a6db7f42c64c97c07ac7f51dfcf9d\n" }, { "commit": "7fbc4a59ba2e60d869313d7961662430df83b2cb", "tree": "59520285df8d2075412ddc566a0d4d96d4c7e109", "parents": [ "7cc45fd1dbcf5704e442d0443e437aa2ae3fe21b" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Nov 28 08:26:47 2018 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Dec 06 11:37:19 2018 -0800" }, "message": "ART: Move to using locks.h instead of mutex.h\n\nWhen only annotating lock requirements, use locks.h.\n\nBug: 119869270\nTest: mmma art\nChange-Id: I1608b03254712feff0072ebad012c3af0cc3dda4\n" }, { "commit": "b06fbf7dfdb360885a1791b61c8943200c77e4e6", "tree": "b596912a9e13fa9125400f9b4daa17d289bb3e85", "parents": [ "f2970cd870948a6ee1c8ecd30c9c3147d05aa0be" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Thu Nov 22 19:51:36 2018 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Nov 30 16:07:36 2018 +0000" }, "message": "ART: Support kryo385 CPU.\n\nQualcomm Kryo385 CPU supports up Armv8.2-a features: atomics,\nfp16, crc32.\n\nRelated change:\nhttps://android-review.googlesource.com/c/platform/build/soong/+/831260\n\nTest: builds Pixel 3.\nBug: 119564566\nChange-Id: Iede5830093497abe753a34df3bc4913468be39d0\n" }, { "commit": "5c89c5791233f759b8ae093e5cd9f63cef7cf05b", "tree": "fa8bf74c16412146cc82660cde455e5ddee536f5", "parents": [ "97d40f9c7b1157783d09861ce76d3a0b3da73cbe" ], "author": { "name": "Yi Kong", "email": "yikong@google.com", "time": "Wed Oct 31 14:10:32 2018 -0700" }, "committer": { "name": "Yi Kong", "email": "yikong@google.com", "time": "Wed Oct 31 14:10:32 2018 -0700" }, "message": "Do not clobber reserved register X18\n\nX18 is now a reserved register for Android. Explicit clobbering of this\nregister causes compile error in Clang 8.0.\n\nTest: m checkbuild\nBug: 111759196\nChange-Id: Icecba52c31b3fbb100aaed5f18a28fa4e27a7028\n" }, { "commit": "70f5fd0770adbef645950895309a2a63c3bde7c0", "tree": "d9794484e83858cf7e33551eb8a108e07f46b18c", "parents": [ "52ecb65ae9e1ad6fe7f58beecc88cdc08e08f0c4" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Oct 24 19:58:37 2018 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Oct 26 08:44:12 2018 -0700" }, "message": "ART: Add class-alloc-inl.h\n\nIn an effort to reduce the (transitive) proliferation of heap-inl\nadd a specific inline header for class instance allocation.\n\nBug: 118385392\nTest: mmma art\nTest: m test-art-host\nChange-Id: I32529f0221a836452c58687330a91ac0d5fde162\n" }, { "commit": "52ecb65ae9e1ad6fe7f58beecc88cdc08e08f0c4", "tree": "7a8ee84cad0df34ab33bdcb0115fc0c79d6c83be", "parents": [ "c2099b0b0c052dd61137b9cf5f9f8b30bab1a7a8" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Oct 24 15:18:21 2018 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Oct 26 08:44:12 2018 -0700" }, "message": "ART: Add object-array-alloc-inl.h\n\nIn an effort to reduce the (transitive) proliferation of heap-inl\nadd a specific inline header for object array allocation.\n\nBug: 118385392\nTest: mmma art\nTest: m test-art-host\nChange-Id: I0d7c40ed53708d4c759190961b40f0cac3fe696d\n" }, { "commit": "fe89f170fd454188902ae0b80e08c0888158c60e", "tree": "3862cd1e16d25696505da841c127f13e0e08fdfd", "parents": [ "5314caec5a2c61fa96a2d6ee134706c085c18b11", "bd8e10c586fca1c99f29eff27f66d483a18b0ccf" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Oct 25 11:51:43 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 25 11:51:43 2018 +0000" }, "message": "Merge \"Block the platform register, x18.\"" }, { "commit": "98ea9d9d82ab078ca10fa7f8e02eddda94cf1d98", "tree": "a848b7e41ff227a2d3d4d6795ec11089f39cb6ca", "parents": [ "02338775e33b553be51d44ff60bb1ef8e527bd94" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Oct 19 14:06:15 2018 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Oct 23 15:19:55 2018 -0700" }, "message": "ART: Refactor for bugprone-argument-comment\n\nHandles runtime.\n\nBug: 116054210\nTest: WITH_TIDY\u003d1 mmma art\nChange-Id: Ibc0d5086809d647f0ce4df5452eb84442d27ecf0\n" }, { "commit": "60c5bc1a273c3dc8828088c4336b410516e846d6", "tree": "67948b596d446bc92f819d05072c744d43a7d47b", "parents": [ "df7c2a6ac8c49156c45e2c69c0dae5bddd67801f" ], "author": { "name": "Shalini Salomi Bodapati", "email": "shalini.salomi.bodapati@intel.com", "time": "Tue Oct 23 11:15:33 2018 +0530" }, "committer": { "name": "Shalini Salomi Bodapati", "email": "shalini.salomi.bodapati@intel.com", "time": "Tue Oct 23 06:06:47 2018 +0000" }, "message": "Add a new cpu variant named kabylake\n\nThis is needed to perform instruction simplification\non cpus that support AVX2 feature flag.\n\nTest: ./test.py --host --64, test-art-host-gtest\nChange-Id: I3e300dff56b8ec5d6f170f3c3840faafa87c3dd6\nSigned-off-by: Shalini Salomi Bodapati \u003cshalini.salomi.bodapati@intel.com\u003e\n" }, { "commit": "50b47432f8df853b8479179154382ef30bdf30c9", "tree": "ec702341b889cc43cc75625ddad8c1bebeff3c2f", "parents": [ "f06ca50f0aff5167f767b09f624c60186290a623" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Oct 18 12:26:34 2018 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Oct 18 12:43:06 2018 +0100" }, "message": "Move cpp-define related static_assert to runtime.\n\nThe runtime is build with both debug and non-debug configs,\nso checking it there covers more cases.\n\nTest: Check this caches cases which previously passed.\nChange-Id: I543547e517b79289438b19ed9e18f5a6d0b74172\n" }, { "commit": "43c6653eaba28031c30350284806c28e89a1b9ea", "tree": "7d933567c1bd4619765de190ca9b3b1327d720b7", "parents": [ "c926e2623d15150171f08558adfde9837571f77d" ], "author": { "name": "Haibo Huang", "email": "hhb@google.com", "time": "Wed Oct 10 13:39:02 2018 -0700" }, "committer": { "name": "Haibo Huang", "email": "hhb@google.com", "time": "Mon Oct 15 13:58:59 2018 -0700" }, "message": "Add support for A76 in art\n\nBug: 117125298\nTest: run art unit tests\nChange-Id: Ie07861be29c18b9bd5405d2d2fdda790cf57c97e\n" }, { "commit": "3cf0a3e7223dc9792e92e7cace1ab165ba30ef7c", "tree": "092c5b78ffdda2415b44b153a2f101931a9dbc75", "parents": [ "8db807252e1d4d0bab7785be231e20a1e5fd8e74", "1032f9bc6808c95da6ce4614b591c461268f05b1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 15 16:52:17 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 15 16:52:17 2018 +0000" }, "message": "Merge \"ART: Add support for ARMv8.x features for ARM64.\"" }, { "commit": "766e74f58312af149219473a691c6f2d9bcca428", "tree": "4c216f5ebd128075f20d0857afb383d31da20c5a", "parents": [ "0adf4d80ca1c673e5f7c5249faabadccdc1ddbbd" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Oct 02 17:12:24 2018 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Oct 12 03:22:29 2018 +0100" }, "message": "Cleanup the cpp-define-generator definitions.\n\nTest: test-art-host-gtest-arch_test\nChange-Id: Ifda7a51d19156b1eb62bc39b16ec559d609744e5\n" }, { "commit": "0adf4d80ca1c673e5f7c5249faabadccdc1ddbbd", "tree": "0c4f88f1fa6ab56fd1b24426c75f17836a6bd81d", "parents": [ "78940f2254354373c6b311c759c43f51d3ad77f1" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Oct 01 18:17:45 2018 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Oct 12 03:22:29 2018 +0100" }, "message": "Rewrite cpp-define-generator\n\nThe new method works by generating temporary per-architecture\nhuman-readable object file with the constants embedded in it.\nPython script extracts those values and generates the header.\n\nThis means the values can now implicitly depend on pointer size,\ncompile time flags, or ABI specific object layout with no hacks.\n\nTest: test-art-host-gtest-arch_test\nChange-Id: Id6e8c77c01f9d6c49cd6d40e3487b56fa4777349\n" }, { "commit": "1032f9bc6808c95da6ce4614b591c461268f05b1", "tree": "45558c4b037a86fc8570c35e7acd47205c91ed13", "parents": [ "26f048f48cdb1e884aab2b6fddf26d58346d29ad" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Fri Jul 13 15:03:14 2018 +0100" }, "committer": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Mon Sep 24 14:05:59 2018 +0100" }, "message": "ART: Add support for ARMv8.x features for ARM64.\n\nAdd support for cortex-a76 CPU.\nAdd support for ARMv8.x in instruction set features.\n\nTest: instruction_set_features_test\nTest: instruction_set_features_arm64_test\n\nChange-Id: I3ae9db34507a3bb740fc0b7ceb335486dccdf460\n" }, { "commit": "bd8e10c586fca1c99f29eff27f66d483a18b0ccf", "tree": "ac228db5c0a3cbcc82c665bd2c1653d7e351c09e", "parents": [ "4613c8a3a549213240f3ffc46514b600d872938e" ], "author": { "name": "Peter Collingbourne", "email": "pcc@google.com", "time": "Thu Apr 12 16:39:55 2018 -0700" }, "committer": { "name": "Peter Collingbourne", "email": "pcc@google.com", "time": "Thu Sep 06 01:18:33 2018 +0000" }, "message": "Block the platform register, x18.\n\nBug: 77982665\nTest: run-libcore-tests.sh, sailfish boots\nChange-Id: I5bc4c77f76bb6747a002bff2e16d83c679beeb32\n" }, { "commit": "0ed1eaba4f5bd56fd2fba621e71aa8484397ef0e", "tree": "eae7804933e011bb98af0875d5832ac313934671", "parents": [ "213f895897c85bf98ebc65c8d8d0605d228ed3e8" ], "author": { "name": "Peter Collingbourne", "email": "pcc@google.com", "time": "Tue Aug 28 18:21:28 2018 -0700" }, "committer": { "name": "Peter Collingbourne", "email": "pcc@google.com", "time": "Tue Aug 28 18:24:39 2018 -0700" }, "message": "arm64: Don\u0027t use the GOT to access art::Runtime::instance_.\n\nBecause ART is built with -fvisibility\u003dprotected, the location of\nthis symbol can be statically resolved by the linker, so there is no\nneed to go via the GOT.\n" }, { "commit": "213f895897c85bf98ebc65c8d8d0605d228ed3e8", "tree": "0e6430e688cf1420ff1133dbde7ea4ac53a9d297", "parents": [ "96b81658dd2726a8cfa5f7e5323cdb6a073e7ff1", "9b7656d4dfc89d918264db4cb4b54b1383008140" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Aug 28 21:50:04 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Aug 28 21:50:04 2018 +0000" }, "message": "Merge \"HWASan support in ART.\"" }, { "commit": "9b7656d4dfc89d918264db4cb4b54b1383008140", "tree": "632b92d791a02ea1f082c7445b7389ec6e2c1c8c", "parents": [ "19759b28bc9dad1581c207d76227eb74fc8eebcb" ], "author": { "name": "Evgenii Stepanov", "email": "eugenis@google.com", "time": "Tue Aug 21 15:18:49 2018 -0700" }, "committer": { "name": "Evgenii Stepanov", "email": "eugenis@google.com", "time": "Tue Aug 28 13:03:19 2018 -0700" }, "message": "HWASan support in ART.\n\nTwo small tweaks:\n* The highest 8 bits of a pointer in hwasan contain a random tag which needs to\n be removed before comparing _unrelated_ pointers.\n* Annotate DoLongJump. HWASan needs to re-tag the newly unallocated stack space\n to match SP. This is similar to ASan annotation (__asan_handle_noreturn), but\n more precise - HWASan needs to know the destination SP address because it can\n not conservatively \"unpoison\" the entire stack like ASan does.\n\nBug: 112438058\nTest: mmm SANITIZE_TARGET\u003dhwaddress\n\nChange-Id: I9f9d92495b3a4b2637e48c7af1b614e8d1db8ea0\n" }, { "commit": "f73cacaae3d8f89327d8886b37792a849cabd9ac", "tree": "79047e31d512d065db47af7e68fa155c1f638f11", "parents": [ "bbc6e7edb5fca4a61ac53dd9bce79cb4f0bb3403" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Aug 24 17:19:07 2018 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Aug 28 11:09:40 2018 +0100" }, "message": "Remove superfluous \u0027virtual\u0027 specifiers in ART.\n\nRemove \u0027virtual\u0027 specifier on methods already bearing the \u0027override\u0027\nspecifier.\n\nTest: mmma art\nChange-Id: I114930969a5ca048d88de9ecd18e2c6403593e31\n" }, { "commit": "bbc6e7edb5fca4a61ac53dd9bce79cb4f0bb3403", "tree": "0fbce767bc383358cf4cd65aafc74140e1850982", "parents": [ "19379b58bd433da91230e4fe6cd96e7416d16adc" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Aug 24 16:58:47 2018 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Aug 28 11:06:07 2018 +0100" }, "message": "Use \u0027final\u0027 and \u0027override\u0027 specifiers directly in ART.\n\nRemove all uses of macros \u0027FINAL\u0027 and \u0027OVERRIDE\u0027 and replace them with\n\u0027final\u0027 and \u0027override\u0027 specifiers. Remove all definitions of these\nmacros as well, which were located in these files:\n- libartbase/base/macros.h\n- test/913-heaps/heaps.cc\n- test/ti-agent/ti_macros.h\n\nART is now using C++14; the \u0027final\u0027 and \u0027override\u0027 specifiers have\nbeen introduced in C++11.\n\nTest: mmma art\nChange-Id: I256c7758155a71a2940ef2574925a44076feeebf\n" }, { "commit": "dd509acc6d916df7cff91c51ad0666f60b75dfc0", "tree": "4516c4413f9c23464567984f40dc794c07dda7c8", "parents": [ "f345404c725330914b8313d2c1af17226c5b92ca" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 21 13:59:26 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 21 16:08:03 2018 +0100" }, "message": "ARM/ARM64: Rewrite art_quick_do_long_jump.\n\nAvoid accessing memory below SP.\nAvoid using a deprecated instruction on ARM.\n\nLoad all registers except IP on ARM and IP0, IP1 on ARM64.\nWe previously didn\u0027t load r1 on ARM (where obsolete\ncomments described it as a return value) and x1 on ARM64\nbut it\u0027s preferable to restore these properly, clobbering\ninterprocedural scratch registers instead. This may be\nuseful if we eventually decide to allocate dex registers\nto physical registers for catch handlers in compiled code.\n\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --optimizing\nChange-Id: I273ac79bf36c999e937a164a88b7075b24f930c5\n" }, { "commit": "d887ed8228ea2f8dfd3a178a0d0923275402e1fd", "tree": "371d9baee8747966818904962fc99d5834a489c6", "parents": [ "d7a0192ffa9c9015f0980b1aaa694e914a37d57f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 14 13:52:12 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 15 15:50:39 2018 +0100" }, "message": "Revert^2 \"ARM: Reimplement the UnsafeCASObject intrinsic.\"\n\nThis reverts commit f28be439b97623ebad540f7a1e3f9f1e3436b001.\n\nThe regression test for the revert reason was added in\n https://android-review.googlesource.com/731508 .\nWe fix the problem by introducing a specialized entrypoint\nfor the UnsafeCASObject intrinsic introspection marking\nwhere we read the destination register from the right bits.\n\nChange-Id: I1838abe05474be009d0fd96125efebd7f6dd9c59\nTest: m test-art-host-gtest\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --optimizing --32\nTest: ART_HEAP_POISONING\u003dtrue testrunner.py --target --optimizing --32\nBug: 36141117\n" }, { "commit": "94796f8e1b1d920c6107ffddf4efdabcf85e1da4", "tree": "e6c068b622bc60b1570eb1c54d3ddeea4972b1a2", "parents": [ "248141f724cbb9d436f13181b5301172c4385cc2" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 08 15:15:33 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 14 16:36:39 2018 +0100" }, "message": "ARM64: Reimplement the UnsafeCASObject intrinsic.\n\nFor the UnsafeCASObject with Baker read barriers, drop the\nold code updating the field. Perform the main path CAS loop\nand redirect the flow for failure to a slow path that marks\nthe old value and compares it with the expected value (if\nnot marking, this is just a few instructions to determine\nthat they differ). If it\u0027s the same, the old value is known\nto be the from-space reference to the expected object and\nthe slow path performs a modified CAS loop checking for both\nexpected object references (from-space and to-space).\n\nTest: Already covered by the 160-read-barrier-stress.\nTest: m test-art-host-gtest\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --optimizing --64\nTest: ART_HEAP_POISONING\u003dtrue testrunner.py --target --optimizing --64\nBug: 36141117\nChange-Id: I175806dbc003640c9bb6759be6788311bcc9310c\n" }, { "commit": "9d479254d0dc4043a15ab26205f40439eca15493", "tree": "af8a9c9c6f2c28e723a971c9d39c9d1cebd1f814", "parents": [ "ca20fb6cc4dda392e63bdc8ec9de54d89793373e" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jul 24 11:35:20 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Aug 03 11:43:30 2018 +0000" }, "message": "Rename type resolution entrypoints.\n\nRename the InitializeType and InitializeTypeAndVerifyAccess\nentrypoints to Resolve* to better match their semantics.\nKeep the InitializeStaticStorage name for now as the most\nappropriate name InitializeType would clash with the old\nname of the ResolveType entrypoint.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nChange-Id: Ide55b58c490d085ab37d8536f90699f7ed571d59\n" }, { "commit": "a9f303c089aa2b2fc82d97201352945678ef54ae", "tree": "0df0eb5294a3ee72aea8ca670762c02ca9ffa8dd", "parents": [ "1bfd891d06e276d602b4a6ccf1a9f70967195218" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jul 20 16:43:56 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 02 17:41:21 2018 +0100" }, "message": "Rewrite Class init entrypoint to take a Class arg.\n\nFixes invalid type index being passed to the entrypoint for\nclass init check across dex files when the target type does\nnot have a TypeId in the compilation unit\u0027s DexFile.\n\nThe size of the aosp_taimen-userdebug prebuilts:\n - before:\n arm/boot*.oat: 16782748\n arm64/boot*.oat: 19764400\n oat/arm64/services.odex: 20162432\n - after:\n arm/boot*.oat: 16811692 (+28.3KiB, +0.17%)\n arm64/boot*.oat: 19801032 (+35.8KiB, +0.19%)\n oat/arm64/services.odex: 20232208 (+68.1KiB, +0.35%)\nThis increase comes from doing two runtime calls instead of\none for HLoadClass/kBssEntry that MustGenerateClinitCheck().\n\nTest: Additional test in 476-clinit-inline-static-invoke\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing --jit\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --optimizing --jit\nTest: testrunner.py --jvm\nBug: 111433619\nChange-Id: I2fccd6944480ab4dac514f60d38e72c1014ae7b2\n" }, { "commit": "bd39d145e4986217bcb8dce1d4a9631d926a2781", "tree": "52dfd3307ab5279e960f9a1bf6e474e47440a3d8", "parents": [ "6f4cf6e8fa15de2f9bf7c6a649ea7a2fabef886a" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jul 19 11:14:42 2018 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jul 19 11:37:05 2018 -0700" }, "message": "ART: Clean up unused using declarations\n\nMake tidy happy, and enable checking.\n\nTest: mmma art\nChange-Id: I9e18e80b3f37dd2aeb8ecd1c25abe4d5cf2f1c45\n" }, { "commit": "cdfc942e60032622b5a4379d0dd5ca914ba6393a", "tree": "823e767f6eba6fb2831f69753936bc0c35eea84e", "parents": [ "ec1f1a91328f44d93cfc16e39160dbdfce2f7b9a", "f5f56c791c5853f43a2a9781c98d5776c7dd5a59" ], "author": { "name": "Hans Boehm", "email": "hboehm@google.com", "time": "Fri Jul 13 16:35:30 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jul 13 16:35:30 2018 +0000" }, "message": "Merge \"Revert \"Emit vector mulitply and accumulate instructions for x86.\"\"" }, { "commit": "f5f56c791c5853f43a2a9781c98d5776c7dd5a59", "tree": "ed8270e3a5d0161ebe5bec0606a24cd5e3123e59", "parents": [ "61908880e6565acfadbafe93fa64de000014f1a6" ], "author": { "name": "Hans Boehm", "email": "hboehm@google.com", "time": "Fri Jul 13 00:05:27 2018 +0000" }, "committer": { "name": "Hans Boehm", "email": "hboehm@google.com", "time": "Fri Jul 13 00:05:27 2018 +0000" }, "message": "Revert \"Emit vector mulitply and accumulate instructions for x86.\"\n\nThis reverts commit 61908880e6565acfadbafe93fa64de000014f1a6.\n\nReason for revert: By failing to round multiply results, it does not follow Java rounding rules.\n\nChange-Id: Ic0ef08691bef266c9f8d91973e596e09ff3307c6\n" }, { "commit": "1a2b9bec01f21e28be31db1bc241c2256057c4f9", "tree": "f1fe2d1d6c013bb34c56435995b0b853050a39ea", "parents": [ "1206a149b440dcf2c3c45d775009816ca908fbce", "955f0ba247863be4b2b506420f6dfe4b0fa99e4f" ], "author": { "name": "Chih-hung Hsieh", "email": "chh@google.com", "time": "Tue Jul 10 20:57:09 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jul 10 20:57:09 2018 +0000" }, "message": "Merge \"Use clang integrated assembler.\"" }, { "commit": "955f0ba247863be4b2b506420f6dfe4b0fa99e4f", "tree": "6f8e52f1b0cff324adddcd054050458400d201ee", "parents": [ "e824cfdcfd41d400237a806ff93caca7f2e51878" ], "author": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Thu Jun 28 19:01:50 2018 -0700" }, "committer": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Tue Jul 10 09:41:44 2018 -0700" }, "message": "Use clang integrated assembler.\n\n* Remove dependency on GNU assembler.\n Avoid bug that produces non-deterministic code for mterp_arm.S.\n\n* Replace arm assembly code syntax to compile with clang assembler.\n * change old/obselete syntax: s/subgts/subsgt/\n * change old/obselete syntax\n adrl lr, artMterpAsmInstructionStart + (${opnum} * 128) @ Addr of primary handler.\n to equivalent\n adr lr, .L_ALT_${opcode}\n sub lr, lr, #(.L_ALT_${opcode} - .L_${opcode}) @ Addr of primary handler.\n\n* Remove duplicated .Lmark_introspection_unmarked\\label_suffix label;\n clang assembler treated it as an error.\n\nBug: 110953818\nTest: compare disassembled .o files from GNU and clang assemblers.\nChange-Id: I33ae305b5a6d4d7bd9efa0ad43b7f9b1509328b9\n" }, { "commit": "d109e30eab8ba25f8d89be2a83d9036e2d541af2", "tree": "24df91603efe9ce8c4a2efd09ac402aceb10df4e", "parents": [ "c916736ca1e375c276df251446baf2ac8ff3eb13" ], "author": { "name": "Alex Light", "email": "allight@google.com", "time": "Wed Jun 27 10:25:41 2018 -0700" }, "committer": { "name": "Alex Light", "email": "allight@google.com", "time": "Tue Jul 10 08:44:51 2018 -0700" }, "message": "Don\u0027t use StringFactory.newEmptyString in compiled code\n\nWhen compiling debuggable code we would compile a new-instance String\ninstruction into a StringFactory.newEmptyString invoke. This\nadditional invoke could be observed using tracing and is inconsistent\nwith the interpreter, where the string is simply allocated directly.\nIn order to bring these two modes into alignment we added a new\nAllocStringObject quick entrypoint that will be used instead of the\nnormal AllocObject\u003c...\u003e entrypoints when allocating a string. This\nentrypoint directly allocates a new string in the same manner the\ninterpreter does.\n\nNeeds next CL for test to work.\n\nBug: 110884646\nTest: ./test/testrunner/testrunner.py --host --runtime-option\u003d-Xjitthreshold:0 --jit\nTest: Manual inspection of compiled code.\nChange-Id: I7b4b084bcf7dd9a23485c0e3cd2cd04a04b43d3d\n" }, { "commit": "61908880e6565acfadbafe93fa64de000014f1a6", "tree": "40b535db9175f3d959364d5bc30eaab4e2c4b4c4", "parents": [ "b5271dd44a30f498689e503340d3c8d01bf31f07" ], "author": { "name": "Gupta Kumar, Sanjiv", "email": "sanjiv.kumar.gupta@intel.com", "time": "Fri Jun 29 13:06:35 2018 +0530" }, "committer": { "name": "Gupta Kumar, Sanjiv", "email": "sanjiv.kumar.gupta@intel.com", "time": "Mon Jul 02 15:37:38 2018 +0530" }, "message": "Emit vector mulitply and accumulate instructions for x86.\n\nThis patch adds a new cpu vaiant named kabylake and performs\ninstruction simplification to generate VectorMulitplyAccumulate.\n\nTest: ./test.py --host --64\n\nChange-Id: Ie6cc882dadf1322dd4d3ae49bfdb600b0c447765\nSigned-off-by: Gupta Kumar, Sanjiv \u003csanjiv.kumar.gupta@intel.com\u003e\n" }, { "commit": "4c8e12e66968929b36fac6a2237ca4b04160161e", "tree": "d8bbfd72a978c69ef2eef98c37e7869673c52295", "parents": [ "20c64f8d802cc575cc9a1a1f6c493a611b23e2ee" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Fri May 18 08:33:20 2018 +0100" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Mon Jun 11 10:57:17 2018 +0100" }, "message": "ART: Adds an entrypoint for invoke-custom\n\nAdd support for the compiler to call into the runtime for\ninvoke-custom bytecodes.\n\nBug: 35337872\nTest: art/test.py --host -r -t 952\nTest: art/test.py --target --64 -r -t 952\nTest: art/test.py --target --32 -r -t 952\nChange-Id: I821432e7e5248c91b8e1d36c3112974c34171803\n" }, { "commit": "cd260ebf53e0e05bd75c37c4139f32782eb4ad97", "tree": "dab8e9054c59c16303ab9c8aeed01edeb0bb12da", "parents": [ "408bdc604e4fe230bf90ffa6816bfbbb3786806e" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Wed Jun 06 09:04:17 2018 +0100" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Fri Jun 08 14:56:10 2018 +0100" }, "message": "ART: Simplify invoke-polymorphic entrypoints\n\nMoves to pattern used by the interpreter bridge and writes the result\nin both the regular return register and the floating point result\nregister.\n\nAdd return value tests to 956-method-handles.\n\nTest: art/test.py --host -r -t 956\nTest: art/test.py --target --32 -r -t 956\nTest: art/test.py --target --64 -r -t 956\nChange-Id: I7389d04b70b88e149682f6d656ab185e48bcbf66\n" }, { "commit": "3b562b18ba6128b20d0660ab3823f55a5191b04e", "tree": "68ff1fc7b7dda66ff2770a6be114a15d832adeb6", "parents": [ "155733e5590a7c76f367ea9f6940345d143eab36", "d02b23f7ee9664213216a82bfdcb0ee83824de04" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed May 30 22:50:50 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed May 30 22:50:50 2018 +0000" }, "message": "Merge \"Remove the CodeOffset helper class.\"" }, { "commit": "d02b23f7ee9664213216a82bfdcb0ee83824de04", "tree": "254b794533a6821c2ed2df31fab807abf7d508a4", "parents": [ "08231f6cb3095a7dbde29299a7da5413a5f992e4" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue May 29 23:27:22 2018 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed May 30 17:59:24 2018 +0100" }, "message": "Remove the CodeOffset helper class.\n\nI need to reduce the StackMapEntry to a POD type so that it\ncan be used in BitTableBuilder.\n\nTest: test-art-host-gtest-stack_map_test\nChange-Id: I5f9ad7fdc9c9405f22669a11aea14f925ef06ef7\n" }, { "commit": "acb906d7f907b79ef1e6038d7104a5569e81a1ac", "tree": "5004be84fa88b8829881efed9ebf2d578b21086f", "parents": [ "5924a4a73f1a2dcf83877062d67c297a9496b326" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 30 10:23:49 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 30 14:48:02 2018 +0100" }, "message": "Remove mirror::String::java_lang_String_.\n\nAnd simplify ClassLinker::InitWithoutImage().\nAnd finish ObjPtr\u003c\u003e-ification of annotation processing.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nBug: 31113334\nChange-Id: I882a6c2f2b2a88d6ba34e4759bac4a6caa54cafa\n" }, { "commit": "d352156dfeadc72fda186ef8dcbeea4d06eee509", "tree": "64ff7c025cacac290e21beea27ef6533e4f04d79", "parents": [ "cbe50e965be5bcc7e9e0bba8b52a9b1adb7c291f", "d3083dd15af1cb4ffc13d87a7d2c3be2edb9199d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 22 15:33:35 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue May 22 15:33:35 2018 +0000" }, "message": "Merge \"Refactor runtime callee save frame info.\"" }, { "commit": "d3083dd15af1cb4ffc13d87a7d2c3be2edb9199d", "tree": "88dd2599ad89da5a4f2668a2c9debd0335669cd0", "parents": [ "6623bc389c43efc87668ce7465e19b195e765e22" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 17 08:43:47 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 22 14:38:14 2018 +0100" }, "message": "Refactor runtime callee save frame info.\n\nAnd avoid storing the info in Runtime.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing --jit\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --optimizing --jit\nChange-Id: Ib14853fc06c420753993e1f9e82a1b01f5e35e8c\n" }, { "commit": "b2683cb0ae69c9a8a0ba654f50fa743a9117171c", "tree": "9ebe949e41ff00dbaabe415f295fa4825d4dd51d", "parents": [ "8926b780fd75f23e8685e108e2d3f4905f3809fd", "c8b1d5e0f2112c78aeed0d114b0c4f8b6a234c10" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon May 21 09:05:50 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon May 21 09:05:50 2018 +0000" }, "message": "Merge \"ARM/ARM64: Improve lock/unlock entrypoints.\"" }, { "commit": "c8b1d5e0f2112c78aeed0d114b0c4f8b6a234c10", "tree": "20b4fc7c62243a6616aa04661b8750cad9d4f1bc", "parents": [ "6623bc389c43efc87668ce7465e19b195e765e22" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 15 16:07:12 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon May 21 10:02:23 2018 +0100" }, "message": "ARM/ARM64: Improve lock/unlock entrypoints.\n\nDo the same in fewer instructions.\n\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --optimizing\nChange-Id: I8003481116fd3dc6a1559b84fdc776b92dba0c68\n" }, { "commit": "c3e1895e7443c61b77f5c51cd2d18819cade57c1", "tree": "bc2705ee47091e37d683cafa020f53190708b089", "parents": [ "6623bc389c43efc87668ce7465e19b195e765e22" ], "author": { "name": "David Sehr", "email": "sehr@google.com", "time": "Fri May 11 16:59:31 2018 -0700" }, "committer": { "name": "David Sehr", "email": "sehr@google.com", "time": "Fri May 11 17:40:56 2018 -0700" }, "message": "Prepare to move ArtDexFileLoader to libdexfile\n\nMove file_utils and friends to libartbase so that ArtDexFileLoader can\nbe moved to libdexfile. This will clean up duplication and complexity\nwith zip file handling.\n\nBug: 78652467\nTest: make -j 40 test-art-host-gtest\nChange-Id: Ia5eac1f93caf3fa918b4b48803cbfd842035e29e\n" }, { "commit": "bf37ad2589025e9fa122bceebea00ec7ad353803", "tree": "288a24657a6f49b31b33374e5aa70ab45bc0d784", "parents": [ "981d59093d03b1db7c19c03afb9c71ce5f1591c8", "366f0443c4529976d5ac73c7d7273397d8c7c59d" ], "author": { "name": "Christopher Ferris", "email": "cferris@google.com", "time": "Fri May 11 17:56:12 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri May 11 17:56:12 2018 +0000" }, "message": "Merge \"Add support for cortex-a55/cortex-a75.\"" }, { "commit": "dbaa5c7ba8935cf87ceb40a4054f9842929e9a51", "tree": "5037625c80cb97a0e13026dc450db28e59ff72ca", "parents": [ "51dda39549033b3c50a7fce5522ffc81325db54b" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Thu May 10 08:22:46 2018 +0100" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Fri May 11 11:55:30 2018 +0100" }, "message": "ART: Compiler support for const-method-handle\n\nImplemented as a runtime call.\n\nBug: 66890674\nTest: art/test.py --target -r -t 979\nTest: art/test.py --target --64 -r -t 979\nTest: art/test.py --host -r -t 979\nChange-Id: I67f461c819a7d528d7455afda8b4a59e9aed381c\n" }, { "commit": "366f0443c4529976d5ac73c7d7273397d8c7c59d", "tree": "6e146876b7a0a6c86527f9f193c18fdbd6c6643d", "parents": [ "487ad46b7ee79eb4a03d3560072c309280069c04" ], "author": { "name": "Christopher Ferris", "email": "cferris@google.com", "time": "Tue May 08 12:43:15 2018 -0700" }, "committer": { "name": "Christopher Ferris", "email": "cferris@google.com", "time": "Fri May 11 00:42:41 2018 +0000" }, "message": "Add support for cortex-a55/cortex-a75.\n\nBug: 78133793\nBug: 78242072\n\nTest: Builds and ran unit tests.\nChange-Id: I3e15e402dcc367ecea426895ec8e666887832e8d\nMerged-In: I3e15e402dcc367ecea426895ec8e666887832e8d\n(cherry picked from commit a128c5cb01ddef00c6ab1b029e413e77264e88f5)\n" }, { "commit": "18259d7fb7164a5e029df4f883b3a79ccc2403e8", "tree": "ba378bfdef4127bb0607215186e3b150fd38bcdf", "parents": [ "922501b4bbf724e4259477a27764291684eedffb" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Thu Apr 12 11:18:23 2018 +0100" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Thu May 10 15:04:09 2018 +0100" }, "message": "ART: Compiler support for const-method-type\n\nImplemented as a runtime call.\n\nBug: 66890674\nTest: art/test.py --target -r -t 979\nTest: art/test.py --target --64 -r -t 979\nTest: art/test.py --host -r -t 979\nChange-Id: I4b3d3969d455d0198cfe122eea8abd54e0ea20ee\n" }, { "commit": "a3ad0cdd711857f04f477e2cdc5b56a2c74a3018", "tree": "7e0e4c7888c2497d86ce96c9574d7c9886721ccf", "parents": [ "abd9e1515bc6be88372c61071971c5432a51553d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri May 04 10:06:38 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 09 11:11:09 2018 +0100" }, "message": "ART: Move JNI files to runtime/jni/ .\n\nTest: Rely on TreeHugger.\nChange-Id: I9cae11191ef1567ae9453be498882a7767285140\n" }, { "commit": "29c4ec01cc7df6f3c487a9f8d2cf4080048e9835", "tree": "d0293f7527937efb7c62c96266c8fb813a63d58c", "parents": [ "d79aaab3615e11a92d0581a137a16f0274417476", "395071d7118acdd1718f522be692aab54b9c4afb" ], "author": { "name": "Jeff Brown", "email": "jeffbrown@google.com", "time": "Fri Apr 27 23:12:37 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 27 23:12:37 2018 +0000" }, "message": "Merge \"Set GS register for Fuchsia\"" }, { "commit": "395071d7118acdd1718f522be692aab54b9c4afb", "tree": "7fd1fb48db1fafe8697e039a515443052dadb972", "parents": [ "189ee81f9768f4ffbd3ffa52997a229c81ac0c7e" ], "author": { "name": "Steve Austin", "email": "steveaustin@google.com", "time": "Wed Apr 25 14:07:45 2018 -0700" }, "committer": { "name": "Steve Austin", "email": "steveaustin@google.com", "time": "Fri Apr 27 12:24:23 2018 -0700" }, "message": "Set GS register for Fuchsia\n\nTest: Tested with Fuchsia build system and toolchain\n\nChange-Id: I85f9bdb59090df5cf4c21ef585f813730d84ba3f\n" }, { "commit": "1979c64214bd505c013d573bc8729ee94f7bdea5", "tree": "9b4b2298b8b9d15cd6ca0a1e06e3771f3db2163f", "parents": [ "5a87e19e4bf1b6719c2aad3effde1b38d2c3085c" ], "author": { "name": "David Sehr", "email": "sehr@google.com", "time": "Thu Apr 26 14:41:18 2018 -0700" }, "committer": { "name": "David Sehr", "email": "sehr@google.com", "time": "Thu Apr 26 15:08:49 2018 -0700" }, "message": "Clean up include paths\n\nRemove runtime/globals.h and make clients point to the right globals.h\n(libartbase/base/globals.h). Also make within-libartbase includes\nrelative rather than using base/, etc.\n\nBug: 22322814\nTest: make -j 40 checkbuild\nChange-Id: I99de63fc851d48946ab401e2369de944419041c7\n" }, { "commit": "e3872ed887afbc4574f69a35f8ec91c73a01f2a9", "tree": "37c51ff1696bce2583863e20ea5360e8c0745f97", "parents": [ "a03627a94c0eead28e1c7d917218ad398d483495" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 25 10:46:09 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 25 11:27:11 2018 +0100" }, "message": "Fix non-Baker build.\n\nrMR is defined only for Baker read barriers. Replace the\nentire introspection marking entrypoint with \"bkpt\" for\nother configs so that we do not use rMR if unavailable.\n\nTest: m ART_USE_READ_BARRIER\u003dfalse\nBug: 36141117\nChange-Id: I12e856a7f0841d342477d1dcbd4f00652ee11efa\n" }, { "commit": "dcd117e04b0831e4539544c38c524799114f3e66", "tree": "c5564d659c74ac9ef5207434ced91f4f7415dc77", "parents": [ "63fe8dc454298852ae31cfc2692108488a58c650" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Apr 19 11:54:00 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Apr 24 17:13:47 2018 +0100" }, "message": "ARM: Use rMR for Baker RB introspection marking.\n\nThe marking register (r8 on ARM) is known to be 1 when\nentering the introspection marking entrypoint, so we can\nclobber it, use it as a temporaray register (instead or r4)\nin the runtime entrypoint, and reload the 1 before\nreturning. The immediate benefits are minor, see below,\nbut this shall allow further improvements, for example we\ncould try to change rMR to r4 which would reduce code size\nof every marking register check by 2 bytes.\n\nARM boot image (boot*.oat) size in aosp_taimen-userdebug:\n - before: 17861724\n - after: 17858088 (-3636)\n\nTest: Pixel 2 XL boots.\nTest: m test-art-host-gtest\nTest: testrunner.py --target --optimizing --32\nTest: Repeat the above tests with heap poisoning enabled.\nBug: 36141117\nChange-Id: I0f625dec3a6b3ee1786f7e5f4377be42b9bc37d3\n" }, { "commit": "175e7862dbdb44089ef327fc43ba00c791fd3838", "tree": "7b7ff4327b51b57e47e4b22af8d771edb9d462c1", "parents": [ "77c6fc7341143dd27c74cddd786398688d7b4c91" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Mar 27 09:03:13 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Mar 27 10:04:25 2018 +0100" }, "message": "Revert^4 \"Compiler changes for bitstring based type checks.\"\n\nDisabled the build time flag. (No image version bump needed.)\n\nBug: 26687569\nBug: 64692057\nBug: 76420366\n\nThis reverts commit 3fbd3ad99fad077e5c760e7238bcd55b07d4c06e.\n\nChange-Id: I5d83c4ce8a7331c435d5155ac6e0ce1c77d60004\n" }, { "commit": "3fbd3ad99fad077e5c760e7238bcd55b07d4c06e", "tree": "e8bc33fa60c38f7e1c85f8d4acf6a738df9b426a", "parents": [ "3f41323cc9da335e9aa4f3fbad90a86caa82ee4d" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Mar 26 21:14:46 2018 +0000" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Mar 26 21:14:46 2018 +0000" }, "message": "Revert^3 \"Compiler changes for bitstring based type checks.\"\n\nThis reverts commit 3f41323cc9da335e9aa4f3fbad90a86caa82ee4d.\n\nReason for revert: Fails sporadically.\n\nBug: 26687569\nBug: 64692057\nBug: 76420366\nChange-Id: I84d1e9e46c58aeecf17591ff71fbac6a1e583909\n" }, { "commit": "3f41323cc9da335e9aa4f3fbad90a86caa82ee4d", "tree": "ce41c620d2cd411da3c20aa95fb9a69328e77c42", "parents": [ "9ec1e24ebc683b15bb9c6db5554ac2ff9458adae" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Feb 12 18:39:15 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Mar 22 12:12:39 2018 +0000" }, "message": "Revert^2 \"Compiler changes for bitstring based type checks.\"\n\nAdd extra output for debugging failures and re-enable\nthe bitstring type checks.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing --jit\nTest: testrunner.py --host -t 670-bitstring-type-check\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --optimizing --jit\nTest: testrunner.py --target -t 670-bitstring-type-check\nBug: 64692057\nBug: 26687569\n\nThis reverts commit bff7a52e2c6c9e988c3ed1f12a2da0fa5fd37cfb.\n\nChange-Id: I090e241983f3ac6ed8394d842e17716087d169ac\n" }, { "commit": "946bb09a5adc7d591498b4504aa5d9354457953e", "tree": "3f1931a9117856c806b8371987700b5646a7d195", "parents": [ "68f0680e83179cfe0127fda54a8e02a8552bf619" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Mar 09 17:23:01 2018 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Mar 15 14:59:21 2018 +0000" }, "message": "Support unwinding though the switch interpreter.\n\nWrap the switch interpreter in small assembly method which defines\nDEX PC in CFI and thus it allows libunwind to backtrace through it.\n\nBug: 22414682\nTest: testrunner.py --host -t 137\nTest: testrunner.py --target -t 137\nChange-Id: I31dad9f0fb446151baaa99234b64f25c8ca2fa87\n" }, { "commit": "e1734a9961b755d9b167c31deae5a2e36f92df2a", "tree": "cc3cae7fd25244ecc624e2f42d032fa903eb4c1d", "parents": [ "ffbe188c087f9e4908c7cb77e297d26402ba6bb3", "1f49d979a0a239ea33750e8d07073b4df8b5da6f" ], "author": { "name": "Yabin Cui", "email": "yabinc@google.com", "time": "Sat Mar 10 01:04:03 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Sat Mar 10 01:04:03 2018 +0000" }, "message": "Merge \"Fix mac build: Update cfi directives for art_quick_osr_stub.\"" }, { "commit": "1f49d979a0a239ea33750e8d07073b4df8b5da6f", "tree": "76727676f4d1d2a8465ac029795e55e30883377d", "parents": [ "79b144527bee5c384791fb826a45d5f411fd8b6d" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Mar 09 23:23:36 2018 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Mar 09 23:24:42 2018 +0000" }, "message": "Fix mac build: Update cfi directives for art_quick_osr_stub.\n\nMac build doesn\u0027t like cfi directives.\n\nBug: 73954823\nTest: testrunner.py -t 570 --jit\nChange-Id: Idbe44646c20d17079528a82bdb0c915691ac2748\n" }, { "commit": "6d288440a3414e42bcb21f15a5cc2b2cfe3a5b09", "tree": "90faa2359507b96a750e38b5bf50bbda16cda940", "parents": [ "9992e095643f6746361df03c4c98e742d9ad5899", "79b144527bee5c384791fb826a45d5f411fd8b6d" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Mar 09 14:14:53 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Mar 09 14:14:53 2018 +0000" }, "message": "Merge \"Update cfi directives for art_quick_osr_stub.\"" }, { "commit": "05c1fb48e3c5afec1a00107ec4e13d4635cc87ac", "tree": "4be91b781038741b2c9b16e055debdb876bc1ffd", "parents": [ "d395e73e9ed7c3fb5e8a48c3f3141a8997d4a82b", "7e614110f7fe2cf5206236c3ac318941bcd0c519" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Mar 08 16:48:19 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Mar 08 16:48:19 2018 +0000" }, "message": "Merge \"ARM64: Simplify save/restore regs in invoke stub.\"" }, { "commit": "79b144527bee5c384791fb826a45d5f411fd8b6d", "tree": "0498c71d665334fb0b0c0d4361b138a17c6b8414", "parents": [ "398daffb3e216ff7d552e50f47f93523409bca6e" ], "author": { "name": "Christopher Ferris", "email": "cferris@google.com", "time": "Wed Feb 28 14:44:33 2018 -0800" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Mar 08 16:36:28 2018 +0000" }, "message": "Update cfi directives for art_quick_osr_stub.\n\nBug: 73954823\n\nTest: testrunner.py -t 570 --jit\nTest: Check the backtrace works in gdb at every instruction.\nChange-Id: I7ad5463eca89851a0ce6fd4354e888ca5a0f9918\n" }, { "commit": "7e614110f7fe2cf5206236c3ac318941bcd0c519", "tree": "810329aaf963f13916bf093ed0c441038772a26a", "parents": [ "7a79ebbd7183cc0fda43512a0add884765fd2bf1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Mar 06 14:34:06 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Mar 08 12:20:35 2018 +0000" }, "message": "ARM64: Simplify save/restore regs in invoke stub.\n\nSave/restore fewer registers and use common macros to do so.\nRewrite the return sequence to avoid many chained branches.\nAnd a few other minor simplifications.\n\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --64 --optimizing\nChange-Id: I32ee7bad685b8bd73d07e5a4c48a6ac0b22ff762\n" }, { "commit": "c431b9dc4b23cc950eb313695258df5d89f53b22", "tree": "422273559c3ae52caff0c6b1cf1a62a8312f0e26", "parents": [ "f46f46cf5bd32788d5252b7107628a66594a5e98" ], "author": { "name": "David Sehr", "email": "sehr@google.com", "time": "Fri Mar 02 12:01:51 2018 -0800" }, "committer": { "name": "David Sehr", "email": "sehr@google.com", "time": "Mon Mar 05 13:58:20 2018 -0800" }, "message": "Move most of runtime/base to libartbase/base\n\nEnforce the layering that code in runtime/base should not depend on\nruntime by separating it into libartbase. Some of the code in\nruntime/base depends on the Runtime class, so it cannot be moved yet.\nAlso, some of the tests depend on CommonRuntimeTest, which itself needs\nto be factored (in a subsequent CL).\n\nBug: 22322814\nTest: make -j 50 checkbuild\n make -j 50 test-art-host\n\nChange-Id: I8b096c1e2542f829eb456b4b057c71421b77d7e2\n" }, { "commit": "134cfddbbb70d4c4de26a3c94eb34c43e5df2003", "tree": "9a63ec37e10477a172b07be71162caf11fa8d0b4", "parents": [ "a26f4169b73d9c555a70fd8281f1d7b3add2c058" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Mar 02 15:39:15 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Mar 02 15:42:12 2018 +0000" }, "message": "x86-64: Fix art_quick_osr_stub for unwinder.\n\nTest: testrunner.py --host --jit --64 570-checker-osr\nTest: Run the above test under gdb, break in the stub and\n manually check that \"bt 3\" works correctly at every\n instruction and \"bt 4\" works in called methods if we\n also pass -Xcompiler-option --generate-debug-info.\nBug: 73954823\n\nChange-Id: I7352febb0c4c0414648e2b825511b83d9bcc268a\n" }, { "commit": "a26f4169b73d9c555a70fd8281f1d7b3add2c058", "tree": "a31f14296436763ef5cda202b468990893bfe38e", "parents": [ "1ccfa59c180c62f88091048c3f7f65f1d511ed0c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Mar 02 13:53:53 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Mar 02 14:05:47 2018 +0000" }, "message": "ARM64: Rewrite art_quick_osr_stub for unwinder.\n\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --jit --64 570-checker-osr\nTest: Run the above test under gdb, break in the stub and\n manually check that \"bt 3\" works correctly at every\n instruction and \"bt 4\" works in called methods if we\n also pass -Xcompiler-option --generate-debug-info.\nBug: 73954823\nChange-Id: I49b589d3079e5d3cc13280d2c998606e1cbb75a7\n" }, { "commit": "6dfaa0c6dc4a6906bd8522a9d9189be378695e0f", "tree": "47008066a23925b04c68bde37a2aa2e93d8597fc", "parents": [ "7b5e244b9920de20807487b0bffee7ebb7f24ce4", "b47f7445d6c9329629d88f58e747c9e571cf823e" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Feb 27 14:52:58 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Feb 27 14:52:58 2018 +0000" }, "message": "Merge \"ART: add exynos-m3 to a53 #835769 \u0026 #843419 erratum exception list\"" }, { "commit": "1fbea6148068a8daaa17ede23628399d5d847e31", "tree": "e474406573d845c2f0c9aa2ff4e648d2a3484cdd", "parents": [ "d2b32234aba1cea49b7b9ba3697a1ef2f13186a6" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Feb 12 14:17:40 2018 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Feb 12 14:17:40 2018 -0800" }, "message": "ART: Fix memcmp16_test typo\n\nFix trivial issue.\n\nBug: 28318941\nTest: m test-art-host-gtest-memcmp16_test\nChange-Id: I3051e2695c51bbf5cdf4a34e5ffd5a6e2432241f\n" }, { "commit": "1e5b3f39ff1776fd8b7d8d7d372347a08d98781b", "tree": "f84ebefc503e5cffb6df5989979492ae04f85cbb", "parents": [ "386568bc8979bd9b097259b8d58f2b02e81f816a", "7349d5dc0d10efaf03d4d51ab9f6c1f8ef8a833f" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Sun Feb 04 23:36:42 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Sun Feb 04 23:36:42 2018 +0000" }, "message": "Merge \"MIPS64: Fix art_quick_instrumentation_entry\"" }, { "commit": "86e6814ac2224998c40f15af701ae41261b8f08e", "tree": "84d6f7a59f41ce72730b01360a33629889d42451", "parents": [ "e65948f7c78919083224c1cd2ca47e827ced6d3e" ], "author": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Fri Feb 02 10:25:55 2018 -0800" }, "committer": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Fri Feb 02 10:56:05 2018 -0800" }, "message": "Leave one more register for clang 7.0.\n\n* Clang 7.0 does not allow inline assembly to reserve so many registers.\n\nBug: 72613441\nTest: normal build\nChange-Id: I438e2864dcbdcfadbd06a3482437e9c4e4668f98\n" }, { "commit": "7349d5dc0d10efaf03d4d51ab9f6c1f8ef8a833f", "tree": "e3b7ad3e071a9f35746d27b79d8f44a68245d2d9", "parents": [ "9657618bbf511c5a32281f1cd06ed4205536d81a" ], "author": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Fri Feb 02 10:01:10 2018 +0100" }, "committer": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Fri Feb 02 10:08:52 2018 +0100" }, "message": "MIPS64: Fix art_quick_instrumentation_entry\n\nLoad address of art_quick_instrumentation_exit before $gp register\nis restored in RESTORE_SAVE_REFS_AND_ARGS_FRAME.\n\nThis fixes a lot of tests like:\n* 099-vmdebug\n* 304-method-tracing\n* 545-tracing-and-jit\n* 802-deoptimization\n* 988-method-trace\nand many others as well as tests with --trace option.\n\nTest: ./testrunner --optimizing --target in QEMU\nTest: ./testrunner --optimizing --target --trace in QEMU\nChange-Id: I1c45c4a04a45ebe00cb63fbde547367be6de62cf\n" }, { "commit": "bff7a52e2c6c9e988c3ed1f12a2da0fa5fd37cfb", "tree": "e281a8dde61e396ed5f20c31d41086b1b1b18389", "parents": [ "83af48e9f4cdfcf3f0069c63561bab4c176bd2f1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 25 13:33:07 2018 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 25 15:05:16 2018 +0000" }, "message": "Revert \"Compiler changes for bitstring based type checks.\"\n\nBug: 64692057\nBug: 71853552\nBug: 26687569\n\nThis reverts commit eb0ebed72432b3c6b8c7b38f8937d7ba736f4567.\n\nChange-Id: I7daeaa077960ba41b2ed42bc47f17501621be4be\n" }, { "commit": "4ea9ebaf0989ab69f92a223c386b6e5a6cffb1e7", "tree": "2e9b8c8331c9731141241c0f9464277b54ebb21c", "parents": [ "be2b613f5a30cdf2291b9f4f5d0acc2c1bb0b4ae", "0dec3372f4ac869f0d0e7993d9c64bf1d2583b04" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Jan 23 15:10:30 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jan 23 15:10:30 2018 +0000" }, "message": "Merge \"MIPS32: Mark kQuickPow as direct entrypoint\"" }, { "commit": "be2b613f5a30cdf2291b9f4f5d0acc2c1bb0b4ae", "tree": "0ff068df6465b52458ecca3de96d119234415def", "parents": [ "2e1791b74406fba9930bbe5dfa5358d2d2c07e1a", "eb0ebed72432b3c6b8c7b38f8937d7ba736f4567" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jan 23 14:59:45 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jan 23 14:59:45 2018 +0000" }, "message": "Merge \"Compiler changes for bitstring based type checks.\"" }, { "commit": "eb0ebed72432b3c6b8c7b38f8937d7ba736f4567", "tree": "74d95eb4bfbf01ef6fd3a68695f5d7cec69338d7", "parents": [ "e57043081e6b091a9fd23a84043373148ae72f1f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jan 10 18:26:38 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jan 23 13:02:59 2018 +0000" }, "message": "Compiler changes for bitstring based type checks.\n\nWe guard the use of this feature with a compile-time flag,\nset to true in this CL.\n\nBoot image size for aosp_taimen-userdebug in AOSP master:\n - before:\n arm boot*.oat: 63604740\n arm64 boot*.oat: 74237864\n - after:\n arm boot*.oat: 63531172 (-72KiB, -0.1%)\n arm64 boot*.oat: 74135008 (-100KiB, -0.1%)\n\nThe new TypeCheckBenchmark yields the following changes\nusing the little cores of taimen fixed at 1.4016GHz:\n 32-bit 64-bit\n timeCheckCastLevel1ToLevel1 11.48-\u003e15.80 11.47-\u003e15.78\n timeCheckCastLevel2ToLevel1 15.08-\u003e15.79 15.08-\u003e15.79\n timeCheckCastLevel3ToLevel1 19.01-\u003e15.82 17.94-\u003e15.81\n timeCheckCastLevel9ToLevel1 42.55-\u003e15.79 42.63-\u003e15.81\n timeCheckCastLevel9ToLevel2 39.70-\u003e14.36 39.70-\u003e14.35\n timeInstanceOfLevel1ToLevel1 13.74-\u003e17.93 13.76-\u003e17.95\n timeInstanceOfLevel2ToLevel1 17.02-\u003e17.95 16.99-\u003e17.93\n timeInstanceOfLevel3ToLevel1 24.03-\u003e17.95 24.45-\u003e17.95\n timeInstanceOfLevel9ToLevel1 47.13-\u003e17.95 47.14-\u003e18.00\n timeInstanceOfLevel9ToLevel2 44.19-\u003e16.52 44.27-\u003e16.51\nThis suggests that the bitstring typecheck should not be\nused for exact type checks which would be equivalent to the\n\"Level1ToLevel1\" benchmark. Whether the implementation is\na beneficial replacement for the kClassHierarchyCheck and\nkAbstractClassCheck on average depends on how many levels\nfrom the target class (or Object for a negative result) is\na typical object\u0027s class.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing --jit\nTest: testrunner.py --host -t 670-bitstring-type-check\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --optimizing --jit\nTest: testrunner.py --target -t 670-bitstring-type-check\nBug: 64692057\nBug: 71853552\nBug: 26687569\nChange-Id: I538d7e036b5a8ae2cc3fe77662a5903d74854562\n" }, { "commit": "0dec3372f4ac869f0d0e7993d9c64bf1d2583b04", "tree": "3d7eb5ce181cfe3806ad153b0be7b0c764e6accf", "parents": [ "2e1791b74406fba9930bbe5dfa5358d2d2c07e1a" ], "author": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Tue Jan 23 12:58:26 2018 +0100" }, "committer": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Tue Jan 23 13:00:46 2018 +0100" }, "message": "MIPS32: Mark kQuickPow as direct entrypoint\n\nThis fixes mips32 build.\nThis is a follow-up to Iaa31f70acabbd57c163cfeafe02eed67c1348861.\n\nTest: successful mips32 build\nChange-Id: I959304745e7f93a64fdee792c0f3199cee2eefff\n" }, { "commit": "4d17987da58d9411adbed1a18203d76d6119612d", "tree": "f2953a0eb3ebc3f8533d22c14f4a09d7f0d4168d", "parents": [ "e57043081e6b091a9fd23a84043373148ae72f1f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jan 19 14:50:10 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jan 22 18:35:16 2018 +0000" }, "message": "ART: Add entrypoint and intrinsic for Math.pow().\n\nMathBenchmarks.java#timePow results on taimen\u0027s little cores\nfixed at frequency 1401600 with forced JIT compilation:\n - before:\n - X32: 356.33 (@FastNative), 315.39 (@CriticalNative)\n - X64: 357.31 (@FastNative), 315.37 (@CriticalNative)\n - after (LICM defeats the benchmark):\n - X32: 2.88\n - X64: 2.87\n - after but with kAllSideEffects to prevent LICM:\n - X32: 275.42\n - X64: 275.67\n\nTest: Rely on TreeHugger.\nBug: 70727450\nChange-Id: Iaa31f70acabbd57c163cfeafe02eed67c1348861\n" }, { "commit": "bf92b3f2d3374eab6bc40cc41574b51aae5a3718", "tree": "e61d010ac4ce27810d0d34ffeca694a46c2a2fd5", "parents": [ "fa0b0db6fbdcbf20bf78c53500ac98cfc3a26208" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jan 17 18:11:30 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jan 17 18:19:32 2018 +0000" }, "message": "Clean up art_quick_check_instance_of entrypoints.\n\nTest: Rely on TreeHugger.\nChange-Id: I848b8b711ac6bfa90999701a518e2e70b42c3d57\n" }, { "commit": "b47f7445d6c9329629d88f58e747c9e571cf823e", "tree": "dc89c446ba26ff375ff803543f78161bfb8cd2e2", "parents": [ "bf84c1bbdbfd8d1e071ac8f3d6cc09e934212b5b" ], "author": { "name": "Junmo Park", "email": "junmoz.park@samsung.com", "time": "Fri Nov 24 11:31:19 2017 +0900" }, "committer": { "name": "Junmo Park", "email": "junmoz.park@samsung.com", "time": "Mon Jan 08 08:39:44 2018 +0900" }, "message": "ART: add exynos-m3 to a53 #835769 \u0026 #843419 erratum exception list\n\nExynos-M3 is custom-designed 64-bit ARM CPU and does not need this A53\nerratum handling.\n\nChange-Id: I30ba0b25d944054a4ddd7ce8d256f050e4c1e423\nSigned-off-by: Junmo Park \u003cjunmoz.park@samsung.com\u003e\n" }, { "commit": "809f5b1652eb68ad496af138370d2cc198510322", "tree": "d88f0ef90b317ae1f6d8356d132f267fa40951a2", "parents": [ "3165bb09dc04b61abd04bf8e263dd85d610694e4" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jan 04 14:05:59 2018 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jan 04 14:32:51 2018 +0000" }, "message": "Explicitly document functions generated with macro ART_GET_FIELD_FROM_CODE.\n\nThe ART_GET_FIELD_FROM_CODE macro is used to generate the following\nset of functions:\n\n art{Get,Set}\u003cKind\u003e{Static,Instance}FromCode\n art{Get,Set}\u003cKind\u003e{Static,Instance}FromCompiledCode\n\nwhere \u003cKind\u003e is in {Byte,Boolean,Short,Char,32,64,Obj}.\n\nHowever, finding the definitions of these functions from their names\nwas difficult, as these definitions (and their name) are\ngenerated. This change explicitly mentions the name of the functions\ngenerated with macro ART_GET_FIELD_FROM_CODE in a commment, in order\nto improve their grep-ability.\n\nTest: mmma art\nChange-Id: I22bf4851c562801c491ccdea2d9d9c9f965b9a6f\n" }, { "commit": "e7de5ec3e4cd1d607b647d98ea64df105479b867", "tree": "d692c4d1dee08eea4beffd71bd8cdf1d106c059e", "parents": [ "bee510c94560703102ca553a08ec47119959c204" ], "author": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Thu Dec 14 10:25:20 2017 +0100" }, "committer": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Fri Dec 15 17:33:12 2017 +0100" }, "message": "MIPS: Support swaps between 128-bit locations\n\nAdd support for swaps between two SIMDStackSlots, two\nVectorRegisters (extended FpuRegister) and between a\nSIMDStackSlot and a VectorRegister.\n\nThis fixes test 623-checker-loop-regressions for\nMIPS64R6 and MIPS32R6.\n\nTest: ./testrunner.py --optimizing --target in QEMU (MIPS64R6)\nTest: ./testrunner.py --optimizing --target in QEMU (MIPS32R6)\n\nChange-Id: I36aa209f79790fb6c08b9a171f810769a6b40afc\n" }, { "commit": "bfe2c6cc48cc56305c42c1d09bf03cf80f556a49", "tree": "4cd4514d207d8a8f4f0f8cf59ec10ca73e2eabd6", "parents": [ "d13126d1ba8f65e483cd2e9dd18e60c9a0992c6e" ], "author": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Mon Dec 11 12:28:19 2017 +0100" }, "committer": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Mon Dec 11 12:28:19 2017 +0100" }, "message": "MIPS: Add missing include\n\nFollowing error has been generated due to missing include:\nart/runtime/arch/mips/entrypoints_init_mips.cc:288:27: error:\n use of undeclared identifier \u0027systrace_lock_logging\u0027\n\nThis fixes aosp_mips-eng build.\n\nTest: successful aosp_mips-eng build\nChange-Id: I19920cbb7dd3d928352be95a06d5138d3d505bd0\n" }, { "commit": "57943810cfc789da890d73621741729da5feaaf8", "tree": "367677a982a45af98ffe3e79543615875e8550b4", "parents": [ "d5153627778e71ef68b510ce03c77467fa4d85bd" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Dec 06 21:39:13 2017 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Dec 07 16:26:11 2017 -0800" }, "message": "ART: Replace base/logging with android-base/logging\n\nReplace wherever possible. ART\u0027s base/logging is now mainly VLOG\nand initialization code that is unnecessary to pull in and makes\nchanges to verbose logging more painful than they have to be.\n\nTest: m test-art-host\nChange-Id: I3e3a4672ba5b621e57590a526c7d1c8b749e4f6e\n" } ], "next": "2196c651ecc77e49992c6c329dfce45f78ff46cb" }