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gerrit.witaqua.org / art / 72155d2f05e38b265cb79a31abdbe65cd29d3a5b / compiler / optimizing / code_generator_vector_arm64.cc
  1. 0225b77 ARM64: Improve SIMD LDR/STR. by Artem Serov · 9 years ago
  2. f34dd20 ARM64: Support MultiplyAccumulate for SIMD. by Artem Serov · 9 years ago
  3. f3e61ee Implement halving add idiom (with checker tests). by Aart Bik · 9 years ago
  4. b31f91f ARM64: Support vectorization for double and long. by Artem Serov · 9 years ago
  5. d4bccf1 ARM64: Support 128-bit registers for SIMD. by Artem Serov · 9 years ago
  6. 6daebeb Implemented ABS vectorization. by Aart Bik · 9 years ago
  7. f8f5a16 ART vectorizer. by Aart Bik · 9 years ago