)]}'
{
  "log": [
    {
      "commit": "e7de5ec3e4cd1d607b647d98ea64df105479b867",
      "tree": "d692c4d1dee08eea4beffd71bd8cdf1d106c059e",
      "parents": [
        "bee510c94560703102ca553a08ec47119959c204"
      ],
      "author": {
        "name": "Goran Jakovljevic",
        "email": "goran.jakovljevic@mips.com",
        "time": "Thu Dec 14 10:25:20 2017 +0100"
      },
      "committer": {
        "name": "Goran Jakovljevic",
        "email": "goran.jakovljevic@mips.com",
        "time": "Fri Dec 15 17:33:12 2017 +0100"
      },
      "message": "MIPS: Support swaps between 128-bit locations\n\nAdd support for swaps between two SIMDStackSlots, two\nVectorRegisters (extended FpuRegister) and between a\nSIMDStackSlot and a VectorRegister.\n\nThis fixes test 623-checker-loop-regressions for\nMIPS64R6 and MIPS32R6.\n\nTest: ./testrunner.py --optimizing --target in QEMU (MIPS64R6)\nTest: ./testrunner.py --optimizing --target in QEMU (MIPS32R6)\n\nChange-Id: I36aa209f79790fb6c08b9a171f810769a6b40afc\n"
    },
    {
      "commit": "174b2e27ebf933b80f4e8b64b4b024ab4306aaac",
      "tree": "968cdd8d7fd68571115db77cc288807c3b257911",
      "parents": [
        "6783118d2ad9d759f0617b1219a9e29a10a569f7"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Oct 12 13:34:49 2017 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Oct 17 11:12:08 2017 +0100"
      },
      "message": "Use ScopedArenaAllocator for code generation.\n\nReuse the memory previously allocated on the ArenaStack by\noptimization passes.\n\nThis CL handles only the architecture-independent codegen\nand slow paths, architecture-dependent codegen allocations\nshall be moved to the ScopedArenaAllocator in a follow-up.\n\nMemory needed to compile the two most expensive methods for\naosp_angler-userdebug boot image:\n  BatteryStats.dumpCheckinLocked() : 19.6MiB -\u003e 18.5MiB (-1189KiB)\n  BatteryStats.dumpLocked(): 39.3MiB -\u003e 37.0MiB (-2379KiB)\n\nAlso move definitions of functions that use bit_vector-inl.h\nfrom bit_vector.h also to bit_vector-inl.h .\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nBug: 64312607\nChange-Id: I84688c3a5a95bf90f56bd3a150bc31fedc95f29c\n"
    },
    {
      "commit": "0ebe0d83138bba1996e9c8007969b5381d972b32",
      "tree": "a5ee66ebc5b587ade97e56ac8fc7d832fbbed4af",
      "parents": [
        "e1e347dace0ded83774999bb26c37527dcdb1d5a"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Sep 21 22:50:39 2017 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Sep 25 15:45:01 2017 +0100"
      },
      "message": "ART: Introduce compiler data type.\n\nReplace most uses of the runtime\u0027s Primitive in compiler\nwith a new class DataType. This prepares for introducing\nnew types, such as Uint8, that the runtime does not need\nto know about.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nBug: 23964345\nChange-Id: Iec2ad82454eec678fffcd8279a9746b90feb9b0c\n"
    },
    {
      "commit": "d8dbc8da0e5cc6b5c2176ce2d3877e6194d72c0c",
      "tree": "af6e9fb02471d75ebdea46190a0aa3e9dbdb892d",
      "parents": [
        "93780a60090356921b844dbefdc13442c9f18b52"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Sep 20 13:37:47 2017 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Sep 20 15:55:10 2017 +0100"
      },
      "message": "Refactor compiled_method.h .\n\nMove LinkerPatch to compiler/linker/linker_patch.h .\nMove SrcMapElem to compiler/debug/src_map_elem.h .\nIntroduce compiled_method-inl.h to reduce the number\nof `#include`s in compiled_method.h .\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nChange-Id: Id211cdf94a63ad265bf4709f1a5e06dffbe30f64\n"
    },
    {
      "commit": "6cfbdbc359ec5414d3e49f70d28f8c0e65b98d63",
      "tree": "f92b309ddc43c2254b6067346a653170fbbf7316",
      "parents": [
        "0f3c7003e08a42a4ed8c9f8dfffb1bee1118de59"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Jul 25 13:26:39 2017 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Sep 07 17:52:35 2017 +0100"
      },
      "message": "Use mmapped boot image intern table for PIC app HLoadString.\n\nImplement new HLoadString load kind for boot image strings\nreferenced by PIC-compiled apps (i.e. prebuilts) that uses\nPC-relative load from a boot image InternTable mmapped into\nthe apps .bss. This reduces the size of the PIC prebuilts\nthat reference boot image strings compared to the kBssEntry\nas we can completely avoid the slow path and stack map.\n\nWe separate the InternedStrings and ClassTable sections of\nthe boot image (.art) file from the rest, aligning the\nstart of the InternedStrings section to a page boundary.\nThis may actually increase the size of the boot image file\nby a page but it also allows mprotecting() these tables as\nread-only. The ClassTable section is included in\nanticipation of a similar load kind for HLoadClass.\n\nPrebuilt services.odex for aosp_angler-userdebug (arm64):\n  - before: 20862776\n  - after: 20308512 (-541KiB)\nNote that 92KiB savings could have been achieved by simply\navoiding the read barrier, similar to the HLoadClass flag\nIsInBootImage(). Such flag is now unnecessary.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: testrunner.py --host --pictest\nTest: testrunner.py --target on Nexus 6P.\nTest: testrunner.py --target --pictest on Nexus 6P.\nTest: Nexus 6P boots.\nBug: 31951624\nChange-Id: I5f2bf1fc0bb36a8483244317cfdfa69e192ef6c5\n"
    },
    {
      "commit": "a663d9d5b32a525794a2b98fa43da54dd7c79e3b",
      "tree": "88c643ca5ebfb0dfe11f45a9b232f9a2592fb043",
      "parents": [
        "b9463674919ba91fe131e65785ad67b4202e86b9"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Mon Jul 31 18:43:18 2017 -0700"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Fri Aug 18 15:29:31 2017 -0700"
      },
      "message": "MIPS32: Allow some patched instructions in delay slots\n\nTest: test-art-host-gtest\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-gtest32\nTest: testrunner.py --target --optimizing --32\nTest: same tests as above on CI20\nTest: booted MIPS32R2 in QEMU\n\nChange-Id: I7e1ba59993008014d0115ae20c56e0a71fef0fb0\n"
    },
    {
      "commit": "4147fcc43c2ee019a06e55384985e3eaf82dcb8c",
      "tree": "11ec92efbfddf7736bbc74ed35fcfb3756bfcfb0",
      "parents": [
        "e8f48da635c4d07bbe431e5819da8e1fad91a8ef"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Sat Jun 17 19:57:27 2017 -0700"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Wed Jul 19 15:03:10 2017 -0700"
      },
      "message": "MIPS: Reduce Baker read barrier code size overhead\n\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-gtest\nTest: testrunner.py --target --optimizing\nTest: same tests as above on CI20\nTest: booted MIPS32 and MIPS64 in QEMU with poisoning\n      in configurations:\n      - with Baker read barrier thunks\n      - without Baker read barrier thunks\n      - ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\n\nChange-Id: I79f320bf8862a04215c76cfeff3118ebc87f7ef2\n"
    },
    {
      "commit": "51765b098301fff1897361b2d1a21af356d9d6d8",
      "tree": "5d35468c9ecd428803fe7e4339fb8e251b6ed926",
      "parents": [
        "e63a91111d13f33028c2988ded53a4659140ca2e"
      ],
      "author": {
        "name": "Lena Djokic",
        "email": "Lena.Djokic@imgtec.com",
        "time": "Thu Jun 22 13:49:59 2017 +0200"
      },
      "committer": {
        "name": "Lena Djokic",
        "email": "Lena.Djokic@imgtec.com",
        "time": "Thu Jul 13 10:34:27 2017 +0200"
      },
      "message": "MIPS32: ART Vectorizer\n\nMIPS32 implementation which uses MSA extension.\n\nNote: Testing is done with checker parts of tests 640, 645, 646 and\n      651, locally changed to cover MIPS32 cases. These changes can\u0027t\n      be included in this patch since MSA is not a default option.\n\nTest: ./testrunner.py --target --optimizing -j1 in QEMU (mips32r6)\nChange-Id: Ieba28f94c48c943d5444017bede9a5d409149762\n"
    },
    {
      "commit": "ca8c2951ea25e8f93eea9decc70d81937b4361dd",
      "tree": "72c811abe58895b4972cd88ee267c8ca66155fd1",
      "parents": [
        "2e0a7e5047fde08ddd220aaa1a0e64d44ecbb420"
      ],
      "author": {
        "name": "Lena Djokic",
        "email": "Lena.Djokic@imgtec.com",
        "time": "Mon May 29 11:31:46 2017 +0200"
      },
      "committer": {
        "name": "Lena Djokic",
        "email": "Lena.Djokic@imgtec.com",
        "time": "Thu Jul 06 14:06:33 2017 +0200"
      },
      "message": "MIPS32: Saves 128-bit vector registers along SuspendCheckSlowPath\n\nWe need to save 128 bits of data. This is only done for vector\nregisters that are live, so overhead is not too big.\n\nTest: mma test-art-host-gtest\nTest: ./testrunner.py --optimizing --target in QEMU (MIPS)\nChange-Id: I0f792e9c98011be3e24d5fad35a8244faafcb9a0\n"
    },
    {
      "commit": "8091ed8a26db4609c719ea8d905145ddfed7f498",
      "tree": "342d4459e8e9c61af7b69fc2ac2e0512592cf9f4",
      "parents": [
        "61cfb15e2588ff1fe3c80efbfcf55973122b28cb",
        "5fa5c04ca39fb9c46bfef0e0807a18d0cd9a4ba7"
      ],
      "author": {
        "name": "Treehugger Robot",
        "email": "treehugger-gerrit@google.com",
        "time": "Mon Jul 03 11:48:56 2017 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon Jul 03 11:48:56 2017 +0000"
      },
      "message": "Merge \"MIPS: Shorten .bss string/class loads\""
    },
    {
      "commit": "8098da9cf3e3f7875546c2cd953f2337587b39db",
      "tree": "8f0b2d69f83a1de7a0bb80ce1c3f1412c429615d",
      "parents": [
        "ebd4def76f4e60e442edb8d48f43a931bc3c773e"
      ],
      "author": {
        "name": "Lena Djokic",
        "email": "Lena.Djokic@imgtec.com",
        "time": "Wed Jun 28 12:07:50 2017 +0200"
      },
      "committer": {
        "name": "Lena Djokic",
        "email": "Lena.Djokic@imgtec.com",
        "time": "Wed Jun 28 17:42:17 2017 +0200"
      },
      "message": "MIPS32: MoveLocation refactoring\n\nMove32 and Move64 are removed so MoveLocation now handles all cases.\nReason for this are 128-bit (SIMDStackSlot, VectorRegister) moves\nwhich will be added in follow-up patch.\n\nTest: mma test-art-host-gtest\nTest: ./testrunner.py --optimizing --target in QEMU\n\nChange-Id: I93496e74874f77337b11b2265aa4b470bc7c6ce2\n"
    },
    {
      "commit": "5fa5c04ca39fb9c46bfef0e0807a18d0cd9a4ba7",
      "tree": "f902c5dad2486b8372c31989ac9b917715231fa8",
      "parents": [
        "83b140474aa1759739c8ee4464bf226c4fa0f6d7"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Thu Jun 01 21:07:52 2017 -0700"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Thu Jun 08 14:39:57 2017 -0700"
      },
      "message": "MIPS: Shorten .bss string/class loads\n\nThis is a follow-up to\nhttps://android-review.googlesource.com/#/c/384033/.\n\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: testrunner.py --target --optimizing\nTest: same tests as above on CI20\nTest: booted MIPS32R2 and MIPS64 in QEMU in configurations:\n      ART_USE_READ_BARRIER\u003dfalse,\n      ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\n\nChange-Id: I4cb2f4ded13c0d9fc960c7eac55396f7931c1e38\n"
    },
    {
      "commit": "0eb882bfc5d260e8014c26adfda11602065aa5d8",
      "tree": "e66dbebfb1e9a254c20954a2f2f98541aebfd5af",
      "parents": [
        "b5f5d746ac3f2c3088292395603cb1470e7749d2"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon May 15 13:39:18 2017 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Jun 07 15:39:24 2017 +0100"
      },
      "message": "Use ArtMethod* .bss entries for HInvokeStaticOrDirect.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: testrunner.py --target\nTest: Nexus 6P boots.\nTest: Build aosp_mips64-userdebug.\nBug: 30627598\nChange-Id: I0e54fdd2e91e983d475b7a04d40815ba89ae3d4f\n"
    },
    {
      "commit": "e7197bf7d58c705a048e13e241d7ca320502cd40",
      "tree": "496032b40145660b40002b9d5b7a78f1c2eeb44f",
      "parents": [
        "4ee8e291a7d5b7b98f35f495eb97705836910871"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Jun 02 17:00:23 2017 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Jun 06 15:26:42 2017 +0100"
      },
      "message": "Replace invoke kind kDexCacheViaMethod with kRuntimeCall.\n\nIn preparation for replacing the dex cache method array\nwith a hash-based array, get rid of one unnecessary use.\nThis method load kind is currently used only on mips for\nirreducible loops and OSR, so this should have no impact\non x86/x86-64/arm/arm64.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: Repeat the above tests with manually changing\n      kDexCachePcRelative to kRuntimeCall in sharpening.cc.\n      (Ignore failures in 552-checker-sharpening.)\nBug: 30627598\nChange-Id: Ifce42645f2dcc350bbb88c2f4642e88fc5f98152\n"
    },
    {
      "commit": "dbddc22f5dc2d1ff4d4783fbd66c27812f4980d1",
      "tree": "2a0a8efa1c2630e57ab48ab2de171f2847ff282f",
      "parents": [
        "a559fa1b0d6c276dde2cdc707de1acd4950f7190"
      ],
      "author": {
        "name": "Mathieu Chartier",
        "email": "mathieuc@google.com",
        "time": "Wed May 24 12:04:13 2017 -0700"
      },
      "committer": {
        "name": "Mathieu Chartier",
        "email": "mathieuc@google.com",
        "time": "Thu May 25 16:59:44 2017 -0700"
      },
      "message": "Refactor profiles to use TypeReference instead of ClassReference\n\nRefactor type reference into runtime and use it for profiles.\nClassReference was just duplicated code since it wasn\u0027t even using\nthe class def indexes.\n\nTest: test-art-host\n\nBug: 62040831\nChange-Id: Ia92f21c0e85c00321f52c97bb7a90158d882849b\n"
    },
    {
      "commit": "6597946d29be9108e2cc51223553d3db9290a3d9",
      "tree": "cea6647a45cc59fa1423751179e647124f269990",
      "parents": [
        "a654e0378a8d0bb149362399917e4da2959e6991"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri May 19 17:25:12 2017 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon May 22 18:35:05 2017 +0100"
      },
      "message": "Use PC-relative pointer to boot image methods.\n\nIn preparation for adding ArtMethod entries to the .bss\nsection, add direct PC-relative pointers to methods so that\nthe number of needed .bss entries for boot image is small.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: testrunner.py --target on Nexus 6P\nTest: Nexus 6P boots.\nTest: Build aosp_mips64-userdebug\nBug: 30627598\nChange-Id: Ia89f5f9975b741ddac2816e1570077ba4b4c020f\n"
    },
    {
      "commit": "764d454d1d51448deb81f6e8d2d7d317c7f4d1b4",
      "tree": "029f9e65cfe7e953df55b7af45e099924ffdbbac",
      "parents": [
        "7974468d32b817be1d49dfcf513605f646c481bc"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue May 16 10:31:41 2017 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue May 16 15:08:55 2017 +0100"
      },
      "message": "Remove LoadString/Class kind kBootImageLinkTimeAddress.\n\nWe no longer support non-PIC boot image compilation.\n\nAlso clean up some obsolete code for method patches\nand make JIT correctly report itself as non-PIC.\n\nTest: testrunner.py --host\nTest: testrunner.py --target\nBug: 33192586\nChange-Id: I593289c5c1b0e88b82b86a933038be97bbb15ad2\n"
    },
    {
      "commit": "bf2dd4baecee0e82608a83eca9738205446bcb03",
      "tree": "a321c0bfb58a3d8caa1e4f95b1860656ab2fad97",
      "parents": [
        "b9c3a99096c746b09af611e55e11b86600374011",
        "6d482aa01d2190e7f972553f359df7958d31af57"
      ],
      "author": {
        "name": "Treehugger Robot",
        "email": "treehugger-gerrit@google.com",
        "time": "Mon May 08 14:47:09 2017 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon May 08 14:47:11 2017 +0000"
      },
      "message": "Merge \"MIPS32: Implement branchless HCondition for longs\""
    },
    {
      "commit": "5633ce718b9544af1c7b1a811ed2872889019c84",
      "tree": "2ffc0f10ba7f2b9f19403187f3eaee37f17b811c",
      "parents": [
        "a57c334075b193de9690fff97acf6c1b1d1283fc"
      ],
      "author": {
        "name": "Chris Larsen",
        "email": "chris.larsen@imgtec.com",
        "time": "Mon Apr 10 15:47:40 2017 -0700"
      },
      "committer": {
        "name": "Chris Larsen",
        "email": "chris.larsen@imgtec.com",
        "time": "Sun Apr 30 08:29:49 2017 -0700"
      },
      "message": "MIPS: java.lang.Integer.valueOf intrinsic.\n\nTest: run-test --64 --optimizing 640-checker-integer-valueof\nTest: run-test --64 640-checker-integer-valueof\nTest: run-test --64 --no-prebuild --optimizing 640-checker-integer-valueof\nTest: run-test --64 --no-prebuild 640-checker-integer-valueof\nTest: run-test --optimizing 640-checker-integer-valueof\nTest: run-test 640-checker-integer-valueof\nTest: run-test --no-prebuild --optimizing 640-checker-integer-valueof\nTest: run-test --no-prebuild 640-checker-integer-valueof\nTest: mma test-art-host\nTest: mma test-art-target\n\nBooted on both MIPS32 and MIPS64 emulators.\n\nChange-Id: I5b2f21cf2334c392080cff9654150504207f4c01\n"
    },
    {
      "commit": "1595815c2a914a78df7dfb6f0082f47d4e82bb36",
      "tree": "8fd53c3c91158b33e744e43cc655b2e2a180a3fc",
      "parents": [
        "4ba18fdfc2581a2328ab745c2707e3ed375d9e64"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Thu Feb 09 19:08:30 2017 -0800"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Tue Mar 28 23:35:34 2017 -0700"
      },
      "message": "MIPS: Implement read barriers.\n\nThis is the core functionality. Further improvements\nwill be done separately.\n\nThis also adds/moves memory barriers where they belong and\nremoves the UnsafeGetLongVolatile and UnsafePutLongVolatile\nMIPS32 intrinsics as they need to load/store a pair of\nregisters atomically, which is not supported directly by\nthe CPU.\n\nTest: booted MIPS32R2 in QEMU\nTest: test-art-target-run-test\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: \"testrunner.py --target --optimizing -j1\"\nTest: same MIPS64 boot/test with ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\nTest: \"testrunner.py --target --optimizing --32 -j2\" on CI20\nTest: same CI20 test with ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\n\nChange-Id: I0ff91525fefba3ec1cc019f50316478a888acced\n"
    },
    {
      "commit": "68fdd5a22024f70a65159bcb8929296fc93b807d",
      "tree": "d0d5256fde2f91b61bde97d0632436cabb0b23db",
      "parents": [
        "02a4d7ff633e67d0a5113f0fc742116dcdc5b7f6",
        "c52f3034b06c03632e937aff07d46c2bdcadfef5"
      ],
      "author": {
        "name": "Richard Uhler",
        "email": "ruhler@google.com",
        "time": "Thu Mar 09 08:33:03 2017 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Thu Mar 09 08:33:04 2017 +0000"
      },
      "message": "Merge \"Remove --include-patch-information option from dex2oat.\""
    },
    {
      "commit": "c52f3034b06c03632e937aff07d46c2bdcadfef5",
      "tree": "031e4d1b2ca0961014e57e4987d80d7aa2c435b0",
      "parents": [
        "ef81e988d0eb4db390e576aac346701b2d820916"
      ],
      "author": {
        "name": "Richard Uhler",
        "email": "ruhler@google.com",
        "time": "Thu Mar 02 13:45:45 2017 +0000"
      },
      "committer": {
        "name": "Richard Uhler",
        "email": "ruhler@google.com",
        "time": "Wed Mar 08 10:55:17 2017 +0000"
      },
      "message": "Remove --include-patch-information option from dex2oat.\n\nBecause we no longer support running patchoat on npic oat files, which\nmeans the included patch information is unused .\n\nBug: 33192586\nTest: m test-art-host\n\nChange-Id: I9e100c4e47dc24d91cd74226c84025e961d30f67\n"
    },
    {
      "commit": "6d482aa01d2190e7f972553f359df7958d31af57",
      "tree": "f5db8123f0b4bb1444bd076f86fda47eafdd249a",
      "parents": [
        "2ec053fa337c1934ccb803136b56b57bcc06a32f"
      ],
      "author": {
        "name": "Tijana Jakovljevic",
        "email": "tijana.jakovljevic@imgtec.com",
        "time": "Fri Feb 03 13:24:08 2017 +0100"
      },
      "committer": {
        "name": "Tijana Jakovljevic",
        "email": "tijana.jakovljevic@imgtec.com",
        "time": "Wed Mar 08 11:09:22 2017 +0100"
      },
      "message": "MIPS32: Implement branchless HCondition for longs\n\nTest: booted MIPS32 in QEMU\nTest: mma test-art-target-run-test\nTest: mma test-art-target-gtest-codegen_test\n\nChange-Id: Ie4eac862fa5577905db9f3f0746c2f7dc58f7a2b\n"
    },
    {
      "commit": "5743386b4d161f3884275c66b0783bd3cc3a8050",
      "tree": "6794f8047586e7bc02702cc560bca51d1ab5bcc3",
      "parents": [
        "425b5d23e2c60d295471817a75b1b554481c5334"
      ],
      "author": {
        "name": "Tijana Jakovljevic",
        "email": "tijana.jakovljevic@imgtec.com",
        "time": "Tue Jan 17 16:59:03 2017 +0100"
      },
      "committer": {
        "name": "Tijana Jakovljevic",
        "email": "tijana.jakovljevic@imgtec.com",
        "time": "Fri Mar 03 09:36:43 2017 +0100"
      },
      "message": "MIPS64: Refactor implicit null checks in array/field get/set\n\nRationale: on MIPS64 64-bit loads and stores may be performed\nas pairs of 32-bit loads/stores. Implicit null checks must be\nassociated with the first 32-bit load/store in a pair and not\nthe last. This change ensures proper association of said checks\n(a few were done after the last 32-bit load/store in a pair)\nand lays ground for further improvements in array/field get/set.\n\nAdditionally ported to MIPS32.\n\nTest: mma test-art-target-run-test in QEMU\nTest: mma test-art-host-gtest\n\nChange-Id: If2612df62c21522959e69c637a36cc4ea962a32e\n"
    },
    {
      "commit": "627c1a0e573b4512e68f097771d7fdd4d8c7f7de",
      "tree": "5e9590d470e32e205f862d694cebd95da5cf0a97",
      "parents": [
        "318797a758f81e7f8a0b440129238b9b5eb1b74e"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Mon Jan 30 19:28:14 2017 -0800"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Wed Feb 01 15:29:43 2017 -0800"
      },
      "message": "MIPS: Support kJitTableAddress kinds of string/class loads.\n\nAlso remove a few stale comments.\n\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: \"make -j1 ART_TEST_DEFAULT_COMPILER\u003dfalse ART_TEST_OPTIMIZING\u003dfalse\n       ART_TEST_INTERPRETER\u003dfalse ART_TEST_JIT\u003dtrue\n       test-art-target-run-test\"\nTest: booted MIPS32R2 in QEMU\n\nChange-Id: I8914b8e6594e030f8137e7fface1ae20b6d6b971\n"
    },
    {
      "commit": "6b892cd757db7e163b54c8a0ef5ba777b1a4772c",
      "tree": "b0e65b596158ef9207983305517ae66ab5f87b67",
      "parents": [
        "e38436063fb4baf88152344b465eeeb1b7f6dce5"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Tue Jan 03 17:11:38 2017 -0800"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Mon Jan 30 09:05:44 2017 -0800"
      },
      "message": "MIPS32R6: Improve PC-relative string/class loads and invokes.\n\nUse PC-relative addressing on MIPS32R6 instead of\nHMipsDexCacheArraysBase and allow such PC-relative\naddressing in presence of irreducible loops.\n\nAlso save a couple of instructions when handling\nstring and class loads from bss.\n\nTest: test-art-host-gtest\nTest: booted MIPS32R2 in QEMU\nTest: \"make -j1 ART_TEST_DEFAULT_COMPILER\u003dfalse ART_TEST_OPTIMIZING\u003dtrue\n       ART_TEST_INTERPRETER\u003dfalse ART_TEST_JIT\u003dfalse\n       ART_TEST_PIC_TEST\u003dtrue test-art-target-run-test\"\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: \"make -j1 ART_TEST_DEFAULT_COMPILER\u003dfalse ART_TEST_OPTIMIZING\u003dtrue\n       ART_TEST_INTERPRETER\u003dfalse ART_TEST_JIT\u003dfalse\n       ART_TEST_PIC_TEST\u003dtrue test-art-target-run-test32\"\n\nChange-Id: I5d0fcbf271541294a3d4479987d52e2aaff084d9\n"
    },
    {
      "commit": "1998cd02603197f2acdc0734397a6d48b2f59b80",
      "tree": "aa639c7ec96f71d7aaf5d0c865a8a133dbc457c3",
      "parents": [
        "6bec91c7d4670905cd67440991ec76fd54d0f000"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Jan 13 13:02:58 2017 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Jan 16 13:39:24 2017 +0000"
      },
      "message": "Implement HLoadClass/kBssEntry for boot image.\n\nTest: m test-art-host\nTest: m test-art-host with CC\nTest: m test-art-target on Nexus 9\nTest: Nexus 9 boots.\nTest: Build aosp_mips64-eng\nBug: 30627598\nChange-Id: I168f24dedd5fb54a1e4215ecafb947ffb0dc3280\n"
    },
    {
      "commit": "6bec91c7d4670905cd67440991ec76fd54d0f000",
      "tree": "05f4ba288e629270773c65b34b71be7bae5e92ff",
      "parents": [
        "4155998a2f5c7a252a6611e3926943e931ea280a"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Jan 09 15:03:12 2017 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Jan 16 12:09:53 2017 +0000"
      },
      "message": "Store resolved types for AOT code in .bss.\n\nTest: m test-art-host\nTest: m test-art-target on Nexus 9.\nTest: Nexus 9 boots.\nTest: Build aosp_mips64-eng.\nBug: 30627598\nBug: 34193123\nChange-Id: I8ec60a98eb488cb46ae3ea56341f5709dad4f623\n"
    },
    {
      "commit": "e114da261e49083beaddb8b13328b2a16a0e537e",
      "tree": "26e65dba14b521ed417cf0a693d00078267e2a76",
      "parents": [
        "6a14c622700e088173ba909799c1e1785aeb4b34"
      ],
      "author": {
        "name": "Goran Jakovljevic",
        "email": "Goran.Jakovljevic@imgtec.com",
        "time": "Mon Dec 26 14:21:43 2016 +0100"
      },
      "committer": {
        "name": "Goran Jakovljevic",
        "email": "Goran.Jakovljevic@imgtec.com",
        "time": "Mon Dec 26 14:23:53 2016 +0100"
      },
      "message": "MIPS32: Don\u0027t always do a null test in MarkGCCard\n\nTest: mma test-art-target-run-test on CI20\n\nChange-Id: I38fac492bb76b06b9cffc9be16944fb22ed2db70\n"
    },
    {
      "commit": "c1a42cf3873be202c8c0ca3c4e67500b470ab075",
      "tree": "f2bffbd14e1f9d5429dd8514d19be4fa6dfa392f",
      "parents": [
        "06ce6d4359ed897f1d1b39be4e748f0c4f3ca2ff"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Sun Dec 18 15:52:36 2016 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Dec 20 13:29:45 2016 +0000"
      },
      "message": "Remove soon to be obsolete call kinds for direct calls.\n\nAnd remove CompilerDriver::GetCodeAndMethodForDirectCall in\npreparation of removing non-PIC prebuild and non-PIC on-device\nboot image compilation.\n\nTest: test-art-host test-art-target\nbug:33192586\nChange-Id: Ic48e3e8b9d7605dd0e66f31d458a182198ba9578\n"
    },
    {
      "commit": "b08265b2d61cd3923dd6fc01d6c82f73d5230e82",
      "tree": "cebb0dd2570ed90265dc376d89c17768700fd90d",
      "parents": [
        "b4ee681c21564ee9afe0202e1006cfa21019e88b",
        "1b8464d17c2266763714ae18be7c4dc26e28bf61"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Dec 07 17:15:08 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Dec 07 17:15:08 2016 +0000"
      },
      "message": "Merge \"MIPS32: Pass more arguments in registers.\""
    },
    {
      "commit": "1b8464d17c2266763714ae18be7c4dc26e28bf61",
      "tree": "19ab81b439fc216e289cb14be8a7618dbafb4f50",
      "parents": [
        "d7a7c7f3e93de9fa915e66d54dfc799efcc12ffb"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Sat Nov 12 17:22:05 2016 -0800"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Tue Dec 06 13:57:04 2016 -0800"
      },
      "message": "MIPS32: Pass more arguments in registers.\n\nSpecifically, use A0-A3,T0-T1 for non-floats and F8-F19 for floats.\n\nTest: booted MIPS32R2 in QEMU\nTest: test-art-target-run-test-optimizing (MIPS32R2) on CI20\nTest: test-art-target-gtest (MIPS32R2) on CI20\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-run-test-optimizing (MIPS32R6) in QEMU\nTest: test-art-target-gtest (MIPS32R6) in QEMU\nTest: test-art-host-gtest\n\nChange-Id: Ib8b0310a109d9f3d70119c1e605e54b013e60728\n"
    },
    {
      "commit": "8a0128a5ca0784f6d2b4ca27907e8967a74bc4c5",
      "tree": "0dec75200282ae5e49785395e97bd4e6459f1c09",
      "parents": [
        "60438b46090d22bb9b978196f5aa53fab3b89759"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Nov 28 07:38:35 2016 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Tue Nov 29 11:11:46 2016 -0800"
      },
      "message": "ART: Add dex::StringIndex\n\nAdd abstraction for uint32_t string index.\n\nTest: m test-art-host\nChange-Id: I917c2881702fe3df112c713f06980f2278ced7ed\n"
    },
    {
      "commit": "a5b09a67034e57a6e10231dd4bd92f4cb50b824c",
      "tree": "304be738f4fa528b7ad2676103eecc84c79eaeeb",
      "parents": [
        "dac7ad17c78387d15d7aefae0f852dddf5f37e34"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Thu Nov 17 15:21:22 2016 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Nov 21 10:57:00 2016 -0800"
      },
      "message": "ART: Add dex::TypeIndex\n\nAdd abstraction for uint16_t type index.\n\nTest: m test-art-host\nChange-Id: I47708741c7c579cbbe59ab723c1e31c5fe71f83a\n"
    },
    {
      "commit": "674b9ee50c812d684a27a28cf09098195f068f3d",
      "tree": "9b109adff71b48aa531628bf07644bccfc580fa3",
      "parents": [
        "c6c5f6ce1c9cc44f859bbbc447478e4934be0fee"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Tue Sep 20 14:54:15 2016 -0700"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Thu Oct 20 15:03:43 2016 -0700"
      },
      "message": "MIPS32: Implement HSelect\n\nTest: booted MIPS32R2 in QEMU\nTest: test-art-target-run-test-optimizing (MIPS32R2) on CI20\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-run-test-optimizing (MIPS32R6) in QEMU\nTest: test-art-host-gtest\n\nChange-Id: I8a8127d8d29cb5df84ed6f4fd4478f8d889e5cb7\n"
    },
    {
      "commit": "58a4c6198a71973ea589edebe0b3f17c72d55e29",
      "tree": "f8ae9138190383bfd73cba141e751f67ce2391d5",
      "parents": [
        "d203296000f18dd582702eebe6a6e9c5b0182397"
      ],
      "author": {
        "name": "Mathieu Chartier",
        "email": "mathieuc@google.com",
        "time": "Tue Oct 18 13:24:05 2016 -0700"
      },
      "committer": {
        "name": "Mathieu Chartier",
        "email": "mathieuc@google.com",
        "time": "Tue Oct 18 13:39:52 2016 -0700"
      },
      "message": "Delete unused blocked_register_pairs_ in code generators\n\nLegacy code for compatibility with quick?\n\nTest: test-art-host CC\nChange-Id: I9de261daea67dfd9bd3df89826ba9d10f135e29e\n"
    },
    {
      "commit": "aad75c6d5bfab2dc8e30fc99fafe8cd2dc8b74d8",
      "tree": "c1b9e1eabcf35c5cbb5b4f46313a4e062f2d5d51",
      "parents": [
        "82d4838d6bb3480cd25327cedc5179fb2d86881c"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Oct 03 08:46:48 2016 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Oct 04 17:51:46 2016 +0100"
      },
      "message": "Revert \"Revert \"Store resolved Strings for AOT code in .bss.\"\"\n\nFixed oat_test to keep dex files alive. Fixed mips build.\nRewritten the .bss GC root visiting and added write barrier\nto the artResolveStringFromCode().\n\nTest: build aosp_mips-eng\nTest: m ART_DEFAULT_GC_TYPE\u003dSS test-art-target-host-gtest-oat_test\nTest: Run ART test suite on host and Nexus 9.\nBug: 20323084\nBug: 30627598\n\nThis reverts commit 5f926055cb88089d8ca27243f35a9dfd89d981f0.\n\nChange-Id: I07fa2278d82b8eb64964c9a4b66cb93726ccda6b\n"
    },
    {
      "commit": "5f926055cb88089d8ca27243f35a9dfd89d981f0",
      "tree": "8d87d400e36301eb648e19bcd225f13c469648ad",
      "parents": [
        "9e5739aaa690a8529c104f4c05035a657616c310"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Sep 30 17:04:49 2016 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Sep 30 18:08:09 2016 +0100"
      },
      "message": "Revert \"Store resolved Strings for AOT code in .bss.\"\n\nThere are some issues with oat_test64 on host and aosp_mips-eng.\n\nAlso reverts \"compiler_driver: Fix build.\"\n\nBug: 20323084\nBug: 30627598\n\nThis reverts commit 63dccbbefef3014c99c22748d18befcc7bcb3b41.\nThis reverts commit 04a44135ace10123f059373691594ae0f270a8a4.\n\nChange-Id: I568ba3e58cf103987fdd63c8a21521010a9f27c4\n"
    },
    {
      "commit": "63dccbbefef3014c99c22748d18befcc7bcb3b41",
      "tree": "60a498041bebff43bc1f43d438e3bc34a30887f7",
      "parents": [
        "6bee25976782a063d6b44f7718a6302761bf6403"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Sep 21 13:51:10 2016 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Sep 29 15:58:43 2016 +0100"
      },
      "message": "Store resolved Strings for AOT code in .bss.\n\nAnd do some related refactorings.\n\nBug: 20323084\nBug: 30627598\nTest: Run ART test suite including gcstress on host and Nexus 9.\nTest: Run ART test suite including gcstress with baker CC on host and Nexus 9.\nTest: Build aosp_mips64-eng.\nChange-Id: I1b12c1570fee8e5da490b47f231050142afcbd1e\n"
    },
    {
      "commit": "5e4e11e171f90d9a3ea178fc8e72aac909de55d5",
      "tree": "53314d1139ac797d55258f39097ecfb5cef45920",
      "parents": [
        "ca8bad9136d1389deeebc8652fb17063388de6b2"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Sep 22 13:17:41 2016 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Sep 23 09:08:00 2016 +0100"
      },
      "message": "Clean-up sharpening and compiler driver.\n\nRemove dependency on compiler driver for sharpening\nand dex2dex (the methods called on the compiler driver were\ndoing unnecessary work), and remove the now unused methods\nin compiler driver.\n\nAlso remove test that is now invalid, as sharpening always\nsucceeds.\n\ntest: m test-art-host m test-art-target\nChange-Id: I54e91c6839bd5b0b86182f2f43ba5d2c112ef908\n"
    },
    {
      "commit": "f58b24831f7203e248798dce4c62bf61c51ba15d",
      "tree": "ab7c886781ba6328b350513352b763cd433627a3",
      "parents": [
        "7d26164308e9eab5c596a19b841e4ab1c27828a8"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Fri Sep 02 22:14:06 2016 -0700"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Thu Sep 15 19:11:14 2016 -0700"
      },
      "message": "MIPS32: Improve storing of constants in fields and array elements\n\nTest: booted MIPS32 in QEMU\nTest: test-art-target-run-test-optimizing on CI20\nTest: test-art-host-gtest\n\nChange-Id: Ifcf8c1e215e3768711c391e8da6f663bba71f8d9\n"
    },
    {
      "commit": "f41f956558ceb5402d3b4499a44a15c42f1c0064",
      "tree": "50afd6f7509adca0c8ed8cbdc04398058b687b81",
      "parents": [
        "8850c73572215669efc893763791f7ec7f0b0667"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Sep 14 19:26:48 2016 +0100"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Sep 14 19:26:48 2016 +0100"
      },
      "message": "Add missing OVERRIDE qualifiers in code generators.\n\nTest: mmma art\nChange-Id: I91d0a2dc23dc8d63a9bb3607eb1c1517eabaeb1f\n"
    },
    {
      "commit": "96b6682d2d65f94c262590ef88bafdc70171ab8c",
      "tree": "ebb8a72edbaff6a6c62a6ce8bfb177a57389abaf",
      "parents": [
        "9ef68a3ad02eb7e2242a6d7f6a208c7a9b8ac407"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Sat Sep 10 02:32:44 2016 -0700"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Wed Sep 14 00:44:11 2016 -0700"
      },
      "message": "MIPS32: Implement table-based packed switch\n\nTest: booted MIPS32R2 in QEMU\nTest: test-art-target-run-test-optimizing (MIPS32R2) on CI20\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-run-test-optimizing (MIPS32R6) in QEMU\nTest: test-art-host-gtest\n\nChange-Id: I2e1a65ff1ba9406b84351ba7998f853b1ce4aef9\n"
    },
    {
      "commit": "2ddb7176ff352203a4e4d04c152d977813dee76c",
      "tree": "cdafcb9c4ab6fe6ce974156fef3ab54e04a36085",
      "parents": [
        "3bac5443975cd6312e7c6282b94014db25f369d7"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Tue Sep 06 17:04:55 2016 -0700"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Fri Sep 09 02:29:35 2016 -0700"
      },
      "message": "MIPS32: Implement branchless HCondition for floats\n\nTest: booted MIPS32R2 in QEMU\nTest: test-art-target-run-test-optimizing (MIPS32R2) on CI20\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-run-test-optimizing (MIPS32R6) in QEMU\n\nChange-Id: Iec2f301c33bf9b9a2e16759633f8489a3e0bc46b\n"
    },
    {
      "commit": "9d185da3bef8caf015d3dbf4ad79c520af7ce3b1",
      "tree": "201297d954dce1a78b8deec5e88760888359419f",
      "parents": [
        "9c66d9487f398399ee2a0ad09b75394b55cbbde4",
        "58320ce35715f2814700707a9d35ad5055fff9ce"
      ],
      "author": {
        "name": "Treehugger Robot",
        "email": "treehugger-gerrit@google.com",
        "time": "Tue Sep 06 09:07:05 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Tue Sep 06 09:07:05 2016 +0000"
      },
      "message": "Merge \"MIPS32: Ensure preservation of RA in leaf methods if it\u0027s clobbered\""
    },
    {
      "commit": "58320ce35715f2814700707a9d35ad5055fff9ce",
      "tree": "f691e4d824213ecadb0bf4f858ad63b5a2584467",
      "parents": [
        "370e6e412bb8361fec0f0788c396621bccfb6e2a"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Tue Aug 30 21:40:46 2016 -0700"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Thu Sep 01 16:36:54 2016 -0700"
      },
      "message": "MIPS32: Ensure preservation of RA in leaf methods if it\u0027s clobbered\n\nTest: booted MIPS32 in QEMU\nTest: test-art-host-gtest\nTest: test-art-target-gtest-codegen_test in QEMU\nTest: test-art-target-run-test-optimizing on CI20\n\nChange-Id: Ia3da5902d967cd7af313f03ebf414320b0063619\n"
    },
    {
      "commit": "fca16663334e5838790631d8eac95f4ffdb0cc2e",
      "tree": "2a1f018b428ef0f4097004af92ab44c82e987d12",
      "parents": [
        "ba45db072c48783e19a2a73ab4e45ae143c1c7c9"
      ],
      "author": {
        "name": "Serban Constantinescu",
        "email": "serban.constantinescu@linaro.org",
        "time": "Thu Jul 14 09:21:59 2016 +0100"
      },
      "committer": {
        "name": "Serban Constantinescu",
        "email": "serban.constantinescu@linaro.org",
        "time": "Wed Aug 31 17:22:54 2016 +0100"
      },
      "message": "Extend the InvokeRuntime() changes to mips.\n\nAlso fix the side effects for \u003cStatic/Instance\u003eField\u003cGet/Set\u003e.\n\nTest: test-art-target\n\nChange-Id: Ia4284ccd9d0c88210eaa4458f74728c805e2e076\n"
    },
    {
      "commit": "2923db7314da613d50c9e6e44f38bb8d3e1c49f0",
      "tree": "063590a45f9f384872b8fa14f9f0bd2f014f0d66",
      "parents": [
        "897b8f5da90b38b030826273f4c9bd8fbc32759e"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Sat Aug 20 01:55:47 2016 -0700"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Wed Aug 24 17:27:35 2016 -0700"
      },
      "message": "MIPS32: Refactor implicit null checks in array/field get/set.\n\nRationale: on MIPS32 64-bit loads and stores may be performed\nas pairs of 32-bit loads/stores. Implicit null checks must be\nassociated with the first 32-bit load/store in a pair and not\nthe last. This change ensures proper association of said checks\n(a few were done after the last 32-bit load/store in a pair)\nand lays ground for further improvements in array/field get/set.\n\nTest: booted MIPS32 in QEMU\nTest: test-art-host-gtest\nTest: test-art-target-run-test-optimizing in QEMU\n\nChange-Id: I3674947c00bb17930790a7a47c9b7aadc0c030b8\n"
    },
    {
      "commit": "f9136b631a42531353544791fb79cc9e4c0b321b",
      "tree": "c60d6ae2746d218b3c22e1cfc61fbf5e978dfd7c",
      "parents": [
        "f59f59769046932e121864386676205a9ca631e1",
        "06a46c44bf1a5cba6c78c3faffc4e7ec1442b210"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Jul 28 12:43:29 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Thu Jul 28 12:43:29 2016 +0000"
      },
      "message": "Merge \"MIPS32: Improve string and class loads\""
    },
    {
      "commit": "06a46c44bf1a5cba6c78c3faffc4e7ec1442b210",
      "tree": "fa82ec7a787200e475e567a51c2839349a513021",
      "parents": [
        "9755c262df1be7f5d5b98d038c8fd3734e974f9d"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Tue Jul 19 15:00:40 2016 -0700"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Wed Jul 27 20:02:48 2016 -0700"
      },
      "message": "MIPS32: Improve string and class loads\n\nTested:\n- MIPS32 Android boots in QEMU\n- test-art-host-gtest\n- test-art-target-run-test-optimizing in QEMU, on CI20\n- test-art-target-gtest on CI20\n\nChange-Id: I70fd5d5267f8594c3b29d5a4ccf66b8ca8b09df3\n"
    },
    {
      "commit": "26de38bb7f2122417388809f4ff88a7cb5c4af5e",
      "tree": "878f432e2476f90201dd4695cfc8c3498c2c207f",
      "parents": [
        "9755c262df1be7f5d5b98d038c8fd3734e974f9d"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Wed Jul 27 17:53:11 2016 -0700"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Wed Jul 27 17:56:08 2016 -0700"
      },
      "message": "ART: Delete old compiler_enums.h\n\nHoldover from the Quick days. Move the two enums that are still\nused closer to the actual users (and prune no longer used cases).\n\nTest: m test-art-host\nChange-Id: I88aa49961a54635788cafac570ddc3125aa38262\n"
    },
    {
      "commit": "e3fb245fbdb5e91cf8a9750504df40bd629e0080",
      "tree": "a3882db92b7942b2edd6add3090b5c875fef2d09",
      "parents": [
        "1fdb340de4e608a88e8683c857cad5d0da2c16de"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Tue May 10 16:08:05 2016 -0700"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Fri Jul 01 14:10:14 2016 -0700"
      },
      "message": "MIPS32: Improve method invocation\n\nImprovements include:\n- CodeGeneratorMIPS::GenerateStaticOrDirectCall() supports:\n  - MethodLoadKind::kDirectAddressWithFixup (via literals)\n  - CodePtrLocation::kCallDirectWithFixup (via literals)\n  - MethodLoadKind::kDexCachePcRelative\n- 32-bit literals to support the above (not ready for general-\n  purpose applications yet because RA is not saved in leaf\n  methods, but is clobbered on MIPS32R2 when simulating\n  PC-relative addressing (MIPS32R6 is OK because it has\n  PC-relative addressing with the lwpc instruction))\n- shorter instruction sequences for recursive static/direct\n  calls\n\nTested:\n- test-art-host-gtest\n- test-art-target-gtest and test-art-target-run-test-optimizing on:\n  - MIPS32R2 QEMU\n  - CI20 board\n  - MIPS32R6 (2nd arch) QEMU\n\nChange-Id: Id5b137ad32d5590487fd154c9a01d3b3e7e044ff\n"
    },
    {
      "commit": "dbb7f5bef10138ade0fb202da1d61f562b2df649",
      "tree": "f0aa4b390c534b215a6e000c865783cdd9852353",
      "parents": [
        "b94b5706f0b8e2e1c7e1db22274f9f4bae0c4b5a"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Mar 30 13:23:58 2016 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Jun 21 15:11:57 2016 +0100"
      },
      "message": "Improve HLoadClass code generation.\n\nFor classes in the boot image, use either direct pointers\nor PC-relative addresses. For other classes, use PC-relative\naccess to the dex cache arrays for AOT and direct address of\nthe type\u0027s dex cache slot for JIT.\n\nFor aosp_flounder-userdebug:\n  - 32-bit boot.oat: -252KiB (-0.3%)\n  - 64-bit boot.oat: -412KiB (-0.4%)\n  - 32-bit dalvik cache total: -392KiB (-0.4%)\n  - 64-bit dalvik-cache total: -2312KiB (-1.0%)\n    (contains more files than the 32-bit dalvik cache)\nFor aosp_flounder-userdebug forced to compile PIC:\n  - 32-bit boot.oat: -124KiB (-0.2%)\n  - 64-bit boot.oat: -420KiB (-0.5%)\n  - 32-bit dalvik cache total: -136KiB (-0.1%)\n  - 64-bit dalvik-cache total: -1136KiB (-0.5%)\n    (contains more files than the 32-bit dalvik cache)\n\nBug: 27950288\nChange-Id: I4da991a4b7e53c63c92558b97923d18092acf139\n"
    },
    {
      "commit": "97b1e6633be800827145c4ffeded1c834082730f",
      "tree": "051f4647f1617cea3bf91662c760e66e04b4ee9e",
      "parents": [
        "f1c25cf31d29c70b5102b249344bea76c374ecd8",
        "73296a7c547e97ec4ea4a7e7622ed0cf49870462"
      ],
      "author": {
        "name": "Treehugger Robot",
        "email": "treehugger-gerrit@google.com",
        "time": "Tue Jun 07 10:00:00 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Tue Jun 07 10:00:00 2016 +0000"
      },
      "message": "Merge \"MIPS32: Improve method entry/exit code\""
    },
    {
      "commit": "73296a7c547e97ec4ea4a7e7622ed0cf49870462",
      "tree": "6b5e588aa7e611d1c41b8cb65c2bc61532aff631",
      "parents": [
        "d27fd40d5353141660c033156492efd639c4d048"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Fri Jun 03 22:51:46 2016 -0700"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Sat Jun 04 02:31:23 2016 -0700"
      },
      "message": "MIPS32: Improve method entry/exit code\n\nImprovements:\n- the stack frame is (de)allocated in one step instead of two\n- callee-saved FPU registers are 8-byte aligned within the frame,\n  allowing a single ldc1/sdc1 instruction to load/store an FPU\n  register without causing exceptions due to misaligned accesses\n- the return address register, RA, is restored early for better\n  instruction scheduling\n\nChange-Id: I556b139c62839490a9fdbce8c5e6e3e2d1cc7bb7\n"
    },
    {
      "commit": "c01a66465a398ad15da90ab2bdc35b7f4a609b17",
      "tree": "e85cb2aa05be5c1491814fa83b94748439b8394b",
      "parents": [
        "dad35b0762f97ce79ce3b9a35c9df5021b7dbd17"
      ],
      "author": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@linaro.org",
        "time": "Fri Apr 15 11:54:06 2016 +0100"
      },
      "committer": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@linaro.org",
        "time": "Fri Apr 15 11:54:06 2016 +0100"
      },
      "message": "Fix: correctly destruct VIXL labels.\n\nBug: 27505766\nChange-Id: I077465e3d308f4331e7a861902e05865f9d99835"
    },
    {
      "commit": "dee58d6bb6d567fcd0c4f39d8d690c3acaf0e432",
      "tree": "5a2f20546ca3c1544c44bee560062580e22dc79c",
      "parents": [
        "391e155a6936a05bd39b171031ec21d2dee62133"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Apr 07 09:54:26 2016 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Apr 07 16:03:16 2016 +0000"
      },
      "message": "Revert \"Revert \"Refactor HGraphBuilder and SsaBuilder to remove HLocals\"\"\n\nThis patch merges the instruction-building phases from HGraphBuilder\nand SsaBuilder into a single HInstructionBuilder class. As a result,\nit is not necessary to generate HLocal, HLoadLocal and HStoreLocal\ninstructions any more, as the builder produces SSA form directly.\n\nSaves 5-15% of arena-allocated memory (see bug for more data):\n  GMS      20.46MB  \u003d\u003e  19.26MB  (-5.86%)\n  Maps     24.12MB  \u003d\u003e  21.47MB  (-10.98%)\n  YouTube  28.60MB  \u003d\u003e  26.01MB  (-9.05%)\n\nThis CL fixed an issue with parsing quickened instructions.\n\nBug: 27894376\nBug: 27998571\nBug: 27995065\n\nChange-Id: I20dbe1bf2d0fe296377478db98cb86cba695e694\n"
    },
    {
      "commit": "60328910cad396589474f8513391ba733d19390b",
      "tree": "01702f6df5c39925b354a3152dd04289e7d97062",
      "parents": [
        "e3ff7b293be2a6791fe9d135d660c0cffe4bd73f"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Apr 04 17:47:42 2016 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Apr 04 17:47:42 2016 +0000"
      },
      "message": "Revert \"Refactor HGraphBuilder and SsaBuilder to remove HLocals\"\n\nBug: 27995065\nThis reverts commit e3ff7b293be2a6791fe9d135d660c0cffe4bd73f.\n\nChange-Id: I5363c7ce18f47fd422c15eed5423a345a57249d8\n"
    },
    {
      "commit": "e3ff7b293be2a6791fe9d135d660c0cffe4bd73f",
      "tree": "d578d27cb78e6d2caef683cd8ac94c9a9752b192",
      "parents": [
        "86ea7eeabe30c98bbe1651a51d03cb89776724e7"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Wed Mar 02 16:48:20 2016 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Apr 04 11:21:30 2016 +0100"
      },
      "message": "Refactor HGraphBuilder and SsaBuilder to remove HLocals\n\nThis patch merges the instruction-building phases from HGraphBuilder\nand SsaBuilder into a single HInstructionBuilder class. As a result,\nit is not necessary to generate HLocal, HLoadLocal and HStoreLocal\ninstructions any more, as the builder produces SSA form directly.\n\nSaves 5-15% of arena-allocated memory (see bug for more data):\n  GMS      20.46MB  \u003d\u003e  19.26MB  (-5.86%)\n  Maps     24.12MB  \u003d\u003e  21.47MB  (-10.98%)\n  YouTube  28.60MB  \u003d\u003e  26.01MB  (-9.05%)\n\nBug: 27894376\nChange-Id: Iefe28d40600c169c5d306fd2c77034ae19476d90\n"
    },
    {
      "commit": "cac5a7e871f1f346b317894359ad06fa7bd67fba",
      "tree": "2df7d4892216a7c976dfe848c9893cb5eb8fa6a5",
      "parents": [
        "6f51d7756a9c66007fe7666b19399e1f60ff6092"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Feb 22 10:39:50 2016 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Mar 29 19:27:40 2016 +0100"
      },
      "message": "Optimizing: Improve const-string code generation.\n\nFor strings in the boot image, use either direct pointers\nor pc-relative addresses. For other strings, use PC-relative\naccess to the dex cache arrays for AOT and direct address of\nthe string\u0027s dex cache slot for JIT.\n\nFor aosp_flounder-userdebug:\n  - 32-bit boot.oat: -692KiB (-0.9%)\n  - 64-bit boot.oat: -948KiB (-1.1%)\n  - 32-bit dalvik cache total: -900KiB (-0.9%)\n  - 64-bit dalvik cache total: -3672KiB (-1.5%)\n    (contains more files than the 32-bit dalvik cache)\nFor aosp_flounder-userdebug forced to compile PIC:\n  - 32-bit boot.oat: -380KiB (-0.5%)\n  - 64-bit boot.oat: -928KiB (-1.0%)\n  - 32-bit dalvik cache total: -468KiB (-0.4%)\n  - 64-bit dalvik cache total: -1928KiB (-0.8%)\n    (contains more files than the 32-bit dalvik cache)\n\nBug: 26884697\nChange-Id: Iec7266ce67e6fedc107be78fab2e742a8dab2696\n"
    },
    {
      "commit": "2ae48182573da7087bffc2873730bc758ec29696",
      "tree": "d6955329ad876aefd477f7ef8905b070b9ab95dd",
      "parents": [
        "6915898b28cea6c9836ca1be6814d87e89cc6d76"
      ],
      "author": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Wed Mar 16 14:05:09 2016 +0000"
      },
      "committer": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Wed Mar 16 14:10:27 2016 +0000"
      },
      "message": "Clean up NullCheck generation and record stats about it.\n\nThis removes redundant code from the generators and allows for easier\nstat recording.\n\nChange-Id: Iccd4368f9e9d87a6fecb863dee4e2145c97851c4\n"
    },
    {
      "commit": "9cd6d378bd573cdc14d049d32bdd22a97fa4d84a",
      "tree": "be293c89806b919143b7dcd203bae14f5f4eaf04",
      "parents": [
        "0e02ee9efbf1dbdde05d2b10f7307bbe191c52f5"
      ],
      "author": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Tue Feb 09 15:24:47 2016 +0000"
      },
      "committer": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Wed Feb 24 10:25:29 2016 +0000"
      },
      "message": "Associate slow paths with the instruction that they belong to.\n\nAlmost all slow paths already know the instruction they belong to,\nthis CL just moves the knowledge to the base class as well.\n\nThis is needed to be be able to get the corresponding dex pc for\nslow path, which allows us generate better native line numbers,\nwhich in turn fixes some native debugging stepping issues.\n\nChange-Id: I568dbe78a7cea6a43a4a71a014b3ad135782c270\n"
    },
    {
      "commit": "0e02ee9efbf1dbdde05d2b10f7307bbe191c52f5",
      "tree": "19c9c3e25a8db4e5b53890fd72193383b5bb73e5",
      "parents": [
        "72ca09cc2dd350adb932ef4a50eff668cca99c5e",
        "c7098ff991bb4e00a800d315d1c36f52a9cb0149"
      ],
      "author": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Wed Feb 24 10:23:50 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Feb 24 10:23:50 2016 +0000"
      },
      "message": "Merge \"Remove HNativeDebugInfo from start of basic blocks.\""
    },
    {
      "commit": "c7098ff991bb4e00a800d315d1c36f52a9cb0149",
      "tree": "3a150e927bc7f4894f5b148ec6f5a2b796cdd80d",
      "parents": [
        "5322e55ab9a15996a197456ca39d9c77488cd5c1"
      ],
      "author": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Tue Feb 09 14:30:11 2016 +0000"
      },
      "committer": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Wed Feb 24 10:21:57 2016 +0000"
      },
      "message": "Remove HNativeDebugInfo from start of basic blocks.\n\nWe do not require full environment at the start of basic block.\nThe dex pc contained in basic block is sufficient for line mapping.\n\nChange-Id: I5ba9e5f5acbc4a783ad544769f9a73bb33e2bafa\n"
    },
    {
      "commit": "936d5dc60fa3f4dadf3654db04d2b361dc0b745c",
      "tree": "660fcf62dab8f09de9c19568783ac6e2a0ac00f8",
      "parents": [
        "39e4fab868a6052e0fab75e2668600b0e26daa42",
        "3acee732f9475fbfc6b046e0044b764e7ff5ac01"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Feb 17 14:47:03 2016 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Feb 17 14:47:03 2016 +0000"
      },
      "message": "Merge \"MIPS32: peek*/poke*, and String.charAt intrinsics.\""
    },
    {
      "commit": "6e332529c33be4d7dae5dad3609a839f4c0d3bfc",
      "tree": "cedd2e1beb170fd5821136fe974e3f34adfcddc2",
      "parents": [
        "d3caabd4f85f86dd744da432993e12935d843a83"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Tue Feb 02 16:15:27 2016 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Fri Feb 12 15:17:50 2016 +0000"
      },
      "message": "ART: Remove HTemporary\n\nChange-Id: I21b984224370a9ce7a4a13a9652503cfb03c5f03\n"
    },
    {
      "commit": "3acee732f9475fbfc6b046e0044b764e7ff5ac01",
      "tree": "3b87f8b93c427c05e7690ea8d14577ce3e9eb502",
      "parents": [
        "34937e2ed46fa9f56d99e9f32e0bfad050e5e798"
      ],
      "author": {
        "name": "Chris Larsen",
        "email": "chris.larsen@imgtec.com",
        "time": "Wed Nov 18 13:31:08 2015 -0800"
      },
      "committer": {
        "name": "Chris Larsen",
        "email": "chris.larsen@imgtec.com",
        "time": "Wed Feb 10 16:12:56 2016 -0800"
      },
      "message": "MIPS32: peek*/poke*, and String.charAt intrinsics.\n\n- byte libcore.io.Memory.peekByte(long address)\n- short libcore.io.Memory.peekShort(long address)\n- int libcore.io.Memory.peekInt(long address)\n- long libcore.io.Memory.peekLong(long address)\n- void libcore.io.Memory.pokeByte(long address, byte value)\n- void libcore.io.Memory.pokeShort(long address, short value)\n- void libcore.io.Memory.pokeInt(long address, int value)\n- void libcore.io.Memory.pokeLong(long address, long value)\n- char java.lang.String.charAt(int index)\n\nChange-Id: I5ff30b61d87313d00f0fd3f0ee09f1c454f9c9fa\n"
    },
    {
      "commit": "58282f4510961317b8d5a364a6f740a78926716f",
      "tree": "5d97c0db9fe01dd6e8df2357ef11f614abb853e8",
      "parents": [
        "b8bb9f6d0b59be125066f604f134155f8998f5ae"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Jan 14 12:45:10 2016 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Jan 18 16:39:30 2016 +0000"
      },
      "message": "ART: Remove Baseline compiler\n\nWe don\u0027t need Baseline any more and it hasn\u0027t been maintained for\na while anyway. Let\u0027s remove it.\n\nChange-Id: I442ed26855527be2df3c79935403a25b1ee55df6\n"
    },
    {
      "commit": "42249c3602c3d0243396ee3627ffb5906aa77c1e",
      "tree": "1e822a21c87331246cbde3923eac88fa315fa2cc",
      "parents": [
        "922698ded1e80cad1ecce4c2172a88c76a216373"
      ],
      "author": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Thu Jan 07 15:33:50 2016 -0800"
      },
      "committer": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Tue Jan 12 16:39:20 2016 -0800"
      },
      "message": "Reduce code size by sharing slow paths.\n\nRationale:\nSharing identical slow path code reduces code size.\n\nBackground:\nCurrently, slow paths with the same dex-pc, same physical register\nspilling code, and identical stack maps are shared (making this\nonly useful for deopt slow paths). The newly introduced mechanism\nis sufficiently general to allow future improvements by e.g.\nallowing different dex-pc (by passing this to runtime) or even\nthe kind of slow paths (by passing runtime addresses to the slowpath).\n\nChange-Id: I819615c47b4fd98440a241f681f93e4fc22d12e0\n"
    },
    {
      "commit": "5f7b58ea1adfc0639dd605b65f59198d3763f801",
      "tree": "04556e673cdd3967cc967ff79931eab49e523956",
      "parents": [
        "1201804d1813d7db0accead9721d67c40b3de564"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Nov 23 19:49:34 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Dec 23 09:59:07 2015 +0000"
      },
      "message": "Rewrite HInstruction::Is/As\u003ctype\u003e().\n\nMake Is\u003ctype\u003e() and As\u003ctype\u003e() non-virtual for concrete\ninstruction types, relying on GetKind(), and mark GetKind()\nas PURE to improve optimization opportunities. This reduces\nthe number of relocations in libart-compiler.so\u0027s .rel.dyn\nsection by ~4K, or ~44%, and in .data.rel.ro by ~18K, or\n~65%. The file is 96KiB smaller for Nexus 5, including 8KiB\nreduction of the .text section.\n\nUnfortunately, the g++/clang++ __attribute__((pure)) is not\nstrong enough to avoid duplicated virtual calls and we would\nneed the C++ [[pure]] attribute proposed in n3744 instead.\nTo work around this deficiency, we introduce an extra\nnon-virtual indirection for GetKind(), so that the compiler\ncan optimize common expressions such as\n    instruction-\u003eIsAdd() || instruction-\u003eIsSub()\nor\n    instruction-\u003eIsAdd() \u0026\u0026 instruction-\u003eAsAdd()-\u003e...\nwhich contain two virtual calls to GetKind() after inlining.\n\nChange-Id: I83787de0671a5cb9f5b0a5f4a536cef239d5b401\n"
    },
    {
      "commit": "cd7b0ee296b0462961c63e51d99c9c323e2690df",
      "tree": "57a9071635389e58a8912d98b99d7e114c1efcc6",
      "parents": [
        "0bbc1727c446ee5f4cc3c28e68127164ef379594"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Thu Dec 03 16:46:38 2015 -0800"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Tue Dec 15 14:29:48 2015 -0800"
      },
      "message": "MIPS32: Fuse long and FP compare \u0026 condition in Optimizing.\n\nThis also does a minor clean-up in the assembler and\nits test.\n\nBug: 25559148\nChange-Id: I9bad3c500b592a09013b56745f70752eb284a842\n"
    },
    {
      "commit": "7e99e054d023af878d6632bc8c8ba07357ded294",
      "tree": "2c2615326f71612631c3488e0eea7e5e5636fc91",
      "parents": [
        "883ef45b5d5a2e4005914c7b339881900976b6e7"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Tue Nov 24 19:28:01 2015 -0800"
      },
      "committer": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Tue Nov 24 19:28:01 2015 -0800"
      },
      "message": "MIPS32: Improve integer division by constants\n\nChange-Id: I2d1e84e84bdf8d3007cde7c51611ec893a0e9527\n"
    },
    {
      "commit": "0debae7bc89eb05f7a2bf7dccd223318fad7c88d",
      "tree": "3da9656dc77d271b12c1b02793e7d713ae3da790",
      "parents": [
        "991842a5273d20695dd5f35eb9a9e28c386c5b4b"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Nov 12 18:37:00 2015 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Tue Nov 17 15:12:00 2015 +0000"
      },
      "message": "ART: Refactor GenerateTestAndBranch\n\nEach code generator implements a method for generating condition\nevaluation and branching to arbitrary labels. This patch refactors\nit for better clarity but also to generate fewer jumps when the true\nbranch is the fallthrough successor.\n\nThis is preliminary work for implementing HSelect.\n\nChange-Id: Iaa545a5ecbacb761c5aa241fa69140cf6eb5952f\n"
    },
    {
      "commit": "dc151b2346bb8a4fdeed0c06e54c2fca21d59b5d",
      "tree": "391d8ccb44ff9e6fc1c8fa8975e534e20cc002ff",
      "parents": [
        "823e693aa946ba75cd047429e1290011a2ed8729"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Oct 15 18:02:30 2015 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Oct 23 14:45:32 2015 +0100"
      },
      "message": "Optimizing: Determine invoke-static/-direct dispatch early.\n\nDetermine the dispatch type of invoke-static/-direct in a\nspecial pass right after the type inference. This allows the\ninliner to pass the \"needs dex cache\" check and inline more.\nIt also allows the code generator to avoid requesting a\nregister location for the ArtMethod* for kDexCachePcRelative\nand direct methods.\n\nThe supported dispatch check handles also situations that\nthe CompilerDriver currently doesn\u0027t allow. The cleanup of\nthe CompilerDriver and required changes to Quick will come\nin a separate change.\n\nChange-Id: I3f8e903a119949e95871d8ab0a995f4731a13a07\n"
    },
    {
      "commit": "f652cecb984c104d44a0223c3c98400ef8ed8ce2",
      "tree": "ec0cc193eccdd11a79f42f957a856d2ba57699e1",
      "parents": [
        "b8b44983f861cfeeca66c624dd0f2a3fa71b4992"
      ],
      "author": {
        "name": "Goran Jakovljevic",
        "email": "Goran.Jakovljevic@imgtec.com",
        "time": "Tue Aug 25 16:11:42 2015 +0200"
      },
      "committer": {
        "name": "Goran Jakovljevic",
        "email": "Goran.Jakovljevic@imgtec.com",
        "time": "Thu Oct 22 18:51:13 2015 +0200"
      },
      "message": "MIPS: Initial version of optimizing compiler for MIPS32\n\nChange-Id: I370388e8d5de52c7001552b513877ef5833aa621\n"
    }
  ]
}