)]}' { "log": [ { "commit": "77a48ae01bbc5b05ca009cf09e2fcb53e4c8ff23", "tree": "780c7d6bdee784c2f8248979de348491cfb63b34", "parents": [ "659562aaf133c41b8d90ec9216c07646f0f14362" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Sep 15 12:34:04 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Sep 15 12:34:04 2015 +0000" }, "message": "Revert \"Revert \"ART: Register allocation and runtime support for try/catch\"\"\n\nThe original CL triggered b/24084144 which has been fixed\nby Ib72e12a018437c404e82f7ad414554c66a4c6f8c.\n\nThis reverts commit 659562aaf133c41b8d90ec9216c07646f0f14362.\n\nChange-Id: Id8980436172457d0fcb276349c4405f7c4110a55\n" }, { "commit": "659562aaf133c41b8d90ec9216c07646f0f14362", "tree": "be1beae390262bf2f5a17bfa44de93081a849d07", "parents": [ "b022fa1300e6d78639b3b910af0cf85c43df44bb" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 14 21:26:33 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 14 21:26:33 2015 +0000" }, "message": "Revert \"ART: Register allocation and runtime support for try/catch\"\n\nBreaks libcore test org.apache.harmony.security.tests.java.security.KeyStorePrivateKeyEntryTest#testGetCertificateChain. Need to investigate.\n\nThis reverts commit b022fa1300e6d78639b3b910af0cf85c43df44bb.\n\nChange-Id: Ib24d3a80064d963d273e557a93469c95f37b1f6f\n" }, { "commit": "b022fa1300e6d78639b3b910af0cf85c43df44bb", "tree": "780c7d6bdee784c2f8248979de348491cfb63b34", "parents": [ "e481c006e8b055a31d9c7cff27f4145e57e3c113" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Aug 20 17:47:48 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 14 20:42:58 2015 +0100" }, "message": "ART: Register allocation and runtime support for try/catch\n\nThis patch completes a series of CLs that add support for try/catch\nin the Optimizing compiler. With it, Optimizing can compile all\nmethods containing try/catch, provided they don\u0027t contain catch loops.\nFuture work will focus on improving performance of the generated code.\n\nSsaLivenessAnalysis was updated to propagate liveness information of\ninstructions live at catch blocks, and to keep location information on\ninstructions which may be caught by catch phis.\n\nRegisterAllocator was extended to spill values used after catch, and\nto allocate spill slots for catch phis. Catch phis generated for the\nsame vreg share a spill slot as the raw value must be the same.\n\nLocation builders and slow paths were updated to reflect the fact that\nthrowing an exception may not lead to escaping the method.\n\nInstruction code generators are forbidden from using of implicit null\nchecks in try blocks as live registers need to be saved before handing\nover to the runtime.\n\nCodeGenerator emits a stack map for each catch block, storing locations\nof catch phis. CodeInfo and StackMapStream recognize this new type of\nstack map and store them separate from other stack maps to avoid dex_pc\nconflicts.\n\nAfter having found the target catch block to deliver an exception to,\nQuickExceptionHandler looks up the dex register maps at the throwing\ninstruction and the catch block and copies the values over to their\nrespective locations.\n\nThe runtime-support approach was selected because it allows for the\nbest performance in the normal control-flow path, since no propagation\nof catch phi values is necessary until the exception is thrown. In\naddition, it also greatly simplifies the register allocation phase.\n\nConstantHoisting was removed from LICMTest because it instantiated\n(now abstract) HConstant and was bogus anyway (constants are always in\nthe entry block).\n\nChange-Id: Ie31038ad8e3ee0c13a5bbbbaf5f0b3e532310e4e\n" }, { "commit": "b9c79928ff774c8d385ef2db169b447833207a44", "tree": "d9e5e34f1e227fa422e89e6754a7a63e605d45af", "parents": [ "402ae2dc9b94df62859bd9825e5c00f298dc71b2", "bfb5ba90cd6425ce49c2125a87e3b12222cc2601" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Sep 09 16:39:16 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Sep 09 16:39:16 2015 +0000" }, "message": "Merge \"Revert \"Revert \"Do a second check for testing intrinsic types.\"\"\"" }, { "commit": "bfb5ba90cd6425ce49c2125a87e3b12222cc2601", "tree": "6280171d451642dc70c87894d553f76c6c12db0a", "parents": [ "e6576390f957c82c2aede438834d028066757368" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Sep 01 15:45:02 2015 +0000" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Sep 08 20:36:09 2015 -0700" }, "message": "Revert \"Revert \"Do a second check for testing intrinsic types.\"\"\n\nThis reverts commit a14b9fef395b94fa9a32147862c198fe7c22e3d7.\n\nWhen an intrinsic with invoke-type virtual is recognized, replace\nthe instruction with a new HInvokeStaticOrDirect.\n\nMinimal update for dex-cache rework. Fix includes.\n\nChange-Id: I1c8e735a2fa7cda4419f76ca0717125ef236d332\n" }, { "commit": "0616ae081e648f4b9b64b33e2624a943c5fce977", "tree": "20db99d802277cce68f88eda918ae7646383ff14", "parents": [ "e6576390f957c82c2aede438834d028066757368" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri Apr 17 12:49:27 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Sep 08 17:01:05 2015 -0400" }, "message": "[optimizing] Add support for x86 constant area\n\nUse the Quick trick of finding the address of the method by calling the\nnext instruction and popping the return address into a register. This\ntrick is used because of the lack of PC-relative addressing in 32 bit\nmode on the X86.\n\nAdd a HX86ComputeBaseMethodAddress instruction to trigger generation\nof the method address, which is referenced by instructions needing\naccess to the constant area.\n\nAdd a HX86LoadFromConstantTable instruction that takes a\nHX86ComputeBaseMethodAddress and a HConstant that will be used to load\nthe value when needed.\n\nChange Add/Sub/Mul/Div to detect a HX86LoadFromConstantTable right hand\nside, and generate code that directly references the constant area.\nOther uses will be added later.\n\nChange the inputs to HReturn and HInvoke(s), replacing the FP constants\nwith HX86LoadFromConstantTable instead. This allows values to be\nloaded from the constant area into the right location.\n\nPort the X86_64 assembler constant area handling to the X86.\n\nUse the new per-backend optimization framework to do this conversion.\n\nChange-Id: I6d235a72238262e4f9ec0f3c88319a187f865932\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "957fb8930766ae422568e7b1b816159a9e9bc18c", "tree": "849a611f978656f1c85182402e1ef2c8ca50c5e6", "parents": [ "68ffda887e35f35e978f2f607b7a91e44a5e1969", "05792b98980741111b4d0a24d68cff2a8e070a3a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Sep 04 10:34:04 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Sep 04 10:34:04 2015 +0000" }, "message": "Merge \"ART: Move DexCache arrays to native.\"" }, { "commit": "05792b98980741111b4d0a24d68cff2a8e070a3a", "tree": "bad79a387bcbdaefc87c07b388099960ca9caff3", "parents": [ "c26b4512a01d46756683a4f5e186a0b7f397f251" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Aug 03 11:56:49 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 03 17:30:57 2015 +0100" }, "message": "ART: Move DexCache arrays to native.\n\nThis CL has a companion CL in libcore/\n https://android-review.googlesource.com/162985\n\nChange-Id: Icbc9e20ad1b565e603195b12714762bb446515fa\n" }, { "commit": "5a6cc49ed4f36dd11d6ec1590857b884ad8da6ab", "tree": "68f373808011cca47abf3bf09f5de6d8c9bca4b4", "parents": [ "75d4e58decf3f0be8814039df57456368e4d5475" ], "author": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Thu Aug 13 15:20:25 2015 +0100" }, "committer": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Thu Aug 27 18:21:03 2015 +0100" }, "message": "SlowPath: Remove the use of Locations in the SlowPath constructors.\n\nThe main motivation is that using locations in the SlowPath constructors\nties us to creating the SlowPaths after register allocation, since before\nthe locations are invalid.\n\nA later patch of the series will be moving the SlowPath creation to the\nLocationsBuilder visitors. This will enable us to add more checking as\nwell as consider sharing multiple SlowPaths of the same type.\n\nChange-Id: I7e96dcc2b5586d15153c942373e9281ecfe013f0\nSigned-off-by: Serban Constantinescu \u003cserban.constantinescu@linaro.org\u003e\n" }, { "commit": "581550137ee3a068a14224870e71aeee924a0646", "tree": "f62dd0d07c66a8ce4d7d994ee0e9c27bd8014bb1", "parents": [ "32f264e67afa8654a5570d38b627515fb73fc333" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 12:49:41 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 18:54:36 2015 +0100" }, "message": "Revert \"Revert \"Optimizing: Better invoke-static/-direct dispatch.\"\"\n\nFixed kCallArtMethod to use correct callee location for\nkRecursive. This combination is used when compiling with\ndebuggable flag set.\n\nThis reverts commit b2c431e80e92eb6437788cc544cee6c88c3156df.\n\nChange-Id: Idee0f2a794199ebdf24892c60f8a5dcf057db01c\n" }, { "commit": "d9c4d2e9a9bc01fd82a895091126406081fafb1f", "tree": "094657600e206c365e365634fab6d4758a3073f4", "parents": [ "464581adaf895d14f73db3d768729f0c9c6f5366", "b2c431e80e92eb6437788cc544cee6c88c3156df" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 12:46:09 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 19 12:46:09 2015 +0000" }, "message": "Merge \"Revert \"Optimizing: Better invoke-static/-direct dispatch.\"\"" }, { "commit": "b2c431e80e92eb6437788cc544cee6c88c3156df", "tree": "6c0ac5f843845e4b09829eb0fd9f1b3013cf4494", "parents": [ "9b688a095afbae21112df5d495487ac5231b12d0" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 12:45:42 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 12:45:42 2015 +0000" }, "message": "Revert \"Optimizing: Better invoke-static/-direct dispatch.\"\n\nReverting due to failing ndebug tests.\n\nThis reverts commit 9b688a095afbae21112df5d495487ac5231b12d0.\n\nChange-Id: Ie4f69da6609df3b7c8443412b6cf7f5c43c2c5d9\n" }, { "commit": "464581adaf895d14f73db3d768729f0c9c6f5366", "tree": "0a839dc0e7add5f1f6f473baa261fe3296a47105", "parents": [ "5a4f0032d797cef0bd110ed03b4342862cd27fc8", "9b688a095afbae21112df5d495487ac5231b12d0" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 11:27:57 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 19 11:27:57 2015 +0000" }, "message": "Merge \"Optimizing: Better invoke-static/-direct dispatch.\"" }, { "commit": "9b688a095afbae21112df5d495487ac5231b12d0", "tree": "e5e881d4d124803e66f1e90c1e0a0e4c90d22e13", "parents": [ "009c34cba875885d9540696f33255a9b355d6e15" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 06 14:12:42 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 12:23:37 2015 +0100" }, "message": "Optimizing: Better invoke-static/-direct dispatch.\n\nAdd framework for different types of loading ArtMethod*\nand code pointer retrieval. Implement invoke-static and\ninvoke-direct calls the same way as Quick. Document the\ndispatch kinds in HInvokeStaticOrDirect\u0027s new enumerations\nMethodLoadKind and CodePtrLocation.\n\nPC-relative loads from dex cache arrays are used only for\nx86-64 and arm64. The implementation for other architectures\nwill be done in separate CLs.\n\nChange-Id: I468ca4d422dbd14748e1ba6b45289f0d31734d94\n" }, { "commit": "98596203dd67b9c80062317ac20886e4df745fa3", "tree": "11430f16b9a4f6cc9f9ae11bf59c6fdca5fa530e", "parents": [ "1cb16842fbd213fcd6288efe7f854b6dbc844dcf" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Wed Aug 19 11:33:36 2015 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Wed Aug 19 11:33:36 2015 +0100" }, "message": "Remove extra calls to `RecordPcInfo()`.\n\nSome calls to `RecordPcInfo()` were mistakingly left in the x86/x86_64\ncode after we started using the `InvokeRuntime()` helper.\n\nChange-Id: I8a902fee9db2dfb85020167289a786f965cb3fe9\n" }, { "commit": "7c2af0d873b7033adccf8fa7adf259166c53d369", "tree": "ec1a3cffa19b1131abcdd3e64541a14e9bcc4b86", "parents": [ "1d4219ee25dfb228cc72f353d97be69584fc0722", "3887c468d731420e929e6ad3acf190d5431e94fc" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Aug 13 11:00:54 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Aug 13 11:00:54 2015 +0000" }, "message": "Merge \"Remove unnecessary `explicit` qualifiers on constructors.\"" }, { "commit": "3887c468d731420e929e6ad3acf190d5431e94fc", "tree": "67dacb849e722e33e118b97714a48e467c06cbd5", "parents": [ "6a5037eb3340e4c981fd7de3ff45167ee5b7fc82" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Aug 12 18:15:42 2015 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Aug 12 18:15:42 2015 +0100" }, "message": "Remove unnecessary `explicit` qualifiers on constructors.\n\nChange-Id: Id12e392ad50f66a6e2251a68662b7959315dc567\n" }, { "commit": "78e3ef6bc5f8aa149f2f8bf0c78ce854c2f910fa", "tree": "b8aa83bef462e20e2e7e09650e6c15d3a8d97fa6", "parents": [ "6a5037eb3340e4c981fd7de3ff45167ee5b7fc82" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Wed Aug 12 13:43:29 2015 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Wed Aug 12 13:43:29 2015 +0100" }, "message": "Add a GVN dependency \u0027GC\u0027 for garbage collection.\n\nThis will be used by incoming architecture specific optimizations. The\ndependencies must be conservative. When an HInstruction is created we\nmay not be sure whether it can trigger GC. In that case the\n\u0027ChangesGC\u0027 dependency must be set. We control at code-generation time\nthat HInstructions that can call have the \u0027ChangesGC\u0027 dependency\nset.\n\nChange-Id: Iea6a7f430009f37a9599b0a0039207049906e45d\n" }, { "commit": "423f150e5c17b5f4cd16259565b61c57f5f19477", "tree": "f30a2ea82c56175870c11a39949cf6a38aa36617", "parents": [ "f24576a7233ec708d49badb239cd7336c2b0f07e", "8c0676ce786f33b8f9c8eedf1ace48988c750932" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Aug 11 14:25:45 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Aug 11 14:25:45 2015 +0000" }, "message": "Merge \"ART-Optimizing: Fix the type of HDivZeroCheck\"" }, { "commit": "8c0676ce786f33b8f9c8eedf1ace48988c750932", "tree": "024674305019f6e5b47a7aa044c47c87c1d4abaf", "parents": [ "1f3f766d3b365d01f36b85dc19d40f754fa48533" ], "author": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Mon Aug 03 13:55:33 2015 +0600" }, "committer": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Tue Aug 11 18:12:02 2015 +0600" }, "message": "ART-Optimizing: Fix the type of HDivZeroCheck\n\nHDivZeroCheck is created during the building CFG and at this moment\nits type is not known completely. So it sets the type to int or long.\nHowever, later SSA builder can insert the type conversion and type\nof input of HDivZeroCheck can become byte or short while the type\nof HDivZeroCheck remains the same.\n\nIn reality the type of HDivZeroCheck should be always equal to\nits input parameter.\nTo fix this inconsistency we return the type of HDivZeroCheck as its\ninput type. Code generators are updated accordingly.\n\nChange-Id: I6a5aedc8d479cfc6328704e7ddf252bca830076b\nSigned-off-by: Serguei Katkov \u003cserguei.i.katkov@intel.com\u003e\n" }, { "commit": "8158f28b6689314213eb4dbbe14166073be71f7e", "tree": "fced445e53f639b2db42cb5a0e96d5aa04750861", "parents": [ "33407564904d2186f536107e1ca8d88f2c760c83" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Fri Aug 07 10:26:17 2015 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Fri Aug 07 10:26:17 2015 +0100" }, "message": "Ensure coherency of call kinds for LocationSummary.\n\nThe coherency is enforced with checks added in the `InvokeRuntime`\nhelper, that we now also use on x86 and x86_64.\n\nChange-Id: I8cb92b042f25dc3c5fd390e9c61a45b477d081f4\n" }, { "commit": "cb1c0557033065f2436ee79e7fa6c19d87064801", "tree": "741b623b2e370a133b5cef9feed2542151186db6", "parents": [ "e238414eee3ec933a4ceb1894666c9ef331ace0c" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Aug 04 16:22:25 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Aug 04 16:39:38 2015 +0100" }, "message": "ART: Move exception clearing into own instruction\n\nRuntime delivers exceptions only to catch blocks which begin with a\nMOVE_EXCEPTION instruction (in DEX). In that case, the catch block is\nexpected to clear the thread-local exception storage after having\nread the exception reference.\n\nThis patch changes Optimizing to represent MOVE_EXCEPTION with two\ninstructions - HLoadException and HClearException - instead of one.\nIf the exception reference is not used, HLoadException can be safely\nremoved, saving a memory load without breaking the runtime behaviour.\n\nChange-Id: Idad8a714467bf9d9d5fccefbc43c0bd8ae13ddba\n" }, { "commit": "e238414eee3ec933a4ceb1894666c9ef331ace0c", "tree": "6a971c3a336c4c76bd622685a355e01da3ce4919", "parents": [ "bc576cfd9c85a285f15b8c33a2cc7f947d999f49", "4a2aa4af61e653a89f88d776dcdc55f6c7ca05f2" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Aug 03 14:57:38 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Aug 03 14:57:38 2015 +0000" }, "message": "Merge \"Optimizing: Use more X86 3 operand multiplies\"" }, { "commit": "9097981b79f89bd341d46256678b3c05ddd2d0a9", "tree": "f466b5819420182a73068e0f0b598878141ecc7a", "parents": [ "595335100a947693b9af5fb6c0b5b3c1f0b91788" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Jul 28 16:41:21 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Thu Jul 30 08:52:54 2015 -0400" }, "message": "Optimizing: Replace x86 xchg use with xor sequence\n\nOn some x86 processors, xchg is serializing even when exchanging two\nregisters. Replace the xchgl use with the 3 xor sequence to swap to\nregisters. This is generally faster and doesn\u0027t serialize the machine.\n\nChange-Id: Iea2cd993d3b70a103bbdd1dbf7818e26ae29387c\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "4a2aa4af61e653a89f88d776dcdc55f6c7ca05f2", "tree": "c2821abad2247064094e9b2116c7ea727b63384c", "parents": [ "595335100a947693b9af5fb6c0b5b3c1f0b91788" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Mon Jul 27 16:13:10 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Jul 28 15:54:05 2015 -0400" }, "message": "Optimizing: Use more X86 3 operand multiplies\n\nThe X86_64 code generator generated 3 operand multiplies for long\nmultiplication only. Add support for 3 operand multiplication for\nint as well for both X86 and X86_64.\n\nNote that the RHS operand must be a 32 bit constant, and that it is\npossible for the constant to end up in a register (!) due to a previous\nuse by another instruction. Handle this case by checking the operand,\notherwise the first input might not be the same as the output, due to\nthe use of Any().\n\nAlso allow stack operands for multiplication.\n\nChange-Id: I8f3d14cc01e9a91210f418258aa18065ee87979d\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "f185fb365e9faf58428762bace96d7729ea5bdbc", "tree": "79a2bbbab8cb36523056539d374d5d79e7e5ee4a", "parents": [ "5e094de24827292d8a13be2adbdcca54ae7d5ff0", "2e7cd752452d02499a2f5fbd604c5427aa372f00" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jul 13 11:55:19 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jul 13 11:55:20 2015 +0000" }, "message": "Merge \"[optimizing] Don\u0027t rely on the verifier for String.\u003cinit\u003e.\"" }, { "commit": "2e7cd752452d02499a2f5fbd604c5427aa372f00", "tree": "505527250317827f56378f4b786534793ccfbb61", "parents": [ "f16b820fc18ff86e765a14176f05417305d689a0" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jul 10 11:38:52 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jul 10 18:21:13 2015 +0100" }, "message": "[optimizing] Don\u0027t rely on the verifier for String.\u003cinit\u003e.\n\nContinue work on cutting the dependency on the verifier.\n\nChange-Id: I0f95b1eb2e10fd8f6bf54817f1202bdf6dfdb0fe\n" }, { "commit": "4fa13f65ece3b68fe3d8722d679ebab8656bbf99", "tree": "09939739f6ae87e05e91d370007e978b5e72ca8e", "parents": [ "c470193cfc522fc818eb2eaab896aef9caf0c75a" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Jul 06 18:11:54 2015 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jul 08 15:45:22 2015 +0100" }, "message": "Fuse long and FP compare \u0026 condition on ARM in Optimizing.\n\nAlso:\n- Stylistic changes in corresponding parts on the x86 and\n x86-64 code generators.\n- Update and improve the documentation of\n art::arm::Condition.\n\nBug: 21120453\nChange-Id: If144772046e7d21362c3c2086246cb7d011d49ce\n" }, { "commit": "c470193cfc522fc818eb2eaab896aef9caf0c75a", "tree": "9887d434f8d9e33c41b98ca406e7c060c68c9016", "parents": [ "c87c8939ea1bcfbddb954478d527cf1138f4f343" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri Apr 10 13:18:51 2015 -0400" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jul 07 16:49:53 2015 +0100" }, "message": "Fuse long and FP compare \u0026 condition on x86/x86-64 in Optimizing.\n\nThis is a preliminary implementation of fusing long/float/double\ncompares with conditions to avoid materializing the result from the\ncompare and condition.\n\nThe information from a HCompare is transferred to the HCondition if it\nis legal. There must be only a single use of the HCompare, the HCompare\nand HCondition must be in the same block, the HCondition must not need\nmaterialization.\n\nAdded GetOppositeCondition() to HCondition to return the flipped\ncondition.\n\nBug: 21120453\nChange-Id: I1f1db206e6dc336270cd71070ed3232dedc754d6\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "4d02711ea578dbb789abb30cbaf12f9926e13d81", "tree": "29c802afff6e73c06021c44e6b2ec9d8340c75e9", "parents": [ "312f1bfcfd8f655e635c941dda147377d8bff814" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jul 01 15:41:14 2015 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jul 01 16:31:41 2015 +0100" }, "message": "Implement heap poisoning in ART\u0027s Optimizing compiler.\n\n- Instrument ARM, ARM64, x86 and x86-64 code generators.\n- Note: To turn heap poisoning on in Optimizing, set the\n environment variable `ART_HEAP_POISONING\u0027 to \"true\"\n before compiling ART.\n\nBug: 12687968\nChange-Id: Ib3120b38cf805a8a50207a314b9ccc90c8d93740\n" }, { "commit": "9fdb31e12023d94c710a766a54d8a57c91a196f9", "tree": "22be0afa06ceca65cb4d1ed457c0ea720845e9a4", "parents": [ "3b0667c1d68ba88c71b031757b757dca659afd69" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jul 01 12:56:46 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jul 01 13:54:32 2015 +0100" }, "message": "Do not do a type check when setting null to an array.\n\nChange-Id: I7387d45aea697d4a3de273335647220a815a992b\n" }, { "commit": "fc6a86ab2b70781e72b807c1798b83829ca7f931", "tree": "90201491e811cf7be0e0469d7a06a828f4384cad", "parents": [ "d3eaade87ac079accca30473ef0a3b38ab600828" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jun 26 10:33:45 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jun 26 13:49:50 2015 +0100" }, "message": "Revert \"Revert \"ART: Implement try/catch blocks in Builder\"\"\n\nThis patch enables the GraphBuilder to generate blocks and edges which\nrepresent the exceptional control flow when try/catch blocks are\npresent in the code. Actual compilation is still delegated to Quick\nand Baseline ignores the additional code.\n\nTo represent the relationship between try and catch blocks, Builder\nsplits the edges which enter/exit a try block and links the newly\ncreated blocks to the corresponding exception handlers. This layout\nwill later enable the SsaBuilder to correctly infer the dominators of\nthe catch blocks and to produce the appropriate reverse post ordering.\nIt will not, however, allow for building the complete SSA form of the\ncatch blocks and consequently optimizing such blocks.\n\nTo this end, a new TryBoundary control-flow instruction is introduced.\nCodegen treats it the same as a Goto but it allows for additional\nsuccessors (the handlers).\n\nThis reverts commit 3e18738bd338e9f8363b26bc895f38c0ec682824.\n\nChange-Id: I4f5ea961848a0b83d8db3673763861633e9bfcfb\n" }, { "commit": "3e18738bd338e9f8363b26bc895f38c0ec682824", "tree": "708013ef06cfb524f040b2b5c494f7f3cb84ac2c", "parents": [ "0b5c7d1994b76090afcc825e737f2b8c546da2f8" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jun 26 09:59:52 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jun 26 09:59:52 2015 +0000" }, "message": "Revert \"ART: Implement try/catch blocks in Builder\"\n\nCauses OutOfMemory issues, need to investigate.\n\nThis reverts commit 0b5c7d1994b76090afcc825e737f2b8c546da2f8.\n\nChange-Id: I263e6cc4df5f9a56ad2ce44e18932ca51d7e349f\n" }, { "commit": "0b5c7d1994b76090afcc825e737f2b8c546da2f8", "tree": "057eddf8830b1991f02af3c3ce1b63dee90dd2ad", "parents": [ "1dd3136d9f6b1c7d551897a2d96c8314e40f7324" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jun 11 11:17:49 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jun 25 16:58:08 2015 +0100" }, "message": "ART: Implement try/catch blocks in Builder\n\nThis patch enables the GraphBuilder to generate blocks and edges which\nrepresent the exceptional control flow when try/catch blocks are\npresent in the code. Actual compilation is still delegated to Quick\nand Baseline ignores the additional code.\n\nTo represent the relationship between try and catch blocks, Builder\nsplits the edges which enter/exit a try block and links the newly\ncreated blocks to the corresponding exception handlers. This layout\nwill later enable the SsaBuilder to correctly infer the dominators of\nthe catch blocks and to produce the appropriate reverse post ordering.\nIt will not, however, allow for building the complete SSA form of the\ncatch blocks and consequently optimizing such blocks.\n\nTo this end, a new TryBoundary control-flow instruction is introduced.\nCodegen treats it the same as a Goto but it allows for additional\nsuccessors (the handlers).\n\nChange-Id: I415b985596d5bebb7b1bb358a46e08b7b04bb53a\n" }, { "commit": "9931f319cf86c56c2855d800339a3410697633a6", "tree": "94e98f4a670d9bded4ed3fbc194c31e4c733d198", "parents": [ "edb83c606e034d76bed1331f34cdc435df47bb95" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Fri Jun 19 14:47:01 2015 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Fri Jun 19 14:47:01 2015 +0100" }, "message": "Opt compiler: Add a description to slow paths.\n\nChange-Id: I22160d90de3fe0ab3e6a2acc440bda8daa00e0f0\n" }, { "commit": "69aa60163989c33a008115205d39732a76ecc1dc", "tree": "058392dc104a8e7b3594a548239dca2d3ec06cce", "parents": [ "aa77f6e5839b2ad3bf8ca2c06a44ec92e2667af1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jun 09 10:34:25 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jun 09 16:01:49 2015 +0100" }, "message": "Revert \"Revert \"Pass current method to HNewInstance and HNewArray.\"\"\n\nProblem exposed by this change was fixed in:\nhttps://android-review.googlesource.com/#/c/154031/\n\nThis reverts commit 7b0e353b49ac3f464c662f20e20e240f0231afff.\n\nChange-Id: I680c13dc9db9ba223ab11c7af255222860b4e6d2\n" }, { "commit": "ae71a0539451a8350bdd9d46c76ddab7b763f209", "tree": "a7f7040991d89bc787ed38864ab09f0bcbf84576", "parents": [ "7c5e26b3ea5262c0aea3374148750e81340a4bf9" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jun 09 14:12:28 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jun 09 15:03:47 2015 +0100" }, "message": "Fix a crash in optimizing compiler with the current method.\n\nCrash was due to overwriting the location of the current method\nin the slow path of an intrinsic.\n\nChange-Id: I6ca58ef5b3cea19925e60b9500aef543bc5f71ef\n" }, { "commit": "7c5e26b3ea5262c0aea3374148750e81340a4bf9", "tree": "c5d76ab74df70cf37336ef18edd9c5a962b25fec", "parents": [ "93ce3528cbf61579a0f2929ae56f0dd1fe554973", "7b0e353b49ac3f464c662f20e20e240f0231afff" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jun 09 09:26:04 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jun 09 09:26:05 2015 +0000" }, "message": "Merge \"Revert \"Pass current method to HNewInstance and HNewArray.\"\"" }, { "commit": "7b0e353b49ac3f464c662f20e20e240f0231afff", "tree": "b5c936df891b08521176065ccaddb1f9e27c9f46", "parents": [ "e21aa42e1341d34250742abafdd83311ad9fa737" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jun 09 09:25:50 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jun 09 09:25:50 2015 +0000" }, "message": "Revert \"Pass current method to HNewInstance and HNewArray.\"\n\n082-inline-execute fails on x86.\n\nThis reverts commit e21aa42e1341d34250742abafdd83311ad9fa737.\n\nChange-Id: Ib3fd25faee2e0128001e40d3d51a74f959bc4449\n" }, { "commit": "b0c85983741d695fc568b61a1e0d8f318cd4828f", "tree": "d7de231a1ebf8e07e1965aa50afa26a5fced68df", "parents": [ "f7bd8fafdf3bbf05fbcfc659cd798b3fd59051d5", "e21aa42e1341d34250742abafdd83311ad9fa737" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jun 09 08:13:15 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jun 09 08:13:16 2015 +0000" }, "message": "Merge \"Pass current method to HNewInstance and HNewArray.\"" }, { "commit": "94015b939060f5041d408d48717f22443e55b6ad", "tree": "3dfe8b3d8535508694dd451acdd1ff887dfa4662", "parents": [ "6a1c92f1e4a455d802ab0d0ac47504cdd7c12f0f" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 04 18:21:04 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jun 08 18:20:41 2015 +0100" }, "message": "Revert \"Revert \"Use HCurrentMethod in HInvokeStaticOrDirect.\"\"\n\nFix was to special case baseline for x86, which does not have enough\nregisters to allocate the current method.\n\nThis reverts commit c345f141f11faad177aa9635a78088d00cf66086.\n\nChange-Id: I5997aa52f8d4df373ae5ff4d4150dac0c44c4c10\n" }, { "commit": "e21aa42e1341d34250742abafdd83311ad9fa737", "tree": "d2c9f8530e59876588d32f04b4effc25ebc0fa89", "parents": [ "c47908e8c32fd58bc4dc75998a80f706954db1dc" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jun 08 15:35:07 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jun 08 15:36:27 2015 +0100" }, "message": "Pass current method to HNewInstance and HNewArray.\n\nAlso remove unsed CodeGenerator::LoadCurrentMethod.\n\nChange-Id: I4b8d3f2a30b8e2c76b6b329a72555483c993cb73\n" }, { "commit": "c345f141f11faad177aa9635a78088d00cf66086", "tree": "0a9fbb0f1f90dfe273d94659f077cc1e6b84966c", "parents": [ "38207af82afb6f99c687f64b15601ed20d82220a" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 04 17:17:32 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 04 17:17:32 2015 +0000" }, "message": "Revert \"Use HCurrentMethod in HInvokeStaticOrDirect.\"\n\nFails on baseline/x86.\n\nThis reverts commit 38207af82afb6f99c687f64b15601ed20d82220a.\n\nChange-Id: Ib71018367eb7c6046965494a7e996c22af3de403\n" }, { "commit": "38207af82afb6f99c687f64b15601ed20d82220a", "tree": "f9360949b92e5b6b01c5828c03ac67d01adffe1d", "parents": [ "6a0d5e7fe6dc0c9d3dd941ab991203f2d5d1c354" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jun 01 15:46:22 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 04 14:39:06 2015 +0100" }, "message": "Use HCurrentMethod in HInvokeStaticOrDirect.\n\nChange-Id: I0d15244b6b44c8b10079398c55da5071a3e3af66\n" }, { "commit": "0d1652e1e3768b30e4d80f31d59db580312581d8", "tree": "87e6f760f5ce74830f6aad9cf389e60c065c78b8", "parents": [ "e499f8a75c6c9632f5b1f1921e9471d52348e2f4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 03 12:12:19 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 03 12:12:19 2015 +0100" }, "message": "Fix compilation errors with gcc.\n\nChange-Id: If88d4f639658db2d6d71f5abcad563211138fc4a\n" }, { "commit": "fd88f16100cceafbfde1b4f095f17e89444d6fa8", "tree": "fdb6d0520ca419acef9e953e74dcbd7d908bc4dd", "parents": [ "1aebdae18678403bdac078cbbe1f7dd4243c44f3" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 03 11:23:52 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 03 11:23:52 2015 +0100" }, "message": "Factorize code for common LocationSummary of HInvoke.\n\nThis is one step forward, we could factorize more, but\nI wanted to get this out of the way first.\n\nChange-Id: I6ae411a737eebaecb64974f47af507ce0cfbae85\n" }, { "commit": "62a46b2b4ac066a740fb22e58a246c18501fa909", "tree": "d5ba9ea5378bd9db5bbf24be287ee6a09282f047", "parents": [ "c2ec62874804f341439455fb00a128010139d0fc" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Jun 01 18:24:13 2015 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Jun 01 18:24:13 2015 +0100" }, "message": "Use down_cast instead of reinterpret_cast in Optimizing codegens.\n\nChange-Id: Ifa23023ffaca631a4f6b5745dd7492c39521a26f\n" }, { "commit": "e401d146407d61eeb99f8d6176b2ac13c4df1e33", "tree": "17927f9bfe7d2041b5942c89832d55f9dedb24c5", "parents": [ "2006b7b9b8e32722bd0d640c62549d8a0ac624b6" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Wed Apr 22 13:56:20 2015 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Fri May 29 18:45:49 2015 -0700" }, "message": "Move mirror::ArtMethod to native\n\nOptimizing + quick tests are passing, devices boot.\n\nTODO: Test and fix bugs in mips64.\n\nSaves 16 bytes per most ArtMethod, 7.5MB reduction in system PSS.\nSome of the savings are from removal of virtual methods and direct\nmethods object arrays.\n\nBug: 19264997\nChange-Id: I622469a0cfa0e7082a2119f3d6a9491eb61e3f3d\n" }, { "commit": "fbdaa30a448029d75422c76f29087a4e39630f4a", "tree": "e28784ff44d740884a7949f11745706e2831c873", "parents": [ "b4e2fbbed28c3bcdb8fd0fee5a201ba78e1edf28" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri May 29 12:06:56 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri May 29 12:06:56 2015 +0100" }, "message": "Use the new HCurrentMethod in HLoadString.\n\nChange-Id: I23d27e5e10736d127519eb3238ff8f25df3843a2\n" }, { "commit": "b4e2fbbed28c3bcdb8fd0fee5a201ba78e1edf28", "tree": "2da8c563cca7c9e7e125819ba3022915dca18ca9", "parents": [ "31db3432157caac55584a59827c69b303ba09d13", "76b1e1799a713a19218de26b171b0aef48a59e98" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu May 28 10:10:24 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 28 10:10:24 2015 +0000" }, "message": "Merge \"Add a HCurrentMethod node.\"" }, { "commit": "76b1e1799a713a19218de26b171b0aef48a59e98", "tree": "897d0d22d246367eb09d8b825b43c384074083f4", "parents": [ "382f5c24eb663ca8fa39a94a038349138a00272a" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed May 27 17:18:33 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu May 28 10:44:36 2015 +0100" }, "message": "Add a HCurrentMethod node.\n\nThis enables register allocation for the current method, so\nthat users of it don\u0027t always load it from the stack.\n\nCurrently only used by HLoadClass. Will make follow-up\nCLs for the other users.\n\nChange-Id: If73324d85643102faba47fabbbd2755eb258c59c\n" }, { "commit": "0d37cd0a895cedb1653cf9897d9f9058855e2aee", "tree": "51a4e8310601cc4b5910eee15413d2c70fca3078", "parents": [ "6c70104dc3ecd66b46f56cae068a14e12021c9f2" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed May 27 16:39:19 2015 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed May 27 16:48:45 2015 +0100" }, "message": "Rename VisitCondition\u0027s argument in code generators.\n\nThis argument is a condition instruction, not a comparison.\n\nChange-Id: I026f799d2161df58b0c8a84600eb8fffd6f7b998\n" }, { "commit": "33bf2459e6cfe477a9be0c45aec3f6f359ee077c", "tree": "b7f62193677c1516f53ddbc5eef58cf26b9ec907", "parents": [ "00f09ff93480d5f43aaf657650a59d57330184aa" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed May 27 10:08:24 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed May 27 10:08:24 2015 -0400" }, "message": "[optimizing] x86: Prefer add over lea if possible\n\nLooking at some generated code, I noticed an lea being used when an add\nwas sufficient. Check for that case, and generate the add.\n\nFixed for x86 and x86_64.\n\nChange-Id: I110304ff0fed8837ada96d34353a293d29022ce5\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "07276db28d654594e0e86e9e467cad393f752e6e", "tree": "6450e07d64045f0c0949b3423501316b672641c7", "parents": [ "17f1bc531ea2f8c1a6fac3def13dee1b901949dd" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon May 18 14:22:09 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon May 18 19:15:52 2015 +0100" }, "message": "Don\u0027t do a null test in MarkGCCard if the value cannot be null.\n\nChange-Id: I45687f6d3505178e2fc3689eac9cb6ab1b2c1e29\n" }, { "commit": "c74652867cd9293e86232324e5e057cd73c48e74", "tree": "2670fa4ee6ff86e7c7a6d7ffa07f7a58df45dfb5", "parents": [ "70d3d1433ee3d33dfdc9f687c94383d527871455" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed May 13 17:50:09 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri May 15 14:04:08 2015 +0100" }, "message": "ART: Refactor GraphVisualizer attribute printing\n\nThis patch unifies the way GraphVisualizer prints instruction\nattributes in preparation of changes to the Checker syntax.\n\nChange-Id: I44e91e36c660985ddfe039a9f410fedc48b496ec\n" }, { "commit": "ba56d060116d6e145be348fa575314654c6b0572", "tree": "4ef90809f6628435a60320b8fa0fd939849e2d29", "parents": [ "6727a48193db2a0cf01af971cccffe1a6518c247" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue May 05 21:34:03 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Mon May 11 08:44:54 2015 -0400" }, "message": "[optimizing] Improve 32 bit long shift by 1.\n\nAlso change FOO \u003c\u003c 1 to FOO+FOO in the instruction simplifier. This is\nan architecture independent simplification, which helps \u0027long \u003c\u003c 1\u0027 for\n32 bit architectures.\n\nGenerate an add/adc for long \u003c\u003c 1 in x86, in case something is generated\nafter the simplifier.\n\nAdd test cases for the simplification.\n\nChange-Id: I0d512331ef13cc4ccf10c80f11c370a10ed02294\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "db216f4d49ea1561a74261c29f1264952232728a", "tree": "8b7914435ad1ba519a3d88b5cca7f0f6e842cd4f", "parents": [ "bc3b93eadd155342b6124d2d5ef3806ecec5dfd6" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue May 05 17:02:20 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu May 07 09:54:09 2015 +0100" }, "message": "Relax the only one back-edge restriction.\n\nThe rule is in the way for better register allocation, as\nit creates an artificial join point between multiple paths.\n\nChange-Id: Ia4392890f95bcea56d143138f28ddce6c572ad58\n" }, { "commit": "7394569c9252b277710b2d7d3fc35fb0dd48fc4b", "tree": "9ce2241c95d93e873c45416a2d17e2c4084d220b", "parents": [ "8a30bf23bcb1ad8d4ed9060ddbb27edbfd57a897" ], "author": { "name": "Mark P Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed Apr 29 14:56:17 2015 +0000" }, "committer": { "name": "Mark P Mendell", "email": "mark.p.mendell@intel.com", "time": "Mon May 04 14:14:32 2015 +0000" }, "message": "Revert \"Revert \"Revert \"Revert \"[optimizing] Improve x86 shifts\"\"\"\"\n\nThis reverts commit 2a7a1d7808f003bea908023ebd11eb442d2fca39.\n\nFix the problem that a long long \u003e\u003e 63 got the wrong answer. The\nproblem was that a shr was used instead of a sar.\n\nChange-Id: I0327f79c718016ddec9272a605fc50ec15ec4566\n" }, { "commit": "2d27c8e338af7262dbd4aaa66127bb8fa1758b86", "tree": "e01e0bc57359df0bdf00c3da694c5403fb7fc9e6", "parents": [ "3adfc4bbe6c42d574bd2069d8e38a13d5ad98ccf" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Apr 28 15:48:45 2015 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Apr 29 14:09:17 2015 +0100" }, "message": "Refactor InvokeDexCallingConventionVisitor in Optimizing.\n\nChange-Id: I7ede0f59d5109644887bf5d39201d4e1bf043f34\n" }, { "commit": "80613ffd5699e6207d6b1264d600a0fc168074ce", "tree": "dbe8971e367e2529586821f3caa223fd22c28ce3", "parents": [ "a94fb1f99ee3390bca9531b2512f8fc65f13ceee", "3e3d73349a2de81d14e2279f60ffbd9ab3f3ac28" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Apr 28 10:31:38 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Apr 28 10:31:38 2015 +0000" }, "message": "Merge \"Have HInvoke instructions know their number of actual arguments.\"" }, { "commit": "3e3d73349a2de81d14e2279f60ffbd9ab3f3ac28", "tree": "69ad3378263c9a4b967cb7e27de0027264c12eb6", "parents": [ "a0ee862288b702468f8c2b6d0ad0f1c61be0b483" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Apr 28 11:00:54 2015 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Apr 28 11:00:54 2015 +0100" }, "message": "Have HInvoke instructions know their number of actual arguments.\n\nAdd an art::HInvoke::GetNumberOfArguments routine so that\nart::HInvoke and its subclasses can return the number of\nactual arguments of the called method. Use it in code\ngenerators and intrinsics handlers.\n\nConsequently, no longer remove a clinit check as last input\nof a static invoke if it is still present during baseline\ncode generation, but ensure that static invokes have no such\ncheck as last input in optimized compilations.\n\nChange-Id: Iaf9e07d1057a3b15b83d9638538c02b70211e476\n" }, { "commit": "848f70a3d73833fc1bf3032a9ff6812e429661d9", "tree": "b0349b3a40aab5a915af491b100659a5ca9fbbf6", "parents": [ "d14438f0c5071962be7fab572b54687d32d9d087" ], "author": { "name": "Jeff Hao", "email": "jeffhao@google.com", "time": "Wed Jan 15 13:49:50 2014 -0800" }, "committer": { "name": "Jeff Hao", "email": "jeffhao@google.com", "time": "Mon Apr 27 18:54:52 2015 -0700" }, "message": "Replace String CharArray with internal uint16_t array.\n\nSummary of high level changes:\n - Adds compiler inliner support to identify string init methods\n - Adds compiler support (quick \u0026 optimizing) with new invoke code path\n that calls method off the thread pointer\n - Adds thread entrypoints for all string init methods\n - Adds map to verifier to log when receiver of string init has been\n copied to other registers. used by compiler and interpreter\n\nChange-Id: I797b992a8feb566f9ad73060011ab6f51eb7ce01\n" }, { "commit": "808db5276827c909818d5595a5600e64b97f66e0", "tree": "7098009ac994bb77a40d07390610f63d767a0dec", "parents": [ "c435e014f7c0c93b0459a0d04e3f7e893d6ce9c6", "99dbd6883f5dab7743d5fb5d0ad2e82c75a7011e" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Sat Apr 25 03:25:43 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Sat Apr 25 03:25:43 2015 +0000" }, "message": "Merge \"[optimizing] Handle x86 const length BoundsCheck\"" }, { "commit": "99dbd6883f5dab7743d5fb5d0ad2e82c75a7011e", "tree": "21b307f551ec645aeefb848c7fb2d8b7f41c6e67", "parents": [ "76f1413492c228bfa710e1eaa4c60370eaffbb8a" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed Apr 22 16:18:52 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri Apr 24 19:53:16 2015 -0400" }, "message": "[optimizing] Handle x86 const length BoundsCheck\n\nAllow a constant length for BoundsCheck.\n\nChange-Id: I2c7adc6e733cf8ce6997aba76aa763d0835bd2d6\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "0379f82393237798616d485ad99952e73e480e12", "tree": "87f5ccd1fd0f4fa8156c31191040b7433c9ec907", "parents": [ "3507b795c034617e1c94fc9544a208d6c6f75735" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Apr 24 23:01:24 2015 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Apr 24 23:29:06 2015 +0100" }, "message": "Fix DCHECKs about clinit checks in Optimizing\u0027s code generators.\n\nThese assertions are not true for the baseline compiler. As\na temporary workaround, remove a clinit check as last input\nof a static invoke if it is still present at the stage of\ncode generation.\n\nChange-Id: I5655f4a0873e2e7ee7790b6a341c18b4b7b52af1\n" }, { "commit": "eb5459ca861b58ee8a9907789f11400dcdddb87b", "tree": "36c1f328c48f0ec111ee31702cc4a82ddb2ad784", "parents": [ "ae803f6efbe8378b5423c51ee3c5564cae0e6e59", "4c0eb42259d790fddcd9978b66328dbb3ab65615" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Apr 24 18:17:40 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 24 18:17:41 2015 +0000" }, "message": "Merge \"Ensure inlined static calls perform clinit checks in Optimizing.\"" }, { "commit": "4c0eb42259d790fddcd9978b66328dbb3ab65615", "tree": "9d1ac505dfd4d0225f479d860b72a58747c8f6ce", "parents": [ "223f2f5b2a20ca8246da1523494900a2424d5956" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Apr 24 16:43:49 2015 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Apr 24 16:43:49 2015 +0100" }, "message": "Ensure inlined static calls perform clinit checks in Optimizing.\n\nCalls to static methods have implicit class initialization\n(clinit) checks of the method\u0027s declaring class in\nOptimizing. However, when such a static call is inlined,\nthe implicit clinit check vanishes, possibly leading to an\nincorrect behavior.\n\nTo ensure that inlining static methods does not change the\nbehavior of a program, add explicit class initialization\nchecks (art::HClinitCheck) as well as load class\ninstructions (art::HLoadClass) as last input of static\ncalls (art::HInvokeStaticOrDirect) in Optimizing\u0027 control\nflow graphs, when the declaring class is reachable and not\nknown to be already initialized. Then when considering the\ninlining of a static method call, proceed only if the method\nhas no implicit clinit check requirement.\n\nThe added explicit clinit checks are already removed by the\nart::PrepareForRegisterAllocation visitor. This CL also\nextends this visitor to turn explicit clinit checks from\nstatic invokes into implicit ones after the inlining step,\nby removing the added art::HLoadClass nodes mentioned\nhereinbefore.\n\nChange-Id: I9ba452b8bd09ae1fdd9a3797ef556e3e7e19c651\n" }, { "commit": "5ea536aa4a6414db01beaf6f8bd8cb9adc5cfc92", "tree": "27b3f1c148744452b26bd4841f0dabe0549c3d86", "parents": [ "c5cb691ca6a746a193bfbe3525aafa7cbb281d40" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Apr 20 20:11:30 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Apr 24 11:08:46 2015 +0100" }, "message": "Remove ArtMethod* parameter from dex cache entry points.\n\nLoad the ArtMethod* using an optimized stack walk instead.\nThis reduces the size of the generated code.\n\nThree of the entry points are called only from a slow-path\nand the fourth (InitializeTypeAndVerifyAccess) is rare and\nalready slow enough that the one or two extra loads\n(depending on whether we already have the ArtMethod* in a\nregister) are insignificant. And as we\u0027re starting to use\nPC-relative addressing of the dex cache arrays (already\ndone by Quick for the boot image), having the ArtMethod* in\na register becomes less likely anyway.\n\nChange-Id: Ib19b9d204e355e13bf386662a8b158178bf8ad28\n" }, { "commit": "322b389a74177c9d938f1f73d53110623dfc61b6", "tree": "b2437d4cdce399ce462d587d9c9c47a8fceb8953", "parents": [ "272bf7e60add5f741fb9a2589eaa71945257afcc", "af88835231c2508509eb19aa2d21b92879351962" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Apr 23 17:19:34 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Apr 23 17:19:34 2015 +0000" }, "message": "Merge \"Remove unnecessary null checks in CheckCast and InstanceOf\"" }, { "commit": "af88835231c2508509eb19aa2d21b92879351962", "tree": "4ef1c8fb3c5b78175767999a888b0c2cb1ea6485", "parents": [ "da93333d568f3c5bd8eeb58341d10a332e1d42bf" ], "author": { "name": "Guillaume \"Vermeille\" Sanchez", "email": "guillaumesa@google.com", "time": "Mon Apr 20 14:41:30 2015 +0100" }, "committer": { "name": "Guillaume \"Vermeille\" Sanchez", "email": "guillaumesa@google.com", "time": "Thu Apr 23 17:53:17 2015 +0100" }, "message": "Remove unnecessary null checks in CheckCast and InstanceOf\n\nChange-Id: I6fd81cabd8673be360f369e6318df0de8b18b634\n" }, { "commit": "4bb014fd8e0aa45b012d56bc4813f18fa295d2b0", "tree": "ba5fa5beef6e2c4a91ec5bbe7b0ed81b168b4958", "parents": [ "d677de20906067061f262bdd434536a02e7f0dd0", "232ade0b9401404ad4b61b1003551b58b96195a8" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Apr 21 16:09:29 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Apr 21 16:09:30 2015 +0000" }, "message": "Merge \"Revert \"Revert \"Optimizing: Fix long-to-fp conversion on x86.\"\"\"" }, { "commit": "b3306642f42d47ddb4d021a2f48ce9b1bd235857", "tree": "5b997bad1c6021c1ab777c2250816f1c22e930db", "parents": [ "b9791aa606834160b085dec7c5b32ccbeaf9a186" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Mon Apr 20 18:30:42 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Apr 21 13:59:33 2015 +0100" }, "message": "[optimzing] Fix codegen bug and improve type propagation\n\n- don\u0027t bound the type if there are no relevant uses\n- insert the bound type in the bounded block (this allows for condition\nmaterialization without changing the logic there).\n- add more comments\n- add tests for BoundType generation\n- fix GenerateTestAndBranch\n\nChange-Id: I5c1fdda104da4a46775d207270220d410234a472\n" }, { "commit": "6149f962cd0815c61c134a7554036ca88d0abef1", "tree": "d41a91d6d43caaf6efd117ad482c7d558790471f", "parents": [ "9fab1eea3b9dc7a284dd74487ac603d9ffbb79fb", "8693fe1eda2e37ad162d792e9e793827bfa1c236" ], "author": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Mon Apr 20 17:11:32 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Apr 20 17:11:33 2015 +0000" }, "message": "Merge \"RecordPcInfo() in GenerateStaticOrDirectCall() is misplaced on x86.\"" }, { "commit": "232ade0b9401404ad4b61b1003551b58b96195a8", "tree": "54fe7cc37674246dead84f883a4c8be2123e7d26", "parents": [ "2e0f89b1b61685f7c322a4c6ec3e3b4839e76d64" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Apr 20 15:14:36 2015 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Apr 20 15:53:12 2015 +0100" }, "message": "Revert \"Revert \"Optimizing: Fix long-to-fp conversion on x86.\"\"\n\nThis reverts commit 386ce406f150645158d6067c4e0a36565aefc44f.\n\nBug: 20413424\nChange-Id: I6e93ff132907f2653f1ae12d6676ff2298f62ca1\n" }, { "commit": "36aafd94af64d6f1ba603392f66959998f2a93a2", "tree": "13de8641b36380015b80dac1a231b58d08b3de29", "parents": [ "aff3f0a0a2a080e313ae80c9b0216aa26a668623", "27df758e2e7baebb6e3f393f9732fd0d064420c8" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Mon Apr 20 13:03:14 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Apr 20 13:03:14 2015 +0000" }, "message": "Merge \"[optimizing] Add memory barriers in constructors when needed\"" }, { "commit": "27df758e2e7baebb6e3f393f9732fd0d064420c8", "tree": "261207281fd574deffb4dc1c1bc6bea8f150993e", "parents": [ "f8bdd9f3a002970e4b8fdcf6fe6730116f1626c3" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Apr 17 19:12:31 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Mon Apr 20 14:02:51 2015 +0100" }, "message": "[optimizing] Add memory barriers in constructors when needed\n\nIf a class has final fields we must add a memory barrier before\nreturning from constructor. This makes sure the fields are visible to\nother threads.\n\nBug: 19851497\nChange-Id: If8c485092fc512efb9636cd568cb0543fb27688e\n" }, { "commit": "88c13cddc3a4184908662b0f3de796565d348c76", "tree": "6986849099ff7afc042eac31a3e53df0c468962b", "parents": [ "f458ba7d9c04bc8d499532b5470af28db18e4149" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@arm.com", "time": "Tue Apr 14 17:35:39 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Apr 20 11:35:44 2015 +0100" }, "message": "Opt compiler: Correctly require register or FPU register.\n\nAlso add a check that location summary are correctly typed\nwith the HInstruction.\n\nChange-Id: I699762ff4e8f4e321c7db01ea005236ea1934af9\n" }, { "commit": "8693fe1eda2e37ad162d792e9e793827bfa1c236", "tree": "25477a6397692e3c46eb75b8b6bee8b6c1c0cce9", "parents": [ "33259fdfcd350793d10f67f2ea7dfc6051a8afa2" ], "author": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Fri Apr 17 16:51:08 2015 -0700" }, "committer": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Fri Apr 17 17:09:12 2015 -0700" }, "message": "RecordPcInfo() in GenerateStaticOrDirectCall() is misplaced on x86.\n\nGenerateStaticOrDirectCall() is invoked in intrinsics_x86.cc and\nRecordPcInfo() is already taken care of there. It should be moved\nto VisitInvokeStaticOrDirect() as done in other archs.\n\nChange-Id: Id08d84c9046e55dea9d8a8452c979294c4183150\n" }, { "commit": "13b4718ecd52a674b25eac106e654d8e89872750", "tree": "34d6efd2cda3ceb233118e4d135c4a897f02ea12", "parents": [ "da93333d568f3c5bd8eeb58341d10a332e1d42bf" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Apr 15 16:29:32 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Apr 16 11:09:55 2015 +0100" }, "message": "ART: Remove DCHECKs for boolean type\n\nSince bool and int are interchangeable types, checking whether an\ninput is kPrimBoolean can fail when replaced with 0/1 constant or\na phi. This patch removes the problematic DCHECKs, adds a best-effort\nverification into SSAChecker but leaves the phi case empty until a\nsuitable analysis is implemented.\n\nChange-Id: I31e8daf27dd33d2fd74049b82bed1cb7c240c8c6\n" }, { "commit": "669d8a1edbb2a78e08731a9cd6d8e815b0ec49db", "tree": "240d26edb4af28ccd7fa65a9fecc39f718d3d603", "parents": [ "ee2da343bb2a54d9d77e29226e0317ccc913c8c1", "e14590bdfed24df30e6b7545fc819ba03ff8bba1" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Apr 16 09:40:38 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Apr 16 09:40:39 2015 +0000" }, "message": "Merge \"Revert \"[optimizing] Improve x86 parallel moves/swaps\"\"" }, { "commit": "e14590bdfed24df30e6b7545fc819ba03ff8bba1", "tree": "1fe89a424c91dae7adc07ebd620dce8297a0854e", "parents": [ "a5c19ce8d200d68a528f2ce0ebff989106c4a933" ], "author": { "name": "Guillaume Sanchez", "email": "guillaumesa@google.com", "time": "Wed Apr 15 18:57:27 2015 +0000" }, "committer": { "name": "Guillaume Sanchez", "email": "guillaumesa@google.com", "time": "Wed Apr 15 18:57:27 2015 +0000" }, "message": "Revert \"[optimizing] Improve x86 parallel moves/swaps\"\n\nThis reverts commit a5c19ce8d200d68a528f2ce0ebff989106c4a933.\n\nThis commit introduces a performance regression on CaffeineLogic of 30%.\n\nChange-Id: I917e206e249d44e1748537bc1b2d31054ea4959d\n" }, { "commit": "a76a08fed88bd081bcc4d240f1ba3472a2acbbab", "tree": "cd016bb007c3757ab2a6df28bc1a65d6a8e78e44", "parents": [ "acf9b7b7616a9b104e6f2146051d8e14d9cb9030", "9021825d1e73998b99c81e89c73796f6f2845471" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Apr 15 14:10:29 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Apr 15 14:10:29 2015 +0000" }, "message": "Merge \"Type MoveOperands.\"" }, { "commit": "9021825d1e73998b99c81e89c73796f6f2845471", "tree": "13e1038931cbb8bf8b8d0f4e3f51553ba1bfa983", "parents": [ "858d28ca2e73a785977f53141e775a7d4841b89d" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Apr 15 11:56:51 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Apr 15 12:53:42 2015 +0100" }, "message": "Type MoveOperands.\n\nThe ParallelMoveResolver implementation needs to know if a move\nis for 64bits or not, to handle swaps correctly.\n\nBug found, and test case courtesy of Serguei I. Katkov.\n\nChange-Id: I9a0917a1cfed398c07e57ad6251aea8c9b0b8506\n" }, { "commit": "66d126ea06ce3f507d86ca5f0d1f752170ac9be1", "tree": "8e247db17ef085b55725b21c64d292414fd00b32", "parents": [ "9bb3e8e10d7d9230a323511094a9e260062a1473" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Apr 03 16:02:44 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Apr 15 12:51:49 2015 +0100" }, "message": "ART: Implement HBooleanNot instruction\n\nOptimizations simplifying operations on boolean values (boolean\nsimplifier, instruction simplifier) can benefit from having a special\nHInstruction for negating booleans in order to perform more transforms\nand produce faster machine code.\n\nThis patch implements HBooleanNot as \u0027x xor 1\u0027, assuming that booleans\nare 1-bit integers and allowing for a single-instruction negation on\nall supported platforms.\n\nChange-Id: I33a2649c1821255b18a86ca68ed16416063c739f\n" }, { "commit": "daba9dff2ba0160332fe54ab14fc4283b8ea86fb", "tree": "0984e431727fe4dd8b56d2891a2d343882daebbf", "parents": [ "c4542866d2e68dcdfa2c7efa5cddbb131003da81", "9d8606de5e274c00242ee73ffb693bc34589f184" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Apr 13 20:00:39 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Apr 13 20:00:40 2015 +0000" }, "message": "Merge \"Whitespace cleanup in DWARFReg helper functions.\"" }, { "commit": "9d8606de5e274c00242ee73ffb693bc34589f184", "tree": "bc16051f6b9de2a69bdf0c7f6800d6534d10d005", "parents": [ "58565098b2298041ccc97371a3cc486df88d51b3" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Sun Apr 12 09:35:32 2015 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Sun Apr 12 09:35:32 2015 +0100" }, "message": "Whitespace cleanup in DWARFReg helper functions.\n\nChange-Id: Iedc05969b05be6d93e40467ff23287faaae08fb3\n" }, { "commit": "c34dc9362b9ec624b3bdd97d36b6b2098814cd73", "tree": "c2049b2dc19d318e3917b52ef66608b985d7ac69", "parents": [ "58565098b2298041ccc97371a3cc486df88d51b3" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Sun Apr 12 09:27:43 2015 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Sun Apr 12 09:30:57 2015 +0100" }, "message": "Move \u0027ret\u0027 instruction generation inside GenerateFrameExit.\n\nChange-Id: I0c594d9a2356a006a5ce8dfd41d307cf7c3704ba\n" }, { "commit": "1b743777e6b6cec3387b0ee347b6a8a03779c345", "tree": "036c42dbf10d8c75de1326e16406a12191c704ce", "parents": [ "cf69f8163d700be29a1732e7e229101c67a51803", "f9aac1e9f442c2486cd54f045d43e15791601205" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Apr 10 21:40:59 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 10 21:41:00 2015 +0000" }, "message": "Merge \"Revert \"[optimizing] Improve x86 shifts\"\"" }, { "commit": "f9aac1e9f442c2486cd54f045d43e15791601205", "tree": "2f3aa65a881020beeb6f4b3313b3366733bbf3f5", "parents": [ "222fcf96c9b73bbb739012575e7e413caf9348ec" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Apr 10 18:12:48 2015 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Apr 10 18:12:48 2015 +0000" }, "message": "Revert \"[optimizing] Improve x86 shifts\"\n\nThis reverts commit 222fcf96c9b73bbb739012575e7e413caf9348ec.\n\nReverting this CL as it is breaking a few tests (see http://build.chromium.org/p/client.art/builders/host-x86/builds/3251/steps/test%20optimizing/logs/stdio). Will investigate ASAP.\n\nChange-Id: Iddd8363e83a24aa49fbdf0f0c9dc12e63b4848de\n" }, { "commit": "27ef3177fb164b5e1a3b8a6fd43d25f3074e586d", "tree": "3717202ea300f60f6df3aa29922b98579b7958d5", "parents": [ "47317b430ee4f0094e58df45b557fe754b29b63b", "b19930c5cba3cf662dce5ee057fcc9829b4cbb9c" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Apr 10 16:15:07 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 10 16:15:07 2015 +0000" }, "message": "Merge \"Follow up of \"div/rem on x86 and x86_64\", to tidy up the code a little.\"" }, { "commit": "a5c19ce8d200d68a528f2ce0ebff989106c4a933", "tree": "4638a8d8e5b1562ec5ed05967490fec1ef7f0d17", "parents": [ "6d80318c382a3490ab605b46fa7cb22c5e823fec" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed Apr 01 12:51:05 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri Apr 10 12:08:31 2015 -0400" }, "message": "[optimizing] Improve x86 parallel moves/swaps\n\nAdd a new constructor to ScratchRegisterScope that will supply a\nregister if there is a free one, but not spill to force one. Use this\nto generated alternate code that doesn\u0027t use a temporary, as the\nspill/restore of a register generates extra instructions that aren\u0027t\nnecessary on x86.\n\nHere is the benefit for a 32 bit memory-to-memory exchange with no\nfree registers:\n\u003c 50 \t push eax\n\u003c 53 \t push ebx\n\u003c 8B44244C \t mov eax, [esp + 76]\n\u003c 8B5C246C \t mov ebx, [esp + 108]\n\u003c 8944246C \t mov [esp + 108], eax\n\u003c 895C244C \t mov [esp + 76], ebx\n\u003c 5B \t pop ebx\n\u003c 58 \t pop eax\n---\n\u003e FF742444 \t push [esp + 68]\n\u003e FF742468 \t push [esp + 104]\n\u003e 8F44244C \t pop [esp + 72]\n\u003e 8F442468 \t pop [esp + 100]\n\nAvoid using xchg instruction, as it is slow on smaller processors.\n\nChange-Id: Id29ee3abd998577baaee552d55d23e60ae0c7871\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "6d80318c382a3490ab605b46fa7cb22c5e823fec", "tree": "1fe89a424c91dae7adc07ebd620dce8297a0854e", "parents": [ "07d1f0d6c15f78e107c7b77e993b4d4d08ae1ad8", "222fcf96c9b73bbb739012575e7e413caf9348ec" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Apr 10 15:39:15 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 10 15:39:16 2015 +0000" }, "message": "Merge \"[optimizing] Improve x86 shifts\"" }, { "commit": "07d1f0d6c15f78e107c7b77e993b4d4d08ae1ad8", "tree": "34a48e22719bec06356788bd904b425dbe84284e", "parents": [ "4df30d988105f988dbcdb4f28263654e9ce20687", "55501ce0db57bccfa23b0226faffc964203701f9" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Apr 10 14:15:37 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 10 14:15:38 2015 +0000" }, "message": "Merge \"Optimizing x86: Fix VisitArraySet for FP value\"" }, { "commit": "222fcf96c9b73bbb739012575e7e413caf9348ec", "tree": "e0441bc484cc8f441685de49c931a030730a3701", "parents": [ "fcfea6324b2913621d5cb642d4315f22c4901368" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Mon Mar 30 14:13:30 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri Apr 10 09:33:52 2015 -0400" }, "message": "[optimizing] Improve x86 shifts\n\nSupport memory operands for integer shifts. Generate better code for\nlong shifts by constants.\n\nChange-Id: Icc92fa1b59cc280d4894af6f054e19b01977d5ce\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "b19930c5cba3cf662dce5ee057fcc9829b4cbb9c", "tree": "c226f8fffc4522b273072c516507083e2a77c505", "parents": [ "0f88e87085b7cf6544dadff3f555773966a6853e" ], "author": { "name": "Guillaume Sanchez", "email": "guillaumesa@google.com", "time": "Thu Apr 09 21:12:15 2015 +0100" }, "committer": { "name": "Guillaume Sanchez", "email": "guillaumesa@google.com", "time": "Fri Apr 10 10:28:02 2015 +0100" }, "message": "Follow up of \"div/rem on x86 and x86_64\", to tidy up the code a little.\n\nChange-Id: Ibf39cbc8ac1d773599d70be2cb1e941674b60f1d\n" }, { "commit": "55501ce0db57bccfa23b0226faffc964203701f9", "tree": "b9abd5dcbfd1ec5aff448e4a5d0ce051b27f0466", "parents": [ "1576be32be4a99a1cffdaaf209a3cd67e8b2f88a" ], "author": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Wed Apr 08 13:26:09 2015 +0600" }, "committer": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Fri Apr 10 14:50:43 2015 +0600" }, "message": "Optimizing x86: Fix VisitArraySet for FP value\n\nInstruction generator expects to see FP value in XMM register,\nso update location builder to follow this.\n\nChange-Id: Idca4bb5cdb59249c77fcc6f76cdfcaba47222b3d\nSigned-off-by: Serguei Katkov \u003cserguei.i.katkov@intel.com\u003e\n" }, { "commit": "917f0866f66d3465fa41ddcf9ab09eba2fa78dd3", "tree": "08bc03c6ac1a3d06672edaf4b74ce89db4c28da5", "parents": [ "467e33616472fe92051c75b65327aad87a639f3f", "c6b4dd8980350aaf250f0185f73e9c42ec17cd57" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Apr 09 17:27:31 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Apr 09 17:27:31 2015 +0000" }, "message": "Merge \"Implement CFI for Optimizing.\"" }, { "commit": "c6b4dd8980350aaf250f0185f73e9c42ec17cd57", "tree": "ef8d73e37abc04aecb430072a8bc463c73398fee", "parents": [ "dd97393aca1a3ff2abec4dc4f78d7724300971bc" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Apr 07 20:32:43 2015 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Apr 09 16:47:50 2015 +0100" }, "message": "Implement CFI for Optimizing.\n\nCFI is necessary for stack unwinding in gdb, lldb, and libunwind.\n\nChange-Id: I1a3480e3a4a99f48bf7e6e63c4e83a80cfee40a2\n" }, { "commit": "96159860fc6c4bf68a51a8a57941971f122685d6", "tree": "ef2465ab2d84b9076ab57ad239333910f68abd2b", "parents": [ "0c51da5db821493bcef4617ccab04ea367ecc444", "0f88e87085b7cf6544dadff3f555773966a6853e" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Apr 09 12:46:58 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Apr 09 12:46:59 2015 +0000" }, "message": "Merge \"Speedup div/rem by constants on x86 and x86_64\"" }, { "commit": "0f88e87085b7cf6544dadff3f555773966a6853e", "tree": "ea0ae17c712b995e258f1f749a1b8cd98b1fa34b", "parents": [ "c4bd0e6a7f4839ea99222f06979cc2369cb9bf10" ], "author": { "name": "Guillaume Sanchez", "email": "guillaumesa@google.com", "time": "Mon Mar 30 17:55:45 2015 +0100" }, "committer": { "name": "Guillaume Sanchez", "email": "guillaumesa@google.com", "time": "Thu Apr 09 12:24:10 2015 +0100" }, "message": "Speedup div/rem by constants on x86 and x86_64\n\nThis is done using the algorithms in Hacker\u0027s Delight chapter 10.\n\nChange-Id: I7bacefe10067569769ed31a1f7834f796fb41119\n" } ], "next": "65b798ea10dd716c1bb3dda029f9bf255435af72" }