)]}' { "log": [ { "commit": "77a48ae01bbc5b05ca009cf09e2fcb53e4c8ff23", "tree": "780c7d6bdee784c2f8248979de348491cfb63b34", "parents": [ "659562aaf133c41b8d90ec9216c07646f0f14362" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Sep 15 12:34:04 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Sep 15 12:34:04 2015 +0000" }, "message": "Revert \"Revert \"ART: Register allocation and runtime support for try/catch\"\"\n\nThe original CL triggered b/24084144 which has been fixed\nby Ib72e12a018437c404e82f7ad414554c66a4c6f8c.\n\nThis reverts commit 659562aaf133c41b8d90ec9216c07646f0f14362.\n\nChange-Id: Id8980436172457d0fcb276349c4405f7c4110a55\n" }, { "commit": "659562aaf133c41b8d90ec9216c07646f0f14362", "tree": "be1beae390262bf2f5a17bfa44de93081a849d07", "parents": [ "b022fa1300e6d78639b3b910af0cf85c43df44bb" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 14 21:26:33 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 14 21:26:33 2015 +0000" }, "message": "Revert \"ART: Register allocation and runtime support for try/catch\"\n\nBreaks libcore test org.apache.harmony.security.tests.java.security.KeyStorePrivateKeyEntryTest#testGetCertificateChain. Need to investigate.\n\nThis reverts commit b022fa1300e6d78639b3b910af0cf85c43df44bb.\n\nChange-Id: Ib24d3a80064d963d273e557a93469c95f37b1f6f\n" }, { "commit": "b022fa1300e6d78639b3b910af0cf85c43df44bb", "tree": "780c7d6bdee784c2f8248979de348491cfb63b34", "parents": [ "e481c006e8b055a31d9c7cff27f4145e57e3c113" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Aug 20 17:47:48 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Sep 14 20:42:58 2015 +0100" }, "message": "ART: Register allocation and runtime support for try/catch\n\nThis patch completes a series of CLs that add support for try/catch\nin the Optimizing compiler. With it, Optimizing can compile all\nmethods containing try/catch, provided they don\u0027t contain catch loops.\nFuture work will focus on improving performance of the generated code.\n\nSsaLivenessAnalysis was updated to propagate liveness information of\ninstructions live at catch blocks, and to keep location information on\ninstructions which may be caught by catch phis.\n\nRegisterAllocator was extended to spill values used after catch, and\nto allocate spill slots for catch phis. Catch phis generated for the\nsame vreg share a spill slot as the raw value must be the same.\n\nLocation builders and slow paths were updated to reflect the fact that\nthrowing an exception may not lead to escaping the method.\n\nInstruction code generators are forbidden from using of implicit null\nchecks in try blocks as live registers need to be saved before handing\nover to the runtime.\n\nCodeGenerator emits a stack map for each catch block, storing locations\nof catch phis. CodeInfo and StackMapStream recognize this new type of\nstack map and store them separate from other stack maps to avoid dex_pc\nconflicts.\n\nAfter having found the target catch block to deliver an exception to,\nQuickExceptionHandler looks up the dex register maps at the throwing\ninstruction and the catch block and copies the values over to their\nrespective locations.\n\nThe runtime-support approach was selected because it allows for the\nbest performance in the normal control-flow path, since no propagation\nof catch phi values is necessary until the exception is thrown. In\naddition, it also greatly simplifies the register allocation phase.\n\nConstantHoisting was removed from LICMTest because it instantiated\n(now abstract) HConstant and was bogus anyway (constants are always in\nthe entry block).\n\nChange-Id: Ie31038ad8e3ee0c13a5bbbbaf5f0b3e532310e4e\n" }, { "commit": "9af47e27674e70e7f82315d39de5bc659c4e1b83", "tree": "e1cf3d95c94721cf9e411e544f37105b684d7666", "parents": [ "35717f8cfb6c1de5c89b2f9b990a050b2cbab66f", "6058455d486219994921b63a2d774dc9908415a2" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 14 11:43:25 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Sep 14 11:43:25 2015 +0000" }, "message": "Merge \"Optimizing: Tag basic block allocations with their source.\"" }, { "commit": "2d06e08d25bbf8eff1de945736a60810009e59ad", "tree": "27c10f4fc30a85947ac0e3189b115035107a7ff0", "parents": [ "e2cb7f297dfeb1a6e19c3b8d45b742427054fa56", "501fd635a557645ab05f893c56e1f358e21bab82" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Sep 11 17:50:01 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Sep 11 17:50:01 2015 +0000" }, "message": "Merge \"ART: Fix Quick-style LR vs PC core spill mask bug\"" }, { "commit": "619552b8007c157ca494f1b6355c0a388456b5b1", "tree": "42d2917b3b3e81bfd14120d0209e99e9f3b420ff", "parents": [ "1d76bfe710629a4f18bb79a9188f6eb4d9b2e4f4", "9ee23f4273efed8d6378f6ad8e63c65e30a17139" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Sep 11 13:20:10 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Sep 11 13:20:10 2015 +0000" }, "message": "Merge \"ARM/ARM64: Intrinsics - numberOfTrailingZeros, rotateLeft, rotateRight\"" }, { "commit": "9ee23f4273efed8d6378f6ad8e63c65e30a17139", "tree": "3b1bfb8a6260a57ccb2f025fcdc457464714701e", "parents": [ "62ba40149be3d1c65e4db1f455822a585149d32f" ], "author": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Thu Jul 23 10:44:35 2015 +0100" }, "committer": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Fri Sep 11 09:51:58 2015 +0100" }, "message": "ARM/ARM64: Intrinsics - numberOfTrailingZeros, rotateLeft, rotateRight\n\nChange-Id: I2a07c279756ee804fb7c129416bdc4a3962e93ed\n" }, { "commit": "501fd635a557645ab05f893c56e1f358e21bab82", "tree": "828ad27a68033d78fb858dcf031c36a627659165", "parents": [ "010c7fd437932e0132fc4b44de6274480573ff30" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Sep 10 16:11:06 2015 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Sep 10 17:01:22 2015 -0700" }, "message": "ART: Fix Quick-style LR vs PC core spill mask bug\n\nIt\u0027s always been a bug that Quick marked PC as spilled instead of\nLR. The root cause was a mutation of the spill mask at frame exit,\nwhen LR is being restored into PC to return. A local should have\nbeen used to keep the actual spill mask safe and sound.\n\nThis has only worked because nobody ever uses LR, even after long\njumps for exception dispatch. However, single-frame deoptimization\nneeds this to work, and I\u0027d rather fix this than being forced to\nhave machine-specific fixups.\n\nAlso fix in optimizing, and bump the oat version.\n\nChange-Id: Ib032a533408bf464097fc96dcbfc5b6a68bf59a1\n" }, { "commit": "010c7fd437932e0132fc4b44de6274480573ff30", "tree": "36fed0c2bac11700a1d1a6ef83c5843b916379fb", "parents": [ "0e21e01e2283eed58332ce1ac317037c399718a3", "d14c59564870c910bdc823081f0ed1101f599231" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Sep 10 17:33:44 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Sep 10 17:33:44 2015 +0000" }, "message": "Merge \"Induction variable range analysis.\"" }, { "commit": "d14c59564870c910bdc823081f0ed1101f599231", "tree": "36a831f8c786823129bebbf03a4ca48ff6ed3c23", "parents": [ "e6576390f957c82c2aede438834d028066757368" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Sep 08 15:25:15 2015 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Sep 10 10:16:04 2015 -0700" }, "message": "Induction variable range analysis.\n\nRationale: by computing an upper bound on the trip count of each\n loop after induction var analysis has completed, a\n\t simple range analysis yields lower and upper bounds on\n\t all induced expressions in a loop; this analysis\n\t plugs directly into BCE (follow-up CL).\n\nChange-Id: I46a3fe48721ca372547199b39a3498c47992597d\n" }, { "commit": "b9c79928ff774c8d385ef2db169b447833207a44", "tree": "d9e5e34f1e227fa422e89e6754a7a63e605d45af", "parents": [ "402ae2dc9b94df62859bd9825e5c00f298dc71b2", "bfb5ba90cd6425ce49c2125a87e3b12222cc2601" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Sep 09 16:39:16 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Sep 09 16:39:16 2015 +0000" }, "message": "Merge \"Revert \"Revert \"Do a second check for testing intrinsic types.\"\"\"" }, { "commit": "402ae2dc9b94df62859bd9825e5c00f298dc71b2", "tree": "fb63090ac4387af93ad049105b28dbd1885fa0db", "parents": [ "67c5d28da9b0c40343e8a8f68fea4dc86ff554d1", "3ecfd65143d95bd7c6cbe4f58c33af517d3761e0" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 09 13:16:59 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Sep 09 13:16:59 2015 +0000" }, "message": "Merge \"Add dex_pc to all HInstructions in builder.\"" }, { "commit": "3ecfd65143d95bd7c6cbe4f58c33af517d3761e0", "tree": "62b3194f0ac2814541170f970996b0a35511e78e", "parents": [ "426514cada274714244290d6447d9f62dc3394bf" ], "author": { "name": "Yevgeny Rouban", "email": "yevgeny.y.rouban@intel.com", "time": "Mon Sep 07 17:57:00 2015 +0600" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 09 14:12:13 2015 +0100" }, "message": "Add dex_pc to all HInstructions in builder.\n\nOptimizing compiler generates minimum debug line info that\nis built using the dex_pc information about suspend points.\nThis is not enough for performance and debugging needs.\n\nThis patch makes all HInstructions contain\ndex_pc and all allocations in the builder define this value.\n\nChange-Id: I1d14aefe075189b7b1b41b4384c3499474c19afc\nSigned-off-by: Yevgeny Rouban \u003cyevgeny.y.rouban@intel.com\u003e\nSigned-off-by: Serdjuk, Nikolay Y \u003cnikolay.y.serdjuk@intel.com\u003e\n" }, { "commit": "bfb5ba90cd6425ce49c2125a87e3b12222cc2601", "tree": "6280171d451642dc70c87894d553f76c6c12db0a", "parents": [ "e6576390f957c82c2aede438834d028066757368" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Sep 01 15:45:02 2015 +0000" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Sep 08 20:36:09 2015 -0700" }, "message": "Revert \"Revert \"Do a second check for testing intrinsic types.\"\"\n\nThis reverts commit a14b9fef395b94fa9a32147862c198fe7c22e3d7.\n\nWhen an intrinsic with invoke-type virtual is recognized, replace\nthe instruction with a new HInvokeStaticOrDirect.\n\nMinimal update for dex-cache rework. Fix includes.\n\nChange-Id: I1c8e735a2fa7cda4419f76ca0717125ef236d332\n" }, { "commit": "0616ae081e648f4b9b64b33e2624a943c5fce977", "tree": "20db99d802277cce68f88eda918ae7646383ff14", "parents": [ "e6576390f957c82c2aede438834d028066757368" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri Apr 17 12:49:27 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Sep 08 17:01:05 2015 -0400" }, "message": "[optimizing] Add support for x86 constant area\n\nUse the Quick trick of finding the address of the method by calling the\nnext instruction and popping the return address into a register. This\ntrick is used because of the lack of PC-relative addressing in 32 bit\nmode on the X86.\n\nAdd a HX86ComputeBaseMethodAddress instruction to trigger generation\nof the method address, which is referenced by instructions needing\naccess to the constant area.\n\nAdd a HX86LoadFromConstantTable instruction that takes a\nHX86ComputeBaseMethodAddress and a HConstant that will be used to load\nthe value when needed.\n\nChange Add/Sub/Mul/Div to detect a HX86LoadFromConstantTable right hand\nside, and generate code that directly references the constant area.\nOther uses will be added later.\n\nChange the inputs to HReturn and HInvoke(s), replacing the FP constants\nwith HX86LoadFromConstantTable instead. This allows values to be\nloaded from the constant area into the right location.\n\nPort the X86_64 assembler constant area handling to the X86.\n\nUse the new per-backend optimization framework to do this conversion.\n\nChange-Id: I6d235a72238262e4f9ec0f3c88319a187f865932\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "6058455d486219994921b63a2d774dc9908415a2", "tree": "3d205227f3ff54cd3a50bc5c0e7cb3ad6c175b86", "parents": [ "637ee0b9c10ab7732a7ee7b8335f3fff4ac1549c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 03 13:35:12 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 08 18:09:49 2015 +0100" }, "message": "Optimizing: Tag basic block allocations with their source.\n\nReplace GrowableArray with ArenaVector in HBasicBlock and,\nto track the source of allocations, assign one new and two\nQuick\u0027s arena allocation types to these vectors. Rename\nkArenaAllocSuccessor to kArenaAllocSuccessors.\n\nBug: 23736311\nChange-Id: Ib52e51698890675bde61f007fe6039338cf1a025\n" }, { "commit": "471a2034171346dda4539b985b95aa6370531171", "tree": "9f04b5dd3169909953ac4e38c106287f12e0bbef", "parents": [ "6b79454092582bea4a72872d04e4bc9f0a48a4b8" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Sep 04 18:22:11 2015 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Sep 07 10:35:55 2015 -0700" }, "message": "Simplify loop invariant operations during induction analysis.\n\nRationale:\nSaves some memory for nodes that are not really required, and\nyields slightly more readable debugging strings.\n\nChange-Id: I95b64b48869699137b5d49e26eb20091e264de7a\n" }, { "commit": "6b79454092582bea4a72872d04e4bc9f0a48a4b8", "tree": "7f231ee88089dc797d1dc570efd064f517676670", "parents": [ "5495a72a8718c2b3156603158a932a8c4b403de5", "e609b7cf9996389e6e693f149489737436172a2c" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Sat Sep 05 00:25:41 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Sat Sep 05 00:25:41 2015 +0000" }, "message": "Merge \"Further development of induction variable analysis.\"" }, { "commit": "e609b7cf9996389e6e693f149489737436172a2c", "tree": "14f1c83ea83d1b9133272af1dc6f3ad314f1fef3", "parents": [ "fb32aca04cc1b5f5e8325d79664882f25f253881" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Aug 27 13:46:58 2015 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Sep 04 17:03:39 2015 -0700" }, "message": "Further development of induction variable analysis.\n\nVarious improvements:\n(1) Introduced period sequences.\n(2) Extended all transfer functions to deal with all cases;\n also refactored these to read more compactly.\n(3) Improved debugging output for constants for readability.\n(4) Used direct pointer in mappings for clarify.\n(5) Several induction info \"constructors\" for readability.\n(6) Various other changes suggested in earlier code reviews.\n\nChange-Id: I9d5381f1676b63d30cea6f5e304d4b7bda7acb96\n" }, { "commit": "957fb8930766ae422568e7b1b816159a9e9bc18c", "tree": "849a611f978656f1c85182402e1ef2c8ca50c5e6", "parents": [ "68ffda887e35f35e978f2f607b7a91e44a5e1969", "05792b98980741111b4d0a24d68cff2a8e070a3a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Sep 04 10:34:04 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Sep 04 10:34:04 2015 +0000" }, "message": "Merge \"ART: Move DexCache arrays to native.\"" }, { "commit": "897ce64153e4758663e464fb5fb339f9a7b496c8", "tree": "5685e4df884ac806e2b5cdfeabed4420015548c4", "parents": [ "0526f5af91cc6b986e0b439577de0b93f9e5354c", "736b560f2d2c89b63dc895888c671b5519afa4c8" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Thu Sep 03 22:11:02 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Sep 03 22:11:02 2015 +0000" }, "message": "Merge \"Reduce how often we call FindDexCache\"" }, { "commit": "736b560f2d2c89b63dc895888c671b5519afa4c8", "tree": "d5aee7ac36f458a5f6e6d75fceb19f8963a71db5", "parents": [ "fe3879e6011f629d0dd6b04fab00b9496bd4ea08" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Wed Sep 02 14:54:11 2015 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Thu Sep 03 13:27:19 2015 -0700" }, "message": "Reduce how often we call FindDexCache\n\nBefore host boot.oat -j4 optimizing compile:\nreal 1m17.792s\nuser 3m26.140s\nsys 0m8.340s\n\nAfter:\nreal 1m12.324s\nuser 3m22.718s\nsys 0m8.320s\n\nChange-Id: If18e9e79e06cdf1676692e5efacb682bf93889c3\n" }, { "commit": "05792b98980741111b4d0a24d68cff2a8e070a3a", "tree": "bad79a387bcbdaefc87c07b388099960ca9caff3", "parents": [ "c26b4512a01d46756683a4f5e186a0b7f397f251" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Aug 03 11:56:49 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 03 17:30:57 2015 +0100" }, "message": "ART: Move DexCache arrays to native.\n\nThis CL has a companion CL in libcore/\n https://android-review.googlesource.com/162985\n\nChange-Id: Icbc9e20ad1b565e603195b12714762bb446515fa\n" }, { "commit": "2e8e4ff1b7d78a236c238651dbc0b58f33966c0a", "tree": "7b83b227bbaa36465f313542bba9206ac631a8fd", "parents": [ "f7432c60a1d6385ff3dea9b44305007b2bcc1ed1", "145acc5361deb769eed998f057bc23abaef6e116" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 03 13:33:49 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Sep 03 13:33:49 2015 +0000" }, "message": "Merge \"Revert \"Optimizing: Tag basic block allocations with their source.\"\"" }, { "commit": "145acc5361deb769eed998f057bc23abaef6e116", "tree": "3d66a0b44e1ac927156eec6e6488de5fd52b982b", "parents": [ "91e11c0c840193c6822e66846020b6647de243d5" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 03 13:33:25 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 03 13:33:25 2015 +0000" }, "message": "Revert \"Optimizing: Tag basic block allocations with their source.\"\n\nReverting so that we can have more discussion about the STL API.\n\nThis reverts commit 91e11c0c840193c6822e66846020b6647de243d5.\n\nChange-Id: I187fe52f2c16b6e7c5c9d49c42921eb6c7063dba\n" }, { "commit": "f7432c60a1d6385ff3dea9b44305007b2bcc1ed1", "tree": "52e509a6343740b629cb75495deadbd8ad384713", "parents": [ "86d92066df8323d5ee7ac7e9c061a79343a82fd8", "91e11c0c840193c6822e66846020b6647de243d5" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 03 13:21:07 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Sep 03 13:21:07 2015 +0000" }, "message": "Merge \"Optimizing: Tag basic block allocations with their source.\"" }, { "commit": "91e11c0c840193c6822e66846020b6647de243d5", "tree": "0c5398ef59c464c1848afd0113c74b6aeb75cf42", "parents": [ "f9f6441c665b5ff9004d3ed55014f46d416fb1bb" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Sep 02 17:03:22 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 03 13:09:37 2015 +0100" }, "message": "Optimizing: Tag basic block allocations with their source.\n\nReplace GrowableArray with ArenaVector in HBasicBlock and,\nto track the source of allocations, assign one new and two\nQuick\u0027s arena allocation types to these vectors. Rename\nkArenaAllocSuccessor to kArenaAllocSuccessors.\n\nBug: 23736311\nChange-Id: I984aef6e615ae2380a532f5c6726af21015f43f5\n" }, { "commit": "2a7c1ef95c850abae915b3a59fbafa87e6833967", "tree": "7b83b227bbaa36465f313542bba9206ac631a8fd", "parents": [ "6d889e0e5004ae4d548e6c623a1218f010d1e89b" ], "author": { "name": "Yevgeny Rouban", "email": "yevgeny.y.rouban@intel.com", "time": "Wed Jul 22 18:36:24 2015 +0600" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Sep 03 10:38:41 2015 +0100" }, "message": "Add more dwarf debug line info for Optimized methods.\n\nOptimizing compiler generates minimum debug line info that\nis built using the dex_pc information about suspend points.\nThis is not enough for performance and debugging needs.\n\nThis CL generates additional debug line information for\ninstructions which have known dex_pc and it ensures that\nwhole call sites are mapped (as opposed to suspend points\nwhich map only one instruction past the function call).\n\nBug: 23157336\nChange-Id: I9f2b1c2038e3560847c175b8121cf9496b8b58fa\nSigned-off-by: Yevgeny Rouban \u003cyevgeny.y.rouban@intel.com\u003e\n" }, { "commit": "f9f6441c665b5ff9004d3ed55014f46d416fb1bb", "tree": "3d66a0b44e1ac927156eec6e6488de5fd52b982b", "parents": [ "fe3879e6011f629d0dd6b04fab00b9496bd4ea08" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Sep 02 14:05:49 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Sep 02 20:16:58 2015 +0100" }, "message": "Optimizing: Tag Arena allocations with their source.\n\nThis adds the ability to track where we allocate memory\nwhen the kArenaAllocatorCountAllocations flag is turned on.\n\nAlso move some allocations from native heap to the Arena\nand remove some unnecessary utilities.\n\nBug: 23736311\nChange-Id: I1aaef3fd405d1de444fe9e618b1ce7ecef07ade3\n" }, { "commit": "51995e135794e01a7aecccfed81dc00a737e24bd", "tree": "34178cbd348cc7a6db0b2b49c3a438a0b015a78c", "parents": [ "5c3601758c7b83bf148bd088c39bc6feddbfbac3", "5a6cc49ed4f36dd11d6ec1590857b884ad8da6ab" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Sep 01 15:43:11 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Sep 01 15:43:11 2015 +0000" }, "message": "Merge \"SlowPath: Remove the use of Locations in the SlowPath constructors.\"" }, { "commit": "5c3601758c7b83bf148bd088c39bc6feddbfbac3", "tree": "122eb068bb8ca4a854b06a2f24ab953a02676c84", "parents": [ "ef28f68c1bdd7810db3a400dca8a1e2d23f6704a", "4ab02352db4051d590b793f34d166a0b5c633c4a" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Sep 01 15:35:47 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Sep 01 15:35:47 2015 +0000" }, "message": "Merge \"Use CodeGenerator::RecordPcInfo instead of SlowPathCode::RecordPcInfo.\"" }, { "commit": "a63f0d47edbcbe13a23411851a9c6e81f9342cc2", "tree": "db356acc0a4c4b211518b20529c7fc864dcabde9", "parents": [ "46637e6ad75751fa1db283aee160342dc7e2fd0f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 01 13:36:35 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 01 15:20:30 2015 +0100" }, "message": "Optimizing: Improve String.equals() thumb intrinsic.\n\nUse SUBS for updating the loop counter and setting the loop\nexit condition, so that we don\u0027t need to pre-calculate the\nbound but still keep the same number of instructions in the\nloop.\n\nThis reduces the size of boot.oat on Nexus 5 by 8KiB (when\ncompiled with Optimizing which is not the default yet).\n\nChange-Id: I87d5a128e5e67f4ad177b71c28662d1367170a10\n" }, { "commit": "46637e6ad75751fa1db283aee160342dc7e2fd0f", "tree": "0211c79512e5f876194963d1734140d9d023e79c", "parents": [ "d36fcc612036009d609795ad0b5b07a7aa980692", "73cf0fb75de2a449ce4fe329b5f1fb42eef1372f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 01 10:58:32 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Sep 01 10:58:32 2015 +0000" }, "message": "Merge \"ART: Add 16-bit Thumb2 ROR, NEGS and CMP for high registers.\"" }, { "commit": "73cf0fb75de2a449ce4fe329b5f1fb42eef1372f", "tree": "d5b0957414c355254babfcd1a797ce87a0eb85a2", "parents": [ "9ee5d6cdc14ac94b64ea1961bf221bad48746929" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 30 15:07:22 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 01 10:10:37 2015 +0100" }, "message": "ART: Add 16-bit Thumb2 ROR, NEGS and CMP for high registers.\n\nAlso clean up the usage of set_cc flag. Define a SetCc\nenumeration that specifies whether to set or keep condition\ncodes or whether we don\u0027t care and a 16-bit instruction\nshould be selected if one exists.\n\nThis reduces the size of Nexus 5 boot.oat by 44KiB (when\ncompiled with Optimizing which is not the default yet).\n\nChange-Id: I047072dc197ea678bf2019c01bcb28943fa9b604\n" }, { "commit": "f92d753fe3c43f7988d031c7c7e2c9a399f18103", "tree": "4a73e35ad6d53836282d5c03eb8b466f2023f8d8", "parents": [ "5899810257a6c1bd2b252cfc46c78e2c9bea3c52", "673ed3d8aedc5462a47ded827c99f35d46525457" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Aug 31 20:37:43 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Aug 31 20:37:43 2015 +0000" }, "message": "Merge \"Revert \"Revert \"Change dex caches to be weak roots\"\"\"" }, { "commit": "673ed3d8aedc5462a47ded827c99f35d46525457", "tree": "83de4690228c9f7772c48c770c5e2e5ba2dac6fe", "parents": [ "ce209462cc1a7ce235e5ac0d0e6db6b402f73441" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Fri Aug 28 14:56:43 2015 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Aug 31 10:58:31 2015 -0700" }, "message": "Revert \"Revert \"Change dex caches to be weak roots\"\"\n\nThis reverts commit 81a9087f0df0518c39405b7d18ba5858a6d8b77b.\n\nBoot.oat creation time goes from 4.7s to 4.9s on host due to extra\nlocking. Will try to improve this in another CL.\n\nBug: 23602225\nBug: 22720414\n\nChange-Id: I7e25b75cfb63faa196c7b0f60e46cce50bf12021\n" }, { "commit": "40abca79b09107f33d9a44d5ce3620b5ef45fe44", "tree": "5b6f6b6fc1cc7f470a4cf6ca7929f5481e2a0cac", "parents": [ "88b52d2aecdbc7242385ba1f8a2c4d6960ee07fc", "aae9e66a727756bc965121a60ffcef89ed370e6c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Sun Aug 30 16:57:53 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Sun Aug 30 16:57:53 2015 +0000" }, "message": "Merge \"ART: Fix the simplifier for NEGATE add/sub\"" }, { "commit": "ed15000a5099f5e230c8ded5ac75692bae272650", "tree": "be78bce04c0c9611abc221fd71d9251d05e35d2b", "parents": [ "12b7025d0393a2ce15410df6019844e59b77314d" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Fri Aug 28 11:16:54 2015 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Fri Aug 28 13:31:51 2015 -0700" }, "message": "Fix some HandleScope bugs and add corresponding checks\n\nSome places were creating or destroying handle scopes without holding\nthe mutator lock. This can cause GC crashes if thread roots are being\nmarked or hprof dumps to also fail.\n\nAlso added checks to catch some of these errors.\n\nBug: 23468617\nChange-Id: I1a2d615923484cfc25014967656775c445aa3f1f\n" }, { "commit": "9393c69c2c6b63b6c8ec36327273ca40d3e45e6c", "tree": "17ede5868125c12585c9747c05aa2164a75bd1d8", "parents": [ "f0f73895c06a1ff157d7915b04c41f93a52936c2" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Aug 28 10:56:38 2015 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Aug 28 10:56:38 2015 -0700" }, "message": "ART: Add mising ScopedObjectAccess in ref type propagation\n\nAdding handles requires the mutator lock. Annotalysis doesn\u0027t help,\nas constructors aren\u0027t checked.\n\nBug: 23468617\nChange-Id: I79510d105580dacdec965a5b1693c390fdff275a\n" }, { "commit": "81a9087f0df0518c39405b7d18ba5858a6d8b77b", "tree": "f4936654805b4d84540bd909095e8bbf69795bfd", "parents": [ "f86a0859684c0f8964da4cbe75d49df8f832e85b" ], "author": { "name": "Brian Carlstrom", "email": "bdc@google.com", "time": "Fri Aug 28 09:07:14 2015 -0700" }, "committer": { "name": "Brian Carlstrom", "email": "bdc@google.com", "time": "Fri Aug 28 09:07:14 2015 -0700" }, "message": "Revert \"Change dex caches to be weak roots\"\n\nThis reverts commit 3ae6b1d42523bb2a0ddb5edff1aaf05b592f28f4.\n" }, { "commit": "5a6cc49ed4f36dd11d6ec1590857b884ad8da6ab", "tree": "68f373808011cca47abf3bf09f5de6d8c9bca4b4", "parents": [ "75d4e58decf3f0be8814039df57456368e4d5475" ], "author": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Thu Aug 13 15:20:25 2015 +0100" }, "committer": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Thu Aug 27 18:21:03 2015 +0100" }, "message": "SlowPath: Remove the use of Locations in the SlowPath constructors.\n\nThe main motivation is that using locations in the SlowPath constructors\nties us to creating the SlowPaths after register allocation, since before\nthe locations are invalid.\n\nA later patch of the series will be moving the SlowPath creation to the\nLocationsBuilder visitors. This will enable us to add more checking as\nwell as consider sharing multiple SlowPaths of the same type.\n\nChange-Id: I7e96dcc2b5586d15153c942373e9281ecfe013f0\nSigned-off-by: Serban Constantinescu \u003cserban.constantinescu@linaro.org\u003e\n" }, { "commit": "706ea6a0294ef8bc3def050142c548c082fa8e30", "tree": "2a6737a452fe6059e47aefda8ec5b9778ff2d582", "parents": [ "772cc4a2d4f978888d1b1e5a78c1c16a108260ed", "0760a81257fa427646c309500d603194009265ef" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Aug 27 16:04:21 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Aug 27 16:04:21 2015 +0000" }, "message": "Merge \"ART: Propagate verifier failure types to the compilers\"" }, { "commit": "4ab02352db4051d590b793f34d166a0b5c633c4a", "tree": "33082d241095549c8f6497f1409483399d6ae303", "parents": [ "772cc4a2d4f978888d1b1e5a78c1c16a108260ed" ], "author": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Wed Aug 12 11:52:22 2015 +0100" }, "committer": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Thu Aug 27 14:39:28 2015 +0100" }, "message": "Use CodeGenerator::RecordPcInfo instead of SlowPathCode::RecordPcInfo.\n\nPart of a clean-up and refactoring series. SlowPathCode::RecordPcInfo\nis currently just a wrapper around CodGenerator::RecordPcInfo.\n\nChange-Id: Iffabef4ef37c365051130bf98a6aa6dc0a0fb254\nSigned-off-by: Serban Constantinescu \u003cserban.constantinescu@linaro.org\u003e\n" }, { "commit": "aae9e66a727756bc965121a60ffcef89ed370e6c", "tree": "871d86b73428f998e1099135118c515e3f623fb4", "parents": [ "772cc4a2d4f978888d1b1e5a78c1c16a108260ed" ], "author": { "name": "Serdjuk, Nikolay Y", "email": "nikolay.y.serdjuk@intel.com", "time": "Fri Aug 21 13:26:34 2015 +0600" }, "committer": { "name": "Serdjuk, Nikolay Y", "email": "nikolay.y.serdjuk@intel.com", "time": "Thu Aug 27 10:05:38 2015 +0600" }, "message": "ART: Fix the simplifier for NEGATE add/sub\n\nInstruction simplifier for negate add/sub should not proceed\nwith floats because that might cause the incorrect behavior\nwith signed zero.\n\nChange-Id: I4970694a2b265a3577cde34fee9cd3a437358c0f\n" }, { "commit": "772cc4a2d4f978888d1b1e5a78c1c16a108260ed", "tree": "b8f29167cb5fb7ca7709a0d305cfd7e6018d5b2a", "parents": [ "7d6c95a7e5d431fd1b9ad49823535073325c699a", "3ae6b1d42523bb2a0ddb5edff1aaf05b592f28f4" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Thu Aug 27 02:47:40 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Aug 27 02:47:40 2015 +0000" }, "message": "Merge \"Change dex caches to be weak roots\"" }, { "commit": "0760a81257fa427646c309500d603194009265ef", "tree": "9754389d2d488f41459c76d4568dd40dd41955ae", "parents": [ "7d6c95a7e5d431fd1b9ad49823535073325c699a" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Aug 26 17:12:51 2015 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Aug 26 19:08:03 2015 -0700" }, "message": "ART: Propagate verifier failure types to the compilers\n\nAdd a bit-set encoding of seen failure types to the verifier and\nmake it available. Store this in VerifiedMethod, so that compilers\ncan inspect it and make choices based on failures. Rewrite the\ncurrent punting of runtime-throw errors to be at the compiler-driver\nlevel.\n\nBug: 23502994\nChange-Id: I1cfc7cbdf2aec1f14ba18f0169e432ba4ae16883\n" }, { "commit": "30efb4e00c2a9aa318d44486b5eacaa7178d20ef", "tree": "90c4e84b5473def182fa443191ba8de80fa62d63", "parents": [ "574d75597013cb12a961c0d4365d1618d8ef6977" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Jul 30 12:14:31 2015 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Aug 26 17:20:28 2015 +0000" }, "message": "Induction variable analysis (with unit tests).\n\nRationale:\nInduction variable analysis forms the basis of a wide\nvariety of compiler optimizations. This implementation\nfinds induction variables using the elegant SSA-based\nalgorithm defined by [Gerlek et al.].\n\nChange-Id: I79b8dce33ffb8b283c179699a8dff5bd196f75b2\n" }, { "commit": "9ee5d6cdc14ac94b64ea1961bf221bad48746929", "tree": "25575bae2832f0879db55214bab64905ab90e3e2", "parents": [ "d71c89f46ad60713494d537001d4b370ce355885", "aa50d3a01a4137cd89c152be5487fed23683d0ff" ], "author": { "name": "Sebastien Hertz", "email": "shertz@google.com", "time": "Wed Aug 26 06:04:50 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 26 06:04:50 2015 +0000" }, "message": "Merge \"Add missing field init in constructors\"" }, { "commit": "3ae6b1d42523bb2a0ddb5edff1aaf05b592f28f4", "tree": "9ae990956db3d2d5970fb15bf264aeeb73e2bfe0", "parents": [ "dcff51a0079c5e3abaf0335f7cb9a3dd44044456" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Fri Aug 14 14:03:10 2015 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Tue Aug 25 18:00:47 2015 -0700" }, "message": "Change dex caches to be weak roots\n\nChanged dex caches to be weak roots. This is necessary for class\nunloading since the resolved types arrays would keep classes live\nwhen they should be unloaded. Currently the dex caches still don\u0027t\nget freed due to the class loader roots.\n\nAlso deleted some unused functionality in image writer.\n\nBug: 22720414\nChange-Id: If22cb3cad7e3baabc8158a77d7f20799faf4c341\n" }, { "commit": "d9cb68e3212d31d61445fb7e8446f68991720009", "tree": "8738656ba16c292c1f1fd022337817c58ded2136", "parents": [ "9dc601eb65da0cd5f53172699dacd6e5dd38ab44" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Aug 25 13:52:43 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Aug 25 17:35:16 2015 +0100" }, "message": "ART: Add (Fpu)RegHigh stack map location kinds\n\nWhen running Optimized code on 64-bit, high value of vreg pair may be\nstored in the high 32 bits of a CPU register. This is not reflected in\nstack maps which would encode both the low and high vreg as\nkInRegister with the same register number, making it indistinguishable\nfrom two non-wide vregs with the same value in the lower 32 bits.\n\nDeoptimization deals with this by running the verifier and thus\nobtaining vreg pair information, but this would be too slow for try/\ncatch. This patch therefore adds two new stack map location kinds:\nkInRegisterHigh and kInFpuRegisterHigh to differentiate between the\ntwo cases.\n\nNote that this also applies to floating-point registers on x86.\n\nChange-Id: I15092323e56a661673e77bee1f0fca4261374732\n" }, { "commit": "aa50d3a01a4137cd89c152be5487fed23683d0ff", "tree": "a676638c9d43eb519214445173c1a66ba38355ac", "parents": [ "f0170ded84fbcd3d9152cdbcf9ffbf74c71b03ba" ], "author": { "name": "Sebastien Hertz", "email": "shertz@google.com", "time": "Tue Aug 25 15:25:41 2015 +0200" }, "committer": { "name": "Sebastien Hertz", "email": "shertz@google.com", "time": "Tue Aug 25 15:56:54 2015 +0200" }, "message": "Add missing field init in constructors\n\nAdds missing field initializations detected by Eclipse IDE.\n\nChange-Id: I5f2f32bcccb12545fc9f0b42fcec74a23dc81376\n" }, { "commit": "dcff51a0079c5e3abaf0335f7cb9a3dd44044456", "tree": "fbd617b837e928e8b272d80622eeaffa901a2f2d", "parents": [ "f7b12e7ae8f481f3fab27d1a17bded4b4f2ce423", "a14b9fef395b94fa9a32147862c198fe7c22e3d7" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Aug 24 22:50:51 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Aug 24 22:50:51 2015 +0000" }, "message": "Merge \"Revert \"Do a second check for testing intrinsic types.\"\"" }, { "commit": "a14b9fef395b94fa9a32147862c198fe7c22e3d7", "tree": "49b3183cd1d25b6a5cfb31e0d16678deb023c1e8", "parents": [ "4daa0b4c21eee46362b5114fb2c3800c0c7e7a36" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Aug 24 22:49:59 2015 +0000" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Aug 24 22:49:59 2015 +0000" }, "message": "Revert \"Do a second check for testing intrinsic types.\"\n\nThis reverts commit 4daa0b4c21eee46362b5114fb2c3800c0c7e7a36.\n\nIf the intrinsic has a slow-path, like charAt, the slow-path logic will complain as it only understands direct slow-paths, not virtual calls.\n\nWe should either override that decision in the slow-path, or replace the HInvokeVirtual when we\u0027re overriding the intrinsic choice.\n\nBug: 23475673\nChange-Id: If55fbc8c82d52e0e7a7aec2674ae2bd2b74b5c77\n" }, { "commit": "3979bdf446b425e69171db58789819e26542f79d", "tree": "1c526eca980fec73f082185ddae98ddbbccdb21e", "parents": [ "e75ffdfe3fbd4253bf1ffd48350b7f6472500c30", "2e92bc2ba2446525a07f5172d1cd30ab49d26cd6" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Aug 21 14:25:23 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Aug 21 14:25:23 2015 +0000" }, "message": "Merge \"Fix TrySplitNonPairOrUnalignedPairIntervalAt.\"" }, { "commit": "2e92bc2ba2446525a07f5172d1cd30ab49d26cd6", "tree": "18ea6a6719555fee1b9bc4eb8f40f8850dd36714", "parents": [ "cbddb90e515c30983094378e316e446b9edca5d6" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Aug 20 19:52:26 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Aug 21 15:23:16 2015 +0100" }, "message": "Fix TrySplitNonPairOrUnalignedPairIntervalAt.\n\nWe need to both:\n1) Look at pair that don\u0027t start at an even register.\n2) Also remove the other half from the list of actives.\n\nChange-Id: Ia99fa9852c67b8633e8d17a258fe302add54b14a\n" }, { "commit": "28de0f652e32e112edab0e5e7dc779943ae488d5", "tree": "c35065aeef23f857563eacd82e55ae47d8ceb67c", "parents": [ "6bd6a830f24033830a910f88928b400a7ed28418", "4daa0b4c21eee46362b5114fb2c3800c0c7e7a36" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Aug 21 10:06:20 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Aug 21 10:06:20 2015 +0000" }, "message": "Merge \"Do a second check for testing intrinsic types.\"" }, { "commit": "4daa0b4c21eee46362b5114fb2c3800c0c7e7a36", "tree": "c4fc2657cd4f0001fe9d5e37f1621c18c2da29fc", "parents": [ "bffabfce093e26bffb9e820a8f6b45474d28787a" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Aug 20 14:05:14 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Aug 21 11:01:38 2015 +0100" }, "message": "Do a second check for testing intrinsic types.\n\nThis allows to intrinsify calls made in a different dex file.\n\nCan\u0027t easily write a test because it depends on having inlined\na method from boot classpath that calls an intrinsic. Once\nString.equals is implemented with the hybrid approach we can write one.\n\nChange-Id: I591d9496e236429943d6bfa7f8b20f576b1cfb9a\n" }, { "commit": "113af44c238625500ec5b999a9990f39519e2ae2", "tree": "cae823179560c18cf86441b30d7927976483d883", "parents": [ "a05264c142526f74af0cf45e643f7b07500431d8", "b4edcf357c823f32ddc8f529f111710c7d7c90b1" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Aug 20 16:16:52 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Aug 20 16:16:52 2015 +0000" }, "message": "Merge \"Fix indentation in reference type propagation\"" }, { "commit": "a05264c142526f74af0cf45e643f7b07500431d8", "tree": "27fbf99e57f01048d10b5bae00ea27fc17294273", "parents": [ "1d4a598ed12d86934ceb5e6fd79f80f974f3f23f", "4dff2fdca6dc0032032ff324161c6343e675e4b0" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Aug 20 16:11:31 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Aug 20 16:11:31 2015 +0000" }, "message": "Merge \"ARM64: Minor optimization for conversions from long to int.\"" }, { "commit": "b4edcf357c823f32ddc8f529f111710c7d7c90b1", "tree": "767328904963a9080776f7aaa04a0fb5ffeb887f", "parents": [ "5e7cd7bf59501d6f1f90910a9da87effae7b9328" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Aug 20 17:05:49 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Aug 20 17:05:49 2015 +0100" }, "message": "Fix indentation in reference type propagation\n\nChange-Id: I5860c4fef55326ac2b510e3e34c4541b691794e0\n" }, { "commit": "5e7cd7bf59501d6f1f90910a9da87effae7b9328", "tree": "18bc50e23f1fe09364495ce434f1e24ed4b8fe1a", "parents": [ "8a5ea659d0fdf024181a3ea4aae50b0fb26f6291", "289cd55808111d23c92f2739a096942a8049649a" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Aug 20 15:08:54 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Aug 20 15:08:54 2015 +0000" }, "message": "Merge \"Optimizing String.Equals as an intrinsic (ARM)\"" }, { "commit": "599262ca1f45ff41ec1bbf31556ab5bf7e94d87a", "tree": "cd1fc6e00092b80ebad94b3e896b167107294d41", "parents": [ "0eedd7e0c923f3ef0b7103f58ca0b975613af144" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Aug 20 15:01:27 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Aug 20 15:01:27 2015 +0100" }, "message": "Fix extra parantheses\n\n:(\n\nChange-Id: Ie48a54de1276fb9e478cb5927d714b2ff14ae6c6\n" }, { "commit": "0eedd7e0c923f3ef0b7103f58ca0b975613af144", "tree": "c77db90ea2e42f0cd3b0e3b185a2c3ecde0ca515", "parents": [ "68ad649d3918f2eed3a37209c01a7f0a0faf09f0" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Aug 20 14:48:00 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Aug 20 14:51:27 2015 +0100" }, "message": "Fix BuildInvoke\n\nThe invoke should be added to the graph before\nPotentiallySimplifyFakeString.\n\nChange-Id: I2afc1d16e6dae60957e7d1386fd028e4f3a5b27a\n" }, { "commit": "4dff2fdca6dc0032032ff324161c6343e675e4b0", "tree": "3cfc13ae18696ddef98d5cd5954c493f63b66ec7", "parents": [ "4d786026efaac41acf8278d1c87d842f7ce06fde" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Thu Aug 20 13:36:35 2015 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Thu Aug 20 13:36:35 2015 +0100" }, "message": "ARM64: Minor optimization for conversions from long to int.\n\nChange-Id: Ice7febba8dd09a4548ab235fc8aee76d7e7676a1\n" }, { "commit": "68ad649d3918f2eed3a37209c01a7f0a0faf09f0", "tree": "5d6a004a79bffc5c02af02f325faa8df5f8cad52", "parents": [ "bffabfce093e26bffb9e820a8f6b45474d28787a" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Aug 18 17:08:12 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Aug 20 12:57:10 2015 +0100" }, "message": "Refactor BuildInvoke.\n\nBuildInvoke got to be too complex an unreadble. This breaks it down in\nsmaller pieces.\n\nChange-Id: Ibda63f69f5a1be537ae13e18a5f67c361173f4a6\n" }, { "commit": "e418dda75998e0186f7580c2c54705767c3c8f1f", "tree": "49b3183cd1d25b6a5cfb31e0d16678deb023c1e8", "parents": [ "4d786026efaac41acf8278d1c87d842f7ce06fde" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Aug 11 20:03:09 2015 -0700" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Aug 20 11:00:12 2015 +0100" }, "message": "Be more flexible on the code unit size when inlining.\n\nThis change increases the maximum code unit size, and fold\nparameters in the inlinee in the hope to reduce the overall\nsize of the graph. We then make sure we don\u0027t inline methods\nthat have more than N HInstructions.\n\nAlso, remove the kAccDontInline flag on ArtMethod. The compiler\ndoes not need it anymore.\n\nChange-Id: I4cd3da40e551f30ba83b8b274728b87e67f6812e\n" }, { "commit": "05f2056b4f11e0b2bac92b2655abe7030771f5dc", "tree": "60d94fc6f0e0825bec14a5f8eb52f2b98d285314", "parents": [ "e1e05e0876f303a9f4aca1d8713b7c44f21952b8" ], "author": { "name": "Agi Csaki", "email": "agicsaki@google.com", "time": "Wed Aug 19 14:58:14 2015 -0700" }, "committer": { "name": "Agi Csaki", "email": "agicsaki@google.com", "time": "Wed Aug 19 18:51:32 2015 -0700" }, "message": "Add support to indicate whether intrinsics require a dex cache\n\nA structural change to indicate whether a given intrinsic requires access\nto a dex cache. I updated the needs_environment_ field to indicate\nwhether an HInvoke needs an environment or a dex cache, and if an HInvoke\nrepresents an intrisified method, we utilize this field to determine if\nthe HInvoke needs a dex cache.\n\nBug: 21481923\nChange-Id: I9dd25a385e1a1397603da6c4c43f6c1aea511b32\n" }, { "commit": "289cd55808111d23c92f2739a096942a8049649a", "tree": "e09f51a94f3c83de7fc7c2bed4e0879ac62a6c70", "parents": [ "e1e05e0876f303a9f4aca1d8713b7c44f21952b8" ], "author": { "name": "Agi Csaki", "email": "agicsaki@google.com", "time": "Tue Aug 18 17:10:38 2015 -0700" }, "committer": { "name": "Agi Csaki", "email": "agicsaki@google.com", "time": "Wed Aug 19 17:50:40 2015 -0700" }, "message": "Optimizing String.Equals as an intrinsic (ARM)\n\nThe second implementation of String.Equals. I added an intrinsic\nin ARM which is similar to the original java implementation\nof String.equals: an instanceof check, null check, length check, and\nreference equality check followed by a loop comparing strings two\ncharacters at a time. After extensive benchmarking, it seems that\ncomparing strings forward is faster and is worth the additional temp\nregister required. Additionally, moving the add and sub instructions\nthat are anyways necessary between branches in the comparison loop\nimproved benchmarking results.\n\nInteresting benchmarking values:\n\nOptimizing Compiler on Nexus 7\n Intrinsic 1-5 Character Strings \u003d 91.6 ns\n Original 1-5 Character Strings \u003d 285.84 ns\n Intrinsic 15-30 Character Strings \u003d 176 ns\n Original 15-30 Character Strings \u003d 367.67 ns\n Intrinsic 100-1000 Character Strings \u003d 2992.1 ns\n Original 100-1000 Character Strings \u003d 9098.5 ns\n Intrinsic Null Argument \u003d 70.9 ns\n Original Null Argument \u003d 189 ns\n\nCode Expansion:\n\n Average size of 116 apps without intrinsic \u003d 6880521.11 bytes\n Average size of 116 apps with intrinsic \u003d 6901107.97 bytes\n Overall 0.299% increase in code size\n\nBug: 21481923\nChange-Id: I48df2a74f2a92b56fb9479fbf14276d44e880aed\n" }, { "commit": "83f8b5bb9e9c52791a02a84d7b0889cab898efe4", "tree": "59de59bcd9f166fd892df1887019c846abd539ba", "parents": [ "99429ae0610e8d67d417542942c4befb35950bd3", "bbd733e4ef277eff19bf9a6601032da081e9b68f" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Aug 19 19:02:45 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 19 19:02:45 2015 +0000" }, "message": "Merge \"ART: Enable basic optimizations for try/catch\"" }, { "commit": "bbd733e4ef277eff19bf9a6601032da081e9b68f", "tree": "47c5e9624378d8705e8e448ed951617f680d021f", "parents": [ "a35d4c9d66b372e7ae1014357c48ddfa6104085b" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Aug 18 17:48:17 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Aug 19 19:55:43 2015 +0100" }, "message": "ART: Enable basic optimizations for try/catch\n\nGenerating code for try/catch methods requires having run at least the\ninstruction simplifier to remove redundant suspend checks. This patch\nenables the first group of optimizations when try/catch is present.\n\nEnabled optimizations:\n1) IntrinsicsRecognizer\nDoes not modify the graph, only sets HInvoke::intrinsic_.\n\n2) ConstantFolding\nDoes not deal with throwing instructions.\n\n3) InstructionSimplifier\nMay remove a throwing instruction (e.g. LoadClass in VisitCheckCast),\nor may turn a throwing instruction into a non-throwing one (ArraySet).\nTheir corresponding catch phi inputs are not removed but correctness\nis preserved.\n\n4) ReferenceTypePropagation\nDoes not modify the graph, only sets type properties. Typing of\nLoadException from catch handler information was added.\n\n5) DeadCodeElimination\nRemoving individual instructions is fine (same as 3). Removal of dead\nblocks was disabled for try/catch.\n\nChange-Id: I2722c3229eb8aaf326391e07f522dbf5186774b8\n" }, { "commit": "99429ae0610e8d67d417542942c4befb35950bd3", "tree": "707a048ce213083edcf370a0a021e66a709d157c", "parents": [ "a35d4c9d66b372e7ae1014357c48ddfa6104085b", "581550137ee3a068a14224870e71aeee924a0646" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 18:05:46 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 19 18:05:46 2015 +0000" }, "message": "Merge \"Revert \"Revert \"Optimizing: Better invoke-static/-direct dispatch.\"\"\"" }, { "commit": "581550137ee3a068a14224870e71aeee924a0646", "tree": "f62dd0d07c66a8ce4d7d994ee0e9c27bd8014bb1", "parents": [ "32f264e67afa8654a5570d38b627515fb73fc333" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 12:49:41 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 18:54:36 2015 +0100" }, "message": "Revert \"Revert \"Optimizing: Better invoke-static/-direct dispatch.\"\"\n\nFixed kCallArtMethod to use correct callee location for\nkRecursive. This combination is used when compiling with\ndebuggable flag set.\n\nThis reverts commit b2c431e80e92eb6437788cc544cee6c88c3156df.\n\nChange-Id: Idee0f2a794199ebdf24892c60f8a5dcf057db01c\n" }, { "commit": "a35d4c9d66b372e7ae1014357c48ddfa6104085b", "tree": "8f3c9cefb4c9ed12749713ef1f52708ef6d5d455", "parents": [ "f25f4f95863946053cae46e34fd175cc7a6c3ea5", "ec16f79a4d0aeff319bf52139a0c82de3080d73c" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Aug 19 17:12:48 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 19 17:12:48 2015 +0000" }, "message": "Merge \"ART: Refactor try/catch block info, store exception type\"" }, { "commit": "ec16f79a4d0aeff319bf52139a0c82de3080d73c", "tree": "1306b2cbaa97bbacc2cbc100d6e157e14f9510cb", "parents": [ "32f264e67afa8654a5570d38b627515fb73fc333" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Aug 19 15:04:01 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Aug 19 17:43:13 2015 +0100" }, "message": "ART: Refactor try/catch block info, store exception type\n\nThis patch replaces HBasicBlock fields storing try/catch info with a\nsingle TryCatchInformation data structure, saving memory for the\nmajority of non-try/catch blocks. It also changes builder to store\nthe exception type for catch blocks.\n\nChange-Id: Ib3e43f7db247e6915d67c267fc62410420e230c9\n" }, { "commit": "44b9cf937836bb33139123e15ca8b586b5853268", "tree": "a4fe52cb53133522069f41083d118fb6abca9336", "parents": [ "32f264e67afa8654a5570d38b627515fb73fc333" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Wed Aug 19 15:39:06 2015 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Wed Aug 19 15:39:06 2015 +0100" }, "message": "Put in place the ARM64 instruction simplification framework.\n\nThis commit introduces and runs the empty InstructionSimplifierArm64\npass. Further commits will introduce arm64-specific transformations in\nthat pass.\n\nChange-Id: I458f8a2b15470297b87fc1f7ff85bd52155d93ef\n" }, { "commit": "77b022dfb8e73564b00c4724f7078cb1d5a57a65", "tree": "b62a68acdee9661364a6cb5e3621f27115140fbe", "parents": [ "3bf1027cd09397f1c076f523de7b4553227d36d3" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Aug 19 14:17:31 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Aug 19 14:36:17 2015 +0100" }, "message": "ART: Revisit users in phi elimination\n\nSSA phi elimination visits phis in post order so that loop phis are\nvisited after their inputs. This prevents elimination of phis with\nother phi inputs, exacerbated by the fact that the SSA builder does\ncreate catch phis even if all inputs are the same (unlike with normal\nphis). This patch revisits phi users of eliminated phis until no more\nphis can be removed.\n\nChange-Id: I403614dd46a8e6f0a5b9dd9e8ddc8832617521eb\n" }, { "commit": "d9c4d2e9a9bc01fd82a895091126406081fafb1f", "tree": "094657600e206c365e365634fab6d4758a3073f4", "parents": [ "464581adaf895d14f73db3d768729f0c9c6f5366", "b2c431e80e92eb6437788cc544cee6c88c3156df" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 12:46:09 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 19 12:46:09 2015 +0000" }, "message": "Merge \"Revert \"Optimizing: Better invoke-static/-direct dispatch.\"\"" }, { "commit": "b2c431e80e92eb6437788cc544cee6c88c3156df", "tree": "6c0ac5f843845e4b09829eb0fd9f1b3013cf4494", "parents": [ "9b688a095afbae21112df5d495487ac5231b12d0" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 12:45:42 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 12:45:42 2015 +0000" }, "message": "Revert \"Optimizing: Better invoke-static/-direct dispatch.\"\n\nReverting due to failing ndebug tests.\n\nThis reverts commit 9b688a095afbae21112df5d495487ac5231b12d0.\n\nChange-Id: Ie4f69da6609df3b7c8443412b6cf7f5c43c2c5d9\n" }, { "commit": "464581adaf895d14f73db3d768729f0c9c6f5366", "tree": "0a839dc0e7add5f1f6f473baa261fe3296a47105", "parents": [ "5a4f0032d797cef0bd110ed03b4342862cd27fc8", "9b688a095afbae21112df5d495487ac5231b12d0" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 11:27:57 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 19 11:27:57 2015 +0000" }, "message": "Merge \"Optimizing: Better invoke-static/-direct dispatch.\"" }, { "commit": "9b688a095afbae21112df5d495487ac5231b12d0", "tree": "e5e881d4d124803e66f1e90c1e0a0e4c90d22e13", "parents": [ "009c34cba875885d9540696f33255a9b355d6e15" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 06 14:12:42 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 19 12:23:37 2015 +0100" }, "message": "Optimizing: Better invoke-static/-direct dispatch.\n\nAdd framework for different types of loading ArtMethod*\nand code pointer retrieval. Implement invoke-static and\ninvoke-direct calls the same way as Quick. Document the\ndispatch kinds in HInvokeStaticOrDirect\u0027s new enumerations\nMethodLoadKind and CodePtrLocation.\n\nPC-relative loads from dex cache arrays are used only for\nx86-64 and arm64. The implementation for other architectures\nwill be done in separate CLs.\n\nChange-Id: I468ca4d422dbd14748e1ba6b45289f0d31734d94\n" }, { "commit": "5a4f0032d797cef0bd110ed03b4342862cd27fc8", "tree": "094657600e206c365e365634fab6d4758a3073f4", "parents": [ "f9d86df5ff23d7a0459daab2669ceb1b9ed9a035", "98596203dd67b9c80062317ac20886e4df745fa3" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Aug 19 10:52:30 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 19 10:52:30 2015 +0000" }, "message": "Merge \"Remove extra calls to `RecordPcInfo()`.\"" }, { "commit": "98596203dd67b9c80062317ac20886e4df745fa3", "tree": "11430f16b9a4f6cc9f9ae11bf59c6fdca5fa530e", "parents": [ "1cb16842fbd213fcd6288efe7f854b6dbc844dcf" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Wed Aug 19 11:33:36 2015 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Wed Aug 19 11:33:36 2015 +0100" }, "message": "Remove extra calls to `RecordPcInfo()`.\n\nSome calls to `RecordPcInfo()` were mistakingly left in the x86/x86_64\ncode after we started using the `InvokeRuntime()` helper.\n\nChange-Id: I8a902fee9db2dfb85020167289a786f965cb3fe9\n" }, { "commit": "f9d86df5ff23d7a0459daab2669ceb1b9ed9a035", "tree": "90df277615f3281b5a53d5427505de7998fe76c4", "parents": [ "cbddb90e515c30983094378e316e446b9edca5d6", "29fc008c9689e9036a3f5e3bd186bbfb5de3cb82" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Aug 19 10:08:36 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 19 10:08:36 2015 +0000" }, "message": "Merge \"ART: Revert storing of exceptional predecessors\"" }, { "commit": "cbddb90e515c30983094378e316e446b9edca5d6", "tree": "976fc3c86ac73d6950c01ea5040e0179dcd1bfa2", "parents": [ "1cb16842fbd213fcd6288efe7f854b6dbc844dcf", "d5897678eb555a797d4e84e07814d79f0e0bb465" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Aug 19 08:50:42 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 19 08:50:42 2015 +0000" }, "message": "Merge \"Implement CountLeadingZeros for x86\"" }, { "commit": "fdc3990cafb30dff8c48ea042b61b991b31a4b4d", "tree": "0509a46afe205cef54e4643623725f232a5d8fd7", "parents": [ "f71ad9ede9ae322a897e8fe407208dc35c5dee65", "4cd27d64b0bbdde61fa3f6674ceb24221853ac2c" ], "author": { "name": "Alex Light", "email": "allight@google.com", "time": "Tue Aug 18 23:27:43 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Aug 18 23:27:43 2015 +0000" }, "message": "Merge \"Revert \"Introduce support for hardware simulators, starting with ARM64\"\"" }, { "commit": "4cd27d64b0bbdde61fa3f6674ceb24221853ac2c", "tree": "20d0a46a943a3cd66341d87eb568cd8c5f83aec2", "parents": [ "edd0a6dbe26bb334f02d5abe649e3da9165277b2" ], "author": { "name": "Alex Light", "email": "allight@google.com", "time": "Tue Aug 18 23:03:42 2015 +0000" }, "committer": { "name": "Alex Light", "email": "allight@google.com", "time": "Tue Aug 18 16:17:57 2015 -0700" }, "message": "Revert \"Introduce support for hardware simulators, starting with ARM64\"\n\nThis reverts commit c2e1a5edc438274159c6ef8e65455ac73723a8f1.\n\nThis breaks the build for x86_64 targets. This is because on target the libvixl is not included as a\nlibrary for the libart.so target build. The build of non-x86_64 targets only works because the\ncompilers removes the dead-code that contains the libvixl symbols.\n\nBug: 23321940\nChange-Id: I39e93ff05b887665c47fb0986867f1d13ca65b9b\n" }, { "commit": "f71ad9ede9ae322a897e8fe407208dc35c5dee65", "tree": "5dee2185faeebe5f4107fec6835f1013b4e7548d", "parents": [ "add6cfac914f48136e71a05f72123154d7d2d44b", "50fa993d67f8a20322c27c1a77e7efcf826531fc" ], "author": { "name": "Alex Light", "email": "allight@google.com", "time": "Tue Aug 18 21:43:44 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Aug 18 21:43:44 2015 +0000" }, "message": "Merge \"Svelter libart-compiler\"" }, { "commit": "50fa993d67f8a20322c27c1a77e7efcf826531fc", "tree": "76d6b73a9d8a8ef2709aef6c01778af6a0d4ada1", "parents": [ "4500fcbe682d666a24c2e8f6e0cb90cfb35d3fa3" ], "author": { "name": "Alex Light", "email": "allight@google.com", "time": "Mon Aug 10 15:30:07 2015 -0700" }, "committer": { "name": "Alex Light", "email": "allight@google.com", "time": "Tue Aug 18 11:21:05 2015 -0700" }, "message": "Svelter libart-compiler\n\nAdded new environment variable ART_{TARGET,HOST}_CODEGEN_ARCHS which\nmay be set to \u0027all\u0027, \u0027svelte\u0027 or a space separated list of architectures.\n\nWhen compiled with ART_{TARGET,HOST}_CODEGEN_ARCHS\u003d\u0027all\u0027 (the default\nvalue) dex2oat will be able to generate output for all supported\narchitectures.\n\nWhen compiled with ART_TARGET_CODEGEN_ARCHS\u003d\u0027svelte\u0027\nonly the architectures of the TARGET will be included. When\nART_HOST_CODEGEN_ARCHS\u003d\u0027svelte\u0027 all architectures the target includes\nand the host architectures will be included on the host dex2oat.\n\nIf a list of architectures is given only those will be included.\n\nChange-Id: I87f4ad0131ab1b37544d8799e947ce4733b6daec\n" }, { "commit": "17ff917877041a6f212537e062f06684adcbf171", "tree": "f8dd85956a04299153b1b02e1c9900cec37397d6", "parents": [ "a539ec06503766fcad4be71480c194a225fb037c" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Aug 18 18:36:20 2015 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Aug 18 18:36:20 2015 +0100" }, "message": "Fix codegen_test.\n\nAllow the execution of Thumb-2 code on ARM32 hardware.\n\nChange-Id: I2fec71e39d538249569ffa88435f3198e8c28c01\n" }, { "commit": "29fc008c9689e9036a3f5e3bd186bbfb5de3cb82", "tree": "373a288e3bfcc44d6af87c78a3e114eed211eca3", "parents": [ "a539ec06503766fcad4be71480c194a225fb037c" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Aug 18 17:17:38 2015 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Aug 18 17:17:38 2015 +0100" }, "message": "ART: Revert storing of exceptional predecessors\n\nAfter change of the approach for try/catch register allocation, it is\nno longer necessary to record instructions which might throw into a\ncatch block.\n\nChange-Id: I7ef12ed06c49a35280029810975fa2a50fe4a424\n" }, { "commit": "a539ec06503766fcad4be71480c194a225fb037c", "tree": "9d3cfda89dcf4879b7579b24cdf34551eb29ec56", "parents": [ "009c34cba875885d9540696f33255a9b355d6e15", "c2e1a5edc438274159c6ef8e65455ac73723a8f1" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Aug 18 13:28:20 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Aug 18 13:28:20 2015 +0000" }, "message": "Merge \"Introduce support for hardware simulators, starting with ARM64\"" }, { "commit": "c2e1a5edc438274159c6ef8e65455ac73723a8f1", "tree": "30deefcdb9f8226a7367342000104248ea635487", "parents": [ "62dee441fff15e951c577b9565f87bb5f27c5ffb" ], "author": { "name": "Phil Wang", "email": "phil.wang@linaro.org", "time": "Wed Jul 29 15:14:09 2015 +0800" }, "committer": { "name": "Phil Wang", "email": "phil.wang@linaro.org", "time": "Tue Aug 18 15:15:17 2015 +0800" }, "message": "Introduce support for hardware simulators, starting with ARM64\n\nSimulator support for ARM64 is implemented with VIXL.\nNow codegen_test will also run on all supported hardware simulators.\n\nChange-Id: Idc740f566175d1a23c373ea9292b8fc5ba526d00\n" }, { "commit": "2a5c4681ba19411c1cb22e9a7ab446dab910af1c", "tree": "883ea0c07aad9efdb7c86960056cbefd7992b2bc", "parents": [ "228b3973b2b24783c727a55fda2b4b80375f7207" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Aug 14 08:22:54 2015 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Aug 17 15:42:25 2015 -0700" }, "message": "ART: Some header cleaning around bit-utils\n\nTry to remove dependencies where they are not necessary.\n\nChange-Id: I5ff35cb17aea369bed3725b1610b50d7eb05b81e\n" }, { "commit": "d5897678eb555a797d4e84e07814d79f0e0bb465", "tree": "bcf7df2382200011fb43a59f49d008852368b355", "parents": [ "8ecc1357e2c682165467ca8e10c7a748f7554df2" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed Aug 12 21:16:41 2015 -0400" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Aug 17 12:36:34 2015 +0100" }, "message": "Implement CountLeadingZeros for x86\n\nGenerate Long and Integer numberOfLeadingZeros for x86 and x86_64. Uses\n\u0027bsr\u0027 instruction to find the first one bit, and then corrects the\nresult.\n\nAdded some more tests with constant values to test constant folding.\nAlso add a runtime test with 0 as the input.\n\nChange-Id: I920b21bb00069bccf5f921f8f87a77e334114926\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "63fdedf3c46a42c77713b5cc5abce47defaf5550", "tree": "63457fff11e3fc28348c57fe4a249d6f67d61a0f", "parents": [ "b31de31c4559c8434aa37701ef2f9e0ba3d2ad44", "f8cfb20cfa00f8987227204211e99486bc38572f" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Aug 14 23:49:45 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Aug 14 23:49:45 2015 +0000" }, "message": "Merge \"Optimizing String.Equals as an intrinsic (x86_64)\"" }, { "commit": "f8cfb20cfa00f8987227204211e99486bc38572f", "tree": "5fd373b346a16136693a4436749c6dc5a813137f", "parents": [ "837b64974977f615dd1f0662857b97536acdb4dd" ], "author": { "name": "Agi Csaki", "email": "agicsaki@google.com", "time": "Thu Aug 13 17:54:54 2015 -0700" }, "committer": { "name": "Agi Csaki", "email": "agicsaki@google.com", "time": "Fri Aug 14 10:47:57 2015 -0700" }, "message": "Optimizing String.Equals as an intrinsic (x86_64)\n\nThe fourth implementation of String.Equals. I added an intrinsic\nin x86_64 which is similar to the original java implementation\nof String.equals: an instanceof check, null check,length check,\nand reference equality check followed by a loop comparing strings\nfour characters at a time.\n\nInteresting Benchmarking Values:\n\nOptimizing Compiler on 64-bit Emulator\n Intrinsic 1-5 Character Strings: 48 ns\n Original 1-5 Character Strings: 56 ns\n Intrinsic 1000+ Character Strings: 4009 ns\n Original 1000+ Character Strings: 4704 ns\n Intrinsic Non-String Argument: 35 ns\n Original Non-String Argument: 42 ns\n\nBug: 21481923\nChange-Id: I17d0d2e24a670a898ab1729669d3990403b9a853\n" }, { "commit": "d95ab77f5db43767fc78f9be42c1dd991033d682", "tree": "fd077bae5407fd5bac581c8efd8420cee67d6bc3", "parents": [ "f1dacdd52146841fc69949b3f485922debed9237", "d7138c813ad72a824fff19f8b10f3fb61f4f43cf" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Aug 14 15:21:14 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Aug 14 15:21:14 2015 +0000" }, "message": "Merge \"Revert \"Revert \"Optimizing String.Equals as an intrinsic (x86)\"\"\"" }, { "commit": "1cad8c7c63b600a3da83bf05fb645e08ac8fafc0", "tree": "887b7a75c8ce60f31ae3b43a2e8f41335e9ce760", "parents": [ "1def08ee2f1189ddcb73f72211afb223142d173f", "da2b254fe4c35986d85876c5819b1114e25140cb" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Aug 14 10:54:56 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Aug 14 10:54:56 2015 +0000" }, "message": "Merge \"Fix a bug in the register allocator when allocating pairs.\"" }, { "commit": "d7138c813ad72a824fff19f8b10f3fb61f4f43cf", "tree": "c02cf30b286e7a8b57b54c78e8906b9a86101909", "parents": [ "837b64974977f615dd1f0662857b97536acdb4dd" ], "author": { "name": "Agi Csaki", "email": "agicsaki@google.com", "time": "Thu Aug 13 17:46:44 2015 -0700" }, "committer": { "name": "Agi Csaki", "email": "agicsaki@google.com", "time": "Thu Aug 13 18:27:24 2015 -0700" }, "message": "Revert \"Revert \"Optimizing String.Equals as an intrinsic (x86)\"\"\n\nThis reverts commit aabdf8ad2e8d3de953d.\nThe third implementation of String.Equals. I added an intrinsic\nin x86 which is similar to the original java implementation of\nString.equals: an instanceof check, null check, length check, and\nreference equality check followed by a loop comparing strings\ncharacter by character.\n\nInteresting Benchmarking Values:\n\nOptimizing Compiler on Nexus Player\n Intrinsic 15-30 Character Strings: 177 ns\n Original 15-30 Character Strings: 275 ns\n Intrinsic Null Argument: 59 ns\n Original Null Argument: 137 ns\n Intrinsic 100-1000 Character Strings: 1812 ns\n Original 100-1000 Character Strings: 6334 ns\n\nBug: 21481923\nChange-Id: I93fa603c4bd22639143d29d0bfc7e773846f21d3\n" }, { "commit": "ea34b40783064ef73fb555a9cfd04c35cff624d8", "tree": "0e737478beda7e0e4063a49738328a0bdfcb4e12", "parents": [ "837b64974977f615dd1f0662857b97536acdb4dd" ], "author": { "name": "Agi Csaki", "email": "agicsaki@google.com", "time": "Thu Aug 13 17:51:19 2015 -0700" }, "committer": { "name": "Agi Csaki", "email": "agicsaki@google.com", "time": "Thu Aug 13 17:51:19 2015 -0700" }, "message": "Optimizing String.Equals as an intrinsic (ARM64)\n\nThe fifth implementation of String.Equals. I added an intrinsic\nin ARM64 which is similar to the original java implementation\nof String.equals: an instanceof check, null check, length check, and\nreference equality check followed by a loop comparing strings four\ncharacters at a time starting at the beginning of the string.\n\nInteresting Benchmarking Values:\n\n64 Bit Nexus 9:\n\tIntrinsic Short (1-5 Character) Strings: 40 ns\n\tOriginal Short (1-5 Character) Strings: 80 ns\n\tIntrinsic Very Long (1000+ Character) Strings: 1556 ns\n\tOriginal Very Long (1000+ Character) Strings: 4554 ns\n\tIntrinsic Non-String Argument: 15 ns\n\tOriginal Non-String Argument: 62 ns\n\nBug: 21481923\nChange-Id: If37b399614c2250f52ac709a3b50c356419ca88a\n" } ], "next": "837b64974977f615dd1f0662857b97536acdb4dd" }