)]}' { "log": [ { "commit": "175e7862dbdb44089ef327fc43ba00c791fd3838", "tree": "7b7ff4327b51b57e47e4b22af8d771edb9d462c1", "parents": [ "77c6fc7341143dd27c74cddd786398688d7b4c91" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Mar 27 09:03:13 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Mar 27 10:04:25 2018 +0100" }, "message": "Revert^4 \"Compiler changes for bitstring based type checks.\"\n\nDisabled the build time flag. (No image version bump needed.)\n\nBug: 26687569\nBug: 64692057\nBug: 76420366\n\nThis reverts commit 3fbd3ad99fad077e5c760e7238bcd55b07d4c06e.\n\nChange-Id: I5d83c4ce8a7331c435d5155ac6e0ce1c77d60004\n" }, { "commit": "3fbd3ad99fad077e5c760e7238bcd55b07d4c06e", "tree": "e8bc33fa60c38f7e1c85f8d4acf6a738df9b426a", "parents": [ "3f41323cc9da335e9aa4f3fbad90a86caa82ee4d" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Mar 26 21:14:46 2018 +0000" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Mar 26 21:14:46 2018 +0000" }, "message": "Revert^3 \"Compiler changes for bitstring based type checks.\"\n\nThis reverts commit 3f41323cc9da335e9aa4f3fbad90a86caa82ee4d.\n\nReason for revert: Fails sporadically.\n\nBug: 26687569\nBug: 64692057\nBug: 76420366\nChange-Id: I84d1e9e46c58aeecf17591ff71fbac6a1e583909\n" }, { "commit": "3f41323cc9da335e9aa4f3fbad90a86caa82ee4d", "tree": "ce41c620d2cd411da3c20aa95fb9a69328e77c42", "parents": [ "9ec1e24ebc683b15bb9c6db5554ac2ff9458adae" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Feb 12 18:39:15 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Mar 22 12:12:39 2018 +0000" }, "message": "Revert^2 \"Compiler changes for bitstring based type checks.\"\n\nAdd extra output for debugging failures and re-enable\nthe bitstring type checks.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing --jit\nTest: testrunner.py --host -t 670-bitstring-type-check\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --optimizing --jit\nTest: testrunner.py --target -t 670-bitstring-type-check\nBug: 64692057\nBug: 26687569\n\nThis reverts commit bff7a52e2c6c9e988c3ed1f12a2da0fa5fd37cfb.\n\nChange-Id: I090e241983f3ac6ed8394d842e17716087d169ac\n" }, { "commit": "946bb09a5adc7d591498b4504aa5d9354457953e", "tree": "3f1931a9117856c806b8371987700b5646a7d195", "parents": [ "68f0680e83179cfe0127fda54a8e02a8552bf619" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Mar 09 17:23:01 2018 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Mar 15 14:59:21 2018 +0000" }, "message": "Support unwinding though the switch interpreter.\n\nWrap the switch interpreter in small assembly method which defines\nDEX PC in CFI and thus it allows libunwind to backtrace through it.\n\nBug: 22414682\nTest: testrunner.py --host -t 137\nTest: testrunner.py --target -t 137\nChange-Id: I31dad9f0fb446151baaa99234b64f25c8ca2fa87\n" }, { "commit": "e1734a9961b755d9b167c31deae5a2e36f92df2a", "tree": "cc3cae7fd25244ecc624e2f42d032fa903eb4c1d", "parents": [ "ffbe188c087f9e4908c7cb77e297d26402ba6bb3", "1f49d979a0a239ea33750e8d07073b4df8b5da6f" ], "author": { "name": "Yabin Cui", "email": "yabinc@google.com", "time": "Sat Mar 10 01:04:03 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Sat Mar 10 01:04:03 2018 +0000" }, "message": "Merge \"Fix mac build: Update cfi directives for art_quick_osr_stub.\"" }, { "commit": "1f49d979a0a239ea33750e8d07073b4df8b5da6f", "tree": "76727676f4d1d2a8465ac029795e55e30883377d", "parents": [ "79b144527bee5c384791fb826a45d5f411fd8b6d" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Mar 09 23:23:36 2018 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Mar 09 23:24:42 2018 +0000" }, "message": "Fix mac build: Update cfi directives for art_quick_osr_stub.\n\nMac build doesn\u0027t like cfi directives.\n\nBug: 73954823\nTest: testrunner.py -t 570 --jit\nChange-Id: Idbe44646c20d17079528a82bdb0c915691ac2748\n" }, { "commit": "6d288440a3414e42bcb21f15a5cc2b2cfe3a5b09", "tree": "90faa2359507b96a750e38b5bf50bbda16cda940", "parents": [ "9992e095643f6746361df03c4c98e742d9ad5899", "79b144527bee5c384791fb826a45d5f411fd8b6d" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Mar 09 14:14:53 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Mar 09 14:14:53 2018 +0000" }, "message": "Merge \"Update cfi directives for art_quick_osr_stub.\"" }, { "commit": "05c1fb48e3c5afec1a00107ec4e13d4635cc87ac", "tree": "4be91b781038741b2c9b16e055debdb876bc1ffd", "parents": [ "d395e73e9ed7c3fb5e8a48c3f3141a8997d4a82b", "7e614110f7fe2cf5206236c3ac318941bcd0c519" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Mar 08 16:48:19 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Mar 08 16:48:19 2018 +0000" }, "message": "Merge \"ARM64: Simplify save/restore regs in invoke stub.\"" }, { "commit": "79b144527bee5c384791fb826a45d5f411fd8b6d", "tree": "0498c71d665334fb0b0c0d4361b138a17c6b8414", "parents": [ "398daffb3e216ff7d552e50f47f93523409bca6e" ], "author": { "name": "Christopher Ferris", "email": "cferris@google.com", "time": "Wed Feb 28 14:44:33 2018 -0800" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Mar 08 16:36:28 2018 +0000" }, "message": "Update cfi directives for art_quick_osr_stub.\n\nBug: 73954823\n\nTest: testrunner.py -t 570 --jit\nTest: Check the backtrace works in gdb at every instruction.\nChange-Id: I7ad5463eca89851a0ce6fd4354e888ca5a0f9918\n" }, { "commit": "7e614110f7fe2cf5206236c3ac318941bcd0c519", "tree": "810329aaf963f13916bf093ed0c441038772a26a", "parents": [ "7a79ebbd7183cc0fda43512a0add884765fd2bf1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Mar 06 14:34:06 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Mar 08 12:20:35 2018 +0000" }, "message": "ARM64: Simplify save/restore regs in invoke stub.\n\nSave/restore fewer registers and use common macros to do so.\nRewrite the return sequence to avoid many chained branches.\nAnd a few other minor simplifications.\n\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --64 --optimizing\nChange-Id: I32ee7bad685b8bd73d07e5a4c48a6ac0b22ff762\n" }, { "commit": "c431b9dc4b23cc950eb313695258df5d89f53b22", "tree": "422273559c3ae52caff0c6b1cf1a62a8312f0e26", "parents": [ "f46f46cf5bd32788d5252b7107628a66594a5e98" ], "author": { "name": "David Sehr", "email": "sehr@google.com", "time": "Fri Mar 02 12:01:51 2018 -0800" }, "committer": { "name": "David Sehr", "email": "sehr@google.com", "time": "Mon Mar 05 13:58:20 2018 -0800" }, "message": "Move most of runtime/base to libartbase/base\n\nEnforce the layering that code in runtime/base should not depend on\nruntime by separating it into libartbase. Some of the code in\nruntime/base depends on the Runtime class, so it cannot be moved yet.\nAlso, some of the tests depend on CommonRuntimeTest, which itself needs\nto be factored (in a subsequent CL).\n\nBug: 22322814\nTest: make -j 50 checkbuild\n make -j 50 test-art-host\n\nChange-Id: I8b096c1e2542f829eb456b4b057c71421b77d7e2\n" }, { "commit": "134cfddbbb70d4c4de26a3c94eb34c43e5df2003", "tree": "9a63ec37e10477a172b07be71162caf11fa8d0b4", "parents": [ "a26f4169b73d9c555a70fd8281f1d7b3add2c058" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Mar 02 15:39:15 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Mar 02 15:42:12 2018 +0000" }, "message": "x86-64: Fix art_quick_osr_stub for unwinder.\n\nTest: testrunner.py --host --jit --64 570-checker-osr\nTest: Run the above test under gdb, break in the stub and\n manually check that \"bt 3\" works correctly at every\n instruction and \"bt 4\" works in called methods if we\n also pass -Xcompiler-option --generate-debug-info.\nBug: 73954823\n\nChange-Id: I7352febb0c4c0414648e2b825511b83d9bcc268a\n" }, { "commit": "a26f4169b73d9c555a70fd8281f1d7b3add2c058", "tree": "a31f14296436763ef5cda202b468990893bfe38e", "parents": [ "1ccfa59c180c62f88091048c3f7f65f1d511ed0c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Mar 02 13:53:53 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Mar 02 14:05:47 2018 +0000" }, "message": "ARM64: Rewrite art_quick_osr_stub for unwinder.\n\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --jit --64 570-checker-osr\nTest: Run the above test under gdb, break in the stub and\n manually check that \"bt 3\" works correctly at every\n instruction and \"bt 4\" works in called methods if we\n also pass -Xcompiler-option --generate-debug-info.\nBug: 73954823\nChange-Id: I49b589d3079e5d3cc13280d2c998606e1cbb75a7\n" }, { "commit": "6dfaa0c6dc4a6906bd8522a9d9189be378695e0f", "tree": "47008066a23925b04c68bde37a2aa2e93d8597fc", "parents": [ "7b5e244b9920de20807487b0bffee7ebb7f24ce4", "b47f7445d6c9329629d88f58e747c9e571cf823e" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Feb 27 14:52:58 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Feb 27 14:52:58 2018 +0000" }, "message": "Merge \"ART: add exynos-m3 to a53 #835769 \u0026 #843419 erratum exception list\"" }, { "commit": "1fbea6148068a8daaa17ede23628399d5d847e31", "tree": "e474406573d845c2f0c9aa2ff4e648d2a3484cdd", "parents": [ "d2b32234aba1cea49b7b9ba3697a1ef2f13186a6" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Feb 12 14:17:40 2018 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Feb 12 14:17:40 2018 -0800" }, "message": "ART: Fix memcmp16_test typo\n\nFix trivial issue.\n\nBug: 28318941\nTest: m test-art-host-gtest-memcmp16_test\nChange-Id: I3051e2695c51bbf5cdf4a34e5ffd5a6e2432241f\n" }, { "commit": "1e5b3f39ff1776fd8b7d8d7d372347a08d98781b", "tree": "f84ebefc503e5cffb6df5989979492ae04f85cbb", "parents": [ "386568bc8979bd9b097259b8d58f2b02e81f816a", "7349d5dc0d10efaf03d4d51ab9f6c1f8ef8a833f" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Sun Feb 04 23:36:42 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Sun Feb 04 23:36:42 2018 +0000" }, "message": "Merge \"MIPS64: Fix art_quick_instrumentation_entry\"" }, { "commit": "86e6814ac2224998c40f15af701ae41261b8f08e", "tree": "84d6f7a59f41ce72730b01360a33629889d42451", "parents": [ "e65948f7c78919083224c1cd2ca47e827ced6d3e" ], "author": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Fri Feb 02 10:25:55 2018 -0800" }, "committer": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Fri Feb 02 10:56:05 2018 -0800" }, "message": "Leave one more register for clang 7.0.\n\n* Clang 7.0 does not allow inline assembly to reserve so many registers.\n\nBug: 72613441\nTest: normal build\nChange-Id: I438e2864dcbdcfadbd06a3482437e9c4e4668f98\n" }, { "commit": "7349d5dc0d10efaf03d4d51ab9f6c1f8ef8a833f", "tree": "e3b7ad3e071a9f35746d27b79d8f44a68245d2d9", "parents": [ "9657618bbf511c5a32281f1cd06ed4205536d81a" ], "author": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Fri Feb 02 10:01:10 2018 +0100" }, "committer": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Fri Feb 02 10:08:52 2018 +0100" }, "message": "MIPS64: Fix art_quick_instrumentation_entry\n\nLoad address of art_quick_instrumentation_exit before $gp register\nis restored in RESTORE_SAVE_REFS_AND_ARGS_FRAME.\n\nThis fixes a lot of tests like:\n* 099-vmdebug\n* 304-method-tracing\n* 545-tracing-and-jit\n* 802-deoptimization\n* 988-method-trace\nand many others as well as tests with --trace option.\n\nTest: ./testrunner --optimizing --target in QEMU\nTest: ./testrunner --optimizing --target --trace in QEMU\nChange-Id: I1c45c4a04a45ebe00cb63fbde547367be6de62cf\n" }, { "commit": "bff7a52e2c6c9e988c3ed1f12a2da0fa5fd37cfb", "tree": "e281a8dde61e396ed5f20c31d41086b1b1b18389", "parents": [ "83af48e9f4cdfcf3f0069c63561bab4c176bd2f1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 25 13:33:07 2018 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 25 15:05:16 2018 +0000" }, "message": "Revert \"Compiler changes for bitstring based type checks.\"\n\nBug: 64692057\nBug: 71853552\nBug: 26687569\n\nThis reverts commit eb0ebed72432b3c6b8c7b38f8937d7ba736f4567.\n\nChange-Id: I7daeaa077960ba41b2ed42bc47f17501621be4be\n" }, { "commit": "4ea9ebaf0989ab69f92a223c386b6e5a6cffb1e7", "tree": "2e9b8c8331c9731141241c0f9464277b54ebb21c", "parents": [ "be2b613f5a30cdf2291b9f4f5d0acc2c1bb0b4ae", "0dec3372f4ac869f0d0e7993d9c64bf1d2583b04" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Jan 23 15:10:30 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jan 23 15:10:30 2018 +0000" }, "message": "Merge \"MIPS32: Mark kQuickPow as direct entrypoint\"" }, { "commit": "be2b613f5a30cdf2291b9f4f5d0acc2c1bb0b4ae", "tree": "0ff068df6465b52458ecca3de96d119234415def", "parents": [ "2e1791b74406fba9930bbe5dfa5358d2d2c07e1a", "eb0ebed72432b3c6b8c7b38f8937d7ba736f4567" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jan 23 14:59:45 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jan 23 14:59:45 2018 +0000" }, "message": "Merge \"Compiler changes for bitstring based type checks.\"" }, { "commit": "eb0ebed72432b3c6b8c7b38f8937d7ba736f4567", "tree": "74d95eb4bfbf01ef6fd3a68695f5d7cec69338d7", "parents": [ "e57043081e6b091a9fd23a84043373148ae72f1f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jan 10 18:26:38 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jan 23 13:02:59 2018 +0000" }, "message": "Compiler changes for bitstring based type checks.\n\nWe guard the use of this feature with a compile-time flag,\nset to true in this CL.\n\nBoot image size for aosp_taimen-userdebug in AOSP master:\n - before:\n arm boot*.oat: 63604740\n arm64 boot*.oat: 74237864\n - after:\n arm boot*.oat: 63531172 (-72KiB, -0.1%)\n arm64 boot*.oat: 74135008 (-100KiB, -0.1%)\n\nThe new TypeCheckBenchmark yields the following changes\nusing the little cores of taimen fixed at 1.4016GHz:\n 32-bit 64-bit\n timeCheckCastLevel1ToLevel1 11.48-\u003e15.80 11.47-\u003e15.78\n timeCheckCastLevel2ToLevel1 15.08-\u003e15.79 15.08-\u003e15.79\n timeCheckCastLevel3ToLevel1 19.01-\u003e15.82 17.94-\u003e15.81\n timeCheckCastLevel9ToLevel1 42.55-\u003e15.79 42.63-\u003e15.81\n timeCheckCastLevel9ToLevel2 39.70-\u003e14.36 39.70-\u003e14.35\n timeInstanceOfLevel1ToLevel1 13.74-\u003e17.93 13.76-\u003e17.95\n timeInstanceOfLevel2ToLevel1 17.02-\u003e17.95 16.99-\u003e17.93\n timeInstanceOfLevel3ToLevel1 24.03-\u003e17.95 24.45-\u003e17.95\n timeInstanceOfLevel9ToLevel1 47.13-\u003e17.95 47.14-\u003e18.00\n timeInstanceOfLevel9ToLevel2 44.19-\u003e16.52 44.27-\u003e16.51\nThis suggests that the bitstring typecheck should not be\nused for exact type checks which would be equivalent to the\n\"Level1ToLevel1\" benchmark. Whether the implementation is\na beneficial replacement for the kClassHierarchyCheck and\nkAbstractClassCheck on average depends on how many levels\nfrom the target class (or Object for a negative result) is\na typical object\u0027s class.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing --jit\nTest: testrunner.py --host -t 670-bitstring-type-check\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --optimizing --jit\nTest: testrunner.py --target -t 670-bitstring-type-check\nBug: 64692057\nBug: 71853552\nBug: 26687569\nChange-Id: I538d7e036b5a8ae2cc3fe77662a5903d74854562\n" }, { "commit": "0dec3372f4ac869f0d0e7993d9c64bf1d2583b04", "tree": "3d7eb5ce181cfe3806ad153b0be7b0c764e6accf", "parents": [ "2e1791b74406fba9930bbe5dfa5358d2d2c07e1a" ], "author": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Tue Jan 23 12:58:26 2018 +0100" }, "committer": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Tue Jan 23 13:00:46 2018 +0100" }, "message": "MIPS32: Mark kQuickPow as direct entrypoint\n\nThis fixes mips32 build.\nThis is a follow-up to Iaa31f70acabbd57c163cfeafe02eed67c1348861.\n\nTest: successful mips32 build\nChange-Id: I959304745e7f93a64fdee792c0f3199cee2eefff\n" }, { "commit": "4d17987da58d9411adbed1a18203d76d6119612d", "tree": "f2953a0eb3ebc3f8533d22c14f4a09d7f0d4168d", "parents": [ "e57043081e6b091a9fd23a84043373148ae72f1f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jan 19 14:50:10 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jan 22 18:35:16 2018 +0000" }, "message": "ART: Add entrypoint and intrinsic for Math.pow().\n\nMathBenchmarks.java#timePow results on taimen\u0027s little cores\nfixed at frequency 1401600 with forced JIT compilation:\n - before:\n - X32: 356.33 (@FastNative), 315.39 (@CriticalNative)\n - X64: 357.31 (@FastNative), 315.37 (@CriticalNative)\n - after (LICM defeats the benchmark):\n - X32: 2.88\n - X64: 2.87\n - after but with kAllSideEffects to prevent LICM:\n - X32: 275.42\n - X64: 275.67\n\nTest: Rely on TreeHugger.\nBug: 70727450\nChange-Id: Iaa31f70acabbd57c163cfeafe02eed67c1348861\n" }, { "commit": "bf92b3f2d3374eab6bc40cc41574b51aae5a3718", "tree": "e61d010ac4ce27810d0d34ffeca694a46c2a2fd5", "parents": [ "fa0b0db6fbdcbf20bf78c53500ac98cfc3a26208" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jan 17 18:11:30 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jan 17 18:19:32 2018 +0000" }, "message": "Clean up art_quick_check_instance_of entrypoints.\n\nTest: Rely on TreeHugger.\nChange-Id: I848b8b711ac6bfa90999701a518e2e70b42c3d57\n" }, { "commit": "b47f7445d6c9329629d88f58e747c9e571cf823e", "tree": "dc89c446ba26ff375ff803543f78161bfb8cd2e2", "parents": [ "bf84c1bbdbfd8d1e071ac8f3d6cc09e934212b5b" ], "author": { "name": "Junmo Park", "email": "junmoz.park@samsung.com", "time": "Fri Nov 24 11:31:19 2017 +0900" }, "committer": { "name": "Junmo Park", "email": "junmoz.park@samsung.com", "time": "Mon Jan 08 08:39:44 2018 +0900" }, "message": "ART: add exynos-m3 to a53 #835769 \u0026 #843419 erratum exception list\n\nExynos-M3 is custom-designed 64-bit ARM CPU and does not need this A53\nerratum handling.\n\nChange-Id: I30ba0b25d944054a4ddd7ce8d256f050e4c1e423\nSigned-off-by: Junmo Park \u003cjunmoz.park@samsung.com\u003e\n" }, { "commit": "809f5b1652eb68ad496af138370d2cc198510322", "tree": "d88f0ef90b317ae1f6d8356d132f267fa40951a2", "parents": [ "3165bb09dc04b61abd04bf8e263dd85d610694e4" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jan 04 14:05:59 2018 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jan 04 14:32:51 2018 +0000" }, "message": "Explicitly document functions generated with macro ART_GET_FIELD_FROM_CODE.\n\nThe ART_GET_FIELD_FROM_CODE macro is used to generate the following\nset of functions:\n\n art{Get,Set}\u003cKind\u003e{Static,Instance}FromCode\n art{Get,Set}\u003cKind\u003e{Static,Instance}FromCompiledCode\n\nwhere \u003cKind\u003e is in {Byte,Boolean,Short,Char,32,64,Obj}.\n\nHowever, finding the definitions of these functions from their names\nwas difficult, as these definitions (and their name) are\ngenerated. This change explicitly mentions the name of the functions\ngenerated with macro ART_GET_FIELD_FROM_CODE in a commment, in order\nto improve their grep-ability.\n\nTest: mmma art\nChange-Id: I22bf4851c562801c491ccdea2d9d9c9f965b9a6f\n" }, { "commit": "e7de5ec3e4cd1d607b647d98ea64df105479b867", "tree": "d692c4d1dee08eea4beffd71bd8cdf1d106c059e", "parents": [ "bee510c94560703102ca553a08ec47119959c204" ], "author": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Thu Dec 14 10:25:20 2017 +0100" }, "committer": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Fri Dec 15 17:33:12 2017 +0100" }, "message": "MIPS: Support swaps between 128-bit locations\n\nAdd support for swaps between two SIMDStackSlots, two\nVectorRegisters (extended FpuRegister) and between a\nSIMDStackSlot and a VectorRegister.\n\nThis fixes test 623-checker-loop-regressions for\nMIPS64R6 and MIPS32R6.\n\nTest: ./testrunner.py --optimizing --target in QEMU (MIPS64R6)\nTest: ./testrunner.py --optimizing --target in QEMU (MIPS32R6)\n\nChange-Id: I36aa209f79790fb6c08b9a171f810769a6b40afc\n" }, { "commit": "bfe2c6cc48cc56305c42c1d09bf03cf80f556a49", "tree": "4cd4514d207d8a8f4f0f8cf59ec10ca73e2eabd6", "parents": [ "d13126d1ba8f65e483cd2e9dd18e60c9a0992c6e" ], "author": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Mon Dec 11 12:28:19 2017 +0100" }, "committer": { "name": "Goran Jakovljevic", "email": "goran.jakovljevic@mips.com", "time": "Mon Dec 11 12:28:19 2017 +0100" }, "message": "MIPS: Add missing include\n\nFollowing error has been generated due to missing include:\nart/runtime/arch/mips/entrypoints_init_mips.cc:288:27: error:\n use of undeclared identifier \u0027systrace_lock_logging\u0027\n\nThis fixes aosp_mips-eng build.\n\nTest: successful aosp_mips-eng build\nChange-Id: I19920cbb7dd3d928352be95a06d5138d3d505bd0\n" }, { "commit": "57943810cfc789da890d73621741729da5feaaf8", "tree": "367677a982a45af98ffe3e79543615875e8550b4", "parents": [ "d5153627778e71ef68b510ce03c77467fa4d85bd" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Dec 06 21:39:13 2017 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Dec 07 16:26:11 2017 -0800" }, "message": "ART: Replace base/logging with android-base/logging\n\nReplace wherever possible. ART\u0027s base/logging is now mainly VLOG\nand initialization code that is unnecessary to pull in and makes\nchanges to verbose logging more painful than they have to be.\n\nTest: m test-art-host\nChange-Id: I3e3a4672ba5b621e57590a526c7d1c8b749e4f6e\n" }, { "commit": "2196c651ecc77e49992c6c329dfce45f78ff46cb", "tree": "4eb151632fc7b851101b4264286ce5e900fa06b5", "parents": [ "dc93cac66f1db225474cec5bf0350fd7a148085e" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 30 16:16:07 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 30 16:20:39 2017 +0000" }, "message": "Revert^4 \"JIT JNI stubs.\"\n\nThe original CL,\n https://android-review.googlesource.com/513417 ,\nhas a bug fixed in the Revert^2,\n https://android-review.googlesource.com/550579 ,\nand this Revert^4 adds two more fixes:\n - fix obsolete native method getting interpreter\n entrypoint in 980-redefine-object,\n - fix random JIT GC flakiness in 667-jit-jni-stub.\n\nTest: testrunner.py --host --prebuild --no-relocate \\\n --no-image --jit -t 980-redefine-object\nBug: 65574695\nBug: 69843562\n\nThis reverts commit 056d7756152bb3ced81dd57781be5028428ce2bd.\n\nChange-Id: Ic778686168b90e29816fd526e23141dcbe5ea880\n" }, { "commit": "056d7756152bb3ced81dd57781be5028428ce2bd", "tree": "154ae8968a450a2e02d88207fa09e380fd380553", "parents": [ "e7441631a11e2e07ce863255a59ee4de29c6a56f" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 30 09:12:13 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 30 09:12:13 2017 +0000" }, "message": "Revert \"Revert \"Revert \"JIT JNI stubs.\"\"\"\n\nStill seeing occasional failures on 667-jit-jni-stub\n\nBug: 65574695\nBug: 69843562\n\nThis reverts commit e7441631a11e2e07ce863255a59ee4de29c6a56f.\n\nChange-Id: I3db751679ef7bdf31c933208aaffe4fac749a14b\n" }, { "commit": "e7441631a11e2e07ce863255a59ee4de29c6a56f", "tree": "a0488fac018ea391d01b751b7254719937bdee8f", "parents": [ "aa25db7d2a6f7f507c27ce49c99a33daf3059f8f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Nov 29 13:00:56 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Nov 29 14:04:26 2017 +0000" }, "message": "Revert \"Revert \"JIT JNI stubs.\"\"\n\nThe original CL,\n https://android-review.googlesource.com/513417 ,\nhad a bug for class unloading where a read barrier was\nexecuted at the wrong time from\n ConcurrentCopying::MarkingPhase() -\u003e\n ClassLinker::CleanupClassLoaders() -\u003e\n ClassLinker::DeleteClassLoader() -\u003e\n JitCodeCache::RemoveMethodsIn() -\u003e\n JitCodeCache::JniStubKey::UpdateShorty() -\u003e\n ArtMethod::GetShorty().\nThis has been fixed by removing sources of the read barrier\nfrom ArtMethod::GetShorty().\n\nTest: testrunner.py --host --prebuild --jit --no-relocate \\\n --no-image -t 998-redefine-use-after-free\nBug: 65574695\nBug: 69843562\n\nThis reverts commit 47d31853e16a95393d760e6be2ffeeb0193f94a1.\n\nChange-Id: I06e7a15b09d9ff11cde15a7d1529644bfeca15e0\n" }, { "commit": "47d31853e16a95393d760e6be2ffeeb0193f94a1", "tree": "344b0fddbbcc9a64bed2ba20dbe73fb227c2bdf4", "parents": [ "3417eaefe4e714c489a6fb0cb89b4810d81bdf4d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Nov 28 18:36:12 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Nov 28 18:36:12 2017 +0000" }, "message": "Revert \"JIT JNI stubs.\"\n\nSeems to break 998-redefine-use-after-free in\nsome --no-image configuration.\n\nBug: 65574695\nBug: 69843562\n\nThis reverts commit 3417eaefe4e714c489a6fb0cb89b4810d81bdf4d.\n\nChange-Id: I2dd157b931c17c791522ea2544c1982ed3519b86\n" }, { "commit": "3417eaefe4e714c489a6fb0cb89b4810d81bdf4d", "tree": "fe97f5191d25d26ef4250280f4c599b3a50f2059", "parents": [ "7bdc6e73fd97eb75f30b77f183e4fe6c2c599a09" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 21 18:14:28 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Nov 28 13:00:09 2017 +0000" }, "message": "JIT JNI stubs.\n\nAllow the JIT compiler to compile JNI stubs and make sure\nthey can be collected once they are not in use anymore.\n\nTest: 667-jit-jni-stub\nTest: Pixel 2 XL boots.\nTest: m test-art-host-gtest\nTest: testrunner.py --host --jit\nTest: testrunner.py --target --jit\nBug: 65574695\nChange-Id: Idf81f50bcfa68c0c403ad2b49058be62b21b7b1f\n" }, { "commit": "2ffb703bf431d74326c88266b4ddaf225eb3c6ad", "tree": "0552c3c76a42b18f9e7460d501fb71a6dc2e7f33", "parents": [ "c4b6f3116f15c8e4fdf2e4f604ababdee12d8923" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Wed Nov 08 13:35:21 2017 -0800" }, "committer": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Wed Nov 08 15:15:52 2017 -0800" }, "message": "cpplint: Cleanup errors\n\nCleanup errors from upstream cpplint in preparation\nfor moving art\u0027s cpplint fork to upstream tip-of-tree cpplint.\n\nTest: cd art \u0026\u0026 mm\nBug: 68951293\nChange-Id: I15faed4594cbcb8399850f8bdee39d42c0c5b956\n" }, { "commit": "33bff25bcd7a02d35c54f63740eadb1a4833fc92", "tree": "553db4f60878acf2a0fa7036a739d406df9a29b7", "parents": [ "321b3ca9a36d769283c64d4bdee0798db80af524" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Nov 01 14:35:42 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 02 10:11:02 2017 +0000" }, "message": "ART: Make InstructionSet an enum class and add kLast.\n\nAdding InstructionSet::kLast shall make it easier to encode\nthe InstructionSet in fewer bits using BitField\u003c\u003e. However,\nintroducing `kLast` into the `art` namespace is not a good\nidea, so we change the InstructionSet to an enum class.\nThis also uncovered a case of InstructionSet::kNone being\nerroneously used instead of vixl32::Condition::None(), so\nit\u0027s good to remove `kNone` from the `art` namespace.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nChange-Id: I6fa6168dfba4ed6da86d021a69c80224f09997a6\n" }, { "commit": "43f0cdbe3281cd5c9a33d5472b1538e5617f6691", "tree": "afed702b60c483bd5fa63be7cb3ad866b83d24d1", "parents": [ "26ef34c01ae5db2d3c964844b3717b8974a612c9" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Tue Oct 10 14:47:32 2017 +0100" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Wed Nov 01 16:22:45 2017 +0000" }, "message": "ART: Intrinsify polymorphic signature methods\n\nAdds VarHandle accessor method to list of intrinsics.\n\nAdds code to interpreter to ensure intrinsics with polymorphic\nsignatures are initialized.\n\nRename most uses of InvokePolymorphic to InvokeMethodHandle (and\nsimilar changes) to be clear that the particular code path applies to\nMethodHandle instances rather than VarHandle.\n\nChange-Id: Ib74865124a1e986badc0a7c4bb3d782af07225d4\nBug: 65872996\nTest: art/test.py --host\n" }, { "commit": "715f43e1553330bc804cea2951be195473dc343d", "tree": "55e143005efe10e8448c91eff6b88a635af2a3f6", "parents": [ "9e842d3e7d6102d964178e36e5d596ca91895147" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Mon Oct 23 11:00:32 2017 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Mon Oct 23 11:00:32 2017 -0700" }, "message": "MIPS32: Improve stack alignment, use sdc1/ldc1, where possible.\n\n- Ensure that SP is a multiple of 16 at all times, and\n- Use ldc1/sdc1 to load/store FPU registers from/to 8-byte-aligned\n locations wherever possible.\n\nUse `export ART_MIPS32_CHECK_ALIGNMENT\u003dtrue` when building Android\nto enable the new runtime alignment checks.\n\nTest: Boot \u0026 run tests on 32-bit version of QEMU, and CI-20.\nTest: test/testrunner/testrunner.py --target --optimizing --32\nTest: test-art-host-gtest\nTest: test-art-target-gtest\n\nChange-Id: Ia667004573f419fd006098fcfadf5834239cb485\n" }, { "commit": "4584122ca1ec38e78efb2845375f91ca9e1fc71e", "tree": "de3893930c5e849be91d98ec01a337b91bd26e2e", "parents": [ "09659c22dc2f2c85a0ade965d1fc5160944b8692" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Sep 19 11:31:44 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Sep 19 11:31:44 2017 -0700" }, "message": "ART: Remove suspend-check optimization\n\nThis code has been untested and dead for a while. Remove it.\n\nTest: m (bullhead)\nTest: m (aosp_mips64)\nChange-Id: Ib44597830c4be4db97420c910e716048308e9afa\n" }, { "commit": "08601a494e87dfba9b06f9fdea37c9342e4896d1", "tree": "ed88da37b072b8e65d61373068912f00924b1f54", "parents": [ "216ba99075c650822585b92c37161aabd45f74a0", "217d6d3cd0b78966178ab93cd221dbb2865048ee" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Sep 19 15:29:07 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Sep 19 15:29:07 2017 +0000" }, "message": "Merge changes I38b16291,I159669ec\n\n* changes:\n ART: Remove old code\n ART: Move read barrier config out of globals\n" }, { "commit": "60454cb6094f33ea6b2194f46387b30073b91cb0", "tree": "2cd9344814b2a335423417ccffa3427e17b35fa9", "parents": [ "61add1d9dcd11d86253b218a8feeafa642bc4941" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Aug 09 21:28:30 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Sep 19 01:38:04 2017 -0700" }, "message": "MIPS: Follow-up to \"Allow deoptimization when returning from a runtime method\"\n\nThis is a MIPS-specific follow-up to\nhttps://android-review.googlesource.com/442545.\n\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: testrunner.py --target --optimizing\nTest: same tests as above on CI20\nTest: booted MIPS32R2 in QEMU\n\nBug: 33616143\n\nChange-Id: I3478f1ac332b0b97578225fd55ac0fccdfa4e33f\n" }, { "commit": "217d6d3cd0b78966178ab93cd221dbb2865048ee", "tree": "cbed5f71f5ebfc98044559ec7835bbdd1ddb339f", "parents": [ "217488a9ddf351033c1688198c492b9c40c36d8a" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Sep 18 12:48:20 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Sep 18 12:50:43 2017 -0700" }, "message": "ART: Remove old code\n\nRemove unused Quick compiler flag.\n\nRemove support for arm32 soft-float code (which is no longer\nsupported by our compiler).\n\nTest: m\nChange-Id: I38b16291d90094dbf26776923a46afbf8de53f20\n" }, { "commit": "2ee17909eadd7155f4a7751c38398b36fc267f04", "tree": "2d13de7e9aae9d24ceb4ff1e03f81e46a5aee54b", "parents": [ "1accd636dc90edef2878f0b8e2716b078379842e" ], "author": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Wed Aug 30 11:37:08 2017 -0700" }, "committer": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Tue Sep 05 13:22:15 2017 -0700" }, "message": "Revert^4 \"Allow deoptimization when returning from a runtime method.\"\n\nThis reverts commit 07c7028e518b98d3267a77dfe0d149db1adbe858.\n\nNeed some special treatment of string init\u0027s shorty.\n\nTest: run-test/gtest on both host and target\nTest: 597-deopt-busy-loop, 597-deopt-invoke-stub\nBug: 33616143\nChange-Id: Id4c64910acfdd088835b6db6fc503e6ade0218e7\n" }, { "commit": "80be041454871a9b72c39790a10954595d721a63", "tree": "19e23b45ff88c0b9639b873eba959c1cfec5e34a", "parents": [ "8ef4b6121ea496d38c0b8aeebad3f1227f819b17", "5122e6ba34d46851cd89f2ad55bf6bb067e038d6" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 30 13:47:46 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 30 13:47:46 2017 +0000" }, "message": "Merge \"ART: Remove ArtMethod::dex_cache_resolved_methods_.\"" }, { "commit": "07c7028e518b98d3267a77dfe0d149db1adbe858", "tree": "71fbc9572541cdf08c21c88e3a1d5ff92f1d9885", "parents": [ "047abb20d02546d3dd6e8630befc31e5568fa90e" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Aug 30 08:09:42 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Aug 30 08:09:42 2017 +0000" }, "message": "Revert \"Revert \"Revert \"Allow deoptimization when returning from a runtime method.\"\"\"\n\nBug: 33616143\n\ndeopt string test still failing on occasion.\n\nThis reverts commit 047abb20d02546d3dd6e8630befc31e5568fa90e.\n\nChange-Id: I89fc28696290da52317d0e3dd07ecf0d1bdac823\n" }, { "commit": "5122e6ba34d46851cd89f2ad55bf6bb067e038d6", "tree": "e96ba37b6451be7a06d930b0274251cac35ce05e", "parents": [ "02cb397857c979dffae95e2db2678a72ec407cf0" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 17 16:10:09 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 29 11:29:31 2017 +0100" }, "message": "ART: Remove ArtMethod::dex_cache_resolved_methods_.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: testrunner.py --target on Nexus 6P\nTest: Repeat the above tests with ART_HEAP_POISONING\u003dtrue\nTest: Build aosp_mips64-eng\nChange-Id: I9cd0b8aa5001542b0863cccfca4f9c1cd4d25396\n" }, { "commit": "047abb20d02546d3dd6e8630befc31e5568fa90e", "tree": "dfe08cef1f53a7559f792221e3e06dccbe704380", "parents": [ "95d9bdd36b7ae6682f8602292fd547a0faa73829" ], "author": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Wed Aug 23 15:26:57 2017 -0700" }, "committer": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Thu Aug 24 14:36:21 2017 -0700" }, "message": "Revert \"Revert \"Allow deoptimization when returning from a runtime method.\"\"\n\nThis reverts commit 2b87ae0073256e909e15f464300912552e58ee48.\n\nFor an invocation runtime method such as quick-to-interpreter bridge,\nadd a special stack walk to get the shorty for the invoked method.\n\nTest: run-test/gtest on both host and target, and 597-deopt-runtime-method.\nBug: 33616143\n\nChange-Id: I53ae93880f62c95dcf48005239b925d7f7b11eb6\n" }, { "commit": "2ee17e69110a9ef98ea8c94219c7da23b918ef3f", "tree": "3b7401a6cc2f1e16ef238eccf69573537398de0a", "parents": [ "cd63fc8a656a7548e97aac755dc9820d5bc11240", "2b87ae0073256e909e15f464300912552e58ee48" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 23 12:12:04 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 23 12:12:04 2017 +0000" }, "message": "Merge changes I6407c9b4,I49d9da67\n\n* changes:\n Revert \"Allow deoptimization when returning from a runtime method.\"\n Revert \"Fix some issues for deoptimizing runtime methods.\"\n" }, { "commit": "2b87ae0073256e909e15f464300912552e58ee48", "tree": "0b9db32799d6efa93d3db6dca5170d185627e138", "parents": [ "fc63babf6be7bdd96be1492391594ad628f1fd3c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 23 10:16:26 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 23 10:16:47 2017 +0000" }, "message": "Revert \"Allow deoptimization when returning from a runtime method.\"\n\nReason for revert:\n Some tests failing even after a minor fix.\n\nThis reverts commit edeba10d523c3e283ab939a16c7203af32c7707e.\n\nChange-Id: I6407c9b489c016d19a12c28d1da0efa55ad554a7\n" }, { "commit": "437130bbee51ec467471ca7c745669b6855136d5", "tree": "d9502b65b469bf1923bfeb9f46e48c5b3e8545a3", "parents": [ "b099f04068069c6c7d4a5a2407d532cf430d1a0d", "edeba10d523c3e283ab939a16c7203af32c7707e" ], "author": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Tue Aug 22 16:46:27 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Aug 22 16:46:27 2017 +0000" }, "message": "Merge \"Allow deoptimization when returning from a runtime method.\"" }, { "commit": "edeba10d523c3e283ab939a16c7203af32c7707e", "tree": "88f13395178e7a17979dcb0666c65c024732be6b", "parents": [ "c9d88538d73680563f7a6e73885acfff2c55ef58" ], "author": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Wed Apr 12 13:43:15 2017 -0700" }, "committer": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Mon Aug 21 16:44:57 2017 -0700" }, "message": "Allow deoptimization when returning from a runtime method.\n\nThis CL patches the return pc of a runtime method to allow the top\nJava frame to be deoptimized. This should fix the issue that debugger\ncannot break in a busy loop. It also means we can now do full async\ndeoptimization, if we want to enable it by letting environment keep\nregisters live.\n\nart_quick_instrumentation_exit and art_quick_deoptimize now need to save\nall registers since some compiler slow paths assume runtime methods save\neverything.\n\nSome special handling needs to be done to decide whether dex_pc should\nbe advanced when deoptimized back to interpreter.\n\nTest: run-test/gtest on both host and target, and 597-deopt-runtime-method.\nBug: 33616143\nChange-Id: I2e2c199998825afd5057f7deadfc8fa203ce1936\n" }, { "commit": "19428ad0cc3494714470328fb6c74fa3e92a187b", "tree": "3e0e1b31f3de2c5db141a3cf1bf90efcd92ef0fc", "parents": [ "3b21019edb5586a73516833482fc203e75309dbe" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Thu Aug 03 10:36:46 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Mon Aug 07 16:51:47 2017 -0700" }, "message": "MIPS: Follow-up to \"Add two special runtime methods\"\n\nThis is a MIPS-specific follow-up to\nhttps://android-review.googlesource.com/449659.\n\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-gtest\nTest: testrunner.py --target --optimizing\nTest: same tests as above on CI20\nTest: booted MIPS32R2 in QEMU\n\nBug: 33616143\n\nChange-Id: I6428e7dccf2a5dcd0dd1135cf11cbcc0cf201c27\n" }, { "commit": "0a87a653a296854c9a0abacd9bb1557ee4c4d05d", "tree": "4763469d136f3879bbce93521827717dbe05bd5b", "parents": [ "52a3c989f96984f9bc9e02620694fc44708a1df2" ], "author": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Wed Apr 12 13:43:15 2017 -0700" }, "committer": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Mon Aug 07 11:49:38 2017 -0700" }, "message": "Add two special runtime methods.\n\nThis is in preparation for being able to deoptimize upon returning\nfrom a runtime method. We need to identify two special runtime methods:\nclinit and suspend-check since if deoptimization happens when returning\nfrom these two methods, we need to execute the dex instruction that\ncorresponds to the dex pc of the deoptimization point. A clinit can\nbe implicit for an invoke-static, in which case the invocation hasn\u0027t\nhappen yet so we have to execute the invoke-static in the interpreter.\nFor a suspend-check, the dex instruction for it hasn\u0027t been executed yet.\n\nTest: full run-test/gtest on both host and target.\nBug: 33616143\nChange-Id: Id1bdfcfa84a9ca27d5ee9da4b4a99467b1a4a845\n" }, { "commit": "8cf9cb386cd9286d67e879f1ee501ec00d72a4e1", "tree": "88e86e214b425e444760fe4e0ffeee677e1558a2", "parents": [ "914b7b6a6c9f399b26b41e9160e9871ef749e0db" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Jul 19 09:28:38 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Jul 24 16:07:10 2017 -0700" }, "message": "ART: Include cleanup\n\nLet clang-format reorder the header includes.\n\nDerived with:\n\n* .clang-format:\n BasedOnStyle: Google\n IncludeIsMainRegex: \u0027(_test|-inl)?$\u0027\n\n* Steps:\n find . -name \u0027*.cc\u0027 -o -name \u0027*.h\u0027 | xargs sed -i.bak -e \u0027s/^#include/ #include/\u0027 ; git commit -a -m \u0027ART: Include cleanup\u0027\n git-clang-format -style\u003dfile HEAD^\n manual inspection\n git commit -a --amend\n\nTest: mmma art\nChange-Id: Ia963a8ce3ce5f96b5e78acd587e26908c7a70d02\n" }, { "commit": "279cfba1f6086c25d6737471bc4f66ae79f4e681", "tree": "e9ee9c1fb1180c89734ad57b3ee601a5545d9c9e", "parents": [ "62432ae776aa618082865b40b111dbff75aedeb6" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sat Jul 22 00:24:43 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Mon Jul 24 09:43:09 2017 -0700" }, "message": "MIPS: Follow-up to hash-based DexCache methods array\n\nThis is a MIPS-specific follow-up to\nhttps://android-review.googlesource.com/#/c/431679/.\n\nTest: booted MIPS32R2 in QEMU\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\n\nChange-Id: Ib16cf6613ae3b6537e7fbae1aff9a3316c9fd540\n" }, { "commit": "c73753f70ab4fc9a166637bee514b292f0fa0109", "tree": "a464e300d44b5a3eca10cb00cc42be7c1ab9da96", "parents": [ "530a6b6902b50db43659757a6270b7d111d93a2c", "07bfbace6f835e6c748fd68ec7624992478b16c1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jul 21 09:41:58 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jul 21 09:41:58 2017 +0000" }, "message": "Merge \"Hash-based DexCache methods array.\"" }, { "commit": "e1f602e58f9d2b0bc0c97e651df474c001e40dab", "tree": "56720f1d04e69aceb9285183bd14b7326ae37826", "parents": [ "a9894d24088ed066aa534ba7c157ab2f1e11cd71", "5354af9d047429b989bf42a4db2f8390cc3467e8" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Jul 20 19:07:46 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jul 20 19:07:46 2017 +0000" }, "message": "Merge \"Refined HasAtLeast() for x86 and x86_64.\"" }, { "commit": "07bfbace6f835e6c748fd68ec7624992478b16c1", "tree": "5d094a00fbc90455bd9b53e042cf8b4fe8433462", "parents": [ "ba118827465d12177f3996e50133960087b1c916" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 06 14:55:02 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 20 16:33:00 2017 +0100" }, "message": "Hash-based DexCache methods array.\n\nTotal boot*.art size for aosp_angler-userdebug:\n - arm64:\n - before: 11603968\n - after: 10129408 (-1.4MiB, -12.7%)\n - arm:\n - before: 8626176\n - after: 7888896 (-0.7MiB, -8.5%)\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: Nexus 6P boots.\nTest: testrunner.py --target\nTest: Build aosp_mips64-eng\nBug: 30627598\nChange-Id: I7f858605de5f074cbd7f0d9c4c072fbd44aee28f\n" }, { "commit": "4147fcc43c2ee019a06e55384985e3eaf82dcb8c", "tree": "11ec92efbfddf7736bbc74ed35fcfb3756bfcfb0", "parents": [ "e8f48da635c4d07bbe431e5819da8e1fad91a8ef" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sat Jun 17 19:57:27 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Jul 19 15:03:10 2017 -0700" }, "message": "MIPS: Reduce Baker read barrier code size overhead\n\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-gtest\nTest: testrunner.py --target --optimizing\nTest: same tests as above on CI20\nTest: booted MIPS32 and MIPS64 in QEMU with poisoning\n in configurations:\n - with Baker read barrier thunks\n - without Baker read barrier thunks\n - ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\n\nChange-Id: I79f320bf8862a04215c76cfeff3118ebc87f7ef2\n" }, { "commit": "5354af9d047429b989bf42a4db2f8390cc3467e8", "tree": "25e0aaa3dcf4da018ad9bff7113ce6d66af6e937", "parents": [ "6f7b23acfccd7ec0f13ad51747bd60c682655025" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Jul 19 11:13:27 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Jul 19 11:17:20 2017 -0700" }, "message": "Refined HasAtLeast() for x86 and x86_64.\n\nRationale:\nThis refinement is needed once we start passing in more\narchitecture specific flags on x86_* builds. This CL\nalso makes the arm version a bit more readable.\n\nTest: instruction_set_features_test\nBug: 63585550\n\nChange-Id: Ia6fe47654141feaf1899da225abaee8a5ea8249a\n" }, { "commit": "23cdebe60049850200b30869c6970193f5e7ecea", "tree": "bf6eab054e2595f3dbf269a0cc4f4190799f0528", "parents": [ "d4472455580db696d0f211f8e6f7d99d78b3fa79", "854df416f12c48b52239fe163ab8a7fcac4cddd3" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon Jul 17 13:13:41 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jul 17 13:13:41 2017 +0000" }, "message": "Merge \"MIPS: TLAB allocation entrypoints\"" }, { "commit": "bac2bd1c2fbdd94f4d4dfe83d8451f655e875e36", "tree": "58ba3b1d28348da478a44234820ab6c485f5ed37", "parents": [ "06410c093de2b8a21bdbd7dfd9ce324fd4e95c3f", "6d729a789d3d7771e13d9445ee0be1d9d48a81b5" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jul 14 10:28:42 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jul 14 10:28:42 2017 +0000" }, "message": "Merge \"Introduce a Marking Register in ARM code generation.\"" }, { "commit": "6d729a789d3d7771e13d9445ee0be1d9d48a81b5", "tree": "360b9af68920f411be5fe6753aaf7ab4976385ea", "parents": [ "8cfbbb826a3ab7bb680cfcd8a8148570b165d620" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jun 30 18:34:01 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jul 13 16:41:07 2017 +0100" }, "message": "Introduce a Marking Register in ARM code generation.\n\nWhen generating code for ARM, maintain the status of\nThread::Current()-\u003eGetIsGcMarking() in register R8,\ndubbed MR (Marking Register), and check the value of that\nregister (instead of loading and checking a read barrier\nmarking entrypoint) in read barriers.\n\nTest: m test-art-target\nTest: m test-art-target with tree built with ART_USE_READ_BARRIER\u003dfalse\nTest: m test-art-host-gtest\nTest: ARM device boot test\nBug: 37707231\nChange-Id: I30b44254460d0bbb9f1b2adc65eca52ca3de3f53\n" }, { "commit": "854df416f12c48b52239fe163ab8a7fcac4cddd3", "tree": "f5cf247f1e71a5242c797b8fab99ded21839267d", "parents": [ "e63a91111d13f33028c2988ded53a4659140ca2e" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Tue Jun 27 14:41:39 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Thu Jul 13 10:17:07 2017 +0200" }, "message": "MIPS: TLAB allocation entrypoints\n\nAdd fast paths for TLAB allocation entrypoints for MIPS32 and MIPS64.\nAlso improve rosalloc entrypoints.\n\nNote: All tests are executed on CI20 (MIPS32R2) and in QEMU (MIPS32R6\n and MIPS64R6), with and without ART_TEST_DEBUG_GC\u003dtrue.\n\nTest: ./testrunner.py --optimizing --target\nTest: mma test-art-target-gtest\nTest: mma test-art-host-gtest\n\nChange-Id: I92195d2d318b26a19afc5ac46a1844b13b2d5191\n" }, { "commit": "62c20d1c2ec15d6faa175b108e7839e78133e5dd", "tree": "78d187940899296fdd3bc5941da97c2af2f27c82", "parents": [ "4bbbe4006bb06386f2419bcc36ec5e6784781f6b" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jul 12 17:41:39 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jul 12 17:44:01 2017 +0100" }, "message": "Add missing CFI directives to ARM Quick entrypoints.\n\nTest: Build ART\nChange-Id: I16ef638b255fd4f6b084df67ef9462170c3c3548\n" }, { "commit": "97c46466aea25ab63a99b3d1afc558f0d9f55abb", "tree": "afd225f51d28a77329bc2590a025400e088f260c", "parents": [ "00cca3a275562d110a8b35094b9b12fac37f67ab" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu May 11 14:04:03 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jul 11 17:43:27 2017 +0100" }, "message": "Introduce a Marking Register in ARM64 code generation.\n\nWhen generating code for ARM64, maintain the status of\nThread::Current()-\u003eGetIsGcMarking() in register X20,\ndubbed MR (Marking Register), and check the value of that\nregister (instead of loading and checking a read barrier\nmarking entrypoint) in read barriers.\n\nTest: m test-art-target\nTest: m test-art-target with tree built with ART_USE_READ_BARRIER\u003dfalse\nTest: ARM64 device boot test\nBug: 37707231\nChange-Id: Ibe9bc5c99a2176b0a0476e9e9ad7fcc9f745017b\n" }, { "commit": "7015e76436ff9eb738c9c6070c8fff8e98b3852e", "tree": "88411fb0541aa618c600b9ee0f6dfb5fb4aeb922", "parents": [ "dfcf10b92330164f8af6c82c8232e85cfff1ae3c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Sun Jul 02 21:37:02 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Sun Jul 02 21:51:34 2017 +0100" }, "message": "ARM64: Restore FP registers in read barrier thunk.\n\nbug: 62612946\nTest: 658-fp-read-barrier\nTest: run-libcore-tests.sh\nChange-Id: Ic102ff2459c0dedec9a540bbfed3a759f97ae8a4\n" }, { "commit": "be3d72300221e94bb1cb3acb9a2a06c6a0f6dac4", "tree": "50bcac9226f13d2f516bb67ac5f78e0dac50d523", "parents": [ "b96ed2c271a56fb8be0c8f30231710095e66a201" ], "author": { "name": "George Burgess IV", "email": "gbiv@google.com", "time": "Tue Jun 13 16:05:13 2017 -0700" }, "committer": { "name": "George Burgess IV", "email": "gbiv@google.com", "time": "Thu Jun 22 21:41:19 2017 -0700" }, "message": "Fix static analyzer warnings\n\nThis fixes warnings like:\n\nruntime/arch/*/context_*.h: warning: Call to virtual function during\nconstruction will not dispatch to derived class\n\nThese occur because clang can\u0027t tell whether these Context subclasses\nthemselves have subclasses. Since they\u0027re effectively final already, the\nsimplest fix is to mark them as final.\n\nBug: 32619234\nTest: test-art-host. Rebuilt ART with the analyzer to verify that these\nissues are gone.\nChange-Id: Idcdd8387e16869564999ca318692dfcc90006b8d\n" }, { "commit": "25e4d1ea98fedebf49ceee40ea67ec93e2407c53", "tree": "a2bdff880ee5e85bd47c472a2603ddd596300bce", "parents": [ "2ec2b28686876c1b9244ce9c1274be2cac8d928f" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Wed Jun 14 13:47:44 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Wed Jun 14 14:51:56 2017 +0200" }, "message": "MIPS: Fix art_quick_instrumentation_entry/exit\n\nThis is a follow-up change for\nIab229353fae23c2ea27c2b698c831627a9f861b1.\n\nThis fixes following tests for both MIPS32 and MIPS64:\n * 099-vmdebug\n * 304-method-tracing\n * 545-tracing-and-jit\n * 570-checker-osr\n * 597-deopt-new-string\n * 802-deoptimization\n * 988-method-trace\n * 989-method-trace-throw\n\nTest: ./testrunner.py --optimizing --target in QEMU (MIPS64R6)\nTest: ./testrunner.py --optimizing --target on CI20 (MIPS32R2)\n\nChange-Id: I064588283b65971f07150eb30a1fcf90c765eb40\n" }, { "commit": "07e6c2d8e259d8cbbd4ea7585f6270087cb74392", "tree": "f12eab6f050e9779a023617ee68d37ea20a35a93", "parents": [ "f22f68efca28c2e165f6db485b24f9ee02caa78c", "2f470edaff2a5c55d657a43b54e5188ed2bf1227" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Mon Jun 12 20:12:39 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jun 12 20:12:41 2017 +0000" }, "message": "Merge \"entrypoints: Remove DMBs from art_quick_alloc initialized variants.\"" }, { "commit": "d455b87f4805fcec6c78fbf9a48b0bf23bbc9467", "tree": "9d22ba4b91f3cf91c416d1310168932720508c0e", "parents": [ "df2898236114f8fec51afe71a3b6f31868794e1b", "9877855b59abd42112fa799c143255d3f8d9da3d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 12 15:42:24 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jun 12 15:42:24 2017 +0000" }, "message": "Merge \"x86/x86-64: Fix art_quick_instrumentation_exit CFI.\"" }, { "commit": "9877855b59abd42112fa799c143255d3f8d9da3d", "tree": "444a1080b52cf77926393515cbbc598e7a7b152f", "parents": [ "fed9cb178be878f4e5ff862ac78ae2cf5ad305d3" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 12 14:04:52 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 12 14:07:10 2017 +0100" }, "message": "x86/x86-64: Fix art_quick_instrumentation_exit CFI.\n\nTest: Rely on TreeHugger.\nBug: 62490325\nChange-Id: I1918cc21d67e61996224bec9a4ddf2e2098a649c\n" }, { "commit": "c5dd99fd581a0c92802d707e3d2017ddd3fec72c", "tree": "ef4551ff3d887845cdccadc259437a1f2c41e507", "parents": [ "237377b48fdba2c7025ce369ffeae1bde25f77f4" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Mon Jun 12 13:46:18 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Mon Jun 12 13:56:16 2017 +0200" }, "message": "Fix mips64 build\n\nAdded missing include.\n\nTest: successful aosp_mips64-eng build\nChange-Id: I88ee9d9c6f8b159da4a1a4bb92c194d6355868ee\n" }, { "commit": "4e44dcc82997cd0471946bceabd5a8477bfff118", "tree": "8effe3f25d49ff5860ae91453f8fc6cb07586e0d", "parents": [ "9e20fd6376f846f474310b24525198c83ed7b660", "b8bff09cd5beb70b7598285ab4aea92115f0ade2" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Jun 09 23:06:31 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 09 23:06:36 2017 +0000" }, "message": "Merge \"X86: Add sandybridge microarchitecture\"" }, { "commit": "9e20fd6376f846f474310b24525198c83ed7b660", "tree": "0ff27ddb84ce36080823c7a9658e848607159b24", "parents": [ "13600e9cd7536b7cd8d93c32270f5f08076f5d6d", "b7edcda968bb0cbaa69a3ad387fcd3194f5612be" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Jun 09 22:07:41 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 09 22:07:43 2017 +0000" }, "message": "Merge \"Add method tracing JVMTI callbacks\"" }, { "commit": "b8bff09cd5beb70b7598285ab4aea92115f0ade2", "tree": "88174f6a00528b8911277563d6bba09c1c35c364", "parents": [ "58794c5c23f46a7476a58e5a10dbeebb6321aa90" ], "author": { "name": "Luis Hector Chavez", "email": "lhchavez@google.com", "time": "Fri Jun 09 12:33:04 2017 -0700" }, "committer": { "name": "Luis Hector Chavez", "email": "lhchavez@google.com", "time": "Fri Jun 09 13:43:04 2017 -0700" }, "message": "X86: Add sandybridge microarchitecture\n\nART was not aware of sandybridge CPU featureset, so it turned off all\nfeatures (ISA: X86 Feature string: -ssse3,-sse4.1,-sse4.2,-avx,-avx2,\n-popcnt). Meanwhile, the Android build does turn on the corresponding\ncompiler flags (ISA: X86 Feature string: ssse3,sse4.1,sse4.2,-avx,\n-avx2,popcnt). This change adds \"sandybridge\" to the relevant lists so\nit can detect the features correctly.\n\nBug: 62389235\nTest: Android runs on Chromebooks\nTest: m test-art-host-gtest-instruction_set_features_x86_test\n\n(cherry picked from commit 702e27249893104230f826b82b7a3723ec3b7240)\n\nChange-Id: Ie47aed190ac83b35b6d3994d703c463c9efd5e25\n" }, { "commit": "b2d18fa4e33ca119654ced872c70fe198b0b2db5", "tree": "9f0e3ac72b9b7b08794e1ecf458620ba19437465", "parents": [ "58794c5c23f46a7476a58e5a10dbeebb6321aa90" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Jun 06 20:46:10 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Jun 09 11:36:45 2017 -0700" }, "message": "ART: Clean up asm_support.h\n\nThe includes are only ever really needed for tests. Factor out\ngeneration of the test function into asm_support_check.h\n\nFix up missing includes, mainly intern_table.h.\n\nTest: m\nTest: m test-art-host\nChange-Id: I435199e6211e368be0a06c80d8fa95b9593aca31\n" }, { "commit": "58794c5c23f46a7476a58e5a10dbeebb6321aa90", "tree": "948368dd8d8376a50fe996da0438abe10da1322d", "parents": [ "73321bfdd7e96e3ce62042c9e5be567ed0db1985", "5678db5b3a0275d04bc610236f89fac9f76b5b1e" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Jun 09 18:00:41 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 09 18:00:43 2017 +0000" }, "message": "Merge \"ART: Refactor bit_utils and stl_util\"" }, { "commit": "b7edcda968bb0cbaa69a3ad387fcd3194f5612be", "tree": "50748aac195d20a7e8f6d59a6e499f3fe69418de", "parents": [ "049f2a58ea9276dfd162760271ad443570f2e660" ], "author": { "name": "Alex Light", "email": "allight@google.com", "time": "Thu Apr 27 13:20:31 2017 -0700" }, "committer": { "name": "Alex Light", "email": "allight@google.com", "time": "Fri Jun 09 10:54:02 2017 -0700" }, "message": "Add method tracing JVMTI callbacks\n\nAdd MethodEntryHook and MethodExitHook callbacks and associated\ncapabilities.\n\nSplit --jvmti-stress option in run-test into --jvmti-trace-stress and\n--jvmti-redefine-stress to test each different component.\n\nNB 3 differences from RI found:\n 1) RI will call methodExitHook again if the method exit hook throws\n an exception. This can easily cause an infinite loop and the test\n is specifically tweaked to prevent this from happening on the RI.\n 2) RI always includes the method being exited in the stack trace of\n errors thrown in the hooks. In ART we will not include the method\n if it is native. This is due to the way we call native methods\n and would be extremely difficult to change.\n 3) The RI will allow exceptions thrown in the MethodEnterHook to be\n caught by the entered method in some situations. This occurs with\n the tryCatchExit test in 989. In ART this does not happen.\n\nBug: 34414073\nTest: ./test.py --host -j40\nTest: ART_TEST_FULL\u003dtrue DEXTER_BINARY\u003d\"/path/to/dexter\" \\\n ./test/testrunner/testrunner.py --host -j40 -t 988\nTest: ART_TEST_FULL\u003dtrue DEXTER_BINARY\u003d\"/path/to/dexter\" \\\n ./test/testrunner/testrunner.py --host -j40 -t 989\nTest: lunch aosp_angler-userdebug; \\\n m -j40 droid build-art \u0026\u0026 \\\n fastboot -w flashall \u0026\u0026 \\\n ./test.py --target -j4\n\nChange-Id: Iab229353fae23c2ea27c2b698c831627a9f861b1\n" }, { "commit": "05ae67444e15c9281582ef1fc45c4558d286040e", "tree": "c4c1bb45e81be3367dbfb36af1646f9a5d434078", "parents": [ "ca333f4093648f275b71121121a7c72f99fc11af", "0758ae7c12df9f857b8609e1eab6ad5dfa0e517d" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Jun 09 16:07:38 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 09 16:07:40 2017 +0000" }, "message": "Merge \"Introduce a number of MSA instructions for MIPS32\"" }, { "commit": "f44b3a6d3a7087999e82b1188c162c7390a13f78", "tree": "30a026fe2689af86ac01277352749fae97d407a1", "parents": [ "d632b8b8a031cda163c6f9a6b4e33a192f123a0b" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 08 19:47:07 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 08 19:47:07 2017 -0700" }, "message": "ART: Fix mips build\n\nFollow-up to commit 8228cdf4ad6322ec8133564aaa51f966d36c0f17.\n\nTest: m\nChange-Id: I91672b7f08f5af9faa0926bd57e38c4936d47ec2\n" }, { "commit": "5678db5b3a0275d04bc610236f89fac9f76b5b1e", "tree": "efc4ffe5d59a0c6c5f4c15a886459962d24de4aa", "parents": [ "83b140474aa1759739c8ee4464bf226c4fa0f6d7" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 08 14:11:18 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 08 14:11:18 2017 -0700" }, "message": "ART: Refactor bit_utils and stl_util\n\nMove iterator code from bit_utils.h into bit_utils_iterator.h. Move\nIdentity into stl_util_identity.h. Remove now unnecessary includes,\nand fix up transitive users.\n\nTest: m\nChange-Id: Id1ce9cda66827c5d00584f39ed310b6b37629906\n" }, { "commit": "8228cdf4ad6322ec8133564aaa51f966d36c0f17", "tree": "6d2f5cf4e742ad644ad30eb96a9f943c9ebcb34b", "parents": [ "83b140474aa1759739c8ee4464bf226c4fa0f6d7" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue May 30 15:03:54 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 08 13:13:15 2017 -0700" }, "message": "ART: Move CalleeSaveType to callee_save_type.h\n\nMove the type out of runtime to decrease dependencies. Make it\na proper enum class. Fix up usage.\n\nTest: m test-art-host\nChange-Id: Id84c44bf3c59f37c8a43548e720c5fb65707b198\n" }, { "commit": "0758ae7c12df9f857b8609e1eab6ad5dfa0e517d", "tree": "cbceef23999bd640e36c052ce2accbab0a81dc22", "parents": [ "4d3df9131c4098828f889b9470c82880efdc91be" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Tue May 23 11:06:23 2017 +0200" }, "committer": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Thu Jun 08 10:56:46 2017 +0200" }, "message": "Introduce a number of MSA instructions for MIPS32\n\nAdded a number of MSA (The MIPS SIMD Architecture) instructions.\nAdded assembler tests for each instruction.\n\nTest: mma test-art-host-gtest\n\nChange-Id: I1d499309fc08923484f64d1883b9c3f95eadd3be\n" }, { "commit": "aa5684df432296384067133b63993ead46ef3bff", "tree": "6dbb10a8134c2be09f8755874ee705daee16228b", "parents": [ "85adf5a9ac401ae61cfc12a9838bd4e744459366" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Thu Jun 01 14:20:14 2017 +0200" }, "committer": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Tue Jun 06 13:00:59 2017 +0200" }, "message": "MIPS32: Add MSA instruction set feature option\n\nMSA (MIPS SIMD Architecture) is SIMD extension which will be used\nfor ART Vectorizer implementation.\nAlso extended instruction_set_features_mips_test.\n\nTest: mma test-art-target in QEMU\nTest: mma test-art-host-gtest\n\nChange-Id: If77815cd75b7e86cd8b0eaa10f645c09053b8fd9\n" }, { "commit": "b486a98aadc95d80548953410cf23edba62259fa", "tree": "b113b7d50a4a015502873b7742c9ece00d293e84", "parents": [ "1656ca9e6996cb555b4463e5efd4bd7e3f4fb816" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 01 13:45:54 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Jun 02 08:24:02 2017 -0700" }, "message": "ART: Introduce thread-current-inl.h\n\nFactor out Thread::Current() code into its own -inl file to remove\ntransitive includes.\n\nThis requires at the same time correcting mutex.h, i.e., moving\nsome functions into mutex-inl.h.\n\nTest: m test-art-host\nChange-Id: I88f888b604e0897368d9b483edce6ce4332dd9c9\n" }, { "commit": "deae7db5864fa50c5a1cd6c232a17aeb986b36e1", "tree": "cdedad3d0f921e4f82fa7b65d55820455b7ac0ea", "parents": [ "8d01c3708c4becb186979ed9377aed0fc2954d06" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue May 30 09:56:41 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue May 30 14:15:50 2017 -0700" }, "message": "ART: Add missing namespace comments\n\nAdd closing namespace comments.\n\nBug: 32619234\nTest: m\nChange-Id: I1f50e09dcd1038c4b540b87e5c19e319c1f592e4\n" }, { "commit": "8d01c3708c4becb186979ed9377aed0fc2954d06", "tree": "ace37d594a9fdd4ccf8e407596277f5e07a1c139", "parents": [ "1171deea4cb2f2db67a310ea8797d06206b2bdea" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue May 30 13:21:28 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue May 30 14:15:50 2017 -0700" }, "message": "ART: Remove unique_ptr release warnings\n\nDo not release and create, just use assignment or constructor.\n\nBug: 32619234\nTest: m test-art-host\nChange-Id: I8b2bb87a0b6587ead41458ef00e27b7e61eeaff7\n" }, { "commit": "705543e43d1e7df753c64cd048a933f7b9681226", "tree": "c69dccee07cf2cf64f66a03d222d1f66271f42f1", "parents": [ "1dfa89847acf85fe68ac5dbef43993ecec07948d" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed May 24 13:20:49 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed May 24 21:45:50 2017 -0700" }, "message": "ART: Clean up instruction_set.h\n\nMove functions to constexpr where possible and make them more\nreadable (we\u0027re C++14 now).\n\nTest: m\nTest: m test-art-host\nChange-Id: I4b697e8ff74edec972bf6fa652df82aa58a04934\n" }, { "commit": "2f470edaff2a5c55d657a43b54e5188ed2bf1227", "tree": "0272269baed0135d738d5ecacd347b7a2a733139", "parents": [ "76c7665802411e597a228439f354acf1dc53e3d2" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Thu May 18 15:50:59 2017 -0700" }, "committer": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Wed May 24 15:40:01 2017 +0000" }, "message": "entrypoints: Remove DMBs from art_quick_alloc initialized variants.\n\nRemove the DMBs from the initialized allocation entrypoints only.\nThis is safe because the compiler now emits \"DMB ISHST\" that protects\nthe object for publication.\n\nNon-initialized (resolved) entrypoints still have the \"DMB ISH\" because\nthey double as class-initialization checks, so they need to act as a\n\"acquire-load class status\" to ensure any static field reads that follow\nthe new-instance or new-array would be data-race-free.\n\n(See also b/36692143 to remove redundant barriers for class\ninitialization checks.)\n\nBug: 36656456\nBug: 36447861\nChange-Id: Ie342c7e7d89febd8420cd42d8c1acf282be54c0f\n" }, { "commit": "728411b540ebe9dae7f9da3e85dcd815c5bc62ea", "tree": "cb871a14d25cfecce2e6cf3c8b47df4b42926294", "parents": [ "95c7d5b995a975723113a2ef38befb86e4bfbf45", "ad63fe5f330d10e08467e0c7c6f4c199b62fa3ab" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon May 22 11:45:12 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon May 22 11:45:15 2017 +0000" }, "message": "Merge \"MIPS: Improve object lock/unlock.\"" }, { "commit": "ad63fe5f330d10e08467e0c7c6f4c199b62fa3ab", "tree": "376af6413665880471355fd5f4cfb096c90f6c62", "parents": [ "9e8797d1c96dd4744b667ef6bbd10812e2087f79" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Mon May 08 22:10:00 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue May 16 15:10:33 2017 -0700" }, "message": "MIPS: Improve object lock/unlock.\n\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-gtest\nTest: testrunner.py --target --optimizing\nTest: same tests as above on CI20\nTest: repeat all of the above in the configuration\n ART_USE_READ_BARRIER\u003dfalse\nTest: booted MIPS32R2 in QEMU\n\nChange-Id: I30fa277e1a687cb0595204e8d9053d7a4873d3df\n" }, { "commit": "2ac67d526eb348019433138b04eb1473d45cb0f4", "tree": "ccc6e87b8f7694c14e686c0b024dcb1523107405", "parents": [ "c4209f024a74f1aaf7a7c2d16482b5458ae0c687" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu May 11 22:30:38 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon May 15 18:21:49 2017 -0700" }, "message": "ART: Reserve sentinel fault page\n\nAttempt to reserve a single page on startup that contains addresses we\nuse for clobbering.\n\nTest: m test-art-host\nChange-Id: Ibc0a29c99ff3ff42290877faaadcb914234024e4\n" }, { "commit": "270970e660d3c99e62a88b18144d159dd8699c55", "tree": "910248487abab475a9109925a9089fedd08b45c1", "parents": [ "201c81947f23b3f43c2ff78d9c1078dd53157fe5", "88abba2b0cb0151d89e16da3e64025878dc2f142" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed May 10 14:04:18 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed May 10 14:04:19 2017 +0000" }, "message": "Merge \"ARM/AOT: Allow 16-bit LDR for Baker read barrier loads.\"" }, { "commit": "ddc38fe3e5618e3922ecc445193dacb2f39ef736", "tree": "090cf77abda6a5755371673966ceea83f858048c", "parents": [ "45f9865cc974d344c9a859508c8ec8ce101f4c52", "4e92c3ce7ef354620a785553bbada554fca83a67" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed May 10 10:55:45 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed May 10 10:55:47 2017 +0000" }, "message": "Merge \"Add runtime reasons for deopt.\"" }, { "commit": "4e92c3ce7ef354620a785553bbada554fca83a67", "tree": "42029deff4d3ba7f89b5fdbf79ff410da575f431", "parents": [ "549844e9ccf432d1396b19af890eedb602b8ba04" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon May 08 09:34:26 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed May 10 09:27:33 2017 +0100" }, "message": "Add runtime reasons for deopt.\n\nCurrently to help investigate. Also:\n1) Log when deoptimization happens (which method and what reason)\n2) Trace when deoptimization happens (to make it visible in systrace)\n\nbug:37655083\nTest: test-art-host test-art-target\nChange-Id: I0c2d87b40db09e8e475cf97a7c784a034c585e97\n" }, { "commit": "88abba2b0cb0151d89e16da3e64025878dc2f142", "tree": "231e5551a1b8d3c8bf162c9d0f30916b36ba2742", "parents": [ "b9c3a99096c746b09af611e55e11b86600374011" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 03 17:09:25 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 09 15:43:34 2017 +0100" }, "message": "ARM/AOT: Allow 16-bit LDR for Baker read barrier loads.\n\nTest: m test-art-target-gtest\nTest: testrunner.py --target on Nexus 6P.\nTest: testrunner.py --target on Nexus 6P with heap poisoning enabled.\nTest: Repeat the above tests with ART_USE_OLD_ARM_BACKEND\u003dtrue.\nBug: 29516974\nBug: 30126666\nBug: 36141117\nChange-Id: I458f2ec5fe9abead4db06c7595d992945096fb68\n" }, { "commit": "fe307fd79220135b1a5c74eca28fb2b58c30c2df", "tree": "8e7c63a3347c4fbc70278b50d296cfda35c43844", "parents": [ "4eacc7f1c97dff74eb6c01d838a1ee586ae969ae", "eee1c0ec2b08a6be642b329dc2fe885391127da3" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri May 05 13:33:28 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri May 05 13:33:30 2017 +0000" }, "message": "Merge \"ARM: Link-time generated thunks for Baker CC read barrier.\"" }, { "commit": "eee1c0ec2b08a6be642b329dc2fe885391127da3", "tree": "960bb4df48b4a320df3c58682449abb24b5fb122", "parents": [ "c7cee403ad9a3f7097f5157a621a6a8cb991222e" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Apr 21 17:58:41 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri May 05 12:51:11 2017 +0100" }, "message": "ARM: Link-time generated thunks for Baker CC read barrier.\n\nRemaining work for follow-up CLs:\n - use implicit null check in field thunk,\n - use 16-bit LDRs for fields and GC roots.\n\nTest: m test-art-target-gtest\nTest: testrunner.py --target on Nexus 6P.\nTest: testrunner.py --target on Nexus 6P with heap poisoning enabled.\nTest: Repeat the above tests with ART_USE_OLD_ARM_BACKEND\u003dtrue.\nBug: 29516974\nBug: 30126666\nBug: 36141117\nChange-Id: Iad5addab72d790a9d61879f61f2e75b246bcdf5a\n" } ], "next": "f3fb1fc453c253a075050910a558c89c1330b5af" }