)]}'
{
  "log": [
    {
      "commit": "ec7802a102d49ab5c17495118d4fe0bcc7287beb",
      "tree": "08649609604b9c96bc48ca071c48b0af5abb1a3f",
      "parents": [
        "b2e436ffcda1d7a87e7bf9133d8ed878388c73c2"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Oct 01 20:57:57 2015 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Oct 08 11:10:18 2015 +0100"
      },
      "message": "Add DCHECKs to ArenaVector and ScopedArenaVector.\n\nImplement dchecked_vector\u003c\u003e template that DCHECK()s element\naccess and insert()/emplace()/erase() positions. Change the\nArenaVector\u003c\u003e and ScopedArenaVector\u003c\u003e aliases to use the new\ntemplate instead of std::vector\u003c\u003e. Remove DCHECK()s that\nhave now become unnecessary from the Optimizing compiler.\n\nChange-Id: Ib8506bd30d223f68f52bd4476c76d9991acacadc\n"
    },
    {
      "commit": "2aaa4b5532d30c4e65d8892b556400bb61f9dc8c",
      "tree": "f4259c33171ec8efd945aeedab1e57feb7970f42",
      "parents": [
        "3f4b39dec9ec6b8948ed18b9d65ba49db2465004"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Sep 17 17:03:26 2015 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Sep 25 12:18:02 2015 +0100"
      },
      "message": "Optimizing: Tag more arena allocations.\n\nReplace GrowableArray with ArenaVector and tag arena\nallocations with new allocation types.\n\nAs part of this, make the register allocator a bit more\nefficient, doing bulk insert/erase. Some loops are now\nO(n) instead of O(n^2).\n\nChange-Id: Ifac0871ffb34b121cc0447801a2d07eefd308c14\n"
    },
    {
      "commit": "fa6b93c4b69e6d7ddfa2a4ed0aff01b0608c5a3a",
      "tree": "3528c88e104dac8e58ae5370ab066b8b1dd0218f",
      "parents": [
        "e295be4a95d7861f6ec179edf6565f58cad747cc"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Sep 15 10:15:55 2015 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Sep 16 13:21:33 2015 +0100"
      },
      "message": "Optimizing: Tag arena allocations in HGraph.\n\nReplace GrowableArray with ArenaVector in HGraph and related\nclasses HEnvironment, HLoopInformation, HInvoke and HPhi,\nand tag allocations with new arena allocation types.\n\nChange-Id: I3d79897af405b9a1a5b98bfc372e70fe0b3bc40d\n"
    },
    {
      "commit": "77a48ae01bbc5b05ca009cf09e2fcb53e4c8ff23",
      "tree": "780c7d6bdee784c2f8248979de348491cfb63b34",
      "parents": [
        "659562aaf133c41b8d90ec9216c07646f0f14362"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Tue Sep 15 12:34:04 2015 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Tue Sep 15 12:34:04 2015 +0000"
      },
      "message": "Revert \"Revert \"ART: Register allocation and runtime support for try/catch\"\"\n\nThe original CL triggered b/24084144 which has been fixed\nby Ib72e12a018437c404e82f7ad414554c66a4c6f8c.\n\nThis reverts commit 659562aaf133c41b8d90ec9216c07646f0f14362.\n\nChange-Id: Id8980436172457d0fcb276349c4405f7c4110a55\n"
    },
    {
      "commit": "659562aaf133c41b8d90ec9216c07646f0f14362",
      "tree": "be1beae390262bf2f5a17bfa44de93081a849d07",
      "parents": [
        "b022fa1300e6d78639b3b910af0cf85c43df44bb"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Sep 14 21:26:33 2015 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Sep 14 21:26:33 2015 +0000"
      },
      "message": "Revert \"ART: Register allocation and runtime support for try/catch\"\n\nBreaks libcore test org.apache.harmony.security.tests.java.security.KeyStorePrivateKeyEntryTest#testGetCertificateChain. Need to investigate.\n\nThis reverts commit b022fa1300e6d78639b3b910af0cf85c43df44bb.\n\nChange-Id: Ib24d3a80064d963d273e557a93469c95f37b1f6f\n"
    },
    {
      "commit": "b022fa1300e6d78639b3b910af0cf85c43df44bb",
      "tree": "780c7d6bdee784c2f8248979de348491cfb63b34",
      "parents": [
        "e481c006e8b055a31d9c7cff27f4145e57e3c113"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Aug 20 17:47:48 2015 +0100"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Sep 14 20:42:58 2015 +0100"
      },
      "message": "ART: Register allocation and runtime support for try/catch\n\nThis patch completes a series of CLs that add support for try/catch\nin the Optimizing compiler. With it, Optimizing can compile all\nmethods containing try/catch, provided they don\u0027t contain catch loops.\nFuture work will focus on improving performance of the generated code.\n\nSsaLivenessAnalysis was updated to propagate liveness information of\ninstructions live at catch blocks, and to keep location information on\ninstructions which may be caught by catch phis.\n\nRegisterAllocator was extended to spill values used after catch, and\nto allocate spill slots for catch phis. Catch phis generated for the\nsame vreg share a spill slot as the raw value must be the same.\n\nLocation builders and slow paths were updated to reflect the fact that\nthrowing an exception may not lead to escaping the method.\n\nInstruction code generators are forbidden from using of implicit null\nchecks in try blocks as live registers need to be saved before handing\nover to the runtime.\n\nCodeGenerator emits a stack map for each catch block, storing locations\nof catch phis. CodeInfo and StackMapStream recognize this new type of\nstack map and store them separate from other stack maps to avoid dex_pc\nconflicts.\n\nAfter having found the target catch block to deliver an exception to,\nQuickExceptionHandler looks up the dex register maps at the throwing\ninstruction and the catch block and copies the values over to their\nrespective locations.\n\nThe runtime-support approach was selected because it allows for the\nbest performance in the normal control-flow path, since no propagation\nof catch phi values is necessary until the exception is thrown. In\naddition, it also greatly simplifies the register allocation phase.\n\nConstantHoisting was removed from LICMTest because it instantiated\n(now abstract) HConstant and was bogus anyway (constants are always in\nthe entry block).\n\nChange-Id: Ie31038ad8e3ee0c13a5bbbbaf5f0b3e532310e4e\n"
    },
    {
      "commit": "6058455d486219994921b63a2d774dc9908415a2",
      "tree": "3d205227f3ff54cd3a50bc5c0e7cb3ad6c175b86",
      "parents": [
        "637ee0b9c10ab7732a7ee7b8335f3fff4ac1549c"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Sep 03 13:35:12 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Sep 08 18:09:49 2015 +0100"
      },
      "message": "Optimizing: Tag basic block allocations with their source.\n\nReplace GrowableArray with ArenaVector in HBasicBlock and,\nto track the source of allocations, assign one new and two\nQuick\u0027s arena allocation types to these vectors. Rename\nkArenaAllocSuccessor to kArenaAllocSuccessors.\n\nBug: 23736311\nChange-Id: Ib52e51698890675bde61f007fe6039338cf1a025\n"
    },
    {
      "commit": "145acc5361deb769eed998f057bc23abaef6e116",
      "tree": "3d66a0b44e1ac927156eec6e6488de5fd52b982b",
      "parents": [
        "91e11c0c840193c6822e66846020b6647de243d5"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Sep 03 13:33:25 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Sep 03 13:33:25 2015 +0000"
      },
      "message": "Revert \"Optimizing: Tag basic block allocations with their source.\"\n\nReverting so that we can have more discussion about the STL API.\n\nThis reverts commit 91e11c0c840193c6822e66846020b6647de243d5.\n\nChange-Id: I187fe52f2c16b6e7c5c9d49c42921eb6c7063dba\n"
    },
    {
      "commit": "91e11c0c840193c6822e66846020b6647de243d5",
      "tree": "0c5398ef59c464c1848afd0113c74b6aeb75cf42",
      "parents": [
        "f9f6441c665b5ff9004d3ed55014f46d416fb1bb"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Sep 02 17:03:22 2015 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Sep 03 13:09:37 2015 +0100"
      },
      "message": "Optimizing: Tag basic block allocations with their source.\n\nReplace GrowableArray with ArenaVector in HBasicBlock and,\nto track the source of allocations, assign one new and two\nQuick\u0027s arena allocation types to these vectors. Rename\nkArenaAllocSuccessor to kArenaAllocSuccessors.\n\nBug: 23736311\nChange-Id: I984aef6e615ae2380a532f5c6726af21015f43f5\n"
    },
    {
      "commit": "718493c6c3c8e380663cb8a94e57ce160a6c473f",
      "tree": "718e2041b8556d6343349d38982609efe5b22f78",
      "parents": [
        "9578d10b5866bfab63cc4218ec5ab3f6dd10c8ce"
      ],
      "author": {
        "name": "Mingyao Yang",
        "email": "mingyao@google.com",
        "time": "Wed Jul 22 15:56:34 2015 -0700"
      },
      "committer": {
        "name": "Mingyao Yang",
        "email": "mingyao@google.com",
        "time": "Mon Jul 27 10:46:45 2015 -0700"
      },
      "message": "HDeoptimize should hold values live in env.\n\nValues that are not live in compiled code anymore may still be needed in\ninterpreter, due to code motion, etc.\n\nBug: 22665511\nChange-Id: I8b85833c5c462f8fe36f86d6026a51b07563995a\n"
    },
    {
      "commit": "94015b939060f5041d408d48717f22443e55b6ad",
      "tree": "3dfe8b3d8535508694dd451acdd1ff887dfa4662",
      "parents": [
        "6a1c92f1e4a455d802ab0d0ac47504cdd7c12f0f"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jun 04 18:21:04 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jun 08 18:20:41 2015 +0100"
      },
      "message": "Revert \"Revert \"Use HCurrentMethod in HInvokeStaticOrDirect.\"\"\n\nFix was to special case baseline for x86, which does not have enough\nregisters to allocate the current method.\n\nThis reverts commit c345f141f11faad177aa9635a78088d00cf66086.\n\nChange-Id: I5997aa52f8d4df373ae5ff4d4150dac0c44c4c10\n"
    },
    {
      "commit": "c345f141f11faad177aa9635a78088d00cf66086",
      "tree": "0a9fbb0f1f90dfe273d94659f077cc1e6b84966c",
      "parents": [
        "38207af82afb6f99c687f64b15601ed20d82220a"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jun 04 17:17:32 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jun 04 17:17:32 2015 +0000"
      },
      "message": "Revert \"Use HCurrentMethod in HInvokeStaticOrDirect.\"\n\nFails on baseline/x86.\n\nThis reverts commit 38207af82afb6f99c687f64b15601ed20d82220a.\n\nChange-Id: Ib71018367eb7c6046965494a7e996c22af3de403\n"
    },
    {
      "commit": "38207af82afb6f99c687f64b15601ed20d82220a",
      "tree": "f9360949b92e5b6b01c5828c03ac67d01adffe1d",
      "parents": [
        "6a0d5e7fe6dc0c9d3dd941ab991203f2d5d1c354"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jun 01 15:46:22 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jun 04 14:39:06 2015 +0100"
      },
      "message": "Use HCurrentMethod in HInvokeStaticOrDirect.\n\nChange-Id: I0d15244b6b44c8b10079398c55da5071a3e3af66\n"
    },
    {
      "commit": "8272688499c2232355db34d94057983fd436173d",
      "tree": "aabd5c474fe53eb6d73edc6c0d1d8a00b1256eb6",
      "parents": [
        "a96bea54b7e3def5490d169f2bf92be2e68dd001"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jun 01 13:51:57 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jun 01 14:03:51 2015 +0100"
      },
      "message": "Tweak one hint and one split in the linear scan.\n\n- Return a hinted register if it is available. Otherwise\n  another move will be necessary.\n- Use SplitBetween instead of raw split when a register\n  is not fully available. This will find the best split\n  position.\n\nChange-Id: Ie464e536204ab556eb09345fe6426621eb86e5ac\n"
    },
    {
      "commit": "0a23d74dc2751440822960eab218be4cb8843647",
      "tree": "39d69de5d812826c4065d0acd38a58cd983f21f0",
      "parents": [
        "cdeb0b5fede4c06488f43a212591e661d946bc78"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu May 07 11:57:35 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon May 11 14:17:22 2015 +0100"
      },
      "message": "Add a parent environment to HEnvironment.\n\nThis code has no functionality change. It adds a placeholder\nfor chaining inlined frames.\n\nChange-Id: I5ec57335af76ee406052345b947aad98a6a4423a\n"
    },
    {
      "commit": "db216f4d49ea1561a74261c29f1264952232728a",
      "tree": "8b7914435ad1ba519a3d88b5cca7f0f6e842cd4f",
      "parents": [
        "bc3b93eadd155342b6124d2d5ef3806ecec5dfd6"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue May 05 17:02:20 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu May 07 09:54:09 2015 +0100"
      },
      "message": "Relax the only one back-edge restriction.\n\nThe rule is in the way for better register allocation, as\nit creates an artificial join point between multiple paths.\n\nChange-Id: Ia4392890f95bcea56d143138f28ddce6c572ad58\n"
    },
    {
      "commit": "fbda5f3e1378f07ae202f62da625ee43a063a052",
      "tree": "4c6b9dbadbdf409a878da05bd3d765f9cb55653a",
      "parents": [
        "008b17ae313d033537a3792faf937134315f03bc"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Apr 29 14:16:00 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue May 05 10:24:17 2015 +0100"
      },
      "message": "Find better split positions in the register allocator.\n\nIn a standard if/else control flow graph, this avoids\ndoing a move in one branch if the other branch decided\nto move an interval.\n\nThis also needs a new register hint kind, which is what\nwas the location of the interval at the predecessor block.\n\nChange-Id: I18b78264587b4d693540fbb5e014d12df2add3e2\n"
    },
    {
      "commit": "579026039080252878106118645ed70706f4838e",
      "tree": "cfedba53d8e8b04e81b855560e388f3f691ee837",
      "parents": [
        "2d01066db24c19f9384f50ff71806cbb4835c7f9"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Apr 21 14:28:41 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Apr 29 18:02:36 2015 +0100"
      },
      "message": "Add synthesize uses at back edge.\n\nThis reduces the cost of linearizing the graph (hence removing\nthe notion of back edge). Since linear scan allocates/spills registers\nbased on next use, adding a use at a back edge ensures we do count\nfor loop uses.\n\nChange-Id: Idaa882cb120edbdd08ca6bff142d326a8245bd14\n"
    },
    {
      "commit": "4ed947a58de87d19d0609be773207c905ccb0f7f",
      "tree": "27770da4f79f5764a2700135671bcfff8f0bdddf",
      "parents": [
        "a0ee862288b702468f8c2b6d0ad0f1c61be0b483"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Apr 27 16:58:06 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Apr 27 17:50:50 2015 +0100"
      },
      "message": "Dissociate uses with environment uses.\n\nThey are most of the times in the way when iterating. They\nalso complicate the logic of (future) back edge uses.\n\nChange-Id: I152595d9913073fe901b267ca623fa0fe7432484\n"
    },
    {
      "commit": "241a486267bdb59b32fe4c8db370eb936068fb39",
      "tree": "ea8edc6b55285340ae58bc00f283e8fcaaff3c22",
      "parents": [
        "f90b8548e91392dfc24e8b0f7d3000f4f121c19d"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Apr 16 17:59:03 2015 +0100"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Apr 16 18:13:01 2015 +0100"
      },
      "message": "ART: Replace expensive calls to Covers in reg alloc\n\nLiveInterval::Covers is implemented as a linear-time search over\nliveness ranges and can therefore be rather expensive and should be\navoided unless necessary. This patch replaces calls to Covers when\nsearching for a sibling with the cheaper IsDefinedAt call.\n\nChange-Id: I93fc73529c15a518335f4cbdc3a0def52d9501e5\n"
    },
    {
      "commit": "0d9f17de8f21a10702de1510b73e89d07b3b9bbf",
      "tree": "3d58a2a165ee2bc5af0e813b1ffa893fba72ed6d",
      "parents": [
        "9bb3e8e10d7d9230a323511094a9e260062a1473"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Apr 15 14:17:44 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Apr 15 14:17:44 2015 +0100"
      },
      "message": "Move the linear order to the HGraph.\n\nBug found by Zheng Xu: SsaLivenessAnalysis being a stack allocated\nobject, we should not refer to it in later phases of the compiler.\nSpecifically, the code generator was using the linear order, which\nwas stored in the liveness analysis object.\n\nChange-Id: I574641f522b7b86fc43f3914166108efc72edb3b\n"
    },
    {
      "commit": "d8126bef62df7f40f2e6abc74004f52e664daf45",
      "tree": "8e3d3eee847f8376541ddabc5274bd84bd13311d",
      "parents": [
        "ef3456f872539df65c4c88ca346713f74366d803"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Mar 27 10:22:41 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Mar 31 20:40:19 2015 +0100"
      },
      "message": "Fix locations at environment uses.\n\nWe were too agressive in not recording environment uses\nwhen the instruction was not of type object. We have to\nrecord the use to the use list of an interval, but it should\nnot affect the live ranges of that interval.\n\nChange-Id: Id16fb7cc06f14083766d408a345837793583b6ea\n"
    },
    {
      "commit": "f01d34445953e6b9c9b13de1dd32a5c0ee5abab5",
      "tree": "86f4aaf006f125fdee6e83d494df381b0c38c658",
      "parents": [
        "7d8c6776d7bdcc04411154aa215ba5909939192a"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Mar 27 17:15:49 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Mar 27 17:22:37 2015 +0000"
      },
      "message": "Implement a proper solution for temps.\n\nWe used to play some trickery when updating locations of temps. This\nchange creates a proper use of the temp, and use it for updating\nits location.\n\nChange-Id: I53e9447b87a55137a3a79841db21ad3864854825\n"
    },
    {
      "commit": "46e2a3915aa68c77426b71e95b9f3658250646b7",
      "tree": "2b0a4470b05291894db73c631fe94f0fdff8c46b",
      "parents": [
        "bce0855ca1dbb1fa226c5b6a81760272ce0b64ef"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Mar 16 17:31:52 2015 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Tue Mar 24 17:28:37 2015 +0000"
      },
      "message": "ART: Boolean simplifier\n\nThe optimization recognizes the negation pattern generated by \u0027javac\u0027\nand replaces it with a single condition. To this end, boolean values\nare now consistently assumed to be represented by an integer.\n\nThis is a first optimization which deletes blocks from the HGraph and\ndoes so by replacing the corresponding entries with null. Hence,\nexisting code can continue indexing the list of blocks with the block\nID, but must check for null when iterating over the list.\n\nChange-Id: I7779da69cfa925c6521938ad0bcc11bc52335583\n"
    },
    {
      "commit": "915b9d0c13bb5091875d868fbfa551d7b65d7477",
      "tree": "63822d7081b0da33ccda2019dd52025f0ecedb35",
      "parents": [
        "bf5565a75876a84c8c2401df597d922a7870a8f2"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Mar 11 15:11:19 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Mar 12 17:55:01 2015 +0000"
      },
      "message": "Tweak liveness when instructions are used in environments.\n\nInstructions remain live when debuggable, but only instructions\nwith object types remain live when non-debuggable.\n\nEnable StackVisitor::GetThisObject for optimizing.\n\nChange-Id: Id87b2cbf33a02450059acc9993995782e5f28987\n"
    },
    {
      "commit": "5b8e6a594b827f7dc88b2e3d895e08f5b3f22446",
      "tree": "80dbd414dd8ff4398fae817b64bc374b95896b7a",
      "parents": [
        "2eb5168bd9e43b80452eaee5be32c063e124886e"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Wed Feb 25 16:17:05 2015 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Mar 02 16:26:25 2015 +0000"
      },
      "message": "ART: Cache last returned range in LiveInterval::Covers\n\nOptimizing spends ~10% of compilation time in the register allocator.\nOne of the frequently called methods is LiveInterval::Covers which\nhas linear complexity w.r.t. the number of gaps in liveness intervals.\nThis patch leverages the fact that the register allocator calls Covers\nwith non-decreasing position values and caches the last returned\nresult to start the iteration closer to the result the next time the\nmethod is invoked. Stats from compiling the framework show that this\noptimization reduces the average number of iterations needed to find\nthe result by 40%.\n\nChange-Id: I4dd26b900879d5e1d03818ebc1e117cc6a53053c\n"
    },
    {
      "commit": "da02afe615191a19eae9a039786c4c4fc20dbfff",
      "tree": "6888219ad5cb67269d0399ca3d5070e808d5b7da",
      "parents": [
        "aa874e0bbfb21aec0661b93cb1c2ce065bc20302"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Feb 11 02:29:42 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Feb 13 05:42:28 2015 +0000"
      },
      "message": "Support hints for register pairs.\n\nChange-Id: Ia49dc5bf3e9a2bd481425bfe7fbeea9feb66c8e6\n"
    },
    {
      "commit": "c0572a451944f78397619dec34a38c36c11e9d2a",
      "tree": "2cc6f3c6f5ad45b4b85fb62627e797fe7e7734e1",
      "parents": [
        "0f2433bfcb02a662fe739e8e2b068abc2958e4c1"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Feb 06 14:35:25 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Feb 06 17:37:57 2015 +0000"
      },
      "message": "Optimize leaf methods.\n\nAvoid suspend checks and stack changes when not needed.\n\nChange-Id: I0fdb31e8c631e99091b818874a558c9aa04b1628\n"
    },
    {
      "commit": "ed59619b370ef23ffbb25d1d01f615e60a9262b6",
      "tree": "6c93bb6ceff95f7aaf232825e050eecc05c7282d",
      "parents": [
        "f90eec005997f98c1a9f874fbbf68414e5f9c766"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Fri Jan 23 10:39:45 2015 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Jan 26 16:13:57 2015 +0000"
      },
      "message": "Optimizing: Speed up HEnvironment use removal\n\nRemoval of use records from HEnvironment vregs involved iterating over\npotentially large linked lists which made compilation of huge methods\nvery slow. This patch turns use lists into doubly-linked lists, stores\npointers to the relevant nodes inside HEnvironment and subsequently\nturns the removals into constant-time operations.\n\nChange-Id: I0e1d4d782fd624e7b8075af75d4adf0a0634a1ee\n"
    },
    {
      "commit": "840e5461a85f8908f51e7f6cd562a9129ff0e7ce",
      "tree": "ea8b4cbc5a0e3dea96fefcd9247e6c06b17ac518",
      "parents": [
        "893e8881e31180721512c1b9e5ffacb03aad2e45"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 07 16:01:24 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jan 08 13:57:51 2015 +0000"
      },
      "message": "Implement double and float support for arm in register allocator.\n\nThe basic approach is:\n- An instruction that needs two registers gets two intervals.\n- When allocating the low part, we also allocate the high part.\n- When splitting a low (or high) interval, we also split the high\n  (or low) equivalent.\n- Allocation follows the (S/D register) requirement that low\n  registers are always even and the high equivalent is low + 1.\n\nChange-Id: I06a5148e05a2ffc7e7555d08e871ed007b4c2797\n"
    },
    {
      "commit": "a8eed3acbc39c71ec22dc2943e71eaa07c6507dd",
      "tree": "73f00c656e118c118c0b7dd8985df06624ca4666",
      "parents": [
        "4d3ed1a6f34bd31ed30faaca0433cf2a4b19bb7b"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Nov 24 17:47:10 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Nov 24 18:05:48 2014 +0000"
      },
      "message": "Revert \"Revert \"Fix the computation of linear ordering.\"\"\n\nPS2 fixes the obvious typos/wrong refactoring.\n\nThis reverts commit e50fa5887b1342b845826197d81950e26753fc9c.\n\nChange-Id: I22f81d63a12cf01aafd61535abc2399d936d49c2\n"
    },
    {
      "commit": "e50fa5887b1342b845826197d81950e26753fc9c",
      "tree": "979ab50cee6e41f6d26d6e2db453b065f782c958",
      "parents": [
        "3054a90063d379ab8c9e5a42a7daf0d644b48b07"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Nov 24 17:44:15 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Nov 24 17:44:15 2014 +0000"
      },
      "message": "Revert \"Fix the computation of linear ordering.\"\n\nBuild is broken.\n\nThis reverts commit 3054a90063d379ab8c9e5a42a7daf0d644b48b07.\n\nChange-Id: I259bc2bd6a58e30391b8176f3db5fdb5c07e4d6d\n"
    },
    {
      "commit": "3054a90063d379ab8c9e5a42a7daf0d644b48b07",
      "tree": "90e2138b5505f00daca6db17783a9129a6845e9b",
      "parents": [
        "23442bea869747da0361e96ec2704956de54ded7"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Nov 21 13:33:51 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Nov 21 13:33:51 2014 +0000"
      },
      "message": "Fix the computation of linear ordering.\n\nThe register allocator makes assumptions on the order, and\nwe ended up not computing the right one. The algorithm worked\nfine when the loop header is the block branching to the exit,\nbut in the presence of breaks or do/while, it was incorrect.\n\nChange-Id: Iad0a89872cd3f7b7a8b2bdf560f0d03493f93ba5\n"
    },
    {
      "commit": "277ccbd200ea43590dfc06a93ae184a765327ad0",
      "tree": "d89712e93da5fb2748989353c9ee071102cf3f33",
      "parents": [
        "ad17d41841ba1fb177fb0bf175ec0e9f5e1412b3"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Nov 03 21:36:10 2014 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Tue Nov 04 18:40:08 2014 -0800"
      },
      "message": "ART: More warnings\n\nEnable -Wno-conversion-null, -Wredundant-decls and -Wshadow in general,\nand -Wunused-but-set-parameter for GCC builds.\n\nChange-Id: I81bbdd762213444673c65d85edae594a523836e5\n"
    },
    {
      "commit": "296bd60423e0630d8152b99fb7afb20fbff5a18a",
      "tree": "384aa7659763bb77a038a67c27f7cf6059632570",
      "parents": [
        "57b4d1c44e246dfd4aaef2d23b20a696a0c5e57e"
      ],
      "author": {
        "name": "Mingyao Yang",
        "email": "mingyao@google.com",
        "time": "Mon Oct 06 16:47:28 2014 -0700"
      },
      "committer": {
        "name": "Mingyao Yang",
        "email": "mingyao@google.com",
        "time": "Mon Nov 03 16:16:50 2014 -0800"
      },
      "message": "Some improvement to reg alloc.\n\nChange-Id: If579a37791278500a7e5bc763f144c241f261920\n"
    },
    {
      "commit": "102cbed1e52b7c5f09458b44903fe97bb3e14d5f",
      "tree": "cb0a433c8f284021298c8a0c4dd0da97ca9d198a",
      "parents": [
        "07f5c5edb7ef24ac35364e6ef9a8107a44e6564e"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Oct 15 18:31:05 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Oct 21 16:03:51 2014 +0100"
      },
      "message": "Implement register allocator for floating point registers.\n\nAlso:\n- Fix misuses of emitting the rex prefix in the x86_64 assembler.\n- Fix movaps code generation in the x86_64 assembler.\n\nChange-Id: Ib6dcf6e7c4a9c43368cfc46b02ba50f69ae69cbe\n"
    },
    {
      "commit": "56b9ee6fe1d6880c5fca0e7feb28b25a1ded2e2f",
      "tree": "34e5163967f59a98e64f2c89489ed7b76334b48a",
      "parents": [
        "a3c4d72210de174552f47b2d117b1946f274af1e"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Oct 09 11:47:51 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Oct 09 14:42:13 2014 +0100"
      },
      "message": "Stop converting from Location to ManagedRegister.\n\nNow the source of truth is the Location object that knows\nwhich register (core, pair, fpu) it needs to refer to.\n\nChange-Id: I62401343d7479ecfb24b5ed161ec7829cda5a0b1\n"
    },
    {
      "commit": "01ef345767ea609417fc511e42007705c9667546",
      "tree": "8a3cf1b5a576caf212ef31db966b97b6d23aaf98",
      "parents": [
        "a9f2904263581f606a5704f2bb74efcecf7e9f97"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Oct 01 11:32:17 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Oct 07 21:25:27 2014 +0100"
      },
      "message": "Add trivial register hints to the register allocator.\n\n- Add hints for phis, same as first input, and expected registers.\n- Make the if instruction accept non-condition instructions.\n\nChange-Id: I34fa68393f0d0c19c68128f017b7a05be556fbe5\n"
    },
    {
      "commit": "8ddb00ca935733f5d3b07816e5bb33d6cabe6ec4",
      "tree": "9bca67b136523eb31aab736988143295ece97b56",
      "parents": [
        "cc6b59ee25d7b9782cc971687715d664a97b05bd"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Sep 29 12:00:40 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Sep 30 13:50:38 2014 +0100"
      },
      "message": "Improve detection of lifetime holes.\n\nThe check concluding that the next use was in a successor\nwas too conservative: two blocks following each other\nin terms of liveness are not necessarily predecessor/sucessor.\n\nChange-Id: Ideec98046c812aa5fb63781141b5fde24c706d6d\n"
    },
    {
      "commit": "8a16d97fb8f031822b206e65f9109a071da40563",
      "tree": "9dbbf5feaac15d2e4f54fbfc3c204fcdd6e8317a",
      "parents": [
        "c7f6b86c269727fe031146b9c18652d40916d46f"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Sep 11 10:30:02 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Sep 11 10:32:12 2014 +0100"
      },
      "message": "Fix valgrind errors.\n\nFor now just stack allocate the code generator. Will think\nabout cleaning up the root problem later (CodeGenerator being an\narena object).\n\nChange-Id: I161a6f61c5f27ea88851b446f3c1e12ee9c594d7\n"
    },
    {
      "commit": "e77493c7217efdd1a0ecef521a6845a13da0305b",
      "tree": "3055cb7aaea8b9edc498b2e209d74af36c32e0fd",
      "parents": [
        "41cba7c66cbc441b00fca48dfb2501181b1f2a53"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Wed Aug 20 15:08:45 2014 -0700"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Wed Aug 20 15:09:20 2014 -0700"
      },
      "message": "Make common BitVector operations inline-able.\n\nChange-Id: Ie25de4fae56c6712539f04172c42e3eff57df7ca\n"
    },
    {
      "commit": "e50383288a75244255d3ecedcc79ffe9caf774cb",
      "tree": "8858489463a57c7b50f7db4d972abec21302b7a7",
      "parents": [
        "cf90ba7ebe00346651f3b7ce1e5b1f785f7caabd"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jul 04 09:41:32 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jul 14 10:06:11 2014 +0100"
      },
      "message": "Support fields in optimizing compiler.\n\n- Required support for temporaries, to be only used by baseline compiler.\n- Also fixed a few invalid assumptions around locations and instructions\n  that don\u0027t need materialization. These instructions should not have an Out.\n\nChange-Id: Idc4a30dd95dd18015137300d36bec55fc024cf62\n"
    },
    {
      "commit": "31d76b42ef5165351499da3f8ee0ac147428c5ed",
      "tree": "4f9cf307923c72f73e4a814662a26406f155c38c",
      "parents": [
        "7eb3fa1e03b070c55ecbc814e2e3ae4409cf7b1e"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jun 09 15:02:22 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Jun 10 10:48:50 2014 +0100"
      },
      "message": "Plug code generator into liveness analysis.\n\nAlso implement spill slot support.\n\nChange-Id: If5e28811e9fbbf3842a258772c633318a2f4fafc\n"
    },
    {
      "commit": "ec7e4727e99aa1416398ac5a684f5024817a25c7",
      "tree": "3ad51887c890b5cbebf1ae8e4afec8d93b485168",
      "parents": [
        "7a6b77f9a694ea4569fbf44493fdcaeea237a8be"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jun 06 11:24:33 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jun 09 08:59:02 2014 +0100"
      },
      "message": "Fix some bugs in graph construction/simplification methods.\n\nAlso fix a brano during SSA construction. The code should\nnot have been commented out. Added a test to cover what the code\nintends.\n\nChange-Id: Ia00ae79dcf75eb0d412f07649d73e7f94dbfb6f0\n"
    },
    {
      "commit": "a7062e05e6048c7f817d784a5b94e3122e25b1ec",
      "tree": "a5d6b64ae6d5352f761fc2547bda863281adbe40",
      "parents": [
        "8b5b1e5593ffa77c393e4172b71a3d5a821d2ed8"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu May 22 12:50:17 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon May 26 11:31:38 2014 +0100"
      },
      "message": "Add a linear scan register allocator to the optimizing compiler.\n\nThis is a \"by-the-book\" implementation. It currently only deals\nwith allocating registers, with no hint optimizations.\n\nThe changes remaining to make it functional are:\n- Allocate spill slots.\n- Resolution and placements of Move instructions.\n- Connect it to the code generator.\n\nChange-Id: Ie0b2f6ba1b98da85425be721ce4afecd6b4012a4\n"
    },
    {
      "commit": "a5b8fde2d2bc3167078694fad417fddfe442a6fd",
      "tree": "287942554467eb8566291f7d021549f65763f53e",
      "parents": [
        "567e9dbc65ee183cda2a052dbf224c8c4a8f9423"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri May 23 15:16:44 2014 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri May 23 17:12:15 2014 +0100"
      },
      "message": "Rewrite BitVector index iterator.\n\nThe BitVector::Iterator was not iterating over the bits but\nrather over indexes of the set bits. Therefore, we rename it\nto IndexIterator and provide a BitVector::Indexes() to get\na container-style interface with begin() and end() for range\nbased for loops.\n\nAlso, simplify InsertPhiNodes where the tmp_blocks isn\u0027t\nneeded since the phi_nodes and input_blocks cannot lose any\nblocks in subsequent iterations, so we can do the Union()\ndirectly in those bit vectors and we need to repeat the loop\nonly if we have new input_blocks, rather than on phi_nodes\nchange. And move the temporary bit vectors to scoped arena.\n\nChange-Id: I6cb87a2f60724eeef67c6aaa34b36ed5acde6d43\n"
    },
    {
      "commit": "ddb311fdeca82ca628fed694c4702f463b5c4927",
      "tree": "24acde84ed7d0229c36d9bbca2a421acdff9d7a1",
      "parents": [
        "27710fa87cc7fc0f205a6b5a46f418a0cf9a5171"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri May 16 09:28:54 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon May 19 10:17:11 2014 +0100"
      },
      "message": "Build live ranges in preparation for register allocation.\n\nChange-Id: I7ae24afaa4e49276136bf34f4ba7d62db7f28c01\n"
    },
    {
      "commit": "0d3f578909d0d1ea072ca68d78301b6fb7a44451",
      "tree": "5a90ec26839afa06294a46e67a4c4481982c47bf",
      "parents": [
        "c2ffcecb61e474f29f3c6a8721dfd00e0252b1f8"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed May 14 09:43:38 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri May 16 09:07:31 2014 +0100"
      },
      "message": "Linearize the graph before creating live ranges.\n\nChange-Id: I02eb5671e3304ab062286131745c1366448aff58\n"
    },
    {
      "commit": "f635e63318447ca04731b265a86a573c9ed1737c",
      "tree": "47cab84a6ac47d8a4f5f281e3eabdf1780f220d0",
      "parents": [
        "d115735fe5523ff72319f0968f773683323c7f79"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed May 14 09:43:38 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed May 14 14:26:11 2014 +0100"
      },
      "message": "Add a compilation tracing mechanism to the new compiler.\n\nCode mostly imported from: https://android-review.googlesource.com/#/c/81653/.\n\nChange-Id: I150fe942be0fb270e03fabb19032180f7a065d13\n"
    },
    {
      "commit": "622d9c31febd950255b36a48b47e1f630197c5fe",
      "tree": "8a7f14ce3c6c087955ad5fe91a3ce7d5b5a82461",
      "parents": [
        "98a8a542f95e41c09d214a329a940b270f08f5b3"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon May 12 16:11:02 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue May 13 09:06:14 2014 +0100"
      },
      "message": "Add loop recognition and CFG simplifications in new compiler.\n\nWe do three simplifications:\n- Split critical edges, for code generation from SSA (new).\n- Ensure one back edge per loop, to simplify loop recognition (new).\n- Ensure only one pre header for a loop, to simplify SSA creation (existing).\n\nChange-Id: I9bfccd4b236a00486a261078627b091c8a68be33\n"
    },
    {
      "commit": "804d09372cc3d80d537da1489da4a45e0e19aa5d",
      "tree": "b226350fdf3dc0c55a11e1615010c8475f167f90",
      "parents": [
        "0095e0b8380a8802f40a21928800b9df6e11f1d7"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri May 02 08:46:00 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed May 07 10:32:11 2014 +0100"
      },
      "message": "Build live-in, live-out and kill sets for each block.\n\nThis information will be used when computing live ranges of\ninstructions.\n\nChange-Id: I345ee833c1ccb4a8e725c7976453f6d58d350d74\n"
    }
  ]
}