1. f9e9054 ART: Refactor Int64ConstantFrom to use Int64FromConstant; rename it to Int64FromLocation by Evgeny Astigeevich · 8 years ago
  2. 29aa082 Vectorization of saturation arithmetic. by Aart Bik · 8 years ago
  3. 66c158e Clean up signed/unsigned in vectorizer. by Aart Bik · 8 years ago
  4. 61b9228 ART: Introduce Uint8 loads in compiled code. by Vladimir Marko · 9 years ago
  5. e764d2e Use ScopedArenaAllocator for register allocation. by Vladimir Marko · 9 years ago
  6. ca6fff8 ART: Use ScopedArenaAllocator for pass-local data. by Vladimir Marko · 9 years ago
  7. d5d2f2c ART: Introduce Uint8 compiler data type. by Vladimir Marko · 9 years ago
  8. 0ebe0d8 ART: Introduce compiler data type. by Vladimir Marko · 9 years ago
  9. dbbac8f Implement Sum-of-Abs-Differences idiom recognition. by Aart Bik · 9 years ago
  10. 0148de4 Basic SIMD reduction support. by Aart Bik · 9 years ago
  11. 982334c Revert "Basic SIMD reduction support." by Nicolas Geoffray · 9 years ago
  12. cfa59b4 Basic SIMD reduction support. by Aart Bik · 9 years ago
  13. a57b4ee Revert "Basic SIMD reduction support." by Aart Bik · 9 years ago
  14. 9879d0e Basic SIMD reduction support. by Aart Bik · 9 years ago
  15. 895f922 ART: Fix up small header includes by Andreas Gampe · 9 years ago
  16. 8dfe746 ARM64: Encode constants when it is possible. by Artem Serov · 9 years ago
  17. a1633a7 Merge "Min/max SIMDization support." by Aart Bik · 9 years ago
  18. c8e93c7 Min/max SIMDization support. by Aart Bik · 9 years ago
  19. e1811ed ARM64: Share address computation across SIMD LDRs/STRs. by Artem Serov · 9 years ago
  20. 472821b Enable string "array get" vectorization. by Aart Bik · 9 years ago
  21. 0225b77 ARM64: Improve SIMD LDR/STR. by Artem Serov · 9 years ago
  22. f34dd20 ARM64: Support MultiplyAccumulate for SIMD. by Artem Serov · 9 years ago
  23. f3e61ee Implement halving add idiom (with checker tests). by Aart Bik · 9 years ago
  24. b31f91f ARM64: Support vectorization for double and long. by Artem Serov · 9 years ago
  25. d4bccf1 ARM64: Support 128-bit registers for SIMD. by Artem Serov · 9 years ago
  26. 6daebeb Implemented ABS vectorization. by Aart Bik · 9 years ago
  27. f8f5a16 ART vectorizer. by Aart Bik · 9 years ago