)]}' { "log": [ { "commit": "8cf9cb386cd9286d67e879f1ee501ec00d72a4e1", "tree": "88e86e214b425e444760fe4e0ffeee677e1558a2", "parents": [ "914b7b6a6c9f399b26b41e9160e9871ef749e0db" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Jul 19 09:28:38 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Jul 24 16:07:10 2017 -0700" }, "message": "ART: Include cleanup\n\nLet clang-format reorder the header includes.\n\nDerived with:\n\n* .clang-format:\n BasedOnStyle: Google\n IncludeIsMainRegex: \u0027(_test|-inl)?$\u0027\n\n* Steps:\n find . -name \u0027*.cc\u0027 -o -name \u0027*.h\u0027 | xargs sed -i.bak -e \u0027s/^#include/ #include/\u0027 ; git commit -a -m \u0027ART: Include cleanup\u0027\n git-clang-format -style\u003dfile HEAD^\n manual inspection\n git commit -a --amend\n\nTest: mmma art\nChange-Id: Ia963a8ce3ce5f96b5e78acd587e26908c7a70d02\n" }, { "commit": "420ee30f4c0f8a5bb6048df4fa27e5432ded893b", "tree": "fd72cba9ed09cf78e9377677fd144821fd9f6743", "parents": [ "2f0ac4fb4486e7d9e5c1545d45a2b9b818a80dc3" ], "author": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Tue Feb 21 18:10:26 2017 +0000" }, "committer": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Tue Jul 18 20:19:58 2017 +0100" }, "message": "ARM: VIXL32: Merge (un)signed extensions and integer additions\n\nTest: m test-art-target-run-test-551-checker-shifter-operand\nChange-Id: I041e80e51bf0954b38ab20dfa9b14aa7f6d6c53b\n" }, { "commit": "53463ba8717fc93379ebf2b0c04a9a2c85382973", "tree": "552b7b99e0f45239a3c1777ffacb00bb6fff2956", "parents": [ "f4546792385ece9dd0ba956a6c9580027cfc8fdd" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Thu Feb 16 15:18:03 2017 +0000" }, "committer": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Tue Mar 28 09:50:09 2017 +0100" }, "message": "Math.round float intrinsic for ARM.\n\nTest: m test-art-target\nTest: m 082-inline-execute\nChange-Id: I1b384e388b9959eca662922bffa8675cdbfe6e6b\n" }, { "commit": "74234daabb28a4b9c804bf8bf908e7334bd4d400", "tree": "0b60cb00ab117c1a9a4b92983514962198b548bf", "parents": [ "a7e9bfafeb64b1142433a41b05ddc263cadc61e3" ], "author": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Fri Jan 13 14:42:47 2017 +0000" }, "committer": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Fri Feb 17 14:59:27 2017 +0000" }, "message": "ARM: Merge data-processing instructions and shifts/(un)signed extensions\n\nThis commit mirrors the work that has already been done for ARM64.\n\nTest: m test-art-target-run-test-551-checker-shifter-operand\nChange-Id: Iec8c1563b035f40f0e18dcffde28d91dc21922f8\n" }, { "commit": "c032e74b57d31861b6bb55500016ebb5476eb142", "tree": "044af8b3efe9326245a9f32144a6b23b64ec0e22", "parents": [ "1e6578a68d6f4499362254bcdeb6bbf55e309ea4" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Mon Mar 28 16:44:32 2016 +0100" }, "committer": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Thu Feb 02 17:04:03 2017 +0000" }, "message": "Math.min and Math.max intrinsics for ARM\n\nThis patch implements min/max intrinsics for:\n * Long\n * Float\n * Double\n\nTest: m test-art-host\nTest: m test-art-target\nTest: 082-inline-execute\n\nChange-Id: I2dfab8ab606f3d01fba712f9014d2e0617449d74\n" }, { "commit": "644032c817615210c1e17fe27010853abd8714e5", "tree": "1ef16b01ed825cb4097b9dbed1be96657b26ef1a", "parents": [ "c836b5a8a5ea00b0cd332d5e60c9ec10ae1e74fb" ], "author": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Tue Dec 06 17:51:43 2016 +0000" }, "committer": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Mon Dec 12 11:42:43 2016 +0000" }, "message": "ARM: VIXL32: Do a code cleanup.\n\nThis commit is mostly about changing the VIXL-based code generator\nto use the new helper functions in more places.\n\nTest: ART_USE_VIXL_ARM_BACKEND\u003dtrue m test-art-host\nTest: ART_USE_VIXL_ARM_BACKEND\u003dtrue m test-art-target\nChange-Id: Ibe35f6a133d5822cc3b7a876cc54590cdaca67fb\n" }, { "commit": "d4cc5b2127894475160b5d2bba9791dd21af5953", "tree": "04120b6077cacb5d16cb40161dfddd6170d8a64e", "parents": [ "3acf36142594f0afb60e2eef82fdfab1b17b2463" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Fri Nov 04 11:19:09 2016 +0000" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Dec 05 13:01:29 2016 +0000" }, "message": "ARM: VIXL32: Implement Invoke, LoadClass, LoadString dispatch.\n\nImplemented dispatch optimizations for InvokeStaticOrDirect,\nLoadClass, LoadString (excluding cases that use Literals).\nPerformed a cleanup of VIXL backend.\n\nTest: export ART_USE_VIXL_ARM_BACKEND\u003dtrue \u0026\u0026 \\\n mma test-art-host dist \u0026\u0026 mma test-art-target dist\n\nChange-Id: Ib37a6b7e7657196b13caec999d190be747857c1d\n" }, { "commit": "b77051ea5718fe017f2fa884b9ca4c8186c95190", "tree": "bb51782f8350be00195becabc3cd8758f15010a0", "parents": [ "d0111420a9f924fe560a97132d09ae531852fd69" ], "author": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Mon Nov 21 19:46:00 2016 +0000" }, "committer": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Fri Nov 25 14:16:31 2016 +0000" }, "message": "ARM: VIXL32: Fix breaking changes from recent VIXL update.\n\nTest: m test-art-host\nTest: m test-art-target\nChange-Id: I02a608bf51b889a2bfff43272a3619582bf9cf20\n" }, { "commit": "cfbe9138edcc56be24f2fad121cd38d6490d95c4", "tree": "620b76b45154264d1dfd2d3baf8a25f843cd9142", "parents": [ "cc7433d333cd62ed09c0ba0a17e8b0b30a31cb99" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Fri Oct 14 15:58:56 2016 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Thu Nov 10 14:54:09 2016 +0000" }, "message": "ARM: VIXL32: Implement InstanceOf, InvokeInterface and others.\n\nMore than 100 tests now start to pass.\n\nTest: export ART_USE_VIXL_ARM_BACKEND\u003dtrue \u0026\u0026 \\\n mma test-art-host dist \u0026\u0026 mma test-art-target dist\n\nChange-Id: I7a30241d42bf0beec254f6988646282f4ea46cef\n" }, { "commit": "e28d9ae520082caece9dc90c87b69f864bf886e5", "tree": "34e0fb6cf8081cc298a4db8e69284c5bb93416c7", "parents": [ "77a0e4541a29c26dba21ed8c1ed1c29ef8d0ce4c" ], "author": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Tue Oct 25 18:17:23 2016 +0100" }, "committer": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Wed Nov 02 16:49:30 2016 +0000" }, "message": "ARM: VIXL32: Implement the functionality needed by intrinsics.\n\nThis patch passes:\n* 004-UnsafeTest\n\nTest: ART_USE_VIXL_ARM_BACKEND\u003dtrue m test-art-host\nTest: ART_USE_VIXL_ARM_BACKEND\u003dtrue m test-art-target\nChange-Id: I7a3cd410411ef3a520d419734a835090097b2aee\n" }, { "commit": "c34dba70a3f0b10399e916ae1c68431d34ae6df5", "tree": "55626f0a297182cdf6cc5e6a9cbf8ce3a2989167", "parents": [ "e7b46e22c7f4f6f503501b3b2ad99113289d142b" ], "author": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Mon Oct 03 10:14:44 2016 +0100" }, "committer": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Tue Nov 01 15:39:46 2016 +0000" }, "message": "ARM: VIXL32: Implement ArrayGet, ArraySet, BoundsCheck etc.\n\nOver 100 more ART tests now start to pass.\n\nTest: export ART_USE_VIXL_ARM_BACKEND\u003dtrue \u0026\u0026 \\\n mma test-art-host dist \u0026\u0026 \\\n mma test-art-target dist\n\nChange-Id: I8b7c2e29886981d72057d36347bca0626aabfe81\n" }, { "commit": "a7812ae7939b199392f874b24a52454bbd0c13f2", "tree": "fcaff0417676c74ad7bf88e7c2571948e7eeef81", "parents": [ "a497095b67c4ba2969d0b2a13f6959125c89d2bc" ], "author": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Mon Oct 17 10:03:36 2016 +0100" }, "committer": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Mon Oct 17 13:41:40 2016 +0100" }, "message": "ARM: VIXL32: Pass initial ART tests with new code generator.\n\n- Implement enough codegen to pass ~70 art/tests.\n\n- When ART_USE_VIXL_ARM_BACKEND is defined:\n - Blacklist known-to-fail target tests\n - interpret-only everything except the tests themselves\n - Set a flag to use the VIXL based ARM backend\n\nTest: export ART_USE_VIXL_ARM_BACKEND\u003dtrue \u0026\u0026 mma test-art-target \u0026\u0026 mma test-art-host\n\nChange-Id: Ic8bc095e8449f10f97fa0511284790f36c20e276\n" }, { "commit": "fe8854609898b5a148d2c4094aa9970af1a4ec59", "tree": "702e576ecfedb88f84b47f6b112d227161709520", "parents": [ "45026e4548641b1c0da0a030d563adb894bc5dd5" ], "author": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Thu Sep 22 10:24:38 2016 +0100" }, "committer": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Thu Sep 22 10:44:29 2016 +0100" }, "message": "Revert \"Revert \"ARM: VIXL32: Add an initial code generator that passes codegen_tests.\"\"\n\nThis VIXL32-based code generator is not enabled in the optimizing\ncompiler by default. Changes in codegen_test.cc test it in parallel with\nthe existing ARM backend.\n\nThis patch provides a base for further work, the new backend will not\nbe enabled in the optimizing compiler until parity is proven with the\ncurrent ARM backend and assembler.\n\nTest: gtest-codegen_test on host and target\n\nThis reverts commit 7863a2152865a12ad9593d8caad32698264153c1.\n\nChange-Id: Ia09627bac22e78732ca982d207dc0b00bda435bb\n" }, { "commit": "7863a2152865a12ad9593d8caad32698264153c1", "tree": "69c31579f4440d9e8cffbe63b9975bff8a8c8ea2", "parents": [ "b138dfbd76f9d8b64fb9dbaf1a7c25e2549b2a8c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 21 16:53:03 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 21 16:53:03 2016 +0000" }, "message": "Revert \"ARM: VIXL32: Add an initial code generator that passes codegen_tests.\"\n\nFailing with:\nart/compiler/optimizing/code_generator_arm_vixl.cc:396:47: error: too few arguments to function call, expected 3, have 2\n ValidateInvokeRuntime(instruction, slow_path);\n\nThis reverts commit b138dfbd76f9d8b64fb9dbaf1a7c25e2549b2a8c.\n\nChange-Id: Idccfe076f5905ea92ecbe3afbc7c8c64ecda94be\n" }, { "commit": "b138dfbd76f9d8b64fb9dbaf1a7c25e2549b2a8c", "tree": "a3765fd2bd7e5ddd7ec81adab1ec36859f193d94", "parents": [ "5cfaafbda5d2de57e311cfc9051f8d817091e950" ], "author": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Tue Jul 26 10:33:29 2016 +0100" }, "committer": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Thu Sep 15 16:17:01 2016 +0100" }, "message": "ARM: VIXL32: Add an initial code generator that passes codegen_tests.\n\nThis VIXL32-based code generator is not enabled in the optimizing\ncompiler by default. Changes in codegen_test.cc test it in parallel\nwith the existing ARM backend.\n\nThis patch provides a base for further work, the new backend will not\nbe enabled in the optimizing compiler until parity is proven with the\ncurrent ARM backend and assembler.\n\nTest: gtest-codegen_test on host and target\n\nChange-Id: Id556a975b2645bf1d98ab2984650e8435b2312c2\n" } ] }