)]}'
{
  "log": [
    {
      "commit": "8cf9cb386cd9286d67e879f1ee501ec00d72a4e1",
      "tree": "88e86e214b425e444760fe4e0ffeee677e1558a2",
      "parents": [
        "914b7b6a6c9f399b26b41e9160e9871ef749e0db"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Wed Jul 19 09:28:38 2017 -0700"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Jul 24 16:07:10 2017 -0700"
      },
      "message": "ART: Include cleanup\n\nLet clang-format reorder the header includes.\n\nDerived with:\n\n* .clang-format:\n BasedOnStyle: Google\n IncludeIsMainRegex: \u0027(_test|-inl)?$\u0027\n\n* Steps:\n find . -name \u0027*.cc\u0027 -o -name \u0027*.h\u0027 | xargs sed -i.bak -e \u0027s/^#include/ #include/\u0027 ; git commit -a -m \u0027ART: Include cleanup\u0027\n git-clang-format -style\u003dfile HEAD^\n manual inspection\n git commit -a --amend\n\nTest: mmma art\nChange-Id: Ia963a8ce3ce5f96b5e78acd587e26908c7a70d02\n"
    },
    {
      "commit": "2e6f38af86a335cf8207a6a102a1b7628cb62999",
      "tree": "edfc520a274d12eda81f886b55335d90d15177d0",
      "parents": [
        "0b3e72e56e470efab18f1e80e548fce94349d5e5"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Thu Nov 03 14:06:20 2016 -0700"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Fri Nov 04 09:01:53 2016 -0700"
      },
      "message": "ART: Make Location trivially copyable\n\nLocation is a ValueObject and should be trivially copyable. Move\ncopy constructor and copy assignment to default.\n\nAdd static assert.\n\nBug: 32619234\nTest: m\nChange-Id: I1ef8b65aafdbf84e3d4b7724b93f13936b590eba\n"
    },
    {
      "commit": "804b03ffb9b9dc6cc3153e004c2cd38667508b13",
      "tree": "91c7fd54b5000e041bf9d3d5b233dabce1fad614",
      "parents": [
        "80eb0bc2757274816a014a2997848d288c9ee553"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Sep 14 16:26:36 2016 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Sep 20 14:55:44 2016 +0100"
      },
      "message": "Change remaining slow path throw entrypoints to save everything.\n\nChange DivZeroCheck, BoundsCheck and explicit NullCheck\nslow path entrypoints to conform to kSaveEverything.\n\nOn Nexus 9, AOSP ToT, the boot.oat size reduction is\n  prebuilt multi-part boot image:\n    - 32-bit boot.oat: -12KiB (-0.04%)\n    - 64-bit boot.oat: -24KiB (-0.06%)\n  on-device built single boot image:\n    - 32-bit boot.oat: -8KiB (-0.03%)\n    - 64-bit boot.oat: -16KiB (-0.04%)\n\nTest: Run ART test suite including gcstress on host and Nexus 9.\nTest: Manually disable implicit null checks and test as above.\nChange-Id: If82a8082ea9ae571c5d03b5e545e67fcefafb163\n"
    },
    {
      "commit": "70e97462116a47ef2e582ea29a037847debcc029",
      "tree": "ee587e35b9b9483c35875ccc8ddea139978ca823",
      "parents": [
        "521691ae4dfad47cf6b46858347fa5fa32fd7bcc"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Aug 09 11:04:26 2016 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Sep 05 17:27:41 2016 +0100"
      },
      "message": "Avoid excessive spill slots for slow paths.\n\nReducing the frame size makes stack maps smaller as we need\nfewer bits for stack masks and some dex register locations\nmay use short location kind rather than long. On Nexus 9,\nAOSP ToT, the boot.oat size reduction is\n  prebuilt multi-part boot image:\n    - 32-bit boot.oat: -416KiB (-0.6%)\n    - 64-bit boot.oat: -635KiB (-0.9%)\n  prebuilt multi-part boot image with read barrier:\n    - 32-bit boot.oat: -483KiB (-0.7%)\n    - 64-bit boot.oat: -703KiB (-0.9%)\n  on-device built single boot image:\n    - 32-bit boot.oat: -380KiB (-0.6%)\n    - 64-bit boot.oat: -632KiB (-0.9%)\n  on-device built single boot image with read barrier:\n    - 32-bit boot.oat: -448KiB (-0.6%)\n    - 64-bit boot.oat: -692KiB (-0.9%)\n\nThe other benefit is that at runtime, threads may need fewer\npages for their stacks, reducing overall memory usage.\n\nWe defer the calculation of the maximum spill size from\nthe main register allocator (linear scan or graph coloring)\nto the RegisterAllocationResolver and do it based on the\nlive registers at slow path safepoints. The old notion of\nan artificial slow path safepoint interval is removed as\nit is no longer needed.\n\nTest: Run ART test suite on host and Nexus 9.\nBug: 30212852\nChange-Id: I40b3d114e278e2c5807982904fa49bf6642c6275\n"
    },
    {
      "commit": "f6a35de9eeefb20f6446f1b4815b4dcb0161d09c",
      "tree": "cf484acbd6889b92a7fe3e8615611129088c3894",
      "parents": [
        "459898dc4470559ba1e1d578bc52a914d1f573f5"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Mar 21 12:01:50 2016 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Mar 21 16:50:08 2016 +0000"
      },
      "message": "Optimizing: Fix register allocator validation memory usage.\n\nAlso attribute ArenaBitVector allocations to appropriate\npasses. This was used to track down the source of the\nexcessive memory alloactions.\n\nBug: 27690481\n\nChange-Id: Ib895984cb7c04e24cbc7abbd8322079bab8ab100\n"
    },
    {
      "commit": "ea5af68d6dda832bdfb5978a0c5d6f86a3f67e80",
      "tree": "01fbfdc1b686cafad2d545815980e3d0b0451e0a",
      "parents": [
        "b24301b06b31b463f7e92ebc9a8f75839e54b746"
      ],
      "author": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Thu Oct 22 17:35:49 2015 -0400"
      },
      "committer": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Thu Nov 05 10:56:59 2015 -0500"
      },
      "message": "X86-64: Split long/double constant array/field set\n\nA long constant needs to be in a register to store to memory.\nBy allowing stores of constants that are outside of the range of\nint32_t, we reduce register usage.\n\nAlso support sets of float/double constants by using integer stores.\n\nRename RegisterOrInt32LongConstant to RegisterOrInt32Constant as it\nnow handles any type of constant.\n\nChange-Id: I025d9ef889a5a433e45aa03b376bae40f14197d2\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n"
    },
    {
      "commit": "2aaa4b5532d30c4e65d8892b556400bb61f9dc8c",
      "tree": "f4259c33171ec8efd945aeedab1e57feb7970f42",
      "parents": [
        "3f4b39dec9ec6b8948ed18b9d65ba49db2465004"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Sep 17 17:03:26 2015 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Sep 25 12:18:02 2015 +0100"
      },
      "message": "Optimizing: Tag more arena allocations.\n\nReplace GrowableArray with ArenaVector and tag arena\nallocations with new allocation types.\n\nAs part of this, make the register allocator a bit more\nefficient, doing bulk insert/erase. Some loops are now\nO(n) instead of O(n^2).\n\nChange-Id: Ifac0871ffb34b121cc0447801a2d07eefd308c14\n"
    },
    {
      "commit": "06b66d05a6251d91b5e2516f579bfff5fa49191c",
      "tree": "82edce66106b31acad30562463a78eef1abb68bc",
      "parents": [
        "bbcc01a5a38d28c221c05788e56473a287f57589"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Jul 01 12:47:25 2015 +0100"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Jul 01 12:48:31 2015 +0100"
      },
      "message": "Fix a MOV instruction in Optimizing\u0027s x86-64 code generator.\n\nUse `movl\u0027 instead of `movw\u0027 to store a 32-bit immediate\n(integer or reference) into a field.\n\nAlso fix art::Location::RegisterOrInt32LongConstant to\nproperly handle non-long constants.\n\nChange-Id: I34c6ec8eaa1632822a31969f87c9c2d6c5b96326\n"
    },
    {
      "commit": "0a23d74dc2751440822960eab218be4cb8843647",
      "tree": "39d69de5d812826c4065d0acd38a58cd983f21f0",
      "parents": [
        "cdeb0b5fede4c06488f43a212591e661d946bc78"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu May 07 11:57:35 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon May 11 14:17:22 2015 +0100"
      },
      "message": "Add a parent environment to HEnvironment.\n\nThis code has no functionality change. It adds a placeholder\nfor chaining inlined frames.\n\nChange-Id: I5ec57335af76ee406052345b947aad98a6a4423a\n"
    },
    {
      "commit": "3f6c7f61855172d3d9b7a9221baba76136088e7c",
      "tree": "b61ab89a880ae74f44956425f5c9794d73ef029d",
      "parents": [
        "cc22e3946baf035c8732e9417ab132bfe663aa45"
      ],
      "author": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Fri Mar 13 13:47:53 2015 -0400"
      },
      "committer": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Fri Mar 13 14:01:43 2015 -0400"
      },
      "message": "[optimizing] Improve x86, x86_64 code\n\nTweak the generated code to allow more use of constants and other small\nchanges\n- Use test vs. compare to 0\n- EmitMove of 0.0 should use xorps\n- VisitCompare kPrimLong can use constants\n- cmp/add/sub/mul on x86_64 can use constants if in int32_t range\n- long bit operations on x86 examine long constant high/low to optimize\n- Use 3 operand imulq if constant is in int32_t range\n\nChange-Id: I2dd4010fdffa129fe00905b0020590fe95f3f926\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n"
    },
    {
      "commit": "f7a0c4e421b5edaad5b7a15bfff687da28d0b287",
      "tree": "5423a2357661b80d75cb2e3a2b5395a3fe3cd9b5",
      "parents": [
        "0f2433bfcb02a662fe739e8e2b068abc2958e4c1"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Feb 10 17:08:47 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Feb 10 19:12:59 2015 +0000"
      },
      "message": "Improve ParallelMoveResolver to work with pairs.\n\nChange-Id: Ie2a540ffdb78f7f15d69c16a08ca2d3e794f65b9\n"
    },
    {
      "commit": "6c2dff8ff8e1440fa4d9e1b2ba2a44d036882801",
      "tree": "da2d48b3d84733ac6b29194cb2f624693a643d48",
      "parents": [
        "22c9285142169691eb2a9e2d4a49751fc7e57c2a"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 21 14:56:54 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 21 15:19:06 2015 +0000"
      },
      "message": "Revert \"Revert \"Fully support pairs in the register allocator.\"\"\n\nThis reverts commit c399fdc442db82dfda66e6c25518872ab0f1d24f.\n\nChange-Id: I19f8215c4b98f2f0827e04bf7806c3ca439794e5\n"
    },
    {
      "commit": "c399fdc442db82dfda66e6c25518872ab0f1d24f",
      "tree": "6f0841ad5e8e80b09e34e084ae8eac336bce73a2",
      "parents": [
        "41aedbb684ccef76ff8373f39aba606ce4cb3194"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 21 12:42:57 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 21 12:42:57 2015 +0000"
      },
      "message": "Revert \"Fully support pairs in the register allocator.\"\n\nLibcore tests fail.\n\nThis reverts commit 41aedbb684ccef76ff8373f39aba606ce4cb3194.\n\nChange-Id: I2572f120d4bbaeb7a4d4cbfd47ab00c9ea39ac6c\n"
    },
    {
      "commit": "41aedbb684ccef76ff8373f39aba606ce4cb3194",
      "tree": "94929237a0fe9b24dda7409d9433f07e82af4461",
      "parents": [
        "97c89e4c081dcf4bacbde70b6609e366c9da417e"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 14 10:49:16 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jan 21 11:27:57 2015 +0000"
      },
      "message": "Fully support pairs in the register allocator.\n\nEnabled on ARM for longs and doubles.\n\nChange-Id: Id8792d08bd7ca9fb049c5db8a40ae694bafc2d8b\n"
    },
    {
      "commit": "71fb52fee246b7d511f520febbd73dc7a9bbca79",
      "tree": "444d91e910433aaf887bbdada28dfaa3160bebc2",
      "parents": [
        "420457e6040184a6e1639a4c84fcc8e237bd8a3d"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Dec 29 17:43:08 2014 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Thu Jan 15 10:21:11 2015 -0800"
      },
      "message": "ART: Optimizing compiler intrinsics\n\nAdd intrinsics infrastructure to the optimizing compiler.\n\nAdd almost all intrinsics supported by Quick to the x86-64 backend.\nFurther intrinsics require more assembler support.\n\nChange-Id: I48de9b44c82886bb298d16e74e12a9506b8e8807\n"
    },
    {
      "commit": "8e3964b766652a0478e8e0e303e8556c997675f1",
      "tree": "ebae22017d3d3c872642cbc56610f67ff32a861d",
      "parents": [
        "5830247c351a1c40f37666584d6c390f32c31957"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Oct 17 11:06:38 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Oct 21 11:47:54 2014 +0100"
      },
      "message": "Remove the notion of dies at entry.\n\n- Instead, explicitly say that the output does not overlap.\n- Inputs that must be in a fixed register do die at entry,\n  as we know they have a location that others can not take.\n- There is also no need to differentiate between an input move\n  and a connecting sibling move - those can be put in the\n  same parallel move instruction.\n\nChange-Id: I1b2b2827906601f822b59fb9d6a21d48e43bae27\n"
    },
    {
      "commit": "56b9ee6fe1d6880c5fca0e7feb28b25a1ded2e2f",
      "tree": "34e5163967f59a98e64f2c89489ed7b76334b48a",
      "parents": [
        "a3c4d72210de174552f47b2d117b1946f274af1e"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Oct 09 11:47:51 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Oct 09 14:42:13 2014 +0100"
      },
      "message": "Stop converting from Location to ManagedRegister.\n\nNow the source of truth is the Location object that knows\nwhich register (core, pair, fpu) it needs to refer to.\n\nChange-Id: I62401343d7479ecfb24b5ed161ec7829cda5a0b1\n"
    },
    {
      "commit": "26a25ef62a13f409f941aa39825a51b4d6f0f047",
      "tree": "aa0ed991cfcea17297e85f74624a44e32e8913cf",
      "parents": [
        "17b1c174dddb1d83018740c2084ab42daa812fff"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Sep 30 13:54:09 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Oct 06 18:52:56 2014 +0100"
      },
      "message": "Add a prepare for register allocation pass.\n\n- Currently the pass just changes the uses of checks to the\n  actual values.\n- Also optimize array access, now that inputs can be constants.\n- And fix another bug in the register allocator reveiled by\n  this change.\n\nChange-Id: I43be0dbde9330ee5c8f9d678de11361292d8bd98\n"
    },
    {
      "commit": "9ae0daa60c568f98ef0020e52366856ff314615f",
      "tree": "e74b9ee49af0b1b202444fdaaca4b39620d962dd",
      "parents": [
        "2d4e89e97812aeca16ff058d7286f29b7549c43a"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Sep 30 22:40:23 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Oct 06 16:36:49 2014 +0100"
      },
      "message": "Add support for inputs dying at entry of instructions.\n\n- Start using it in places where it makes sense.\n- Also improve suspend check on arm to use subs directly.\n\nChange-Id: I09ac0589f5ccb9b850ee757c76dcbcf35ee8cd01\n"
    },
    {
      "commit": "3bca0df855f0e575c6ee020ed016999fc8f14122",
      "tree": "15e15c8290ad314c29ca608f51d89d4db68fd9ba",
      "parents": [
        "d41491adb23764f28a80cbb7f2bd7af6491cd892"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Sep 19 11:01:00 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Sep 23 13:57:30 2014 +0100"
      },
      "message": "Support for saving and restoring live registers in a slow path.\n\nAnd use it in suspend check slow paths.\n\nChange-Id: I79caf28f334c145a36180c79a6e2fceae3990c31\n"
    },
    {
      "commit": "3946844c34ad965515f677084b07d663d70ad1b8",
      "tree": "0d85bfba2ff69c34a2897351d1e50a1464509305",
      "parents": [
        "e2c23739c6395a83b30ece38f8a2e9e1bf7cf3ce"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Sep 02 15:17:15 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Sep 08 12:15:07 2014 +0100"
      },
      "message": "Runtime support for the new stack maps for the opt compiler.\n\nNow most of the methods supported by the compiler can be optimized,\ninstead of using the baseline.\n\nChange-Id: I80ab36a34913fa4e7dd576c7bf55af63594dc1fa\n"
    },
    {
      "commit": "96f89a290eb67d7bf4b1636798fa28df14309cc7",
      "tree": "ca2b484a18107f8253aa7774cde304586a31bc60",
      "parents": [
        "4436e926aa8e64ac7e4c4afb81f2a59b2477045a"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jul 11 10:57:49 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jul 21 09:54:20 2014 +0100"
      },
      "message": "Add assembly operations with constants in optimizing compiler.\n\nChange-Id: I5bcc35ab50d4457186effef5592a75d7f4e5b65f\n"
    },
    {
      "commit": "76716a69a0e51b3516227e8b7e365e4b9490618c",
      "tree": "b7e13be776f655f9ca213e44bffe925c3dab3bd1",
      "parents": [
        "59f3f62534581311c7c403c832f56c272426a17c"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri May 23 10:14:19 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri May 23 10:14:19 2014 +0100"
      },
      "message": "Forgot these files from last commit.\n\nChange-Id: I9ab7975daa5ed7aae6bff8730bb63fb48a798ea8\n"
    }
  ]
}