)]}' { "log": [ { "commit": "8cf9cb386cd9286d67e879f1ee501ec00d72a4e1", "tree": "88e86e214b425e444760fe4e0ffeee677e1558a2", "parents": [ "914b7b6a6c9f399b26b41e9160e9871ef749e0db" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Jul 19 09:28:38 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Jul 24 16:07:10 2017 -0700" }, "message": "ART: Include cleanup\n\nLet clang-format reorder the header includes.\n\nDerived with:\n\n* .clang-format:\n BasedOnStyle: Google\n IncludeIsMainRegex: \u0027(_test|-inl)?$\u0027\n\n* Steps:\n find . -name \u0027*.cc\u0027 -o -name \u0027*.h\u0027 | xargs sed -i.bak -e \u0027s/^#include/ #include/\u0027 ; git commit -a -m \u0027ART: Include cleanup\u0027\n git-clang-format -style\u003dfile HEAD^\n manual inspection\n git commit -a --amend\n\nTest: mmma art\nChange-Id: Ia963a8ce3ce5f96b5e78acd587e26908c7a70d02\n" }, { "commit": "ad76ef641d8570affb2e3c728b40876c4ed53fac", "tree": "3be2b0da866469391593f6c5142c6e4937d5a2d9", "parents": [ "28e535bd94c84d1019f18c46e189928435e2938d", "bf9e21a33404440e1723e738975e23f7c1334e18" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon Jul 24 11:33:49 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jul 24 11:33:49 2017 +0000" }, "message": "Merge \"Improve SchedulingLatencyVisitorARM on HCondition latency settings.\"" }, { "commit": "bf9e21a33404440e1723e738975e23f7c1334e18", "tree": "c25c5a814530c949745aa1f170505319f57a0d0e", "parents": [ "89ae0f42e38a2f985ac404830f2a05fecf9547e2" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Thu Jun 15 11:01:11 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jul 21 13:50:00 2017 +0000" }, "message": "Improve SchedulingLatencyVisitorARM on HCondition latency settings.\n\nTest: m test-art-host\nTest: m test-art-target\n\nChange-Id: Ieb42a8511036c86a9d99972dfd7d745f64559685\n" }, { "commit": "c73753f70ab4fc9a166637bee514b292f0fa0109", "tree": "a464e300d44b5a3eca10cb00cc42be7c1ab9da96", "parents": [ "530a6b6902b50db43659757a6270b7d111d93a2c", "07bfbace6f835e6c748fd68ec7624992478b16c1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jul 21 09:41:58 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jul 21 09:41:58 2017 +0000" }, "message": "Merge \"Hash-based DexCache methods array.\"" }, { "commit": "07bfbace6f835e6c748fd68ec7624992478b16c1", "tree": "5d094a00fbc90455bd9b53e042cf8b4fe8433462", "parents": [ "ba118827465d12177f3996e50133960087b1c916" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 06 14:55:02 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 20 16:33:00 2017 +0100" }, "message": "Hash-based DexCache methods array.\n\nTotal boot*.art size for aosp_angler-userdebug:\n - arm64:\n - before: 11603968\n - after: 10129408 (-1.4MiB, -12.7%)\n - arm:\n - before: 8626176\n - after: 7888896 (-0.7MiB, -8.5%)\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: Nexus 6P boots.\nTest: testrunner.py --target\nTest: Build aosp_mips64-eng\nBug: 30627598\nChange-Id: I7f858605de5f074cbd7f0d9c4c072fbd44aee28f\n" }, { "commit": "331f4c4e287791611733120c1a1c2afd55ecdd65", "tree": "1fcf7810c6c8e2df8b6191bb14a69084f3c7cf11", "parents": [ "13c8343a3394414c90f2fcd1e8efff70e7d2387e", "ba118827465d12177f3996e50133960087b1c916" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Jul 20 14:09:32 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jul 20 14:09:32 2017 +0000" }, "message": "Merge \"ART: Change method lookup to be more consistent to JLS and the RI.\"" }, { "commit": "ba118827465d12177f3996e50133960087b1c916", "tree": "f39728cdafc7810004d51c0bef2728b98993daa9", "parents": [ "64a102dde8c5daad83b991710decb418ce43aac5" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 12 15:41:56 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 20 13:35:06 2017 +0100" }, "message": "ART: Change method lookup to be more consistent to JLS and the RI.\n\nThe method lookup for different invoke types was previously\nwidely different and didn\u0027t work well with the dex cache\nmethod array where we have only a single slot for each\nMethodId. The new behavior is to perform the same lookup for\nall cases, distinguishing only between interface and\nnon-interface referencing class, and to further align the\nbehavior with the JLS and the RI. Where the JLS conflicts\nwith the RI, we follow the JLS semantics.\n\nThe new lookup for class methods first searches the methods\ndeclared in the superclass chain (ignoring \"copied\" methods)\nand only then looks in the \"copied\" methods. If the search\nin the superclass chain finds a method that has not been\ninherited (i.e. either a private method or a package-access\nmethod where one of the classes in the chain does not belong\nto the same package, see JLS 8.4.8), we still search the\n\"copied\" methods as there may actually be a method inherited\nfrom an interface. This follows the JLS semantics where\ninherited methods are included in the search (JLS 15.12.2.1)\nbut conflicts with the RI where the private or\npackage-access method takes precedence over methods\ninherited from interfaces.\n\nNote that this search can find an accessible method that is\nnot inherited by the qualifying type, either for a package\naccess method when the referrer is in the same package but\nthe qualifying type is in another package, or for a private\nmethod where the referrer is in the same class but the\nqualifying type is actually a subclass. For the moment we\nallow such calls and we shall consider whether to throw\nan IncompatibleClassChangeError in this situation in future\nto comply with JLS 15.12.4.3.\n\nThe new lookup for interface methods searches the interface\nclass, then all the superinterfaces and then the\njava.lang.Object class, see implicitly declared methods in\ninterfaces, JLS 9.2. The search for the maximally-specific\nnon-abstract superinterface method is not yet implemented,\nbut the difference should be difficult to observe as the\nusual subsequent call to FindVirtualMethodForInterface()\nshould yield the same result for any matching method.\n\nThe new test 162-method-idx-clash exposes several cases\nwhere we previously completely messed up due to the effects\nof the DexCache, or where we were out of line with the RI.\nIt also tests a case where the JLS and the RI disagree and\nwe follow the JLS.\n\nTest: art/test/run-test --host --jvm 162-method-resolution\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: testrunner.py --host --interp-ac\nTest: Nexus 6P boots.\nTest: testrunner.py --target\nBug: 62855082\nBug: 30627598\nChange-Id: If450c8cff2751369011d649c25d28a482a2c61a3\n" }, { "commit": "13c8343a3394414c90f2fcd1e8efff70e7d2387e", "tree": "c71c2e5775fe82242034c00d0a5c69c4116169bd", "parents": [ "3579eb29f88a9fe4040e4d212e0acaa2e0690946", "4147fcc43c2ee019a06e55384985e3eaf82dcb8c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 20 11:32:20 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jul 20 11:32:20 2017 +0000" }, "message": "Merge \"MIPS: Reduce Baker read barrier code size overhead\"" }, { "commit": "3579eb29f88a9fe4040e4d212e0acaa2e0690946", "tree": "4b732d4f9aed44e97066b8277a4880d6cbe8e081", "parents": [ "24f4f7956edeffb1ae41809e09f14b6d5e7875c8", "420ee30f4c0f8a5bb6048df4fa27e5432ded893b" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Jul 20 10:32:35 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jul 20 10:32:35 2017 +0000" }, "message": "Merge \"ARM: VIXL32: Merge (un)signed extensions and integer additions\"" }, { "commit": "4147fcc43c2ee019a06e55384985e3eaf82dcb8c", "tree": "11ec92efbfddf7736bbc74ed35fcfb3756bfcfb0", "parents": [ "e8f48da635c4d07bbe431e5819da8e1fad91a8ef" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sat Jun 17 19:57:27 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Jul 19 15:03:10 2017 -0700" }, "message": "MIPS: Reduce Baker read barrier code size overhead\n\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-gtest\nTest: testrunner.py --target --optimizing\nTest: same tests as above on CI20\nTest: booted MIPS32 and MIPS64 in QEMU with poisoning\n in configurations:\n - with Baker read barrier thunks\n - without Baker read barrier thunks\n - ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\n\nChange-Id: I79f320bf8862a04215c76cfeff3118ebc87f7ef2\n" }, { "commit": "01db5f78f627cc64f80b0c0a4eedd0a3dc8b46ca", "tree": "d1ee9267408e2f4d777d28bfc3f65c480f7ecd3f", "parents": [ "c5b1b067fb91c10c75dd0e6dbfd91bebe74347d5" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jul 19 15:05:49 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jul 19 15:05:49 2017 +0100" }, "message": "Pass the logger to the JIT compiler.\n\nTo avoid effects of concurrent method entrypoints update,\njust pass the logger to the JIT compiler, which will invoke\nit directly with the pointer to the newly allocated code.\n\nTest: test.py --trace\nChange-Id: I5fbcd7cbc948b7d46c98c1545d6e530fb1190602\n" }, { "commit": "420ee30f4c0f8a5bb6048df4fa27e5432ded893b", "tree": "fd72cba9ed09cf78e9377677fd144821fd9f6743", "parents": [ "2f0ac4fb4486e7d9e5c1545d45a2b9b818a80dc3" ], "author": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Tue Feb 21 18:10:26 2017 +0000" }, "committer": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Tue Jul 18 20:19:58 2017 +0100" }, "message": "ARM: VIXL32: Merge (un)signed extensions and integer additions\n\nTest: m test-art-target-run-test-551-checker-shifter-operand\nChange-Id: I041e80e51bf0954b38ab20dfa9b14aa7f6d6c53b\n" }, { "commit": "9fb4e85d6e42b3f060ddcefcbf39bdfec656fc52", "tree": "80e525f139b88754c23272dd5cf612312b7a61ef", "parents": [ "d44c0d8c7f96644f8176e493de2fbde3eb198bb4", "08490b84048a0267694268185441b70cfa090185" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Jul 18 15:15:42 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jul 18 15:15:42 2017 +0000" }, "message": "Merge \"Only honor $inline$ in AOT.\"" }, { "commit": "08490b84048a0267694268185441b70cfa090185", "tree": "80f96cffd48eb9b43051d4128d4c8654c1a0d8da", "parents": [ "252eda65ae216ff36a4eca2195d1ec3b29612035" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jul 18 12:58:10 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jul 18 12:58:59 2017 +0100" }, "message": "Only honor $inline$ in AOT.\n\nThe state of classes is undeterministic when JITting.\n\nTest: test.py\nChange-Id: I05325efe325bb4f7759d7af7cd65d362e6945c57\n" }, { "commit": "24ff0235ab631baccd49fb491197d86d1ef97279", "tree": "d999768a0cf955044a4a771fa802b30034dee234", "parents": [ "252eda65ae216ff36a4eca2195d1ec3b29612035", "c043d006845afef99b17aeab8bb6d6da1a42ad37" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jul 18 09:54:47 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jul 18 09:54:47 2017 +0000" }, "message": "Merge \"Remove the old ARM assemblers from ART.\"" }, { "commit": "c043d006845afef99b17aeab8bb6d6da1a42ad37", "tree": "756ce3caca2a7ff62a169c003639657bd7124d2f", "parents": [ "9983e302384c12a975c8d2d5ae239f79fd8e1996" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jul 14 16:39:16 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jul 17 18:00:40 2017 +0100" }, "message": "Remove the old ARM assemblers from ART.\n\nNow that the old ARM code generator for ART\u0027s Optimizing\ncompiler is gone, these assemblers no longer have users;\nretiring them.\n\nTest: test.py\nBug: 63316036\nChange-Id: Iaea42432a9e0d3288b71615f85c58846c0336944\n" }, { "commit": "23cdebe60049850200b30869c6970193f5e7ecea", "tree": "bf6eab054e2595f3dbf269a0cc4f4190799f0528", "parents": [ "d4472455580db696d0f211f8e6f7d99d78b3fa79", "854df416f12c48b52239fe163ab8a7fcac4cddd3" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon Jul 17 13:13:41 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jul 17 13:13:41 2017 +0000" }, "message": "Merge \"MIPS: TLAB allocation entrypoints\"" }, { "commit": "65d793bfa91085db5f84b6ee90a3dcdafcafed1b", "tree": "c94b0a8ea3a08a8c29feb4fcccbc0793e85f8ad5", "parents": [ "731af335f4e15e82b8972d63b6424d5228f06eec", "9983e302384c12a975c8d2d5ae239f79fd8e1996" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Sat Jul 15 08:58:21 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Sat Jul 15 08:58:21 2017 +0000" }, "message": "Merge \"Remove the old ARM code generator from ART\u0027s Optimizing compiler.\"" }, { "commit": "9983e302384c12a975c8d2d5ae239f79fd8e1996", "tree": "4e4d269fe1a3d4f0f1b93cd972adab9f17aab8e0", "parents": [ "bac2bd1c2fbdd94f4d4dfe83d8451f655e875e36" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jul 14 14:34:22 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jul 14 17:25:39 2017 +0100" }, "message": "Remove the old ARM code generator from ART\u0027s Optimizing compiler.\n\nThe AArch32 VIXL-based code generator has been the default\nARM code generator in ART for some time now. The old ARM\ncode generator does not compile anymore; retiring it.\n\nTest: test.py\nBug: 63316036\nChange-Id: Iab8fbc4ac73eac2c1a809cd7b22fec6b619755db\n" }, { "commit": "2d0fe4ca6906b4215646f1db99b06f927791f2c6", "tree": "617e2c5fbb508d5500b6a2f06144c0e412386263", "parents": [ "5e7eb2faccf8f4a28e9fcda26053a5b388f2190a", "b79f4ac55c0bb177f541937d0678f2aa777e1c9a" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Jul 14 15:57:26 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jul 14 15:57:26 2017 +0000" }, "message": "Merge \"Added GVN related attributes to vector nodes.\"" }, { "commit": "bac2bd1c2fbdd94f4d4dfe83d8451f655e875e36", "tree": "58ba3b1d28348da478a44234820ab6c485f5ed37", "parents": [ "06410c093de2b8a21bdbd7dfd9ce324fd4e95c3f", "6d729a789d3d7771e13d9445ee0be1d9d48a81b5" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jul 14 10:28:42 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jul 14 10:28:42 2017 +0000" }, "message": "Merge \"Introduce a Marking Register in ARM code generation.\"" }, { "commit": "b79f4ac55c0bb177f541937d0678f2aa777e1c9a", "tree": "7c331aa30d3c38b4448070527ac02fdbd848f284", "parents": [ "51e74b47f240187d336d9e688f5d7538366f2edf" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Jul 10 10:10:37 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Jul 13 16:50:03 2017 -0700" }, "message": "Added GVN related attributes to vector nodes.\n\nRationale: enables better GVNing of vector operations,\nalso pays off some technical debt by adding unit tests\nfor vector nodes.\n\nThis is a revert^2 of a79f0b5deb932aa44e227c94c4ad09082b3ab4c7\n(failed some of the existing checker test due to\nmoving scalar replication; fix was setting can-be-moved\nattribute correctly on that node).\n\nBug: 63538372\n\nTest: test-art-host, test-art-target\n\nChange-Id: I2f29c317354b5e4bf520829232aef17931305ea6\n" }, { "commit": "6d729a789d3d7771e13d9445ee0be1d9d48a81b5", "tree": "360b9af68920f411be5fe6753aaf7ab4976385ea", "parents": [ "8cfbbb826a3ab7bb680cfcd8a8148570b165d620" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jun 30 18:34:01 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jul 13 16:41:07 2017 +0100" }, "message": "Introduce a Marking Register in ARM code generation.\n\nWhen generating code for ARM, maintain the status of\nThread::Current()-\u003eGetIsGcMarking() in register R8,\ndubbed MR (Marking Register), and check the value of that\nregister (instead of loading and checking a read barrier\nmarking entrypoint) in read barriers.\n\nTest: m test-art-target\nTest: m test-art-target with tree built with ART_USE_READ_BARRIER\u003dfalse\nTest: m test-art-host-gtest\nTest: ARM device boot test\nBug: 37707231\nChange-Id: I30b44254460d0bbb9f1b2adc65eca52ca3de3f53\n" }, { "commit": "51765b098301fff1897361b2d1a21af356d9d6d8", "tree": "5d35468c9ecd428803fe7e4339fb8e251b6ed926", "parents": [ "e63a91111d13f33028c2988ded53a4659140ca2e" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Thu Jun 22 13:49:59 2017 +0200" }, "committer": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Thu Jul 13 10:34:27 2017 +0200" }, "message": "MIPS32: ART Vectorizer\n\nMIPS32 implementation which uses MSA extension.\n\nNote: Testing is done with checker parts of tests 640, 645, 646 and\n 651, locally changed to cover MIPS32 cases. These changes can\u0027t\n be included in this patch since MSA is not a default option.\n\nTest: ./testrunner.py --target --optimizing -j1 in QEMU (mips32r6)\nChange-Id: Ieba28f94c48c943d5444017bede9a5d409149762\n" }, { "commit": "854df416f12c48b52239fe163ab8a7fcac4cddd3", "tree": "f5cf247f1e71a5242c797b8fab99ded21839267d", "parents": [ "e63a91111d13f33028c2988ded53a4659140ca2e" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Tue Jun 27 14:41:39 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Thu Jul 13 10:17:07 2017 +0200" }, "message": "MIPS: TLAB allocation entrypoints\n\nAdd fast paths for TLAB allocation entrypoints for MIPS32 and MIPS64.\nAlso improve rosalloc entrypoints.\n\nNote: All tests are executed on CI20 (MIPS32R2) and in QEMU (MIPS32R6\n and MIPS64R6), with and without ART_TEST_DEBUG_GC\u003dtrue.\n\nTest: ./testrunner.py --optimizing --target\nTest: mma test-art-target-gtest\nTest: mma test-art-host-gtest\n\nChange-Id: I92195d2d318b26a19afc5ac46a1844b13b2d5191\n" }, { "commit": "de4b08ff24c330d5b36b5c4dc8664ed4848eeca6", "tree": "79835478b8b631bbf006b5e023704f3cf53bda7c", "parents": [ "c9267c48979698a9217760c914aba13ea20b5990" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Jul 10 14:13:41 2017 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Wed Jul 12 17:54:49 2017 -0700" }, "message": "Reduce quicken info size\n\nMove the quicken info from using a map of \u003cdex pc, index\u003e to an array\nof indices. Removed leb encoding since it is harmful for 16 bit\nindices. The map is indexed by the dequickenable instruction index\nfrom the start of the code item.\n\nNumbers for a certain large app compiled with quicken filter:\ndex2oat native alloc: 85345936B -\u003e 81527072B\noat file size: 9068968B -\u003e 8659368B\nvdex file size: 90479120B -\u003e 86321184B\n\nBug: 63467744\nBug: 36457259\nTest: test-art-host\n\n(cherry picked from commit 959f348acabc48efbb18c547dad6300c0f610c1c)\n\nChange-Id: I85546d8cd409cbf96140cbdddabd7e228797b9e3\n" }, { "commit": "af24def8967027f10ce8d44cb209c23032a2a1b4", "tree": "503bc7430d73944dc1faf51082fc36be1735d4c4", "parents": [ "08dd84adab79f98b2f2e7dfbccf8ef6b07cd3f2e" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jul 12 13:18:01 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jul 12 13:20:53 2017 +0100" }, "message": "Fix ART ARM64 CFI gtests with GCs other than CC with Baker read barriers.\n\nSince the introduction of a Marking Register in the ARM64 back\nend, gtests jni_cfi_test and optimizing_cfi_test produce\ndifferent outputs for the Concurrent Copying (CC) collector\nwith Baker read barriers on the one hand, and for other GCs on\nthe other hand.\n\nTest: m test-art-host-gtest with tree built with ART_USE_READ_BARRIER\u003dfalse\nBug: 37707231\nChange-Id: I63de8873f52df593eb664970f2be20f1089804a9\n" }, { "commit": "97c46466aea25ab63a99b3d1afc558f0d9f55abb", "tree": "afd225f51d28a77329bc2590a025400e088f260c", "parents": [ "00cca3a275562d110a8b35094b9b12fac37f67ab" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu May 11 14:04:03 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jul 11 17:43:27 2017 +0100" }, "message": "Introduce a Marking Register in ARM64 code generation.\n\nWhen generating code for ARM64, maintain the status of\nThread::Current()-\u003eGetIsGcMarking() in register X20,\ndubbed MR (Marking Register), and check the value of that\nregister (instead of loading and checking a read barrier\nmarking entrypoint) in read barriers.\n\nTest: m test-art-target\nTest: m test-art-target with tree built with ART_USE_READ_BARRIER\u003dfalse\nTest: ARM64 device boot test\nBug: 37707231\nChange-Id: Ibe9bc5c99a2176b0a0476e9e9ad7fcc9f745017b\n" }, { "commit": "ca8c2951ea25e8f93eea9decc70d81937b4361dd", "tree": "72c811abe58895b4972cd88ee267c8ca66155fd1", "parents": [ "2e0a7e5047fde08ddd220aaa1a0e64d44ecbb420" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Mon May 29 11:31:46 2017 +0200" }, "committer": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Thu Jul 06 14:06:33 2017 +0200" }, "message": "MIPS32: Saves 128-bit vector registers along SuspendCheckSlowPath\n\nWe need to save 128 bits of data. This is only done for vector\nregisters that are live, so overhead is not too big.\n\nTest: mma test-art-host-gtest\nTest: ./testrunner.py --optimizing --target in QEMU (MIPS)\nChange-Id: I0f792e9c98011be3e24d5fad35a8244faafcb9a0\n" }, { "commit": "640fbdc7516a40883f219bd3c9f0e7b8a49842b4", "tree": "09b4ed23b6904c78ce6b1229b0b70f9a8830717f", "parents": [ "4a77b1e96733be419c0cb571448e8590c803bd91", "2a3471fc83383bfe3e060799482e372420ba6150" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jul 05 10:28:20 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jul 05 10:28:20 2017 +0000" }, "message": "Merge \"Disambiguate memory accesses in instruction scheduling\"" }, { "commit": "8091ed8a26db4609c719ea8d905145ddfed7f498", "tree": "342d4459e8e9c61af7b69fc2ac2e0512592cf9f4", "parents": [ "61cfb15e2588ff1fe3c80efbfcf55973122b28cb", "5fa5c04ca39fb9c46bfef0e0807a18d0cd9a4ba7" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon Jul 03 11:48:56 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jul 03 11:48:56 2017 +0000" }, "message": "Merge \"MIPS: Shorten .bss string/class loads\"" }, { "commit": "e128af51eb0d1a882b9bc37cd213639d0c3a63e7", "tree": "cce9394c1892680e9d731df24475fca35decaf59", "parents": [ "dfcf10b92330164f8af6c82c8232e85cfff1ae3c", "8f7c41044bdb7a36913444a3437bf2b946f7efe9" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Jun 30 18:18:06 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 30 18:18:06 2017 +0000" }, "message": "Merge \"ARM: ART Vectorizer (64-bit vectors).\"" }, { "commit": "dd3240ce699129007935ba0bae4872e28652b90c", "tree": "305d061a33740ce48c7f027b474641017e1bab86", "parents": [ "89ae0f42e38a2f985ac404830f2a05fecf9547e2", "8098da9cf3e3f7875546c2cd953f2337587b39db" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Jun 30 15:50:59 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 30 15:50:59 2017 +0000" }, "message": "Merge \"MIPS32: MoveLocation refactoring\"" }, { "commit": "2a3471fc83383bfe3e060799482e372420ba6150", "tree": "7b7764521a0b67392e023f1efacc0dbae64fe675", "parents": [ "89ae0f42e38a2f985ac404830f2a05fecf9547e2" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Mon May 08 18:36:40 2017 +0100" }, "committer": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Fri Jun 30 16:32:54 2017 +0100" }, "message": "Disambiguate memory accesses in instruction scheduling\n\nBased on aliasing information from heap location collector,\ninstruction scheduling can further eliminate side-effect\ndependencies between memory accesses to different locations,\nand perform better scheduling on memory loads and stores.\n\nPerformance improvements of this CL, measured on Cortex-A53:\n| benchmarks | ARM64 backend | ARM backend |\n|----------------+---------------|-------------|\n| algorithm | 0.1 % | 0.1 % |\n| benchmarksgame | 0.5 % | 1.3 % |\n| caffeinemark | 0.0 % | 0.0 % |\n| math | 5.1 % | 5.0 % |\n| stanford | 1.1 % | 0.6 % |\n| testsimd | 0.4 % | 0.1 % |\n\nCompilation time impact is negligible, because this\nheap location load store analysis is only performed\non loop basic blocks that get instruction scheduled.\n\nTest: m test-art-host\nTest: m test-art-target\nTest: 706-checker-scheduler\n\nChange-Id: I43d7003c09bfab9d3a1814715df666aea9a7360b\n" }, { "commit": "aed3dbf9601bc1bb91142dce10a89cf5ea6a93d3", "tree": "03742367b4f8f6a1b6eb44effae478c6d16a6e50", "parents": [ "6cb5ae065a54f08f0c8d09b41c2697b097094ce9", "016c0f165dc6872d22c12c239d19b094983519f1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jun 30 11:44:18 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 30 11:44:18 2017 +0000" }, "message": "Merge \"Improve array index analysis in LSA.\"" }, { "commit": "8f7c41044bdb7a36913444a3437bf2b946f7efe9", "tree": "cdfcc8dae149617f6270198e15101b329f821ebd", "parents": [ "a4811cd3496eb28295fe61057844c53793f3023e" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Wed Jun 21 11:21:37 2017 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Fri Jun 30 11:52:24 2017 +0100" }, "message": "ARM: ART Vectorizer (64-bit vectors).\n\nBasic vectorization support with 64-bit vector length on ARM 32-bit\nplatforms (128-bit vectors require massive changes in register\nallocator).\n\nTest: test-art-target, test-art-host\n\nChange-Id: I1d740146c3f00170fc033ae5fd69d59321ddcbf4\n" }, { "commit": "740c3008171fe69432db8bfe4b9c837ac24b85c0", "tree": "ead2d10a4c0478e2e08d30a9e7de7f8f5fbb4a27", "parents": [ "4aa0cf8d72386bc2bc42f437919a66ec392eca21", "757b26c2442ae792039bc50153bef91145f3c7b4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jun 30 09:12:51 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 30 09:12:51 2017 +0000" }, "message": "Merge \"Add CHECKs to help diagnose a crash seen internally.\"" }, { "commit": "4aa0cf8d72386bc2bc42f437919a66ec392eca21", "tree": "8032373cf5073225b8d6082d98760a3a4c3f4e09", "parents": [ "5f17267621174ac22ab53f02b3a5e1ee54308775", "c9c310487b8730fce5edfa72e79c4188629898a3" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jun 30 09:11:55 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 30 09:11:55 2017 +0000" }, "message": "Merge \"Turn a few DCHECK into CHECKs.\"" }, { "commit": "37dc4df47fec811ea52f7180880961565f013434", "tree": "eac308a6c7ef8b7d53f64889ff0a93740a2dc62a", "parents": [ "76754cc816af46b41a8d1f419a38334b5db59b6e" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Jun 28 14:08:00 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Jun 29 11:20:56 2017 -0700" }, "message": "Improved subscript and data dependence analysis.\n\nRationale:\nWe missed vectorizing a simple stencil operation\ndue to inaccurate unit stride analysis and failure\nto detect single runtime data dependence test.\n\nTest: test-art-host, test-art-target\nChange-Id: I07ba03455bfb1c0aff371c1244a1328f885d0916\n" }, { "commit": "757b26c2442ae792039bc50153bef91145f3c7b4", "tree": "4d8798405364a51bb7dd6f2c365bfdffca26f791", "parents": [ "fe9a4f061841a3c597aac6817a47c799c54fcad7" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 29 16:11:41 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 29 16:13:06 2017 +0100" }, "message": "Add CHECKs to help diagnose a crash seen internally.\n\nbug: 62855731\nTest: test.py\nChange-Id: I7904257174ce11a138ca769172dbc2e33e10ef76\n" }, { "commit": "c9c310487b8730fce5edfa72e79c4188629898a3", "tree": "e9e72b0296b557722979b51bf9d98054c4fb1971", "parents": [ "853cc56ae6a79fa9540bb49c5c95d1568d47656d" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 29 14:04:16 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 29 15:04:21 2017 +0100" }, "message": "Turn a few DCHECK into CHECKs.\n\nTo help diagnose b/63070152.\n\nbug: 63070152\nTest: test.py\nChange-Id: I1ac1cf9bfe1bc15ecfa94b5b8537cd3afda6fd14\n" }, { "commit": "76754cc816af46b41a8d1f419a38334b5db59b6e", "tree": "9a04d4a9811c5f196b29c144875a57818e8815d9", "parents": [ "3dc94c4763ecab28c0053d5d07e332c61a3f781b", "f57c1ae3682f95e6d7ce08ae4c241d04b09de658" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Jun 28 22:33:32 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jun 28 22:33:32 2017 +0000" }, "message": "Merge \"Prevent loop optimization in debuggable mode.\"" }, { "commit": "f57c1ae3682f95e6d7ce08ae4c241d04b09de658", "tree": "bf12e0e19626c28edd933fb31c5652e7f974bf1d", "parents": [ "0ca1ae25d33dc8b92d9eecd585657f74cbb313e9" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 28 17:40:18 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 28 21:10:13 2017 +0100" }, "message": "Prevent loop optimization in debuggable mode.\n\nbug: 33775412\nTest: no scanner crash (torn on whether I should spend some time working on a smali test)\n\nChange-Id: I8b94725ce57171b592bede4bf55cd0a9626a8a10\n" }, { "commit": "a6d098c3f4da902d6607972fcadaf57760d76d63", "tree": "3d0a0590183765deacb3ed812b4f4fe5b3e78cf1", "parents": [ "0ca1ae25d33dc8b92d9eecd585657f74cbb313e9", "14a68b4aa9620e4fd58907255b049fb5c18bd1ec" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Jun 28 16:02:59 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jun 28 16:02:59 2017 +0000" }, "message": "Merge \"Unrolling and dynamic loop peeling framework in vectorizer.\"" }, { "commit": "8098da9cf3e3f7875546c2cd953f2337587b39db", "tree": "8f0b2d69f83a1de7a0bb80ce1c3f1412c429615d", "parents": [ "ebd4def76f4e60e442edb8d48f43a931bc3c773e" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Wed Jun 28 12:07:50 2017 +0200" }, "committer": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Wed Jun 28 17:42:17 2017 +0200" }, "message": "MIPS32: MoveLocation refactoring\n\nMove32 and Move64 are removed so MoveLocation now handles all cases.\nReason for this are 128-bit (SIMDStackSlot, VectorRegister) moves\nwhich will be added in follow-up patch.\n\nTest: mma test-art-host-gtest\nTest: ./testrunner.py --optimizing --target in QEMU\n\nChange-Id: I93496e74874f77337b11b2265aa4b470bc7c6ce2\n" }, { "commit": "14a68b4aa9620e4fd58907255b049fb5c18bd1ec", "tree": "692319b6a9344d84a2e8916c388be954d8878c41", "parents": [ "afdcd847498abc0f4e295bece443afabf8aaf868" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Jun 08 14:06:58 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Jun 27 11:29:07 2017 -0700" }, "message": "Unrolling and dynamic loop peeling framework in vectorizer.\n\nRationale:\nThis CL introduces the basic framework for dynamically peeling\n(to obtain aligned access) and unrolling the vector loop (to reduce\nlooping overhead and allow more target specific optimizations\non e.g. SIMD loads and stores).\n\nNOTE:\nThe current heuristics are \"bogus\" and merely meant to exercise\nthe new framework. This CL focuses on introducing correct code for\nthe vectorizer. Heuristics and the memory computations for alignment\nare to be implemented later.\n\nTest: test-art-target, test-art-host\n\nChange-Id: I010af1475f42f92fd1daa6a967d7a85922beace8\n" }, { "commit": "db87b28cd68d5b1705da2e4fdbe04f9182e5452a", "tree": "a213ee07206ff08f1ebe633f6ffc346437e41522", "parents": [ "90d71886bf3c134e1fc9255a312f41b56700854a", "5ceac0e41bdf8d486f978c43800f493bce83f5d4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jun 27 11:07:23 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jun 27 11:07:23 2017 +0000" }, "message": "Merge \"Don\u0027t use the graph\u0027s dex file when printing HInvoke.\"" }, { "commit": "80b99c23b09bf1c4ca49385cff15879d821aecb9", "tree": "ac62622ac8948fedd1572087f4c63b992154e639", "parents": [ "afdcd847498abc0f4e295bece443afabf8aaf868", "a4b58ed1ef8dceafbffcfa88bf2c11144e302d18" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon Jun 26 18:41:42 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jun 26 18:41:44 2017 +0000" }, "message": "Merge \"Fix static analyzer warning\"" }, { "commit": "5ceac0e41bdf8d486f978c43800f493bce83f5d4", "tree": "6d0f266e85405afc88ebc28b70dd09a91bb85ddb", "parents": [ "d1c983a5bc3ae50eab3af405ae8a415e1f36f532" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jun 26 13:19:09 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jun 26 16:17:43 2017 +0100" }, "message": "Don\u0027t use the graph\u0027s dex file when printing HInvoke.\n\nIt\u0027s not the right dex file if the invokes come from inlined\nmethods.\n\nTest: manual\nChange-Id: I4e3fb35e2bddc67510c39e12075c9a5ca0498a3a\n" }, { "commit": "016c0f165dc6872d22c12c239d19b094983519f1", "tree": "bef8e9912412d02b7aa3913f2750147835454b2e", "parents": [ "d1c983a5bc3ae50eab3af405ae8a415e1f36f532" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Fri May 12 18:16:31 2017 +0100" }, "committer": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Mon Jun 26 11:30:39 2017 +0100" }, "message": "Improve array index analysis in LSA.\n\nThis CL improves analysis on array index in load store analysis.\n\nTest: m test-art-host\nTest: m test-art-target\nTest: m test-art-host-gtest-load_store_analysis_test\n\nChange-Id: Id5e5aa8b396c68e082db95809659494107985fa2\n" }, { "commit": "6fda42718a348cfb758d8714e223cab7e855765b", "tree": "d6f0f4d0c1ca2eec26a56e2aadaf00d3205b70a0", "parents": [ "a0e63dfbfe2f2513a709e94b8a1ac17418396fdf" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jun 26 09:12:45 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jun 26 10:59:17 2017 +0100" }, "message": "Fix braino when handling branches fallthrough in arm backend.\n\nbug: 62210114\nTest: 657-branches\nChange-Id: I753a9a57e404c792cd4375ea66c91839684bdee2\n" }, { "commit": "a4b58ed1ef8dceafbffcfa88bf2c11144e302d18", "tree": "c1a931ba1bc1c710d1cdad9291c57aaa6b373597", "parents": [ "b96ed2c271a56fb8be0c8f30231710095e66a201" ], "author": { "name": "George Burgess IV", "email": "gbiv@google.com", "time": "Thu Jun 22 15:47:25 2017 -0700" }, "committer": { "name": "George Burgess IV", "email": "gbiv@google.com", "time": "Thu Jun 22 15:47:25 2017 -0700" }, "message": "Fix static analyzer warning\n\nnodes.cc: warning: Access to field \u0027next_\u0027 results in a dereference of a\nnull pointer (loaded from field \u0027last_instruction_\u0027)\n\nThis was split from\nhttps://android-review.googlesource.com/#/c/416101/. Please see the\ndiscussion nodes.cc (patch set 1) for why this warning is triggered.\n\nBug: 32619234\nTest: test-art-host. Rebuilt ART with the analyzer to verify that these\nissues are gone.\n\nChange-Id: Id5da00ceee0667441233153a7971d238ea8c8650\n" }, { "commit": "1a0a519c82044ec3e6d3910ff0602b11292de47a", "tree": "342691a82a58ddb0660b9111622b2ff67d92f898", "parents": [ "8979f71079ec18fa8d3c0915549ec03ee1fbadf5" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 22 11:56:01 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 22 12:09:16 2017 +0100" }, "message": "Fix loop optimization in the presence of environment uses.\n\nWe should not remove instructions that have deoptimize as\nusers, or that have environment uses in a debuggable setup.\n\nbug: 62536525\nbug: 33775412\nTest: 656-loop-deopt\nChange-Id: Iaec1a0b6e90c6a0169f18c6985f00fd8baf2dece\n" }, { "commit": "f789353025401c1907d2264952a88f253a9af8e7", "tree": "9ad4c6a4eed419eb8664fd8aa6b4811d5f259f71", "parents": [ "1368312bb4772a1c505452f766fdaceef4c48f6e" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 15 12:34:36 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 15 14:05:08 2017 +0100" }, "message": "Set the deopt flag after adjusting the stack pointer.\n\nOne should not write to something below the stack pointer, or\nit could be overwritten during an interrupt.\n\nTest: test.py\nChange-Id: Ie6c997b9f7548ca5844303d6a3fc0c531f469c6e\n" }, { "commit": "c0fe9db1af30a162448ca5ccd386e970a8d31f83", "tree": "6dbb5549f249b61337f1e70f1911ea1902d2d8fa", "parents": [ "53ac3130edd9c9273f95e3ba0bc5e80f6d2b3f2d", "82b0740f03b1a6acab4558214d3edc362e27e238" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 12 09:09:09 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jun 12 09:09:11 2017 +0000" }, "message": "Merge \"Use IntrusiveForwardList\u003c\u003e for Env-/UsePosition.\"" }, { "commit": "13600e9cd7536b7cd8d93c32270f5f08076f5d6d", "tree": "3cedd3b9538afb1a7213fea02210c0e7dea6d76d", "parents": [ "a74c04b3c797265ab7923d3690da6166224f3e30", "8fea1e18ecce190bbffbc0085f20ad49ca10a8c2" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Jun 09 21:28:37 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 09 21:28:39 2017 +0000" }, "message": "Merge \"MIPS64: Min/max vectorization support\"" }, { "commit": "58794c5c23f46a7476a58e5a10dbeebb6321aa90", "tree": "948368dd8d8376a50fe996da0438abe10da1322d", "parents": [ "73321bfdd7e96e3ce62042c9e5be567ed0db1985", "5678db5b3a0275d04bc610236f89fac9f76b5b1e" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Jun 09 18:00:41 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 09 18:00:43 2017 +0000" }, "message": "Merge \"ART: Refactor bit_utils and stl_util\"" }, { "commit": "8375e4f918cd409be6155f8c7b323a203c090e7e", "tree": "114ef9fcdd1f14fc4e0e54b26264f0fefbf75a22", "parents": [ "05ae67444e15c9281582ef1fc45c4558d286040e", "f45d61c0866461c9476f17644b27dc0664d507c5" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Jun 09 16:31:42 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 09 16:31:44 2017 +0000" }, "message": "Merge \"ART: Fix or disable some tidy warnings.\"" }, { "commit": "f45d61c0866461c9476f17644b27dc0664d507c5", "tree": "95d2837a03d451cccd82cad61924980beb5fd0d4", "parents": [ "83b140474aa1759739c8ee4464bf226c4fa0f6d7" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Jun 07 10:29:33 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 08 17:19:51 2017 -0700" }, "message": "ART: Fix or disable some tidy warnings.\n\nAdd a strlcpy shim for the host, so we can use strlcpy instead of\nstrcpy everywhere.\n\nFixed warnings include unused-decls, (some) unreachable code, use\nafter std::move, string char append, leaks, (some) excessive padding.\n\nDisable some warnings we cannot or do not want to avoid.\n\nBug: 32619234\nTest: m\nTest: m test-art-host\nChange-Id: Ie191985eebb160d94b988b41735d4f0a1fa1b54e\n" }, { "commit": "5fa5c04ca39fb9c46bfef0e0807a18d0cd9a4ba7", "tree": "f902c5dad2486b8372c31989ac9b917715231fa8", "parents": [ "83b140474aa1759739c8ee4464bf226c4fa0f6d7" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Thu Jun 01 21:07:52 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Thu Jun 08 14:39:57 2017 -0700" }, "message": "MIPS: Shorten .bss string/class loads\n\nThis is a follow-up to\nhttps://android-review.googlesource.com/#/c/384033/.\n\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: testrunner.py --target --optimizing\nTest: same tests as above on CI20\nTest: booted MIPS32R2 and MIPS64 in QEMU in configurations:\n ART_USE_READ_BARRIER\u003dfalse,\n ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\n\nChange-Id: I4cb2f4ded13c0d9fc960c7eac55396f7931c1e38\n" }, { "commit": "5678db5b3a0275d04bc610236f89fac9f76b5b1e", "tree": "efc4ffe5d59a0c6c5f4c15a886459962d24de4aa", "parents": [ "83b140474aa1759739c8ee4464bf226c4fa0f6d7" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 08 14:11:18 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 08 14:11:18 2017 -0700" }, "message": "ART: Refactor bit_utils and stl_util\n\nMove iterator code from bit_utils.h into bit_utils_iterator.h. Move\nIdentity into stl_util_identity.h. Remove now unnecessary includes,\nand fix up transitive users.\n\nTest: m\nChange-Id: Id1ce9cda66827c5d00584f39ed310b6b37629906\n" }, { "commit": "8dfe746dc969b61416a2906bea8c176427457efc", "tree": "3b5d736e7ead08f176514622684f8db7f0b7e40a", "parents": [ "a215c5b2bac883a57e1d35e5490241609ad22e5f" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Thu Jun 01 14:28:48 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 08 13:50:28 2017 +0000" }, "message": "ARM64: Encode constants when it is possible.\n\nSmall optimization which improves HVecReplicateScalar by encoding\nimmediates directly into NEON instruction when possible instead of\ngenerating constant in GPR and transferring it into NEON register.\n\nTest: test-art-target, test-art-host.\nChange-Id: I2113bbd98c0dc8433d2b7048921b9ed7c35ef1c5\n" }, { "commit": "6fc7c4a669d6cbf47455e0849285c428e047df10", "tree": "364a4c7bbcccad106dfc819abd79ba4240d2f3e7", "parents": [ "4d3df9131c4098828f889b9470c82880efdc91be", "0eb882bfc5d260e8014c26adfda11602065aa5d8" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jun 08 09:07:23 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jun 08 09:07:25 2017 +0000" }, "message": "Merge \"Use ArtMethod* .bss entries for HInvokeStaticOrDirect.\"" }, { "commit": "3050956ebb512002dfb56d4267a457d32133435d", "tree": "19cc8b19e995e280f138e7cefe13359d4eaaf2b2", "parents": [ "3b8bbb9927a38561fa37e38d5d9ddcf02608d60b", "f81621ea5a67474e6f2cb0516b606822d5843612" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Jun 07 19:01:22 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jun 07 19:01:23 2017 +0000" }, "message": "Merge \"Be less aggressive when inlining.\"" }, { "commit": "f81621ea5a67474e6f2cb0516b606822d5843612", "tree": "47328b81513447eba30b99357fca4f7630c6bdc8", "parents": [ "85adf5a9ac401ae61cfc12a9838bd4e744459366" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 07 13:18:03 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 07 16:21:23 2017 +0100" }, "message": "Be less aggressive when inlining.\n\nReduce the threshold for cumulated dex registers, to prevent\nlong and memory expensive compiles.\n\nbug: 62243120 (3d party app startup)\nbug: 36727951 (Camera startup)\nbug: 62271612 (compiler allocations)\nTest: test.py\nChange-Id: I8fd5cd7aed3c4e677f0aa15af676b959cc6ddac2\n" }, { "commit": "0eb882bfc5d260e8014c26adfda11602065aa5d8", "tree": "e66dbebfb1e9a254c20954a2f2f98541aebfd5af", "parents": [ "b5f5d746ac3f2c3088292395603cb1470e7749d2" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon May 15 13:39:18 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jun 07 15:39:24 2017 +0100" }, "message": "Use ArtMethod* .bss entries for HInvokeStaticOrDirect.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: testrunner.py --target\nTest: Nexus 6P boots.\nTest: Build aosp_mips64-userdebug.\nBug: 30627598\nChange-Id: I0e54fdd2e91e983d475b7a04d40815ba89ae3d4f\n" }, { "commit": "3c8a91250b3e4e87548ec16bf1ab1ea46dbb84a4", "tree": "b5da100b358d1335eab403372e4f616c5c2d607c", "parents": [ "0a87f31513e5f9da27856af054d2241452898b22", "e7197bf7d58c705a048e13e241d7ca320502cd40" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jun 07 10:38:10 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jun 07 10:38:11 2017 +0000" }, "message": "Merge \"Replace invoke kind kDexCacheViaMethod with kRuntimeCall.\"" }, { "commit": "8fea1e18ecce190bbffbc0085f20ad49ca10a8c2", "tree": "e026d33cc0928a977118faff46fdbbb50ff0967e", "parents": [ "11d72c608e0565fabcf6b2d6c13fbc85c560a608" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Tue Jun 06 13:28:42 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Wed Jun 07 09:45:18 2017 +0200" }, "message": "MIPS64: Min/max vectorization support\n\nTest: mma test-art-host-gtest\nTest: ./testrunner.py --optimizing --target --64 in QEMU\n\nChange-Id: I60dc9c97c2b6470414fa64750e7c9824e70bfb4e\n" }, { "commit": "6ecff4d2127e70738aa2493d6deceb946c204eff", "tree": "453d0b0161a609b2a69e78a326e88f2c785bc203", "parents": [ "b938fe6b55532229260f88d76057cf81d71db691", "6e92fb33dea9846ad03bd538d02d055fa96f5240" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Jun 06 20:57:04 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jun 06 20:57:06 2017 +0000" }, "message": "Merge \"Pass through inputs beyond arguments in invoke.\"" }, { "commit": "ad58e8a25649f6cff14566b86a8ca7d0dbe22fd0", "tree": "a6332ec37c84f93917fb839007b48637320da5e0", "parents": [ "f3b55509ab4dcc192104430fbc99c1b58a16d800", "f0fc4c6c9cedbd8665a2f98c4a649a62aaf3ac19" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Jun 06 20:53:28 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jun 06 20:53:30 2017 +0000" }, "message": "Merge \"ARM64: SIMD instruction scheduling.\"" }, { "commit": "e7197bf7d58c705a048e13e241d7ca320502cd40", "tree": "496032b40145660b40002b9d5b7a78f1c2eeb44f", "parents": [ "4ee8e291a7d5b7b98f35f495eb97705836910871" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 02 17:00:23 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jun 06 15:26:42 2017 +0100" }, "message": "Replace invoke kind kDexCacheViaMethod with kRuntimeCall.\n\nIn preparation for replacing the dex cache method array\nwith a hash-based array, get rid of one unnecessary use.\nThis method load kind is currently used only on mips for\nirreducible loops and OSR, so this should have no impact\non x86/x86-64/arm/arm64.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: Repeat the above tests with manually changing\n kDexCachePcRelative to kRuntimeCall in sharpening.cc.\n (Ignore failures in 552-checker-sharpening.)\nBug: 30627598\nChange-Id: Ifce42645f2dcc350bbb88c2f4642e88fc5f98152\n" }, { "commit": "f0fc4c6c9cedbd8665a2f98c4a649a62aaf3ac19", "tree": "bd309a5d709f30e435fa98349954ee80330ea9f9", "parents": [ "cce39b5b4fc00ab9e6b4aaed1e7fa6928f0ec594" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Wed May 03 15:07:15 2017 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Tue Jun 06 14:09:02 2017 +0100" }, "message": "ARM64: SIMD instruction scheduling.\n\nEnables scheduling for SIMD loops; the patch gives\n4.1% perf gain on Linpack benchmark.\n\nTest: test-art-target, test-art-host.\n\nChange-Id: I5e728b5218fc6640ac583594ba08f69330b01e21\n" }, { "commit": "508fdf3eb53824f109c89f98484927085bdc43ba", "tree": "4ed08886adc50962b7fd46936923e29057e2fdb2", "parents": [ "2ff3b97500b717f69415ae474d5cfb1613cd15ee" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Jun 05 16:42:13 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Jun 05 20:28:21 2017 -0700" }, "message": "ART: Small class-inl.h cleanup\n\nRemove unnecessary class_linker-inl.h include, and fix up all\ntransitives (mainly gc_root-inl.h). Also clean up reference.h.\n\nTest: m test-art-host\nChange-Id: I47bd6edcfe4a23821e37a6e6fa8cca91d0d2d226\n" }, { "commit": "6e92fb33dea9846ad03bd538d02d055fa96f5240", "tree": "91c359d459a99f2c7f847c2e4d73a28a681612f7", "parents": [ "81c769436a89b25c781eb2da882f11fd8d11f84d" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Jun 05 14:05:09 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Jun 05 14:05:09 2017 -0700" }, "message": "Pass through inputs beyond arguments in invoke.\n\nRationale:\nRefinement requested by vmarko.\n\nTest: test-art-host\nChange-Id: I850466ebd5ad99bb617bc71c279159862e18e6ec\n" }, { "commit": "36a5d0c3c46a75381f303a0a468eaefe1ac3c982", "tree": "94ea290524323aedc1f0d00e233ab84207507aa2", "parents": [ "0a50965275df2da590c49a7a955e6ff5a7c7d2ae", "19680d3655433e98582983ed0a6d44d6b4822951" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Jun 05 16:59:25 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jun 05 16:59:28 2017 +0000" }, "message": "Merge \"MIPS64: ART Vectorizer\"" }, { "commit": "0a50965275df2da590c49a7a955e6ff5a7c7d2ae", "tree": "7c4b3f2ebab0abb1c13239878450dc2bf7aaca08", "parents": [ "ab6393400f0dd213d335092c6e83f6a8743f00c2", "4ee8e291a7d5b7b98f35f495eb97705836910871" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 05 14:40:23 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jun 05 14:40:25 2017 +0000" }, "message": "Merge \"Revert^3 \"ART: Reference.getReferent intrinsic for x86 and x86_64\"\"" }, { "commit": "ab6393400f0dd213d335092c6e83f6a8743f00c2", "tree": "43f35b71321e7b96af7ad5ddc557638e365d2f06", "parents": [ "2c97600c1107931825bf9f7f25517e89b7210ab4", "d254f5c0d7b43397e8b8885a56ec4d36e9b61602" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 05 12:11:07 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jun 05 12:11:09 2017 +0000" }, "message": "Merge \"Revert \"ART: Reference.getReferent intrinsic for arm and arm64\"\"" }, { "commit": "2c97600c1107931825bf9f7f25517e89b7210ab4", "tree": "1951ed02eaf1abac7257d22c5881366c3fe493ba", "parents": [ "af8d813133af6e2988296c9cc19719a9186f4cc8", "847e6ce98b4b822fd94c631975763845978ebaa3" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 05 09:04:20 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jun 05 09:04:21 2017 +0000" }, "message": "Merge \"Rename kDexCacheViaMethod to kRuntimeCall for HLoadClass/String.\"" }, { "commit": "9f7e91ca8144383ba04405eef42dcc19768825a6", "tree": "06ef66bca7beada95f329c413f9c6d1bedc433b7", "parents": [ "eae88fc9f114b44b6f6b0b725246227c652c975f", "8523ea11a677b78e1fc05915976c04b1ff081451" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Jun 02 18:11:16 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 02 18:11:18 2017 +0000" }, "message": "Merge \"Fixed bug in relying on precise FP in periodic sequence.\"" }, { "commit": "8523ea11a677b78e1fc05915976c04b1ff081451", "tree": "249523715fbba92a524fe01725a218c695c1b19e", "parents": [ "85b82e35d810a21257fec9d850d95f8abc900670" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Jun 01 15:45:09 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Jun 02 08:52:13 2017 -0700" }, "message": "Fixed bug in relying on precise FP in periodic sequence.\n\nRationale:\nFP arithmetic is not always precise, so relying on FP\nperiod sequences to \"compute back\" precisely is not\nvalid; when all values in the period are \"fetches\"\nhowever, the rotation is precise.\n\nBug found by fuzz testing. With regression test.\n\nBug: 62196559\nTest: test-art-host\nChange-Id: Ie8f6b965b1921ff2762b90eebb8c20503c44c6bb\n" }, { "commit": "4ee8e291a7d5b7b98f35f495eb97705836910871", "tree": "90aa3ea4a0674905b0f6fdb313cab129ca112a56", "parents": [ "d254f5c0d7b43397e8b8885a56ec4d36e9b61602" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 02 15:39:30 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 02 16:48:23 2017 +0100" }, "message": "Revert^3 \"ART: Reference.getReferent intrinsic for x86 and x86_64\"\n\nReverting because GenerateCalleeMethodStaticOrDirectCall()\nprevents replacing kDexCacheViaMethod with kRuntimeCall\nwhere we would not retrieve the target method at all and\nleave the runtime to retrieve and call it just like for\nunresolved methods.\n\nThe intrinsic should be re-implemented by loading the\nflags through HLoadClass.\n\nNote that the intrinsic was unimplemented for CC.\n\nTest: Rely on TreeHugger.\nBug: 32535355\nBug: 30627598\n\nThis reverts commit 288c7a8664e516d7486ab85267050e676e84cc39.\n\nChange-Id: Ia22864553ff55562897571e180b11926ccd51588\n" }, { "commit": "d254f5c0d7b43397e8b8885a56ec4d36e9b61602", "tree": "ef645025a42f88a2c9eb0ab9483ff519886f0a4c", "parents": [ "cff1b21b3e19c5d3a2d726fdb60dacd7de2a6f0d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 02 15:18:36 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 02 16:24:33 2017 +0100" }, "message": "Revert \"ART: Reference.getReferent intrinsic for arm and arm64\"\n\nReverting because GenerateCalleeMethodStaticOrDirectCall()\nprevents replacing kDexCacheViaMethod with kRuntimeCall\nwhere we would not retrieve the target method at all and\nleave the runtime to retrieve and call it just like for\nunresolved methods.\n\nThe intrinsic should be re-implemented by loading the\nflags through HLoadClass.\n\nNote that the intrinsic was unimplemented for CC and a bit\nbroken for non-CC, using LDR instead of LDRB for loading\nthe flags.\n\nTest: Rely on TreeHugger.\nBug: 32535355\nBug: 30627598\n\nThis reverts commit d8c052ac0aa3382c4807add33afa32580ffeecbb.\n\nChange-Id: I81fd14dac60c94ac543e336f4f3c888259fc8bd7\n" }, { "commit": "b486a98aadc95d80548953410cf23edba62259fa", "tree": "b113b7d50a4a015502873b7742c9ece00d293e84", "parents": [ "1656ca9e6996cb555b4463e5efd4bd7e3f4fb816" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 01 13:45:54 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Jun 02 08:24:02 2017 -0700" }, "message": "ART: Introduce thread-current-inl.h\n\nFactor out Thread::Current() code into its own -inl file to remove\ntransitive includes.\n\nThis requires at the same time correcting mutex.h, i.e., moving\nsome functions into mutex-inl.h.\n\nTest: m test-art-host\nChange-Id: I88f888b604e0897368d9b483edce6ce4332dd9c9\n" }, { "commit": "1656ca9e6996cb555b4463e5efd4bd7e3f4fb816", "tree": "ba32fd86f9a39329fecd5b94cbb018383d7bd304", "parents": [ "9b70b4a806096d15bf00f629c1078c126dbd626b", "513061a792b22c417c938d31c19581390709561c" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Jun 02 15:21:03 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 02 15:21:05 2017 +0000" }, "message": "Merge \"ART: Clean up thread.h and thread_list.h\"" }, { "commit": "847e6ce98b4b822fd94c631975763845978ebaa3", "tree": "760e26dea1597d8219d8c515317d978b0213cdc1", "parents": [ "cff1b21b3e19c5d3a2d726fdb60dacd7de2a6f0d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 02 13:55:07 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 02 14:03:28 2017 +0100" }, "message": "Rename kDexCacheViaMethod to kRuntimeCall for HLoadClass/String.\n\nThe old name does not reflect the actual code anymore.\n\nTest: testrunner.py --host\nChange-Id: I2e13cf727bba9d901c4d3fc821bb526d38a775b8\n" }, { "commit": "9b70b4a806096d15bf00f629c1078c126dbd626b", "tree": "6831c828fcbd07f49f11e3c27f8fd03b9e65fb0c", "parents": [ "b4fe268625d881315002be75e6f71eb49cc6da5c", "ec32f6402382303608544fdac5a88067781bdec5" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Jun 02 12:44:10 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 02 12:44:12 2017 +0000" }, "message": "Merge \"Delay allocating environment locations.\"" }, { "commit": "b4fe268625d881315002be75e6f71eb49cc6da5c", "tree": "c84337cc94daf3a5bdbc79409796ca083903e1d0", "parents": [ "cff1b21b3e19c5d3a2d726fdb60dacd7de2a6f0d", "72a75f7d6878ef46437098a94066c14e91e00216" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Jun 02 11:40:54 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 02 11:40:56 2017 +0000" }, "message": "Merge \"Fix build failure in scheduler_arm with ART_USE_OLD_ARM_BACKEND\u003d1\"" }, { "commit": "ec32f6402382303608544fdac5a88067781bdec5", "tree": "5a8cddd783a86d3ecb9c3565e65f8fad91e93ada", "parents": [ "8144b1ebea42feaa798419eaf53a6bbbf37822a9" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 02 10:51:55 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 02 11:00:59 2017 +0100" }, "message": "Delay allocating environment locations.\n\nMany environments are killed before we get to the register\nallocation, so the early allocation of their locations was\nsimply wasting memory. For the most expensive method of a\ncertain app, this reduces EnvLocations with 64-bit dex2oat\nfrom 8657200 to 5339712 (-3.16MiB).\n\nTest: m test-art-host\nTest: testrunner.py --host\nBug: 33650849\nChange-Id: I70a02fc3c7ec87b54a87e989e1239dc4acfcf18b\n" }, { "commit": "72a75f7d6878ef46437098a94066c14e91e00216", "tree": "eb2da80bbb06f37ddf25a71dbbd0c531d760d754", "parents": [ "cce39b5b4fc00ab9e6b4aaed1e7fa6928f0ec594" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Thu May 25 16:50:39 2017 +0100" }, "committer": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Fri Jun 02 10:36:27 2017 +0100" }, "message": "Fix build failure in scheduler_arm with ART_USE_OLD_ARM_BACKEND\u003d1\n\nTest: m ART_USE_VIXL_ARM_BACKEND\u003dtrue test-art-host\nTest: m ART_USE_VIXL_ARM_BACKEND\u003dtrue test-art-target\n\nChange-Id: Id6019ec26a9e9ffe5c0ca7eb2535f094ea009763\n" }, { "commit": "513061a792b22c417c938d31c19581390709561c", "tree": "80b4fdce03711170626aa5640d07b07de4a326a1", "parents": [ "38c4ae5f4c5a033b7a7441032f39ea58f5772d4c" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 01 09:17:34 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 01 12:59:13 2017 -0700" }, "message": "ART: Clean up thread.h and thread_list.h\n\nRemove dependency on stack.h and gc_root.h. Remove unused object\ncallbacks include. Factor out ManagedStack into its own set of files.\nFix up users of transitive includes.\n\nTest: m test-art-host\nChange-Id: I01286c43d8c7710948c161b1348faabb05922e59\n" }, { "commit": "82b0740f03b1a6acab4558214d3edc362e27e238", "tree": "c19ec7ad047fbbef0c0f4dcd46905604b75841b5", "parents": [ "8144b1ebea42feaa798419eaf53a6bbbf37822a9" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Mar 01 19:02:04 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jun 01 20:37:10 2017 +0100" }, "message": "Use IntrusiveForwardList\u003c\u003e for Env-/UsePosition.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nChange-Id: I2b720e2ed8f96303cf80e9daa6d5278bf0c3da2f\n" }, { "commit": "38c4ae5f4c5a033b7a7441032f39ea58f5772d4c", "tree": "dc7d4952b83542a32d0bdd555b4dde5d572fc019", "parents": [ "d853fe46164d2a7a4853be08dbc96e50054c8a88", "08556886a16ff2bb9fc3f184ac699de21c0369cd" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Jun 01 17:03:09 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jun 01 17:03:11 2017 +0000" }, "message": "Merge \"Handle gracefully profiles with invalid classes or methods\"" }, { "commit": "d853fe46164d2a7a4853be08dbc96e50054c8a88", "tree": "2fae5d6ee2be43265cc1a35d597e8e36433d220e", "parents": [ "c174ceef1861648b6390818c051cbcef7fa56e24", "f044c229e12f1d49b7024ab5d7353b2d83335501" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Thu Jun 01 16:41:39 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jun 01 16:41:41 2017 +0000" }, "message": "Merge \"Add access flag for previously warm methods\"" }, { "commit": "08556886a16ff2bb9fc3f184ac699de21c0369cd", "tree": "c90ddce83ac98252ced0a4181b0c4b1e0e34c1f8", "parents": [ "854461a4cd5e4a38debe3616e12b52fe7f160782" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri May 26 16:40:45 2017 -0700" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Jun 01 06:54:11 2017 -0700" }, "message": "Handle gracefully profiles with invalid classes or methods\n\nBug: 38410980\nTest: m test-art-host-run-test-707\nChange-Id: I8c1b0a00c113c0faf0cc5d141e67e4183322520f\n" }, { "commit": "f044c229e12f1d49b7024ab5d7353b2d83335501", "tree": "010bc946819a5190b19fbf55f50bef75ef789991", "parents": [ "854461a4cd5e4a38debe3616e12b52fe7f160782" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Wed May 31 15:27:54 2017 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Wed May 31 20:46:50 2017 -0700" }, "message": "Add access flag for previously warm methods\n\nWe want to know if the method was warm instead of just having a non\nzero counter. This is required if we want to not compile all of the\nstartup methods, but still compile warm methods.\n\nTest: test-art-host ART_TEST_JIT\u003dtrue\n\nBug: 62200509\n\nChange-Id: I6e04866f39f970b04b47342b7af5ed474e1f4172\n" }, { "commit": "d49012909625c3bf87bf51138fe79315ce1b1bdc", "tree": "349ef2cdcb7255d042244046601bd0fd5eb3a092", "parents": [ "726e1793d3f54470705e5b84e7860074e029b0ed" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue May 30 18:41:34 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue May 30 20:44:33 2017 -0700" }, "message": "ART: Clean up heap headers\n\nUse more forward declarations for accounting structures and spaces.\nFactor out structs to reduce header surface. Remove heap include where\nunnecessary. Fix up transitive users. Move some debug-only code out\nof line.\n\nTest: m test-art-host\nChange-Id: I16db4aaa803f39e155ce6e1b0778b7e393dcbb17\n" }, { "commit": "deae7db5864fa50c5a1cd6c232a17aeb986b36e1", "tree": "cdedad3d0f921e4f82fa7b65d55820455b7ac0ea", "parents": [ "8d01c3708c4becb186979ed9377aed0fc2954d06" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue May 30 09:56:41 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue May 30 14:15:50 2017 -0700" }, "message": "ART: Add missing namespace comments\n\nAdd closing namespace comments.\n\nBug: 32619234\nTest: m\nChange-Id: I1f50e09dcd1038c4b540b87e5c19e319c1f592e4\n" }, { "commit": "19680d3655433e98582983ed0a6d44d6b4822951", "tree": "15113506e75b1480c5c1d3cfdf9df4480f30eae8", "parents": [ "0a5ace58e973da278049f837bf2cdbaf7b44849c" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Thu May 11 10:38:36 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Mon May 29 17:57:39 2017 +0200" }, "message": "MIPS64: ART Vectorizer\n\nMIPS64 implementation which uses MSA extension. Also extended all\nrelevant checker tests to test MIPS64 implementation.\n\nTest: booted MIPS64R6 in QEMU\nTest: ./testrunner.py --target --optimizing -j1 in QEMU\n\nChange-Id: I8b8a2f601076bca1925e21213db8ed1d41d79b52\n" }, { "commit": "6079dca3058e58bb9e12a60a10324a5218a99274", "tree": "19e3a8ccf7a8ac831c27658e0470c4f83debef74", "parents": [ "0a5ace58e973da278049f837bf2cdbaf7b44849c" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sun May 28 19:10:28 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sun May 28 20:17:39 2017 -0700" }, "message": "MIPS32R2: Fix MethodLoadKind::kBootImageLinkTimePcRelative\n\nThis makes MIPS32 boot again.\n\nThe issue was introduced in commit\n6597946d29be9108e2cc51223553d3db9290a3d9:\nStatic invokes in slow paths would sometimes get\nHMipsComputeBaseMethodAddress from the stack into the\nsame register where the art method pointer would later\nbe loaded (A0) with the former being overwritten in the\nprocess of loading the latter.\n\nTest: booted MIPS32R2 in QEMU\n\nChange-Id: Ib584cf66795574175650f42b191c797fb3b3965f\n" }, { "commit": "dbddc22f5dc2d1ff4d4783fbd66c27812f4980d1", "tree": "2a0a8efa1c2630e57ab48ab2de171f2847ff282f", "parents": [ "a559fa1b0d6c276dde2cdc707de1acd4950f7190" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Wed May 24 12:04:13 2017 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Thu May 25 16:59:44 2017 -0700" }, "message": "Refactor profiles to use TypeReference instead of ClassReference\n\nRefactor type reference into runtime and use it for profiles.\nClassReference was just duplicated code since it wasn\u0027t even using\nthe class def indexes.\n\nTest: test-art-host\n\nBug: 62040831\nChange-Id: Ia92f21c0e85c00321f52c97bb7a90158d882849b\n" } ], "next": "a559fa1b0d6c276dde2cdc707de1acd4950f7190" }