)]}' { "log": [ { "commit": "952dbb19cd094b8bfb01dbb33e0878db429e499a", "tree": "82932c2b00245042e2c129f3d4133f6431657da3", "parents": [ "df638c66d1f385d4e217b2ab22c5e48a7eefdef4" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 28 12:01:51 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 04 14:51:52 2016 +0100" }, "message": "Change suspend entrypoint to save all registers.\n\nWe avoid the need to save/restore registers in slow paths\nand get significant code size savings. On Nexus 9, AOSP:\n - 32-bit boot.oat: -1.4MiB (-1.9%)\n - 64-bit boot.oat: -2.0MiB (-2.3%)\n - other 32-bit oat files in dalvik-cache: -200KiB (-1.7%)\n - other 64-bit oat files in dalvik-cache: -2.3MiB (-2.1%)\n\nTest: Run ART test suite on host and Nexus 9 with gc stress.\nBug: 30212852\nChange-Id: I7015afc1e7d30341618c9200a3dc9ae277afd134\n" }, { "commit": "dec8f63fdf50815f24efe1c03af64208da15f339", "tree": "36c8dec8c2c93312d17c6d9d1452d4b133212dbd", "parents": [ "41c7e2e6ac0a59da2f3e066e20630b295fbe4661" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jul 22 17:10:06 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jul 22 18:54:35 2016 +0100" }, "message": "Do not emit stack maps for runtime calls to ReadBarrierMarkRegX.\n\n* Boot image code size variation on Nexus 5X\n (aosp_bullhead-userdebug build):\n - total ARM64 framework Oat files size change:\n 115584120 bytes -\u003e 109124728 bytes (-5.59%)\n - total ARM framework Oat files size change:\n 97387728 bytes -\u003e 92517584 (-5.00%)\n\nTest: ART host and target (ARM, ARM64) tests.\nBug: 29506760\nBug: 12687968\nChange-Id: I979d9fb2b4e09f4c0c7bf33af2cd91750a67f989\n" }, { "commit": "057361ca33625ed14b33ffd8e641e27916fb2fea", "tree": "cf13a0b5c0e5504fdcf320ab9a9936d0d489bdf5", "parents": [ "65ad9b3516c4f4bc4e7abf5c6e065a675cf024d8", "4359e61927866c254bc2d701e3ea4c48de10b79c" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jul 21 12:11:15 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jul 21 12:11:15 2016 +0000" }, "message": "Merge \"Move caller-saves saving/restoring to ReadBarrierMarkRegX.\"" }, { "commit": "4359e61927866c254bc2d701e3ea4c48de10b79c", "tree": "05d274ecd6b5ff6eb890f64cd3bb670c7170bf15", "parents": [ "2be946bbf995496fe56364d9b7c4957fcb6aeec5" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jul 20 11:32:19 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jul 21 11:21:20 2016 +0100" }, "message": "Move caller-saves saving/restoring to ReadBarrierMarkRegX.\n\nInstead of saving/restoring live caller-save registers\nbefore/after the call to read barrier mark entry points\nReadBarrierMarkRegX, have these entry points save/restore\nall the caller-save registers themselves (except register\nrX, which contains the return value).\n\nAlso refactor the assembly code of these entry points\nusing macros.\n\n* Boot image code size variation on Nexus 5X\n (aosp_bullhead-userdebug build):\n - total ARM64 framework Oat files size change:\n 119196792 bytes -\u003e 115575920 bytes (-3.04%)\n - total ARM framework Oat files size change:\n 100435212 bytes -\u003e 97621188 bytes (-2.80%)\n\n* Benchmarks (ARM64) score variations on Nexus 5X\n (aosp_bullhead-userdebug build):\n - RitzPerf (lower is better)\n - average score difference: -2.71%\n - CaffeineMark (higher is better)\n - no real difference for most tests\n (absolute variation lower than 1%)\n - better score on the \"Method\" benchmark:\n score variation 41253 -\u003e 44891 (+8.82%)\n\nTest: ART host and target (ARM, ARM64) tests.\nBug: 29506760\nBug: 12687968\nChange-Id: I881bf73139a3f1c2bee9ffc6fc8c00f9a392afa6\n" }, { "commit": "e4b1c86d13c3f60362708f4a128b62db156f5fde", "tree": "4920c33f3510a21dba212650659174a7bb44c855", "parents": [ "ce1ba111bfa122247ac186e7d2c6cf5943ba28cd", "465ecc86ff65ca546629630c9469deb6d2d8137e" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Jul 21 00:04:52 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jul 21 00:04:52 2016 +0000" }, "message": "Merge \"Revert \"Revert \"Refactor GetIMTIndex\"\"\"" }, { "commit": "6740997e6934bbca27d5830a32352d82aabbd38b", "tree": "684ab2e46ddeaaf251fb6919bf64295810e46afa", "parents": [ "dc4f4d42aa1712a7ac2e4c24c0aebe58b71ae2c0" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Jul 19 22:34:53 2016 -0700" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jul 20 11:44:25 2016 +0100" }, "message": "ART: Change return types of field access entrypoints\n\nEnsure that return types guarantee full-width data as the compiled\ncode and mterp expect by using size_t and ssize_t.\n\nThis fixes Clang no longer sign-/zero-extending small return types.\n\nBug: 30232671\nTest: m ART_TEST_RUN_TEST_NDEBUG\u003dtrue ART_TEST_INTERPRETER\u003dtrue test-art-host-run-test\nChange-Id: Ic505befc6c94e2dccbc8abf2b13d4c2d662e68d1\n" }, { "commit": "465ecc86ff65ca546629630c9469deb6d2d8137e", "tree": "3a0ed3f2d3ab9fd2cffec44a659036efab35fb4e", "parents": [ "bae13af2fc2fa89985d0466cedf155cb96767910" ], "author": { "name": "Matthew Gharrity", "email": "gharrma@google.com", "time": "Tue Jul 19 21:32:52 2016 +0000" }, "committer": { "name": "Matthew Gharrity", "email": "gharrma@google.com", "time": "Tue Jul 19 21:48:06 2016 +0000" }, "message": "Revert \"Revert \"Refactor GetIMTIndex\"\"\n\nOriginally reverted in order to revert\nhttps://android-review.googlesource.com/#/c/244190/\nbut can now be merged again.\n\nThis reverts commit d4ceecc85a5aab2ec23ea1bd010692ba8c8aaa0c.\n\nTest: m test-art-host\n\nChange-Id: Id9205f2b77a378fc0f06088e78c66e81a49f712d\n" }, { "commit": "2c30a373428b8d19bf97866d5d323c4ca2fbca72", "tree": "8927430b0ae7185b0583615e8dbd7481ac13c6c7", "parents": [ "7598736db0647eb963e77fafc22af6c0a5747d20", "02b75806a80f8b75c3d6ba2ff97c995117630f36" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jul 14 09:32:34 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jul 14 09:32:34 2016 +0000" }, "message": "Merge \"Introduce more compact ReadBarrierMark slow-paths.\"" }, { "commit": "09d77fac678d6c4d743218ffb6b77dea002b073e", "tree": "e9c527aa279e3c1eb400e0d2c539521d899875eb", "parents": [ "d2c44723e6fac5dd4aafffe61cbed3214340883c", "ff484b95b25a5181a6a8a191cbd11da501c97651" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jul 14 07:56:16 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jul 14 07:56:17 2016 +0000" }, "message": "Merge \"Fix a bug in ClassTableGet code generation for IMTs.\"" }, { "commit": "a70835569128786877caa64c4e1978e734ff0768", "tree": "e7ca7ee9517983ede563a338c0372f3aad9476b6", "parents": [ "c8cbda659671b111e309fe123cb2d4887e4edd10", "ee8d971b14edfc1e0af9436fd223277df966e4c2" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jul 13 16:37:34 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jul 13 16:37:34 2016 +0000" }, "message": "Merge \"X86: Use memory to do array range checks\"" }, { "commit": "ff484b95b25a5181a6a8a191cbd11da501c97651", "tree": "a14875e1a28afd1c5f7bd6a0a80414674253e593", "parents": [ "1fd347303275a424d114c9833f954e8e27812554" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jul 13 14:13:48 2016 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jul 13 16:13:03 2016 +0100" }, "message": "Fix a bug in ClassTableGet code generation for IMTs.\n\nIntroduced by:\n https://android-review.googlesource.com/#/c/244980/\n\ntest:566-polymorphic-inling for fixing x86 crash. Also\nfixes a performance regression.\nbug:29188168\n\nChange-Id: Id90cb819c88e7ba3db1cb3c50c517a112ab7d784\n" }, { "commit": "ee8d971b14edfc1e0af9436fd223277df966e4c2", "tree": "2dc16ca40980cc716aba24d793eaa8731846a180", "parents": [ "dedde3f10d7801ad862d1ca1de89135decff6a60" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Jul 12 11:13:15 2016 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed Jul 13 10:40:45 2016 -0400" }, "message": "X86: Use memory to do array range checks\n\nCurrently, an HBoundsCheck is fed by an HArrayLength, causing a load of\nthe array length, followed by a register compare.\n\nAvoid the load when we can by comparing directly with the array length\nin memory. Implement this by marking the HArrayLength as \u0027emitted at\nuse site\u0027, and then generating the code in the HBoundsCheck.\n\nOnly do this replacement when we are the only user of the ArrayLength\nand it isn\u0027t visible to the environment.\n\nHandle the special case where the array is \u0027null\u0027 and where an implicit\nnull check can\u0027t be eliminated.\n\nThis code moves the load of the length to the slow code for the failed\ncheck, which is what we want.\n\nTest: 609-checker-x86-bounds-check\n\nChange-Id: I9cdb183301e048234bb0ffeda940eedcf4a655bd\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "02b75806a80f8b75c3d6ba2ff97c995117630f36", "tree": "ecdb1852c3e33f120110091cc2d07a9737fbd3b5", "parents": [ "5f485719b166ceb8e591329d40e76c5e50988022" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jul 13 11:54:35 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jul 13 11:54:35 2016 +0100" }, "message": "Introduce more compact ReadBarrierMark slow-paths.\n\nReplace entry point ReadBarrierMark with 32\nReadBarrierMarkRegX entry points, using register\nnumber X as input and output (instead of the standard\nruntime calling convention) to save two moves in Baker\u0027s\nread barrier mark slow-path code.\n\nTest: ART host and target (ARM, ARM64) tests.\nBug: 29506760\nBug: 12687968\nChange-Id: I73cfb82831cf040b8b018e984163c865cc44ed87\n" }, { "commit": "d8f5f56f2dd90e2bcb6d41cb48403320b9eb04b9", "tree": "6c0c43f98f6c50c799c45449a4a45fa121ab1ba3", "parents": [ "6caea66f9d73b9fe4693090e3b3ceb1cf0b248d1", "54ff482710910929900f8348a19c5b875e519237" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jul 12 11:07:50 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jul 12 11:07:50 2016 +0000" }, "message": "Merge \"Rename kCall to kCallOnMainOnly\"" }, { "commit": "54ff482710910929900f8348a19c5b875e519237", "tree": "82667795ef43a33a87a585f9bc841c88ff3460f1", "parents": [ "2e7acaffda05db1df6e0631468f10726e898a20a" ], "author": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Thu Jul 07 18:03:19 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Jul 11 17:59:29 2016 +0000" }, "message": "Rename kCall to kCallOnMainOnly\n\nThis patch renames kCall to kCallOnMainOnly in preparation for\nthe next patch in this series which will be adding kCallOnMainAndSlowPath.\n\nNote: With this patch there will be places where we use kCallOnMainOnly\neven though we call on the slow path too. The next patch in this series\nwill fix that.\n\nTest: ART host tests.\nChange-Id: Iabfdb0901990d163be5d780f3bdd2fab6fa17b32\n" }, { "commit": "a62cb9bb6cb2278cb41ab0664191623e178c6a4f", "tree": "62263dac644e2d80a34a04f2649e4741a1bed6f4", "parents": [ "bb8d501c9bb882a8927c6ceda07bf9577e06c3e1" ], "author": { "name": "Artem Udovichenko", "email": "artem.u@samsung.com", "time": "Thu Jun 30 09:18:25 2016 +0000" }, "committer": { "name": "Artem Udovichenko", "email": "artem.u@samsung.com", "time": "Thu Jul 07 10:01:04 2016 +0000" }, "message": "Revert \"Revert \"Optimize IMT\"\"\n\nThis reverts commit 88f288e3564d79d87c0cd8bb831ec5a791ba4861.\n\nChange-Id: I49605d53692cbec1e2622e23ff2893fc51ed4115\n" }, { "commit": "88f288e3564d79d87c0cd8bb831ec5a791ba4861", "tree": "dd051a7b2985d1af3fea91ad6000de4bdc701a19", "parents": [ "e36389f20c83083c0aaba2dcac0888951e55cae1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 29 08:17:52 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 29 08:41:25 2016 +0000" }, "message": "Revert \"Optimize IMT\"\n\nBug: 29188168 (for initial CL)\nBug: 29778499 (reason for revert)\n\nThis reverts commit badee9820fcf5dca5f8c46c3215ae1779ee7736e.\n\nChange-Id: I32b8463122c3521e233c34ca95c96a5078e88848\n" }, { "commit": "e36389f20c83083c0aaba2dcac0888951e55cae1", "tree": "3fe74b637f8dc90e3cbc8ad3949f3f340236537f", "parents": [ "abf64415cf99a9a7ee048ae26c76f7bbe972a6b9", "d4ceecc85a5aab2ec23ea1bd010692ba8c8aaa0c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 29 08:40:14 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jun 29 08:40:14 2016 +0000" }, "message": "Merge \"Revert \"Refactor GetIMTIndex\"\"" }, { "commit": "d4ceecc85a5aab2ec23ea1bd010692ba8c8aaa0c", "tree": "982948a67a88a1f9a734c935f919f8d307969f48", "parents": [ "50706437d8216e41f0fea1e413cda7891324d397" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 29 08:39:47 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 29 08:39:47 2016 +0000" }, "message": "Revert \"Refactor GetIMTIndex\"\n\nI need to revert this to get https://android-review.googlesource.com/#/c/244190/ to cleanly revert. Matthew, do you mind rewriting it?\n\nThis reverts commit 50706437d8216e41f0fea1e413cda7891324d397.\n\nChange-Id: I5c1435f5dffb46dbb5b613b22adb88c7770304f2\n" }, { "commit": "31167a5785f7a5124de96535066db9890559f546", "tree": "3d0ddb1bb390389532b5fc94dd6f2f5c8d648582", "parents": [ "bad21cb538d76105712c967b62d1cf677777a956", "3d31242300c3525e5c85665d9e34acf87002db63" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jun 24 13:04:36 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 24 13:04:37 2016 +0000" }, "message": "Merge changes I4d8da7ce,I4da5be01,Idfbead82\n\n* changes:\n Re-enable most intrinsics with read barriers.\n Fix ARM \u0026 ARM64 UnsafeGetObject intrinsics with read barriers.\n Fix x86 \u0026 x86-64 UnsafeGetObject intrinsics with read barriers.\n" }, { "commit": "3d31242300c3525e5c85665d9e34acf87002db63", "tree": "c7f66d95fa3d65241a1c9f10381c1e0ec0989a4e", "parents": [ "bfea33585e229973f7887afbf51fe45c2ba41e91" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jun 23 13:53:42 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jun 23 14:05:17 2016 +0100" }, "message": "Re-enable most intrinsics with read barriers.\n\nAlso extend sun.misc.Unsafe test coverage to exercise\nsun.misc.Unsafe.{get,put}{Int,Long,Object}Volatile.\n\nBug: 26205973\nBug: 29516905\nChange-Id: I4d8da7cee5c8a310c8825c1631f71e5cb2b80b30\nTest: Covered by ART\u0027s run-tests.\n" }, { "commit": "4692c35c151951aa1fa901ca24bfa302a9beeacf", "tree": "8d28d7714dd7fa0ae1ff44888ae61f3c8786bfeb", "parents": [ "f6d4f6e0e61977777b7a9ca18b75bcd26e98e9f9", "87f3fcbd0db352157fc59148e94647ef21b73bce" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jun 21 16:18:10 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jun 21 16:18:10 2016 +0000" }, "message": "Merge \"Replace String.charAt() with HIR.\"" }, { "commit": "87f3fcbd0db352157fc59148e94647ef21b73bce", "tree": "5bdeabb246f5de86704333b3fcbccc6e9146d246", "parents": [ "b94b5706f0b8e2e1c7e1db22274f9f4bae0c4b5a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Apr 28 15:52:11 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jun 21 15:17:38 2016 +0100" }, "message": "Replace String.charAt() with HIR.\n\nReplace String.charAt() with HArrayLength, HBoundsCheck and\nHArrayGet. This allows GVN on the HArrayLength and BCE on\nthe HBoundsCheck as well as using the infrastructure for\nHArrayGet, i.e. better handling of constant indexes than\nthe old intrinsic and using the HArm64IntermediateAddress.\n\nBug: 28330359\nChange-Id: I32bf1da7eeafe82537a60416abf6ac412baa80dc\n" }, { "commit": "dbb7f5bef10138ade0fb202da1d61f562b2df649", "tree": "f0aa4b390c534b215a6e000c865783cdd9852353", "parents": [ "b94b5706f0b8e2e1c7e1db22274f9f4bae0c4b5a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Mar 30 13:23:58 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jun 21 15:11:57 2016 +0100" }, "message": "Improve HLoadClass code generation.\n\nFor classes in the boot image, use either direct pointers\nor PC-relative addresses. For other classes, use PC-relative\naccess to the dex cache arrays for AOT and direct address of\nthe type\u0027s dex cache slot for JIT.\n\nFor aosp_flounder-userdebug:\n - 32-bit boot.oat: -252KiB (-0.3%)\n - 64-bit boot.oat: -412KiB (-0.4%)\n - 32-bit dalvik cache total: -392KiB (-0.4%)\n - 64-bit dalvik-cache total: -2312KiB (-1.0%)\n (contains more files than the 32-bit dalvik cache)\nFor aosp_flounder-userdebug forced to compile PIC:\n - 32-bit boot.oat: -124KiB (-0.2%)\n - 64-bit boot.oat: -420KiB (-0.5%)\n - 32-bit dalvik cache total: -136KiB (-0.1%)\n - 64-bit dalvik-cache total: -1136KiB (-0.5%)\n (contains more files than the 32-bit dalvik cache)\n\nBug: 27950288\nChange-Id: I4da991a4b7e53c63c92558b97923d18092acf139\n" }, { "commit": "50706437d8216e41f0fea1e413cda7891324d397", "tree": "23c7c5d1198b8cdde6261198626cfe443eab59ba", "parents": [ "badee9820fcf5dca5f8c46c3215ae1779ee7736e" ], "author": { "name": "Matthew Gharrity", "email": "gharrma@google.com", "time": "Tue Jun 14 11:31:04 2016 -0700" }, "committer": { "name": "Matthew Gharrity", "email": "gharrma@google.com", "time": "Wed Jun 15 09:08:35 2016 -0700" }, "message": "Refactor GetIMTIndex\n\nThis allows us to more easily maintain and experiment with\ninterface method table indexing and hashing.\n\nChange-Id: I719920fae7490dcedcda7c1c36db225c2b8b16df\n" }, { "commit": "badee9820fcf5dca5f8c46c3215ae1779ee7736e", "tree": "982948a67a88a1f9a734c935f919f8d307969f48", "parents": [ "614968198625a6693666bdc1e5609e2f663f5638" ], "author": { "name": "Nelli Kim", "email": "nelli.kim@samsung.com", "time": "Fri May 13 13:08:53 2016 +0300" }, "committer": { "name": "Matthew Gharrity", "email": "gharrma@google.com", "time": "Tue Jun 14 10:05:47 2016 -0700" }, "message": "Optimize IMT\n\n* Remove IMT for classes which do not implement interfaces\n* Remove IMT for array classes\n* Share same IMT\n\nSaved memory (measured on hammerhead):\nboot.art:\nTotal number of classes: 3854\nNumber of affected classes: 1637\nSaved memory: 409kB\n\nChrome (excluding classes in boot.art):\nTotal number of classes: 2409\nNumber of affected classes: 1259\nSaved memory: 314kB\n\nGoogle Maps (excluding classes in boot.art):\nTotal number of classes: 6988\nNumber of affected classes: 2574\nSaved memory: 643kB\n\nPerformance regression on benchmarks/InvokeInterface.java benchmark\n(measured timeCall10Interface)\n1st launch: 9.6%\n2nd launch: 6.8%\n\nChange-Id: If07e45390014a6ee8f3c1c4ca095b43046f0871f\n" }, { "commit": "372f10e5b0b34e2bb6e2b79aeba6c441e14afd1f", "tree": "1f29c2467c8909ef0e0147f37f176caa1bcd2ccc", "parents": [ "1b66fdf3f33c72dfdda4d31f6f17b6a0d8607402" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 17 16:30:10 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jun 02 19:04:20 2016 +0100" }, "message": "Refactor handling of input records.\n\nIntroduce HInstruction::GetInputRecords(), a new virtual\nfunction that returns an ArrayRef\u003c\u003e to all input records.\nImplement all other functions dealing with input records as\nwrappers around GetInputRecords(). Rewrite functions that\npreviously used multiple virtual calls to deal with input\nrecords, especially in loops, to prefetch the ArrayRef\u003c\u003e\nonly once for each instruction. Besides avoiding all the\nextra calls, this also allows the compiler (clang++) to\nperform additional optimizations.\n\nThis speeds up the Nexus 5 boot image compilation by ~0.5s\n(4% of \"Compile Dex File\", 2% of dex2oat time) on AOSP ToT.\n\nChange-Id: Id8ebe0fb9405e38d918972a11bd724146e4ca578\n" }, { "commit": "3c7787fb2e197934a0e87329644384445b1d062f", "tree": "5942b3faa6b23abdccb98a2f9b9a13fa75ca6d36", "parents": [ "80fd43eead361bd3b61d646e5c8efcdd0720304d", "fba39972d99701c80bf3beb7451aca508d67593c" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue May 24 18:19:35 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue May 24 18:19:35 2016 +0000" }, "message": "Merge \"Fix misc-macro-parentheses warnings.\"" }, { "commit": "288c7a8664e516d7486ab85267050e676e84cc39", "tree": "8c117fcb348daf29477e1eb1338de9bc3c1dc706", "parents": [ "fbb0323d801cd14fb04eb4af7e88792d7cca8de3" ], "author": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Mon May 16 11:53:15 2016 +0600" }, "committer": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Mon May 16 13:32:43 2016 +0600" }, "message": "Revert \"Revert \"ART: Reference.getReferent intrinsic for x86 and x86_64\"\"\n\nThis reverts commit 0997d24e67d78f2146ebae2888eda0d7d254789a.\n\nART_HEAP_POISONING\u003dtrue mode is fixed.\n\nChange-Id: I83f6d5c101ea6a86802753f81b3e4348a263fb21\nSigned-off-by: Serguei Katkov \u003cserguei.i.katkov@intel.com\u003e\n" }, { "commit": "fba39972d99701c80bf3beb7451aca508d67593c", "tree": "0d80ecb6997290140503926b08a72e7418915526", "parents": [ "718d4e269810c17d03df909c84b2f7bbd4f61fb9" ], "author": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Wed May 11 11:26:48 2016 -0700" }, "committer": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Fri May 13 10:38:56 2016 -0700" }, "message": "Fix misc-macro-parentheses warnings.\n\n* Add parentheses to fix warnings.\n* Use NOLINT to suppress wrong clang-tidy warnings.\n\nBug: 28705665\nChange-Id: Icc8bc9b59583dee0ea17ab83e0ff0383b8599c3e\n" }, { "commit": "628f2017fcc64352a2297a802c10ea7100fbd74b", "tree": "982bf345d7b937755bd9f82ff66d139c1cce79ba", "parents": [ "893a1d36aec93fabb85ea4a6d4f45019046a6b74", "0997d24e67d78f2146ebae2888eda0d7d254789a" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri May 13 09:30:18 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri May 13 09:30:18 2016 +0000" }, "message": "Merge \"Revert \"ART: Reference.getReferent intrinsic for x86 and x86_64\"\"" }, { "commit": "0997d24e67d78f2146ebae2888eda0d7d254789a", "tree": "8b521397c856259c9049b52d86e40bfd2c84f0f4", "parents": [ "afdc97ebcb4e58afb7cf54d846d30314e6499d83" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri May 13 09:29:01 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri May 13 09:29:01 2016 +0000" }, "message": "Revert \"ART: Reference.getReferent intrinsic for x86 and x86_64\"\n\nFails heap poisoning configuration.\n\nThis reverts commit afdc97ebcb4e58afb7cf54d846d30314e6499d83.\n\nChange-Id: I50e53756a2b85059b89cfb8950f8c9e2b032743c\n" }, { "commit": "4478ae4fcb3337f094815d40273ec0ba32a2d7af", "tree": "0ace818ca85307a33e439b42e362ed180b54178f", "parents": [ "af4bcdf49e014ededa9e71e425dac761697dac8d", "afdc97ebcb4e58afb7cf54d846d30314e6499d83" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu May 12 15:28:38 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 12 15:28:38 2016 +0000" }, "message": "Merge \"ART: Reference.getReferent intrinsic for x86 and x86_64\"" }, { "commit": "afdc97ebcb4e58afb7cf54d846d30314e6499d83", "tree": "bd7db3f73405d3d302f9f5021ffe2d424a7e8153", "parents": [ "3b62593ba55f6bdb37ca84f64930654ff4f09464" ], "author": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Thu May 05 13:42:59 2016 +0600" }, "committer": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Tue May 10 11:35:08 2016 +0600" }, "message": "ART: Reference.getReferent intrinsic for x86 and x86_64\n\nChange-Id: I7a7ac9244847dd80d9fa4e4b5ebc5bf451c628ff\nSigned-off-by: Serguei Katkov \u003cserguei.i.katkov@intel.com\u003e\n" }, { "commit": "dce016eab87302f02b0bd903dd2cd86ae512df2d", "tree": "3af3c0e6b9d845e611b560484882e6b438ef439a", "parents": [ "a246510965fc57ec51d1b202649304535adfe9f3" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Apr 28 13:10:02 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon May 09 20:40:32 2016 +0100" }, "message": "Intrinsify String.length() and String.isEmpty() as HIR.\n\nUse HArrayLength for String.length() in anticipation of\nchanging the String.charAt() to HBoundsCheck+HArrayGet to\nallow the existing BCE to seamlessly work for strings.\nUse HArrayLength+HEqual for String.isEmpty().\n\nWe previously relied on inlining but we now want to apply\nthe new intrinsics even when we do not inline, i.e. when\ncompiling debuggable (as is currently the case for boot\nimage) or when we hit inlining limits, i.e. depth, size,\nor the number of accumulated dex registers.\n\nBug: 28330359\nChange-Id: Iab9d2f6d2967bdd930a72eb461f27efe8f37c103\n" }, { "commit": "ffc87076dda9878cb2cc098149bae441d38b9268", "tree": "e587208d6a8e62532792add3e1ace6b4e6d73e0f", "parents": [ "97cbc9206e9adc473a90650ebdb5d620f517ff04" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Apr 20 14:22:09 2016 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Apr 28 16:15:04 2016 +0100" }, "message": "Split profile recording from jit compilation\n\nWe still use ProfileInfo objects to record profile information. That\ngives us the flexibility to add the inline caches in the future and the\nconvenience of the already implemented GC.\n\nIf UseJIT is false and SaveProfilingInfo true, we will only record the\nProfileInfo and never launch compilation tasks.\n\nBug: 27916886\n\n(cherry picked from commit e5de54cfab5f14ba0b8ff25d8d60901c7021943f)\n\nChange-Id: I68afc181d71447895fb12346c1806e99bcab1de2\n" }, { "commit": "9d944d143c2065272ac3f8e1ce6688377042e295", "tree": "4a4e9652c16edfc1b02d1af70a92b952a3f71f29", "parents": [ "e6d96771a2c9934c8ba6efe1689a1d1b5c54a6f7" ], "author": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Fri Apr 15 16:50:25 2016 +0600" }, "committer": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Tue Apr 26 18:21:35 2016 +0600" }, "message": "ART: Eliminate unlikely code from hot path in x86 div/rem\n\nDivision and Remainder when numerator is zero is not\nusual case so remove the check for this case from hot path.\n\nChange-Id: Ie575af0fedb5045d4ed74292a61a8378f82d39ae\nSigned-off-by: Serguei Katkov \u003cserguei.i.katkov@intel.com\u003e\n" }, { "commit": "2efce70e4204e1a52769c63dac43c9d4af105751", "tree": "d812f91e3ca3d64c42d7e0d876b4559e62616406", "parents": [ "70c0f4e15797902e248e8b7aa0e013fe6d426c71", "7aa04a145e2e0d2949a1a1c7fd4c72d08d698587" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Apr 21 19:36:23 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Apr 21 19:36:24 2016 +0000" }, "message": "Merge \"X86/X86_64: Switch to locked add from mfence\"" }, { "commit": "93205e395f777c1dd81d3f164cf9a4aec4bde45f", "tree": "1d08efd9b7bca9fe23df9ae9489c5dd575d3c6df", "parents": [ "6990775e323cd9164d6cc10955a047b9d9f15f32" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 13 11:59:46 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 13 17:50:16 2016 +0100" }, "message": "Move Assemblers to the Arena.\n\nAnd clean up some APIs to return std::unique_ptr\u003c\u003e instead\nof raw pointers that don\u0027t communicate ownership.\n\nChange-Id: I3017302307a0253d661240750298802fb0d9585e\n" }, { "commit": "7aa04a145e2e0d2949a1a1c7fd4c72d08d698587", "tree": "631554549d4b4dbde438fa0e6e636832427fe6c5", "parents": [ "4009bc645e3358d3150b7f94dd90a2c939f0fa51" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed Jan 27 22:39:07 2016 -0500" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Apr 12 17:25:51 2016 -0400" }, "message": "X86/X86_64: Switch to locked add from mfence\n\nI finally received the answers about the performance of locked add vs.\nmfence for Java memory semantics. Locked add has been faster than\nmfence for all processors since the Pentium 4. Accordingly, I have made\nthe synchronization use locked add at all times, removing it from an\ninstruction set feature.\n\nAlso add support in the optimizing compiler for barrier type\nkNTStoreStore, which is used after non-temporal moves.\n\nChange-Id: Ib47c2fd64c2ff2128ad677f1f39c73444afb8e94\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "dee58d6bb6d567fcd0c4f39d8d690c3acaf0e432", "tree": "5a2f20546ca3c1544c44bee560062580e22dc79c", "parents": [ "391e155a6936a05bd39b171031ec21d2dee62133" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Apr 07 09:54:26 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Apr 07 16:03:16 2016 +0000" }, "message": "Revert \"Revert \"Refactor HGraphBuilder and SsaBuilder to remove HLocals\"\"\n\nThis patch merges the instruction-building phases from HGraphBuilder\nand SsaBuilder into a single HInstructionBuilder class. As a result,\nit is not necessary to generate HLocal, HLoadLocal and HStoreLocal\ninstructions any more, as the builder produces SSA form directly.\n\nSaves 5-15% of arena-allocated memory (see bug for more data):\n GMS 20.46MB \u003d\u003e 19.26MB (-5.86%)\n Maps 24.12MB \u003d\u003e 21.47MB (-10.98%)\n YouTube 28.60MB \u003d\u003e 26.01MB (-9.05%)\n\nThis CL fixed an issue with parsing quickened instructions.\n\nBug: 27894376\nBug: 27998571\nBug: 27995065\n\nChange-Id: I20dbe1bf2d0fe296377478db98cb86cba695e694\n" }, { "commit": "40ecb12f8eeb97b810e11f895278abbf7988ed4d", "tree": "54d999605c0eaf3b4d311f83f8162684506f4a31", "parents": [ "5827507da8efdaf4536c70dfdc54407c28e37852" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 06 17:33:41 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 06 17:33:41 2016 +0100" }, "message": "Optimizing: Fix codegens for MethodLoadKind::kDexCacheViaMethod.\n\nUse the original method index instead of the target method\nindex because the target method may point to a different dex\nfile.\n\nNo regression test: this currently happens only if the\ncodegen uses the kDexCacheViaMethod as a fallback for\nanother load kind and we aim to avoid that fallback, so it\nwould be difficult to write a reliable regression test. We\ncould try and exploit current fallbacks for irreducible\nloops on x86 and arm but those fallbacks will eventually\ndisappear anyway.\n\nBug: 28036230\nChange-Id: I4cc9e046480d3d60a7fb521f0ca6a98914625cdc\n" }, { "commit": "60328910cad396589474f8513391ba733d19390b", "tree": "01702f6df5c39925b354a3152dd04289e7d97062", "parents": [ "e3ff7b293be2a6791fe9d135d660c0cffe4bd73f" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Apr 04 17:47:42 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Apr 04 17:47:42 2016 +0000" }, "message": "Revert \"Refactor HGraphBuilder and SsaBuilder to remove HLocals\"\n\nBug: 27995065\nThis reverts commit e3ff7b293be2a6791fe9d135d660c0cffe4bd73f.\n\nChange-Id: I5363c7ce18f47fd422c15eed5423a345a57249d8\n" }, { "commit": "e3ff7b293be2a6791fe9d135d660c0cffe4bd73f", "tree": "d578d27cb78e6d2caef683cd8ac94c9a9752b192", "parents": [ "86ea7eeabe30c98bbe1651a51d03cb89776724e7" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Mar 02 16:48:20 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Apr 04 11:21:30 2016 +0100" }, "message": "Refactor HGraphBuilder and SsaBuilder to remove HLocals\n\nThis patch merges the instruction-building phases from HGraphBuilder\nand SsaBuilder into a single HInstructionBuilder class. As a result,\nit is not necessary to generate HLocal, HLoadLocal and HStoreLocal\ninstructions any more, as the builder produces SSA form directly.\n\nSaves 5-15% of arena-allocated memory (see bug for more data):\n GMS 20.46MB \u003d\u003e 19.26MB (-5.86%)\n Maps 24.12MB \u003d\u003e 21.47MB (-10.98%)\n YouTube 28.60MB \u003d\u003e 26.01MB (-9.05%)\n\nBug: 27894376\nChange-Id: Iefe28d40600c169c5d306fd2c77034ae19476d90\n" }, { "commit": "cac5a7e871f1f346b317894359ad06fa7bd67fba", "tree": "2df7d4892216a7c976dfe848c9893cb5eb8fa6a5", "parents": [ "6f51d7756a9c66007fe7666b19399e1f60ff6092" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Feb 22 10:39:50 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Mar 29 19:27:40 2016 +0100" }, "message": "Optimizing: Improve const-string code generation.\n\nFor strings in the boot image, use either direct pointers\nor pc-relative addresses. For other strings, use PC-relative\naccess to the dex cache arrays for AOT and direct address of\nthe string\u0027s dex cache slot for JIT.\n\nFor aosp_flounder-userdebug:\n - 32-bit boot.oat: -692KiB (-0.9%)\n - 64-bit boot.oat: -948KiB (-1.1%)\n - 32-bit dalvik cache total: -900KiB (-0.9%)\n - 64-bit dalvik cache total: -3672KiB (-1.5%)\n (contains more files than the 32-bit dalvik cache)\nFor aosp_flounder-userdebug forced to compile PIC:\n - 32-bit boot.oat: -380KiB (-0.5%)\n - 64-bit boot.oat: -928KiB (-1.0%)\n - 32-bit dalvik cache total: -468KiB (-0.4%)\n - 64-bit dalvik cache total: -1928KiB (-0.8%)\n (contains more files than the 32-bit dalvik cache)\n\nBug: 26884697\nChange-Id: Iec7266ce67e6fedc107be78fab2e742a8dab2696\n" }, { "commit": "0ced281ae6216c29f57ca0f8b7388a722e8da97b", "tree": "b7f8273bb117c8ec8f8546ed937a8c0a96d2e5de", "parents": [ "843a65556616183a36792bbcc1632c6d8d0e78b2", "1a65388f1d86bb232c2e44fecb44cebe13105d2e" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Mar 24 10:25:51 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Mar 24 10:25:51 2016 +0000" }, "message": "Merge \"Clean up art::HConstant predicates.\"" }, { "commit": "5b5b9319ff970979ed47d41a41283e4faeffb602", "tree": "e7795abf120cf512627786fd6302efd34535724b", "parents": [ "0c25da0276f5b6f6119793ae9d45d1bca8172c2b" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Mar 22 14:57:31 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Mar 22 14:57:31 2016 +0000" }, "message": "Fix and improve shift and rotate operations.\n\n- Define maximum int and long shift \u0026 rotate distances as\n int32_t constants, as shift \u0026 rotate distances are 32-bit\n integer values.\n- Consider the (long, long) inputs case as invalid for\n static evaluation of shift \u0026 rotate rotations.\n- Add more checks in shift \u0026 rotate operations constructors\n as well as in art::GraphChecker.\n\nChange-Id: I754b326c3a341c9cc567d1720b327dad6fcbf9d6\n" }, { "commit": "1a65388f1d86bb232c2e44fecb44cebe13105d2e", "tree": "515e3000b3ad6d195101f20f33f3c9498e536593", "parents": [ "f808e8a0cc218c2b98023ef0e91f3c5b74ad2962" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 18 18:05:57 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 18 18:05:57 2016 +0000" }, "message": "Clean up art::HConstant predicates.\n\n- Make the difference between arithmetic zero and zero-bit\n pattern non ambiguous.\n- Introduce Boolean predicates in art::HIntConstant for when\n they are used as Booleans.\n- Introduce aritmetic positive and negative zero predicates\n for floating-point constants.\n\nBug: 27639313\nChange-Id: Ia04ecc6f6aa7450136028c5362ed429760c883bd\n" }, { "commit": "38ceb62339514a8012695673b9e1110d13546f02", "tree": "9505047a0de423a270bd40cd13308f3fe5ce8557", "parents": [ "b1aff6c7f248632028b6a62a17f02675007c9ce3", "22c4922c6b31e154a6814c4abe9015d9ba156911" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 18 16:16:41 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Mar 18 16:16:41 2016 +0000" }, "message": "Merge \"Ensure art::HRor support boolean, byte, short and char inputs.\"" }, { "commit": "22c4922c6b31e154a6814c4abe9015d9ba156911", "tree": "8e871f67e327322d24d0c2e4588b165005414077", "parents": [ "0205b58a0d7a9ce5832393857c19c086c78996e9" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 18 14:04:28 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Mar 18 14:04:28 2016 +0000" }, "message": "Ensure art::HRor support boolean, byte, short and char inputs.\n\nAlso extend tests covering the IntegerRotateLeft,\nLongRotateLeft, IntegerRotateRight and LongRotateRight\nintrinsics and their translation into an art::HRor\ninstruction.\n\nBug: 27682579\nChange-Id: I89f6ea6a7315659a172482bf09875cfb7e7422a1\n" }, { "commit": "e943c3b831dc0da4a6b09e940ae25c3285850e96", "tree": "b4756bbc16f49d50087a881b40722657451e6eac", "parents": [ "7c06aef061fa176331b77a88c1ff2c6ae401a5f0", "d28f4a00933a4a3b8d5e9db73b8532924d0f989d" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Mar 18 12:37:03 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Mar 18 12:37:03 2016 +0000" }, "message": "Merge \"Generate native debug stackmaps before calls as well.\"" }, { "commit": "d28f4a00933a4a3b8d5e9db73b8532924d0f989d", "tree": "1205844a68ee9e2c502f8ecbfd2d5cf96acd4190", "parents": [ "fbc61e19578d281d05728bcd120e1ace57c2fbd8" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Mar 14 17:14:24 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Mar 17 16:58:55 2016 +0000" }, "message": "Generate native debug stackmaps before calls as well.\n\nThe debugger looks up PC of the call instruction, so the runtime\u0027s\nstackmap is not sufficient since it is at PC after the instruction.\n\nChange-Id: I0dd06c0b52e8079ea5d064ea10beb12c93584092\n" }, { "commit": "0397163516fb882589c5be734439dedfe4d271fb", "tree": "2a9ffbf2cb65aa28e8ec5d298f97d81c16d2408f", "parents": [ "0205b58a0d7a9ce5832393857c19c086c78996e9" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Mar 17 10:44:24 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Mar 17 13:24:10 2016 +0000" }, "message": "Fix load store elimination bug in the presence of null[i].\n\nDue to the dex specification, we can be in a state where\ntwo array get with the same dex register inputs are typed\ndifferently.\n\nbug:27683874\n\nChange-Id: Ia821fd32e86c306093372249e7686332a7584263\n" }, { "commit": "a5c4a4060edd03eda017abebc85f24cffb083ba7", "tree": "85f69512d33c19d82e172a490a241f3a17d66560", "parents": [ "713c519db15aaa8d6f33b744fd28adddb97a07c2" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Mar 15 15:02:50 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Mar 16 16:49:36 2016 +0000" }, "message": "Make art::HCompare support boolean, byte, short and char inputs.\n\nAlso extend tests covering the IntegerSignum, LongSignum,\nIntegerCompare and LongCompare intrinsics and their\ntranslation into an art::HCompare instruction.\n\nBug: 27629913\nChange-Id: I0afc75ee6e82602b01ec348bbb36a08e8abb8bb8\n" }, { "commit": "914d71ead70bb6f2084b2ed39a9fd58fd014f67d", "tree": "50f30d6e47d18aa6c3ccec9f05727b4898268b20", "parents": [ "1583e624d4c970d8e571b265b9a8f08402d91f82", "2ae48182573da7087bffc2873730bc758ec29696" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Mar 16 14:40:08 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Mar 16 14:40:08 2016 +0000" }, "message": "Merge \"Clean up NullCheck generation and record stats about it.\"" }, { "commit": "2ae48182573da7087bffc2873730bc758ec29696", "tree": "d6955329ad876aefd477f7ef8905b070b9ab95dd", "parents": [ "6915898b28cea6c9836ca1be6814d87e89cc6d76" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Mar 16 14:05:09 2016 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Mar 16 14:10:27 2016 +0000" }, "message": "Clean up NullCheck generation and record stats about it.\n\nThis removes redundant code from the generators and allows for easier\nstat recording.\n\nChange-Id: Iccd4368f9e9d87a6fecb863dee4e2145c97851c4\n" }, { "commit": "e5671618d19489ad0781ec0d204c7765317170cf", "tree": "317d451ebf639f89e91d4c1e482d950579da0a0f", "parents": [ "d35f4a2eacf9ee9c9d75bb0c00eec7ae31ad1949" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Mar 16 11:03:54 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Mar 16 11:14:20 2016 +0000" }, "message": "Accept boolean as an input of HDivZeroCheck.\n\nAll our arithmetic operations accept it.\n\nbug:27624718\nChange-Id: I1f6bb95dc77ecb3fb2fcabb35a93b31c524bfa0a\n" }, { "commit": "a1de9188a05afdecca8cd04ecc4fefbac8b9880f", "tree": "a671c8aef814ccf194e5c3950a551f2711516c53", "parents": [ "950d063395c7cecbbe372fd607468018d661a35c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Feb 25 11:37:38 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Feb 26 16:01:59 2016 +0000" }, "message": "Optimizing: Reduce memory usage of HInstructions.\n\nPack narrow fields and flags into a single 32-bit field.\n\nChange-Id: Ib2f7abf987caee0339018d21f0d498f8db63542d\n" }, { "commit": "9cd6d378bd573cdc14d049d32bdd22a97fa4d84a", "tree": "be293c89806b919143b7dcd203bae14f5f4eaf04", "parents": [ "0e02ee9efbf1dbdde05d2b10f7307bbe191c52f5" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Feb 09 15:24:47 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Feb 24 10:25:29 2016 +0000" }, "message": "Associate slow paths with the instruction that they belong to.\n\nAlmost all slow paths already know the instruction they belong to,\nthis CL just moves the knowledge to the base class as well.\n\nThis is needed to be be able to get the corresponding dex pc for\nslow path, which allows us generate better native line numbers,\nwhich in turn fixes some native debugging stepping issues.\n\nChange-Id: I568dbe78a7cea6a43a4a71a014b3ad135782c270\n" }, { "commit": "0e02ee9efbf1dbdde05d2b10f7307bbe191c52f5", "tree": "19c9c3e25a8db4e5b53890fd72193383b5bb73e5", "parents": [ "72ca09cc2dd350adb932ef4a50eff668cca99c5e", "c7098ff991bb4e00a800d315d1c36f52a9cb0149" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Feb 24 10:23:50 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Feb 24 10:23:50 2016 +0000" }, "message": "Merge \"Remove HNativeDebugInfo from start of basic blocks.\"" }, { "commit": "c7098ff991bb4e00a800d315d1c36f52a9cb0149", "tree": "3a150e927bc7f4894f5b148ec6f5a2b796cdd80d", "parents": [ "5322e55ab9a15996a197456ca39d9c77488cd5c1" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Feb 09 14:30:11 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Feb 24 10:21:57 2016 +0000" }, "message": "Remove HNativeDebugInfo from start of basic blocks.\n\nWe do not require full environment at the start of basic block.\nThe dex pc contained in basic block is sufficient for line mapping.\n\nChange-Id: I5ba9e5f5acbc4a783ad544769f9a73bb33e2bafa\n" }, { "commit": "442643920a6c539e98aad76594e99b932b5631ba", "tree": "ecbe2d8109125de2031af7ac4e0f4fc03a3b6d12", "parents": [ "0723a61dd00fcc7072d82407e0d4a40a8b141d43", "0c5b18edd1308975804ccf29a02a130a7b6f7fa7" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Feb 17 11:06:40 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Feb 17 11:06:40 2016 +0000" }, "message": "Merge \"Support CMOV for x86 Select\"" }, { "commit": "8659e8462553fa95ec1470fb86324f6ad540bf77", "tree": "169e56f8ecf97590cc0d63e8ede939240897e420", "parents": [ "7eca244e79480f2ecea341598524a53273959c2b" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Feb 16 10:41:46 2016 -0500" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Feb 16 10:41:46 2016 -0500" }, "message": "X86: Allow long compares to stack operands\n\nThere is no need to force the RHS stack operand into a register for a\nlong comparison.\n\nChange-Id: Ie86851a54ec2dc9a9f61443e59219a8994dc01bb\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "0c5b18edd1308975804ccf29a02a130a7b6f7fa7", "tree": "58f60a2f93973460f1602f007ffdb2c6d7c577bf", "parents": [ "7eca244e79480f2ecea341598524a53273959c2b" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Sat Feb 06 13:58:35 2016 -0500" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Feb 16 10:10:44 2016 -0500" }, "message": "Support CMOV for x86 Select\n\nIf possible, generate CMOV to implement HSelect. Tricky cases are a\nlong or FP condition (no single CC generated), FP inputs (no FP CMOV)\nand when the condition is a boolean or not emitted at the use site.\nIn these cases, keep using the existing HSelect code.\n\nChange-Id: I4ff1e152b8ef126fbbabeb3316e9e2b6a6b74aeb\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "b52bbde2870e5ab5d126612961dcb3da8e5236ee", "tree": "3a58d251d8667e7c8447199a799fecba9bd5f918", "parents": [ "1b0755299928221a1dcc5db383bf8fc378d29b60" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Feb 12 12:06:05 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Feb 15 15:06:44 2016 +0000" }, "message": "Optimizing: Simplify consecutive type conversions.\n\nMerge two consecutive type conversions to one if the result\nof such merged conversion is guaranteed to be the same and\nremove all implicit conversions, not just conversions to the\nsame type. Improve codegens to handle conversions from long\nto integral types smaller than int.\n\nThis will make it easier to simplify `(byte) (x \u0026 0xffL)` to\n`(byte) x` where the conversion from long to byte is done by\ntwo dex instructions, long-to-int and in int-to-byte.\n\nBug: 23965701\nChange-Id: I833f193556671136ad2cd3f5b31cdfbc2d99c19d\n" }, { "commit": "6e332529c33be4d7dae5dad3609a839f4c0d3bfc", "tree": "cedd2e1beb170fd5821136fe974e3f34adfcddc2", "parents": [ "d3caabd4f85f86dd744da432993e12935d843a83" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Feb 02 16:15:27 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Feb 12 15:17:50 2016 +0000" }, "message": "ART: Remove HTemporary\n\nChange-Id: I21b984224370a9ce7a4a13a9652503cfb03c5f03\n" }, { "commit": "a19616e3363276e7f2c471eb2839fb16f1d43f27", "tree": "ad3e7fd0f53229e95fb0443586fc30eedabe6967", "parents": [ "9fba3f67a0792ad5eeb495e489d11a87211c318f" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Feb 01 18:57:58 2016 -0800" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Feb 05 09:26:21 2016 -0800" }, "message": "Implemented compare/signum intrinsics as HCompare\n(with all code generation for all)\n\nRationale:\nAt HIR level, many more optimizations are possible, while ultimately\ngenerated code can take advantage of full semantics.\n\nChange-Id: I6e2ee0311784e5e336847346f7f3c4faef4fd17e\n" }, { "commit": "2f10a5fb8c236a6786928f0323bd312c3ee9a4cc", "tree": "0dc51717b1f5d9b2c20898c5283467d4feb220e2", "parents": [ "a20748aceb63396c5e09366968bbc71308f745df" ], "author": { "name": "Mark P Mendell", "email": "mark.p.mendell@intel.com", "time": "Mon Jan 25 14:47:50 2016 +0000" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Thu Feb 04 12:59:22 2016 -0500" }, "message": "Revert \"Revert \"X86: Use the constant area for more operations.\"\"\n\nThis reverts commit cf8d1bb97e193e02b430d707d3b669565fababb4.\n\nHandle the case of an intrinsic where CurrentMethod is still an input.\nThis will be the case when there are unresolved classes in the\nhierarchy.\n\nAdd a test case to confirm that we don\u0027t crash when handling Math.abs,\nwhich wants to add a pointer to the constant area for the bitmask to be\nused to remove the sign bit.\n\nEnhance 565-checker-condition-liveness to check for the case of deeply\nnested EmitAtUseSite chains.\n\nChange-Id: I022e8b96a32f5bf464331d0c318c56b9d0ac3c9a\n" }, { "commit": "7770a3e080db3fb26e0754dc5afd05eb73aae2a7", "tree": "e7eb4be8e179b684550c0a77dd2a194a1b809693", "parents": [ "b72923dd4d6e1636163047c960395ed9879e31fc" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Feb 03 10:13:41 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Feb 03 10:13:41 2016 +0000" }, "message": "Assume fp operations can also take a constant on x86.\n\nBecause irreducible loops disable the constant pool optimization\non x86, we need to handle cases where a fp operation gets one.\n\nChange-Id: I43387f31aa2589d02112953baa62fd0994d0a6d7\n" }, { "commit": "9ff1de06d6ed1da36f7e976224a2d13e5e9882bf", "tree": "9121c384f3e0375fccfa4ca9f71c7d86baf38904", "parents": [ "bee600ff66e3e233274faa1391890ff424a8244e", "a42363f79832a6e14f348514664dc6dc3edf9da2" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 28 16:09:16 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jan 28 16:09:16 2016 +0000" }, "message": "Merge \"Implement first kind of polymorphic inlining.\"" }, { "commit": "a42363f79832a6e14f348514664dc6dc3edf9da2", "tree": "bcd43acdf9903a704b566af00b5c740786284b7b", "parents": [ "9cea9139033a4d04437ebc5542e9466fd67137fe" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Dec 17 14:57:09 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 28 15:55:46 2016 +0000" }, "message": "Implement first kind of polymorphic inlining.\n\nAdd HClassTableGet to fetch an ArtMethod from the vtable or imt,\nand compare it to the only method the profiling saw.\n\nChange-Id: I76afd3689178f10e3be048aa3ac9a97c6f63295d\n" }, { "commit": "74eb1b264691c4eb399d0858015a7fc13c476ac6", "tree": "0b6fc4f3003d50bf6c388601013cdfc606e53859", "parents": [ "75fd2a8ab9b4aff59308034da26eb4986d10fa9e" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Dec 14 11:44:01 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 28 15:50:27 2016 +0000" }, "message": "ART: Implement HSelect\n\nThis patch adds a new HIR instruction to Optimizing. HSelect returns\none of two inputs based on the outcome of a condition.\n\nThis is only initial implementation which:\n - defines the new instruction,\n - repurposes BooleanSimplifier to emit it,\n - extends InstructionSimplifier to statically resolve it,\n - updates existing code and tests accordingly.\n\nCode generators currently emit fallback if/then/else code and will be\nupdated in follow-up CLs to use platform-specific conditional moves\nwhen possible.\n\nChange-Id: Ib61b17146487ebe6b55350c2b589f0b971dcaaee\n" }, { "commit": "b3e773eea39a156b3eacf915ba84e3af1a5c14fa", "tree": "6c0d3a748d7b445a0d776ed306c7add43a0e1dd3", "parents": [ "05aeb408f292d8d94af1646a94bc69faf77f0b46" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Jan 26 11:28:37 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 28 15:48:00 2016 +0000" }, "message": "ART: Implement support for instruction inlining\n\nOptimizing HIR contains \u0027non-materialized\u0027 instructions which are\nemitted at their use sites rather than their defining sites. This\nwas not properly handled by the liveness analysis which did not\nadjust the use positions of the inputs of such instructions.\nDespite the analysis being incorrect, the current use cases never\nproduce incorrect code.\n\nThis patch generalizes the concept of inlined instructions and\nupdates liveness analysis to set the compute use positions correctly.\n\nChange-Id: Id703c154b20ab861241ae5c715a150385d3ff621\n" }, { "commit": "cf8d1bb97e193e02b430d707d3b669565fababb4", "tree": "dcdf5e9baaa89b82515652d5abffa2712bc9b3ca", "parents": [ "dc00454f0b9a134f01f79b419200f4044c2af5c6" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 25 09:43:30 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 25 09:43:30 2016 +0000" }, "message": "Revert \"X86: Use the constant area for more operations.\"\n\nHits a DCHECK:\n\ndex2oatd F 19461 20411 art/compiler/optimizing/pc_relative_fixups_x86.cc:196] Check failed: !invoke_static_or_direct-\u003eHasCurrentMethodInput() \n\n\nThis reverts commit dc00454f0b9a134f01f79b419200f4044c2af5c6.\n\nChange-Id: Idfcacf12eb9e1dd7e68d95e880fda0f76f90e9ed\n" }, { "commit": "dc00454f0b9a134f01f79b419200f4044c2af5c6", "tree": "49a787e2b617ce5bc69aa2dc4b71653c68ee0375", "parents": [ "2d0582b6c96cf16e18df50158494e32eeede0a95" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri Oct 30 09:45:03 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri Jan 22 14:54:15 2016 -0500" }, "message": "X86: Use the constant area for more operations.\n\nAllow FP HNeg to use the constant area to hold the constant to flip the\nsign bit.\n\nEnhance some math intrinsics to allow the use of the constant\narea: Abs{Float,Double}, {Min,Max}{FloatFloat,DoubleDouble}.\n\nAllow compares of floats/doubles to constants using the constant area.\n\nThese eliminate almost all uses of loading constants from the stack.\n\nChange-Id: Ic4b831565825cbe9f0801b1b53c1013be7c87ae4\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "95e7ffc28ea4d6deba356e636b16120ae49b62e2", "tree": "f365f762a4ff46042871b86b96c112d6f1c8d624", "parents": [ "c24b8df48be848af1f4cb54e9caef2b7d6afe680" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 22 11:57:25 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 22 11:57:25 2016 +0000" }, "message": "Improve documentation and assertions of read barrier instrumentation.\n\nFor ARM, x86, x86-64 back ends. The case of the ARM64 back\nend is already handled in\nhttps://android-review.googlesource.com/#/c/197870/.\n\nBug: 12687968\nChange-Id: I6df1128cc100cbdb89020876e1a54de719508be3\n" }, { "commit": "e3f43ac79e50a4693ea4d46acf5cffca64910cee", "tree": "848caf115a3251ffc3c9fc60290549a52765801a", "parents": [ "17ccfff2de292fd2b4a78aef87d79b662381f920" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jan 19 15:07:47 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jan 19 15:07:47 2016 +0000" }, "message": "Some read barrier clean-up in Optimizing.\n\nThese changes make the read barrier compiler instrumentation\ncode more uniform among the ARM, ARM64, x86 and x86-64 back\nends.\n\nBug: 12687968\nChange-Id: I6b1c0cf2bc22ed6cd6b14754136bef4a2a036ea5\n" }, { "commit": "58282f4510961317b8d5a364a6f740a78926716f", "tree": "5d97c0db9fe01dd6e8df2357ef11f614abb853e8", "parents": [ "b8bb9f6d0b59be125066f604f134155f8998f5ae" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 14 12:45:10 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Jan 18 16:39:30 2016 +0000" }, "message": "ART: Remove Baseline compiler\n\nWe don\u0027t need Baseline any more and it hasn\u0027t been maintained for\na while anyway. Let\u0027s remove it.\n\nChange-Id: I442ed26855527be2df3c79935403a25b1ee55df6\n" }, { "commit": "28943466954ca5d6f586bb5496f7f3f0f85fe87a", "tree": "56a4f7427addf50aba847ea944ec24396c7e848f", "parents": [ "68c56ae9ccdb6e348501456e374ae65e74f6270c", "6de1938e562b0d06e462512dd806166e754035ea" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jan 15 09:19:12 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jan 15 09:19:12 2016 +0000" }, "message": "Merge \"ART: Remove incorrect HFakeString optimization\"" }, { "commit": "947cb4f5582d1f57270b48d3c47ea95e7f9085b5", "tree": "6f6aed8f8cca3177b06521a8db6ca845d18623ad", "parents": [ "7b4199a5fa9f151fbf3af2a34f26d04215a1016c", "15bd22849ee6a1ffb3fb3630f686c2870bdf1bbc" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 14 21:25:16 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jan 14 21:25:16 2016 +0000" }, "message": "Merge \"Implement irreducible loop support in optimizing.\"" }, { "commit": "6de1938e562b0d06e462512dd806166e754035ea", "tree": "f9df086a73860c20768d17ff7bc5be4139567941", "parents": [ "f5b84ee14a3bc578f799a39dca1ae512b49356ea" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jan 08 17:37:10 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 14 16:22:13 2016 +0000" }, "message": "ART: Remove incorrect HFakeString optimization\n\nSimplification of HFakeString assumes that it cannot be used until\nString.\u003cinit\u003e is called which is not true and causes different\nbehaviour between the compiler and the interpreter. This patch\nremoves the optimization together with the HFakeString instruction.\n\nInstead, HNewInstance is generated and an empty String allocated\nuntil it is replaced with the result of the StringFactory call. This\nis consistent with the behaviour of the interpreter but is too\nconservative. A follow-up CL will attempt to optimize out the initial\nallocation when possible.\n\nBug: 26457745\nBug: 26486014\n\nChange-Id: I7139e37ed00a880715bfc234896a930fde670c44\n" }, { "commit": "15bd22849ee6a1ffb3fb3630f686c2870bdf1bbc", "tree": "a261601589163faa4538bcf1c9d156e8ec4a42b3", "parents": [ "5b7b5ddb515828c93f0c2aec67aa513c32d0de22" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jan 05 15:55:41 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 14 15:00:20 2016 +0000" }, "message": "Implement irreducible loop support in optimizing.\n\nSo we don\u0027t fallback to the interpreter in the presence of\nirreducible loops.\n\nImplications:\n- A loop pre-header does not necessarily dominate a loop header.\n- Non-constant redundant phis will be kept in loop headers, to\n satisfy our linear scan register allocation algorithm.\n- while-graph optimizations, such as gvn, licm, lse, and dce\n need to know when they are dealing with irreducible loops.\n\nChange-Id: I2cea8934ce0b40162d215353497c7f77d6c9137e\n" }, { "commit": "42249c3602c3d0243396ee3627ffb5906aa77c1e", "tree": "1e822a21c87331246cbde3923eac88fa315fa2cc", "parents": [ "922698ded1e80cad1ecce4c2172a88c76a216373" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Jan 07 15:33:50 2016 -0800" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Jan 12 16:39:20 2016 -0800" }, "message": "Reduce code size by sharing slow paths.\n\nRationale:\nSharing identical slow path code reduces code size.\n\nBackground:\nCurrently, slow paths with the same dex-pc, same physical register\nspilling code, and identical stack maps are shared (making this\nonly useful for deopt slow paths). The newly introduced mechanism\nis sufficiently general to allow future improvements by e.g.\nallowing different dex-pc (by passing this to runtime) or even\nthe kind of slow paths (by passing runtime addresses to the slowpath).\n\nChange-Id: I819615c47b4fd98440a241f681f93e4fc22d12e0\n" }, { "commit": "8566a91502db625ff9428a3c2418714488ecd5d9", "tree": "fc3ade71413203fd053d06b98210f263084e34c9", "parents": [ "20b6863769357d798464a65c5ee5dfd64464d400", "b7070a2db8b0b7eca14f01f932be305be64ded57" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Jan 11 14:47:37 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jan 11 14:47:37 2016 +0000" }, "message": "Merge \"Generate Nops to ensure that debug stack maps have distinct PC.\"" }, { "commit": "f871d466a1f20a6906d4d22f878f1f93d73ccf69", "tree": "9c46d31d371eb03a5d56cb7aceb5a5a625ae0fd3", "parents": [ "6f68ad42bb6b22e7cf8337f76953fda44ca89405", "68f6289fbc1b14ed814722c023b3f343c1e59a79" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 11 14:20:52 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jan 11 14:20:52 2016 +0000" }, "message": "Merge \"Don\u0027t use std::abs on INT_MIN/LONG_MIN, it\u0027s undefined.\"" }, { "commit": "b7070a2db8b0b7eca14f01f932be305be64ded57", "tree": "06ba87d56a708712fb206e23d3abd55f21934373", "parents": [ "ae6f23c83e1c8dcfbc4f74186ea1a37f1044414b" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Jan 08 18:13:53 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Jan 11 12:22:17 2016 +0000" }, "message": "Generate Nops to ensure that debug stack maps have distinct PC.\n\nChange-Id: I5740ec958a20d236634b66df0e675382ed5c16fc\n" }, { "commit": "68f6289fbc1b14ed814722c023b3f343c1e59a79", "tree": "86bf0f10e1368871e567145a0d70087cb8f74a4f", "parents": [ "b7371a5517f78f61759f7e6124f2d957d974d9cd" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 04 08:39:49 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 11 11:36:48 2016 +0000" }, "message": "Don\u0027t use std::abs on INT_MIN/LONG_MIN, it\u0027s undefined.\n\nbug:25494265\n\nChange-Id: I560a3a589b92440020285f9adfdf7c9efb06217c\n" }, { "commit": "152408f8c2188a7ed950cad04883b2f67dc74e84", "tree": "0fd24e0023060d1eb58eeb0b94e31a2311eefe16", "parents": [ "4bb356123b13ec5f41ea80158766df676ae08679" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Thu Dec 31 12:28:50 2015 -0500" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Thu Dec 31 12:28:50 2015 -0500" }, "message": "X86: templatize GenerateTestAndBranch and friends\n\nAllow the use of NearLabel as well as Label. This will be used by the\nHSelect patch.\n\nReplace a couple of Label(s) with NearLabel(s) as well.\n\nChange-Id: I8e674c89e691bcdbccf4a5cdc07ad13b29ec21dd\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "0cf4493166ff28518c8eafa2d0463f6e817cce75", "tree": "6d207db3fb655bbd692f2b01fa963c603619bd0e", "parents": [ "d674bf7ba2a209790cea8ef8d935480ef515c9e1" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Dec 09 14:09:59 2015 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Dec 23 13:19:16 2015 +0000" }, "message": "Generate more stack maps during native debugging.\n\nGenerate extra stack map at the start of each java statement.\nThe stack maps are later translated to DWARF which allows\nLLDB to set breakpoints and view local variables.\n\nChange-Id: If00ab875513308e4a1399d1e12e0fe8934a6f0c3\n" }, { "commit": "5f7b58ea1adfc0639dd605b65f59198d3763f801", "tree": "04556e673cdd3967cc967ff79931eab49e523956", "parents": [ "1201804d1813d7db0accead9721d67c40b3de564" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Nov 23 19:49:34 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Dec 23 09:59:07 2015 +0000" }, "message": "Rewrite HInstruction::Is/As\u003ctype\u003e().\n\nMake Is\u003ctype\u003e() and As\u003ctype\u003e() non-virtual for concrete\ninstruction types, relying on GetKind(), and mark GetKind()\nas PURE to improve optimization opportunities. This reduces\nthe number of relocations in libart-compiler.so\u0027s .rel.dyn\nsection by ~4K, or ~44%, and in .data.rel.ro by ~18K, or\n~65%. The file is 96KiB smaller for Nexus 5, including 8KiB\nreduction of the .text section.\n\nUnfortunately, the g++/clang++ __attribute__((pure)) is not\nstrong enough to avoid duplicated virtual calls and we would\nneed the C++ [[pure]] attribute proposed in n3744 instead.\nTo work around this deficiency, we introduce an extra\nnon-virtual indirection for GetKind(), so that the compiler\ncan optimize common expressions such as\n instruction-\u003eIsAdd() || instruction-\u003eIsSub()\nor\n instruction-\u003eIsAdd() \u0026\u0026 instruction-\u003eAsAdd()-\u003e...\nwhich contain two virtual calls to GetKind() after inlining.\n\nChange-Id: I83787de0671a5cb9f5b0a5f4a536cef239d5b401\n" }, { "commit": "570a920d0a4a01e159a1be46609ff3db4aedc221", "tree": "d959ea022b6ef33d4c9aefef0f02756384e2769d", "parents": [ "fae1db92d8433d0f75258c190bcf2c940731f036", "17077d888a6752a2e5f8161eee1b2c3285783d12" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Dec 17 23:28:06 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Dec 17 23:28:06 2015 +0000" }, "message": "Merge \"Revert \"Revert \"X86: Use locked add rather than mfence\"\"\"" }, { "commit": "14c4e90f67e71430dade7d4f20920e6352be386e", "tree": "2d376e0d6f833bb87348faae12ad7ed3bf15b95b", "parents": [ "6132a3884a912a704010f22ea2991f3d9d432af2", "f3e0ee27f46aa6434b900ab33f12cd3157578234" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 16:46:19 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Dec 17 16:46:19 2015 +0000" }, "message": "Merge \"Revert \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"\"" }, { "commit": "f3e0ee27f46aa6434b900ab33f12cd3157578234", "tree": "83d5a75bf26238ff1789569de62e4b72fb348119", "parents": [ "b4c137630fd2226ad07dfd178ab15725374220f1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 15:23:13 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 15:23:13 2015 +0000" }, "message": "Revert \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"\n\nThis reverts commit b4c137630fd2226ad07dfd178ab15725374220f1.\n\nThe underlying issue was fixed by https://android-review.googlesource.com/188271 .\n\nBug: 26121945\nChange-Id: I58b08eb1a9f0a5c861f8cda93522af64bcf63920\n" }, { "commit": "17077d888a6752a2e5f8161eee1b2c3285783d12", "tree": "15b869f7ed0a8273814b628cd277a6d5d779b24d", "parents": [ "d16bb3f0dc17d77db7022150d0710fcbb8b6fd9d" ], "author": { "name": "Mark P Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed Dec 16 19:15:59 2015 +0000" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Wed Dec 16 20:17:48 2015 -0500" }, "message": "Revert \"Revert \"X86: Use locked add rather than mfence\"\"\n\nThis reverts commit 0da3b9117706760e8722029f407da6d0297cc943.\n\nFix a compilation failure that slipped in somehow.\n\nChange-Id: Ide8681cdc921febb296ea47aa282cc195f154049\n" }, { "commit": "1c70f18dce7705ff70147ddebf65a97f66df8d5c", "tree": "7fa76545c1b91499b86f840cdb8c53050e9c761c", "parents": [ "1f312652e138e05328b9c4c738d3ecbab2d09ae9", "0da3b9117706760e8722029f407da6d0297cc943" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Dec 16 19:11:38 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Dec 16 19:11:38 2015 +0000" }, "message": "Merge \"Revert \"X86: Use locked add rather than mfence\"\"" }, { "commit": "0da3b9117706760e8722029f407da6d0297cc943", "tree": "84ad42399e1055f3596d7df6f786d9f7b8605ee3", "parents": [ "7b3e4f99b25c31048a33a08688557b133ad345ab" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Dec 16 19:06:17 2015 +0000" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Dec 16 19:06:17 2015 +0000" }, "message": "Revert \"X86: Use locked add rather than mfence\"\n\nThis reverts commit 7b3e4f99b25c31048a33a08688557b133ad345ab.\n\nReason: build error on sdk (linux) in git_mirror-aosp-master-with-vendor , please fix first\n\nart/compiler/optimizing/code_generator_x86_64.cc:4032:7: error: use of\nundeclared identifier \u0027codegen_\u0027\n codegen_-\u003eMemoryFence();\n\nChange-Id: I91f8542cfd944b7425d1981c35872dcdcb901e18\n" }, { "commit": "c3ca1e6543ef5e717183c059e68ac34597be7022", "tree": "ee7032d33c1dc8962a767d81321a142e9f4d173d", "parents": [ "9ddcbf69cfa807790e324f7f54e1931bc66d0f5c", "7b3e4f99b25c31048a33a08688557b133ad345ab" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Dec 16 18:47:07 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Dec 16 18:47:07 2015 +0000" }, "message": "Merge \"X86: Use locked add rather than mfence\"" }, { "commit": "d7d35383838c369a4a1ff5aa21e952f941718c48", "tree": "7d36f56c834e2b561ebc0359b9d11ad03d150cb2", "parents": [ "6b75bc08e8e2e5516a23350418bacef2cf982bd9", "b4c137630fd2226ad07dfd178ab15725374220f1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 16 12:31:14 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Dec 16 12:31:14 2015 +0000" }, "message": "Merge \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"" }, { "commit": "b4c137630fd2226ad07dfd178ab15725374220f1", "tree": "6f319089980073ffb2c20d36e367a944daa525c4", "parents": [ "59f054d98f519a3efa992b1c688eb97bdd8bbf55" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 16 12:06:39 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 16 12:07:01 2015 +0000" }, "message": "Revert \"ART: Reduce the instructions generated by packed switch.\"\n\nThis reverts commit 59f054d98f519a3efa992b1c688eb97bdd8bbf55.\n\nbug:26121945\n\nChange-Id: I8a5ad7ef1f1de8d44787c27528fa3f7f5c2e9cd3\n" }, { "commit": "7b3e4f99b25c31048a33a08688557b133ad345ab", "tree": "446ce2d9b4684120c35fad9c097ea2f760f0797c", "parents": [ "089ff4886aa9b5e7cec04d2ef5cdeb9d68e5dc43" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Thu Nov 19 14:08:40 2015 -0500" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Dec 15 15:48:39 2015 -0500" }, "message": "X86: Use locked add rather than mfence\n\nJava semantics for memory ordering can be satisfied using\n lock addl $0,0(SP)\nrather than mfence. The locked add synchronizes the memory caches, but\ndoesn\u0027t affect device memory.\n\nTiming on a micro benchmark with a mfence or lock add $0,0(sp) in a loop\nwith 600000000 iterations:\ntime ./mfence\nreal 0m5.411s\nuser 0m5.408s\nsys 0m0.000s\n\ntime ./locked_add\nreal 0m3.552s\nuser 0m3.550s\nsys 0m0.000s\n\nImplement this as an instruction-set-feature lock_add. This is off by\ndefault (uses mfence), and enabled for atom \u0026 silvermont variants.\nGeneration of mfence can be forced by a parameter to MemoryFence.\n\nChange-Id: I5cb4fded61f4cbbd7b7db42a1b6902e43e458911\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" } ], "next": "7c1559a06041c9c299d5ab514d54b2102f204a84" }