1. a1633a7 Merge "Min/max SIMDization support." by Aart Bik · 9 years ago
  2. c8e93c7 Min/max SIMDization support. by Aart Bik · 9 years ago
  3. e1811ed ARM64: Share address computation across SIMD LDRs/STRs. by Artem Serov · 9 years ago
  4. d58bc32 Allow same-length integral type mixing in SIMD. by Aart Bik · 9 years ago
  5. db14fcf Pack booleans in the already existing bit field. by Aart Bik · 9 years ago
  6. 8de5916 Factor vector unary/binary shared code out into superclass. by Aart Bik · 9 years ago
  7. f34dd20 ARM64: Support MultiplyAccumulate for SIMD. by Artem Serov · 9 years ago
  8. f3e61ee Implement halving add idiom (with checker tests). by Aart Bik · 9 years ago
  9. 6daebeb Implemented ABS vectorization. by Aart Bik · 9 years ago
  10. f8f5a16 ART vectorizer. by Aart Bik · 9 years ago