)]}'
{
  "log": [
    {
      "commit": "b11b0725d02aafd6e3ea4eb514b215149c893bf0",
      "tree": "caa8712fccb1ab63e1951bd9628054a16aeaa71c",
      "parents": [
        "bee600ff66e3e233274faa1391890ff424a8244e"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Jan 28 16:22:40 2016 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Jan 28 16:24:21 2016 +0000"
      },
      "message": "ART: Fix gtest after liveness CL\n\nChange-Id: I2d029044cebe6e1ee7d7efb2e20541060f88c07c\n"
    },
    {
      "commit": "58282f4510961317b8d5a364a6f740a78926716f",
      "tree": "5d97c0db9fe01dd6e8df2357ef11f614abb853e8",
      "parents": [
        "b8bb9f6d0b59be125066f604f134155f8998f5ae"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Jan 14 12:45:10 2016 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Mon Jan 18 16:39:30 2016 +0000"
      },
      "message": "ART: Remove Baseline compiler\n\nWe don\u0027t need Baseline any more and it hasn\u0027t been maintained for\na while anyway. Let\u0027s remove it.\n\nChange-Id: I442ed26855527be2df3c79935403a25b1ee55df6\n"
    },
    {
      "commit": "751beff19b36f777d9e3a966d754fd9cfad5d534",
      "tree": "450cb7ef8cb9f955a6d689c394bd85bc9eea14f1",
      "parents": [
        "4bbe7807f313bb8e59131812c31bf31513094f8f"
      ],
      "author": {
        "name": "Phil Wang",
        "email": "phil.wang@linaro.org",
        "time": "Fri Aug 28 15:17:15 2015 +0800"
      },
      "committer": {
        "name": "Phil Wang",
        "email": "phil.wang@linaro.org",
        "time": "Fri Nov 06 14:44:20 2015 +0800"
      },
      "message": "Revert \"Revert \"Introduce support for hardware simulators, starting with ARM64\"\"\n\nThis reverts commit 4cd27d64b0bbdde61fa3f6674ceb24221853ac2c.\n\nThis depends on VIXL 1.11.\n\nChange-Id: I402c1fd6bbb218ba80ef8e59af203c9276151059\n"
    },
    {
      "commit": "f652cecb984c104d44a0223c3c98400ef8ed8ce2",
      "tree": "ec0cc193eccdd11a79f42f957a856d2ba57699e1",
      "parents": [
        "b8b44983f861cfeeca66c624dd0f2a3fa71b4992"
      ],
      "author": {
        "name": "Goran Jakovljevic",
        "email": "Goran.Jakovljevic@imgtec.com",
        "time": "Tue Aug 25 16:11:42 2015 +0200"
      },
      "committer": {
        "name": "Goran Jakovljevic",
        "email": "Goran.Jakovljevic@imgtec.com",
        "time": "Thu Oct 22 18:51:13 2015 +0200"
      },
      "message": "MIPS: Initial version of optimizing compiler for MIPS32\n\nChange-Id: I370388e8d5de52c7001552b513877ef5833aa621\n"
    },
    {
      "commit": "e9f37600e98ba21308ad4f70d9d68cf6c057bdbe",
      "tree": "ad7953f41a35eeee68a31b4b567a08c650647bba",
      "parents": [
        "793e6fbdefb092d1dab50bca5618aed110c7e037"
      ],
      "author": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Fri Oct 09 11:15:55 2015 -0700"
      },
      "committer": {
        "name": "Aart Bik",
        "email": "ajcbik@google.com",
        "time": "Wed Oct 14 13:38:22 2015 -0700"
      },
      "message": "Added support for unsigned comparisons\n\nRationale: even though not directly supported in input graph,\n           having the ability to express unsigned comparisons\n           in HIR is useful for all sorts of optimizations.\n\nChange-Id: I4543c96a8c1895c3d33aaf85685afbf80fe27d72\n"
    },
    {
      "commit": "ec7802a102d49ab5c17495118d4fe0bcc7287beb",
      "tree": "08649609604b9c96bc48ca071c48b0af5abb1a3f",
      "parents": [
        "b2e436ffcda1d7a87e7bf9133d8ed878388c73c2"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Oct 01 20:57:57 2015 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Oct 08 11:10:18 2015 +0100"
      },
      "message": "Add DCHECKs to ArenaVector and ScopedArenaVector.\n\nImplement dchecked_vector\u003c\u003e template that DCHECK()s element\naccess and insert()/emplace()/erase() positions. Change the\nArenaVector\u003c\u003e and ScopedArenaVector\u003c\u003e aliases to use the new\ntemplate instead of std::vector\u003c\u003e. Remove DCHECK()s that\nhave now become unnecessary from the Optimizing compiler.\n\nChange-Id: Ib8506bd30d223f68f52bd4476c76d9991acacadc\n"
    },
    {
      "commit": "fa6b93c4b69e6d7ddfa2a4ed0aff01b0608c5a3a",
      "tree": "3528c88e104dac8e58ae5370ab066b8b1dd0218f",
      "parents": [
        "e295be4a95d7861f6ec179edf6565f58cad747cc"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Sep 15 10:15:55 2015 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Sep 16 13:21:33 2015 +0100"
      },
      "message": "Optimizing: Tag arena allocations in HGraph.\n\nReplace GrowableArray with ArenaVector in HGraph and related\nclasses HEnvironment, HLoopInformation, HInvoke and HPhi,\nand tag allocations with new arena allocation types.\n\nChange-Id: I3d79897af405b9a1a5b98bfc372e70fe0b3bc40d\n"
    },
    {
      "commit": "6058455d486219994921b63a2d774dc9908415a2",
      "tree": "3d205227f3ff54cd3a50bc5c0e7cb3ad6c175b86",
      "parents": [
        "637ee0b9c10ab7732a7ee7b8335f3fff4ac1549c"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Sep 03 13:35:12 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Sep 08 18:09:49 2015 +0100"
      },
      "message": "Optimizing: Tag basic block allocations with their source.\n\nReplace GrowableArray with ArenaVector in HBasicBlock and,\nto track the source of allocations, assign one new and two\nQuick\u0027s arena allocation types to these vectors. Rename\nkArenaAllocSuccessor to kArenaAllocSuccessors.\n\nBug: 23736311\nChange-Id: Ib52e51698890675bde61f007fe6039338cf1a025\n"
    },
    {
      "commit": "145acc5361deb769eed998f057bc23abaef6e116",
      "tree": "3d66a0b44e1ac927156eec6e6488de5fd52b982b",
      "parents": [
        "91e11c0c840193c6822e66846020b6647de243d5"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Sep 03 13:33:25 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Sep 03 13:33:25 2015 +0000"
      },
      "message": "Revert \"Optimizing: Tag basic block allocations with their source.\"\n\nReverting so that we can have more discussion about the STL API.\n\nThis reverts commit 91e11c0c840193c6822e66846020b6647de243d5.\n\nChange-Id: I187fe52f2c16b6e7c5c9d49c42921eb6c7063dba\n"
    },
    {
      "commit": "91e11c0c840193c6822e66846020b6647de243d5",
      "tree": "0c5398ef59c464c1848afd0113c74b6aeb75cf42",
      "parents": [
        "f9f6441c665b5ff9004d3ed55014f46d416fb1bb"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Sep 02 17:03:22 2015 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Sep 03 13:09:37 2015 +0100"
      },
      "message": "Optimizing: Tag basic block allocations with their source.\n\nReplace GrowableArray with ArenaVector in HBasicBlock and,\nto track the source of allocations, assign one new and two\nQuick\u0027s arena allocation types to these vectors. Rename\nkArenaAllocSuccessor to kArenaAllocSuccessors.\n\nBug: 23736311\nChange-Id: I984aef6e615ae2380a532f5c6726af21015f43f5\n"
    },
    {
      "commit": "4cd27d64b0bbdde61fa3f6674ceb24221853ac2c",
      "tree": "20d0a46a943a3cd66341d87eb568cd8c5f83aec2",
      "parents": [
        "edd0a6dbe26bb334f02d5abe649e3da9165277b2"
      ],
      "author": {
        "name": "Alex Light",
        "email": "allight@google.com",
        "time": "Tue Aug 18 23:03:42 2015 +0000"
      },
      "committer": {
        "name": "Alex Light",
        "email": "allight@google.com",
        "time": "Tue Aug 18 16:17:57 2015 -0700"
      },
      "message": "Revert \"Introduce support for hardware simulators, starting with ARM64\"\n\nThis reverts commit c2e1a5edc438274159c6ef8e65455ac73723a8f1.\n\nThis breaks the build for x86_64 targets. This is because on target the libvixl is not included as a\nlibrary for the libart.so target build. The build of non-x86_64 targets only works because the\ncompilers removes the dead-code that contains the libvixl symbols.\n\nBug: 23321940\nChange-Id: I39e93ff05b887665c47fb0986867f1d13ca65b9b\n"
    },
    {
      "commit": "17ff917877041a6f212537e062f06684adcbf171",
      "tree": "f8dd85956a04299153b1b02e1c9900cec37397d6",
      "parents": [
        "a539ec06503766fcad4be71480c194a225fb037c"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Aug 18 18:36:20 2015 +0100"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Aug 18 18:36:20 2015 +0100"
      },
      "message": "Fix codegen_test.\n\nAllow the execution of Thumb-2 code on ARM32 hardware.\n\nChange-Id: I2fec71e39d538249569ffa88435f3198e8c28c01\n"
    },
    {
      "commit": "c2e1a5edc438274159c6ef8e65455ac73723a8f1",
      "tree": "30deefcdb9f8226a7367342000104248ea635487",
      "parents": [
        "62dee441fff15e951c577b9565f87bb5f27c5ffb"
      ],
      "author": {
        "name": "Phil Wang",
        "email": "phil.wang@linaro.org",
        "time": "Wed Jul 29 15:14:09 2015 +0800"
      },
      "committer": {
        "name": "Phil Wang",
        "email": "phil.wang@linaro.org",
        "time": "Tue Aug 18 15:15:17 2015 +0800"
      },
      "message": "Introduce support for hardware simulators, starting with ARM64\n\nSimulator support for ARM64 is implemented with VIXL.\nNow codegen_test will also run on all supported hardware simulators.\n\nChange-Id: Idc740f566175d1a23c373ea9292b8fc5ba526d00\n"
    },
    {
      "commit": "ea80942c39cb5e9bc3e38a388583d1646c1e2a3f",
      "tree": "259ebaaeb298e8ca866591402e91f2d0d326e279",
      "parents": [
        "9dda8f231bf6aaac3f0397f1fa0cd9d42eb393ed"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jun 24 14:25:09 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jun 24 14:26:01 2015 +0100"
      },
      "message": "Fix codegen_test after DCE fix.\n\nChange-Id: I16c64abc26c64815da4cb4034276d60e9bfb6996\n"
    },
    {
      "commit": "4dda3376b71209fae07f5c3c8ac3eb4b54207aa8",
      "tree": "0d96a327d1b3a7e09eff178a66c0b5fb946cfc85",
      "parents": [
        "71af6f7aab7491665fe2d6beb9af4c251a99ad56"
      ],
      "author": {
        "name": "Alexey Frunze",
        "email": "Alexey.Frunze@imgtec.com",
        "time": "Mon Jun 01 18:31:49 2015 -0700"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Jun 19 15:43:58 2015 +0100"
      },
      "message": "MIPS: Initial version of optimizing compiler for MIPS64R6.\n\nBug: 21555893\nChange-Id: I874dc356eee6ab061a32f8f3df5f8ac3a4ab7dcf\nSigned-off-by: Alexey Frunze \u003cAlexey.Frunze@imgtec.com\u003e\nSigned-off-by: Douglas Leung \u003cdouglas.leung@imgtec.com\u003e\n"
    },
    {
      "commit": "0a23d74dc2751440822960eab218be4cb8843647",
      "tree": "39d69de5d812826c4065d0acd38a58cd983f21f0",
      "parents": [
        "cdeb0b5fede4c06488f43a212591e661d946bc78"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu May 07 11:57:35 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon May 11 14:17:22 2015 +0100"
      },
      "message": "Add a parent environment to HEnvironment.\n\nThis code has no functionality change. It adds a placeholder\nfor chaining inlined frames.\n\nChange-Id: I5ec57335af76ee406052345b947aad98a6a4423a\n"
    },
    {
      "commit": "5da2180e684ae6afcb55d787f6a69bc97489bb83",
      "tree": "8a487fd3c41b1a501b4f77fca7d7a76a783680c4",
      "parents": [
        "f5091eee4abe73c64959e53bda684bd689569643"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Apr 20 09:29:18 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Apr 20 09:40:48 2015 +0100"
      },
      "message": "Fix codegen_test for long multiplication.\n\nIt seems like clang (that we use on the host) was *very* forgiving\nwith this broken test: the code generated for for MulLong used ebx\nbut this is a callee-save register in C but not ART. Also, the test\nwas not properly written for handling longs, so it was taking\nunitialized stack entries.\n\nGCC on target is not as forgiving.\n\nChange-Id: I5d7a962f8a72b3ce407dce50ca50b4ffc690c99e\n"
    },
    {
      "commit": "0d9f17de8f21a10702de1510b73e89d07b3b9bbf",
      "tree": "3d58a2a165ee2bc5af0e813b1ffa893fba72ed6d",
      "parents": [
        "9bb3e8e10d7d9230a323511094a9e260062a1473"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Apr 15 14:17:44 2015 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Apr 15 14:17:44 2015 +0100"
      },
      "message": "Move the linear order to the HGraph.\n\nBug found by Zheng Xu: SsaLivenessAnalysis being a stack allocated\nobject, we should not refer to it in later phases of the compiler.\nSpecifically, the code generator was using the linear order, which\nwas stored in the liveness analysis object.\n\nChange-Id: I574641f522b7b86fc43f3914166108efc72edb3b\n"
    },
    {
      "commit": "fb8d279bc011b31d0765dc7ca59afea324fd0d0c",
      "tree": "01b21964ce0516bda835faa15b260ac290714fe0",
      "parents": [
        "dcff612c3a6e1427749771c4559f198fa480f709"
      ],
      "author": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Tue Mar 31 22:16:59 2015 -0400"
      },
      "committer": {
        "name": "Mark Mendell",
        "email": "mark.p.mendell@intel.com",
        "time": "Wed Apr 01 08:45:38 2015 -0400"
      },
      "message": "[optimizing] Implement x86/x86_64 math intrinsics\n\nImplement floor/ceil/round/RoundFloat on x86 and x86_64.\nImplement RoundDouble on x86_64.\n\nAdd support for roundss and roundsd on both architectures.  Support them\nin the disassembler as well.\n\nAdd the instruction set features for x86, as the \u0027round\u0027 instruction is\nonly supported if SSE4.1 is supported.\n\nFix the tests to handle the addition of passing the instruction set\nfeatures to x86 and x86_64.\n\nAdd assembler tests for roundsd and roundss to x86_64 assembler tests.\n\nChange-Id: I9742d5930befb0bbc23f3d6c83ce0183ed9fe04f\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n"
    },
    {
      "commit": "8d5b8b295930aaa43255c4f0b74ece3ee8b43a47",
      "tree": "c26fc49bbc74615e7f0b9657aaf3757a8282d7a9",
      "parents": [
        "c8924c6ea9e83ba3832dd5551df38ab06f4aaca9"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Tue Mar 24 10:51:52 2015 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Thu Mar 26 14:10:03 2015 +0000"
      },
      "message": "ART: Force constants into the entry block\n\nOptimizations such as GVN and BCE make the assumption that all\nconstants are located in the entry block of the CFG, but not all\npasses adhere to this rule.\n\nThis patch makes constructors of constants private and only accessible\nto friend classes - HGraph for int/long constants and SsaBuilder for\nfloat/double - which ensure that they are placed correctly and not\nduplicated.\n\nNote that the ArenaAllocatorAdapter was modified to not increment\nthe ArenaAllocator\u0027s internal reference counter in order to allow\nfor use of ArenaSafeMap inside an arena-allocated objects. Because\ntheir destructor is not called, the counter does not get decremented.\n\nChange-Id: I36a4fa29ae34fb905cdefd482ccbf386cff14166\n"
    },
    {
      "commit": "10f56cb6b4e39ed0032e9a23b179b557463e65ad",
      "tree": "9f53251569ed32af7add31cf16206f255261b97e",
      "parents": [
        "3e690d11d26b3ae3891a03cdef88e7c2272109f5"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Tue Mar 24 18:49:14 2015 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Tue Mar 24 19:13:13 2015 +0000"
      },
      "message": "ART: Fix crash in gtests\n\nSsaLivenessAnalysis was crashing after change of iteration order in\n142377 because gtests do not always build reverse post order.\n\nChange-Id: If5ad5b7c52040b119c4415f0b942988049fa3c16\n"
    },
    {
      "commit": "579885a26d761f5ba9550f2a1cd7f0f598c2e1e3",
      "tree": "58d144157b7a24bbdf7f8892631a15abeefa2c9f",
      "parents": [
        "2eb5168bd9e43b80452eaee5be32c063e124886e"
      ],
      "author": {
        "name": "Serban Constantinescu",
        "email": "serban.constantinescu@arm.com",
        "time": "Sun Feb 22 20:51:33 2015 +0000"
      },
      "committer": {
        "name": "Serban Constantinescu",
        "email": "serban.constantinescu@arm.com",
        "time": "Mon Mar 02 14:16:56 2015 +0000"
      },
      "message": "Opt Compiler: ARM64: Enable explicit memory barriers over acquire/release\n\nImplement remaining explicit memory barrier code paths and temporarily\nenable the use of explicit memory barriers for testing.\n\nThis CL also enables the use of instruction set features in the ARM64\nbackend. kUseAcquireRelease has been replaced with PreferAcquireRelease(),\nwhich for now is statically set to false (prefer explicit memory barriers).\n\nPlease note that we still prefer acquire-release for the ARM64 Optimizing\nCompiler, but we would like to exercise the explicit memory barrier code\npath too.\n\nChange-Id: I84e047ecd43b6fbefc5b82cf532e3f5c59076458\nSigned-off-by: Serban Constantinescu \u003cserban.constantinescu@arm.com\u003e\n"
    },
    {
      "commit": "5e8b137d28c840b128e2488f954cccee3e86db14",
      "tree": "c56e4c709ce07d605ab4b754e89f7739264feb73",
      "parents": [
        "f9af19413333c271192c3b11425f865bd8054c0c"
      ],
      "author": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Fri Jan 23 14:39:08 2015 +0000"
      },
      "committer": {
        "name": "David Brazdil",
        "email": "dbrazdil@google.com",
        "time": "Wed Feb 04 13:47:49 2015 +0000"
      },
      "message": "Create HGraph outside Builder, print timings\n\nThis patch refactors the way HGraph objects are created, moving the\ninstantiation out of the Builder class and creating the CodeGenerator\nearlier. The patch uses this to build a single interface for printing\ntimings info and dumping the CFG.\n\nChange-Id: I2eb63eabf28e2d0f5cdc7affaa690c3a4b1bdd21\n"
    },
    {
      "commit": "e6362281bb4586f45fd927e9cd1b3b14c6b037ed",
      "tree": "790b3887812542a5ba02ea8f05ab61de74aea70e",
      "parents": [
        "0da7a26e1ae2a701529c5c15c280f3efae0ccec0"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 26 13:57:30 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 26 13:57:30 2015 +0000"
      },
      "message": "Fix lint error and typo.\n\nChange-Id: Ie2787a4da5b2d76975664e64f443c081127b7cd9\n"
    },
    {
      "commit": "a0bb2bd5b6a049ad806c223f00672d1f0210db67",
      "tree": "206723aac52d4ccdf692f1d6a3c82c059f1cf6a1",
      "parents": [
        "2dadc9df0ffb822870a150f81257792b83241c77"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 26 12:49:35 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jan 26 12:52:16 2015 +0000"
      },
      "message": "Fix codegen_test.\n\nNative and ART do not have the same calling convention for ART,\nso we need to adjust blocked and allocated registers.\n\nChange-Id: I606b2620c0e5a54bd60d6100a137c06616ad40b4\n"
    },
    {
      "commit": "cd6dffedf1bd8e6dfb3fb0c933551f9a90f7de3f",
      "tree": "0d83e9fdf65bded684d6e836078f253e63b7e11f",
      "parents": [
        "12c03ac7575db242a6f35739bb459e8277115da4"
      ],
      "author": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Thu Jan 08 17:35:35 2015 +0000"
      },
      "committer": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Fri Jan 16 17:27:03 2015 +0000"
      },
      "message": "Add implicit null checks for the optimizing compiler\n\n- for backends: arm, arm64, x86, x86_64\n- fixed parameter passing for CodeGenerator\n- 003-omnibus-opcodes test verifies that NullPointerExceptions work as\nexpected\n\nChange-Id: I1b302acd353342504716c9169a80706cf3aba2c8\n"
    },
    {
      "commit": "df64950a466c0f00cd36120d1afd389c577cae87",
      "tree": "d2452b35379bb084ee2975a1ee3bc0ad9517e1c0",
      "parents": [
        "78990227774cf47bebe8bc7b3781e24c6f79f55e"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Tue Jan 06 14:13:52 2015 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Tue Jan 06 14:13:52 2015 -0800"
      },
      "message": "ART: Fix leak in codegen_test\n\nMake sure the InstructionSetFeatures isn\u0027t leaked.\n\nChange-Id: Ide25773500c1513ecb204a380bb0a95513ff7276\n"
    },
    {
      "commit": "3416601a9e9be81bb7494864287fd3602d18ef13",
      "tree": "dd228519bfb9733aa7627b9cea81ecb28974a1ab",
      "parents": [
        "8558375377946aabbbda6ab584e13f754590bd89"
      ],
      "author": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Fri Dec 19 17:22:29 2014 +0000"
      },
      "committer": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Mon Jan 05 16:25:59 2015 +0000"
      },
      "message": "Look at instruction set features when generating volatiles code\n\nChange-Id: Ia882405719fdd60b63e4102af7e085f7cbe0bb2a\n"
    },
    {
      "commit": "3e69f16ae3fddfd24f4f0e29deb106d564ab296c",
      "tree": "c796b1a2f71d4410af9fbdcb970b548a681f3955",
      "parents": [
        "776b880f66edb21cb3b4225877e494ec7a9ec1a2"
      ],
      "author": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@arm.com",
        "time": "Wed Dec 10 10:36:50 2014 +0000"
      },
      "committer": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@arm.com",
        "time": "Wed Dec 10 14:36:14 2014 +0000"
      },
      "message": "Opt compiler: Add arm64 support for register allocation.\n\nChange-Id: Idc6e84eee66170de4a9c0a5844c3da038c083aa7"
    },
    {
      "commit": "d582fa4ea62083a7598dded5b82dc2198b3daac7",
      "tree": "c76704c266ef4687eab425612ddf3fd24f93fe8d",
      "parents": [
        "f20076ff813b8012096ff31af236d59db3c0f4e1"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Wed Nov 05 23:46:43 2014 -0800"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Thu Nov 13 16:17:46 2014 -0800"
      },
      "message": "Instruction set features for ARM64, MIPS and X86.\n\nAlso, refactor how feature strings are handled so they are additive or\nsubtractive.\nMake MIPS have features for FPU 32-bit and MIPS v2. Use in the quick compiler\nrather than #ifdefs that wouldn\u0027t have worked in cross-compilation.\nAdd SIMD features for x86/x86-64 proposed in:\n  https://android-review.googlesource.com/#/c/112370/\n\nBug: 18056890\n\nChange-Id: Ic88ff84a714926bd277beb74a430c5c7d5ed7666\n"
    },
    {
      "commit": "946e143941d456a4ec666f7f54719c65c5aa3f5d",
      "tree": "4535eb320a60043b18735a8496a288f6f8377cb7",
      "parents": [
        "d6425d7bb909b668341d9781c567f35f6d10ea16"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Nov 11 17:35:19 2014 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Nov 11 17:35:19 2014 +0000"
      },
      "message": "Revert \"Revert \"Add support for long-to-int in the optimizing compiler.\"\"\n\nThis reverts commit 3adfd1b4fb20ac2b0217b5d2737bfe30ad90257a.\n\nChange-Id: Iacf0c6492d49267e24f1b727dbf6379b21fd02db\n"
    },
    {
      "commit": "3adfd1b4fb20ac2b0217b5d2737bfe30ad90257a",
      "tree": "fe5ffa4519a798cf5de4dbb724f38541562d571d",
      "parents": [
        "13e86ed02c6256b704ba669cfe5f2c44f9d9f91f"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Nov 11 14:48:08 2014 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Nov 11 14:48:08 2014 +0000"
      },
      "message": "Revert \"Add support for long-to-int in the optimizing compiler.\"\n\nThis reverts commit 647b96f29cb81832e698f863884fdba06674c9de.\n\nChange-Id: I552f23585463c676acbd547521b4d3ee5c0342eb\n"
    },
    {
      "commit": "5ad0582482756fc6a97218472e458f31c985e922",
      "tree": "b6786d73f842ee053d7397db7ff9f84844e731ab",
      "parents": [
        "570570e0edaf8e3c4e93f2a30c13e78b7301d512"
      ],
      "author": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Tue Nov 11 14:13:15 2014 +0000"
      },
      "committer": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Tue Nov 11 14:13:15 2014 +0000"
      },
      "message": "Fix lint error.\n\nChange-Id: Ief9b9fe6982e7e76aae74d6c909bd9f4b3f82673\n"
    },
    {
      "commit": "647b96f29cb81832e698f863884fdba06674c9de",
      "tree": "1a4b5d9c2dc0cec47387838eb33b55b01838b615",
      "parents": [
        "666c732cfa211abf44ed90120a87bf8c18138e55"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Nov 11 12:26:26 2014 +0000"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Tue Nov 11 12:26:26 2014 +0000"
      },
      "message": "Add support for long-to-int in the optimizing compiler.\n\n- Add support for the long-to-int Dex instruction in the\n  optimizing compiler.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n  long-to-int HTypeConversion nodes.\n- Add related tests to test/422-type-conversion.\n- Also fix comments in test/415-optimizing-arith-neg and\n  in test/416-optimizing-arith-not.\n\nChange-Id: I3084af30f2a495d178362ae1154dc7ceb7bf3a58\n"
    },
    {
      "commit": "9b6c62b82e3d40d70d541920d5f7f81ad517bc01",
      "tree": "c75397fca9adddde7f6d3ab0fbc30bdaa7e443c4",
      "parents": [
        "e257d2c27f5565fb55de9122e093371ea2671271",
        "865fc88fdfd006ce0362c2c0d55c66a7bffdab61"
      ],
      "author": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Thu Nov 06 17:28:21 2014 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Thu Nov 06 17:28:22 2014 +0000"
      },
      "message": "Merge \"[optimizing compiler] Add DIV_INT_2ADDR\""
    },
    {
      "commit": "865fc88fdfd006ce0362c2c0d55c66a7bffdab61",
      "tree": "35670296d924c9619a18a4149134e069de6ae48d",
      "parents": [
        "d375fabd9e8cbb805fd12a33d94aa0729432ff3a"
      ],
      "author": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Thu Nov 06 17:09:03 2014 +0000"
      },
      "committer": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Thu Nov 06 17:21:16 2014 +0000"
      },
      "message": "[optimizing compiler] Add DIV_INT_2ADDR\n\nChange-Id: I38fc7e216f820d8ccc8bbf8b8e7a67b75fb9de87\n"
    },
    {
      "commit": "55dcfb5e0dd626993bb2b7b9f692c1b02b5d955f",
      "tree": "ee7bce7035220b6a1b630b54dfe743bbfc8941d8",
      "parents": [
        "3ed86e4e98dfe1b05c9a03aa2aee42c145a018c3"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Fri Oct 24 18:09:09 2014 +0100"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Thu Nov 06 16:40:59 2014 +0000"
      },
      "message": "Add support for not-long on ARM64 in the optimizing compiler.\n\nChange-Id: I3e98ff411ba358d92774def18a12daccdc4f558f\n"
    },
    {
      "commit": "cd2de0c1c7f1051a2f7bdb0e827dd6057f3bafcd",
      "tree": "e692ffff75418c935538ac7bf403f324204e4f13",
      "parents": [
        "f746cd9bb573b6b4b8c6dcdcf819c0203a186822"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Nov 06 15:59:38 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Nov 06 16:01:03 2014 +0000"
      },
      "message": "Fix failures after div support.\n\n- We need to special case divide by -1 because of x86.\n- Disable div test on arm64, which does not support div yet.\n\nChange-Id: I07e137cb555a958b02a6c4070f296503b7e30bae\n"
    },
    {
      "commit": "d0d4852847432368b090c184d6639e573538dccf",
      "tree": "47e31fe860ff1c3ace2f3f5945aa69689d42d998",
      "parents": [
        "a88b7b93e28ea86969dd3ec6a6bf6929d697fc31"
      ],
      "author": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Tue Nov 04 16:40:20 2014 +0000"
      },
      "committer": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Thu Nov 06 14:42:58 2014 +0000"
      },
      "message": "[optimizing compiler] Add div-int and exception handling.\n\n- for backends: arm, x86, x86_64\n- fixed a register allocator bug: the request for a fixed register for\nthe first input was ignored if the output was kSameAsFirstInput\n- added divide by zero exception\n- more tests\n- shuffle around some code in the builder to reduce the number of lines\nof code for a single function.\n\nChange-Id: Id3a515e02bfbc66cd9d16cb9746f7551bdab3d42\n"
    },
    {
      "commit": "277ccbd200ea43590dfc06a93ae184a765327ad0",
      "tree": "d89712e93da5fb2748989353c9ee071102cf3f33",
      "parents": [
        "ad17d41841ba1fb177fb0bf175ec0e9f5e1412b3"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Nov 03 21:36:10 2014 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Tue Nov 04 18:40:08 2014 -0800"
      },
      "message": "ART: More warnings\n\nEnable -Wno-conversion-null, -Wredundant-decls and -Wshadow in general,\nand -Wunused-but-set-parameter for GCC builds.\n\nChange-Id: I81bbdd762213444673c65d85edae594a523836e5\n"
    },
    {
      "commit": "42d641bfd9ef3c03c68177b2a429b20056670d86",
      "tree": "8b19599c5c293ac1a7b8a6d5d9b56c8e7385c2fe",
      "parents": [
        "560473c74cc3755b652f86a61039e4a12c08afe2"
      ],
      "author": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@arm.com",
        "time": "Mon Oct 27 14:00:51 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Oct 29 19:21:54 2014 +0000"
      },
      "message": "Opt compiler: Add ARM64 support for the Mul IR.\n\nAlso disable compilation and use of the boot image with\nthe optimizing compiler: this won\u0027t work with the way\nwe\u0027re bringing up arm64 and we need to find a better\nsolution.\n\nBug: 18147756\n\nChange-Id: I6ec0de73681f9226d095bc3db92338dbd46499aa\n"
    },
    {
      "commit": "927307433af0a9322e8ba77eda37168512a73683",
      "tree": "6166be9b846cb8a639121e6977abda177e7ffb01",
      "parents": [
        "46fdec13b6dcaf932aa9fb1338f32df01aa0d959"
      ],
      "author": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@arm.com",
        "time": "Wed Oct 01 12:55:56 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Oct 23 17:36:52 2014 +0100"
      },
      "message": "ART: Add basic tests for materialized conditions.\n\nChange-Id: I4acef30cc6a48b5fe07d55db6b9cf0d093b326ee\n"
    },
    {
      "commit": "5319defdf502fc4569316473846b83180ec08035",
      "tree": "909c6b29f065c79c8368a283946947cbb582d1c7",
      "parents": [
        "37a7188810e865a1ee0a7bdc2d01d62c1f1ea49e"
      ],
      "author": {
        "name": "Alexandre Rames",
        "email": "alexandre.rames@arm.com",
        "time": "Thu Oct 23 10:03:10 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Oct 23 13:44:42 2014 +0100"
      },
      "message": "ART: optimizing compiler: initial support for ARM64.\n\nThe ARM64 port uses VIXL for code generation, to which it defers work\nlike label binding and branch resolving, register type coherency\nchecking, and immediate values handling.\n\nChange-Id: I0a44508c0c991f472a63e67b3469cdd878fe1a68\nSigned-off-by: Serban Constantinescu \u003cserban.constantinescu@arm.com\u003e\nSigned-off-by: Alexandre Rames \u003calexandre.rames@arm.com\u003e\n"
    },
    {
      "commit": "039b6e2fd3bfadbd1ee8583002f673d6ccba5b7e",
      "tree": "1c42d51799207bb7c4ced079fce4878274fa8e81",
      "parents": [
        "1e4dc259b4242c1a03415b5b5f4aed7a23e53f79"
      ],
      "author": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Thu Oct 23 12:32:11 2014 +0100"
      },
      "committer": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Thu Oct 23 12:47:38 2014 +0100"
      },
      "message": "Remove obsolete TODOs from codegen tests\n\nThe features are already exercised by the art test 411-optimizing-arith.\n\nChange-Id: Id008931e0ed8206ced11ecc85a80a7e4aef3e68e\n"
    },
    {
      "commit": "1cc5f251df558b0e22cea5000626365eb644c727",
      "tree": "5e65a32366261646edce02283a185928adba79b5",
      "parents": [
        "b08f4dcf90215ed49e0b796ab3e609bd605be8ba"
      ],
      "author": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Wed Oct 22 18:06:21 2014 +0100"
      },
      "committer": {
        "name": "Roland Levillain",
        "email": "rpl@google.com",
        "time": "Thu Oct 23 10:12:06 2014 +0100"
      },
      "message": "Implement int bit-wise not operation in the optimizing compiler.\n\n- Add support for the not-int (integer one\u0027s complement\n  negate) instruction in the optimizing compiler.\n- Extend the HNot control-flow graph node type and make it\n  inherit from HUnaryOperation.\n- Generate ARM, x86 and x86-64 code for integer HNeg nodes.\n- Exercise these additions in the codegen_test gtest, as there\n  is not direct way to assess the support of not-int from a\n  Java source.  Indeed, compiling a Java expression such as\n  `~a\u0027 using javac and then dx generates an xor-int/lit8 Dex\n  instruction instead of the expected not-int Dex instruction.\n  This is probably because the Java bytecode has an `ixor\u0027\n  instruction, but there\u0027s not instruction directly\n  corresponding to a bit-wise not operation.\n\nChange-Id: I223aed75c4dac5785e04d99da0d22e8d699aee2b\n"
    },
    {
      "commit": "48dee04f4e4214b0fdd8acd0587ef6b08d3d2456",
      "tree": "aa50172b03bce73ba8d3ef535696c7684d047445",
      "parents": [
        "b5bfa96ff20e86316961327dec5c859239dab6a0"
      ],
      "author": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Wed Oct 22 15:54:12 2014 +0100"
      },
      "committer": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Wed Oct 22 15:54:12 2014 +0100"
      },
      "message": "Minor fix in codegen tests.\n\nChange-Id: I9b843536353d4f820b969895d5f75ee9b679aff0\n"
    },
    {
      "commit": "34bacdf7eb46c0ffbf24ba7aa14a904bc9176fb2",
      "tree": "e8ed8e40c5f7896a9ac01bf7dcc2e56f40cfc804",
      "parents": [
        "7f758228f7904d2f65f06bfbd2b8ecbb8e8c6a9d"
      ],
      "author": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Tue Oct 07 20:23:36 2014 +0100"
      },
      "committer": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Fri Oct 17 11:46:45 2014 +0100"
      },
      "message": "Add multiplication for integral types\n\nThis also fixes an issue where we could allocate a pair register even if\none of its parts was already blocked.\n\nChange-Id: I4869175933409add2a56f1ccfb369c3d3dd3cb01\n"
    },
    {
      "commit": "360231a056e796c36ffe62348507e904dc9efb9b",
      "tree": "a62ff73c11eaa6694649c98e4c2d872e89149b0c",
      "parents": [
        "2072c465cfff077da257bdf14f1f1b2690c946c8"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Oct 08 21:07:48 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Oct 09 15:21:57 2014 +0100"
      },
      "message": "Fix code generation of materialized conditions.\n\nMove the logic for knowing if a condition needs to be materialized\nin an optimization pass (so that the information does not change\nas a side effect of another optimization).\n\nAlso clean-up arm and x86_64 codegen:\n- arm: ldr and str are for power-users when a constant is\n  in play. We should use LoadFromOffset and StoreToOffset.\n- x86_64: fix misuses of movq instead of movl.\n\nChange-Id: I01a03b91803624be2281a344a13ad5efbf4f3ef3\n"
    },
    {
      "commit": "fbc695f9b8e2084697e19c1355ab925f99f0d235",
      "tree": "03e643aa9b468a512873293528bec93438580bab",
      "parents": [
        "3d2d7fb7ad24f4aec681ddc68a9565fa837b97ef"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Sep 15 15:33:30 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Sep 16 16:18:12 2014 +0100"
      },
      "message": "Revert \"Revert \"Implement suspend checks in new compiler.\"\"\n\nThis reverts commit 7e3652c45c30c1f2f840e6088e24e2db716eaea7.\n\nChange-Id: Ib489440c34e41cba9e9e297054f9274f6e81a2d8\n"
    },
    {
      "commit": "a1c22c172046d51579f2adb1f12f658022ff022e",
      "tree": "736f09504001e3d00824366cdcfbac736451f03f",
      "parents": [
        "0b35b9781b9e7143d673474fd59e13294c90abb5"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Sep 11 12:17:43 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Sep 11 12:17:43 2014 +0100"
      },
      "message": "Fix builds on archs the compiler does not support.\n\nChange-Id: Ibfc47026596c868fb6d48465a6e564a0b1e07fd0\n"
    },
    {
      "commit": "8a16d97fb8f031822b206e65f9109a071da40563",
      "tree": "9dbbf5feaac15d2e4f54fbfc3c204fcdd6e8317a",
      "parents": [
        "c7f6b86c269727fe031146b9c18652d40916d46f"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Sep 11 10:30:02 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Sep 11 10:32:12 2014 +0100"
      },
      "message": "Fix valgrind errors.\n\nFor now just stack allocate the code generator. Will think\nabout cleaning up the root problem later (CodeGenerator being an\narena object).\n\nChange-Id: I161a6f61c5f27ea88851b446f3c1e12ee9c594d7\n"
    },
    {
      "commit": "73e80c3ae76fafdb53afe3a85306dcb491fb5b00",
      "tree": "6c437ad0e24f0ed66251e8f37c13b6e6675db1f2",
      "parents": [
        "16fc9f617e395758eb95b5f2124c79a828186b55"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Jul 22 17:47:56 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Jul 22 17:47:56 2014 +0100"
      },
      "message": "Make unit test tell if a method is a leaf.\n\nThe runtime is not initialized completely in gtests, so we\ncannot run code (such as explicit stack overflow checks) that\nlook at tls values.\n\nChange-Id: I74a4449b01eb203f1b411dda700e9459878d0d55\n"
    },
    {
      "commit": "8d486731559ba0c5e12c27b4a507181333702b7e",
      "tree": "78d19970d33511d6a1c54560801d5c5dcc0c47af",
      "parents": [
        "fbde4dd1cb6db729e3f3ee5bdae0cdd824d73054"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jul 16 16:23:40 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jul 16 17:55:38 2014 +0100"
      },
      "message": "Use the thumb2 assembler for the optimizing compiler.\n\nChange-Id: I2b058f4433504dc3299c06f5cb0b5ab12f34aa82\n"
    },
    {
      "commit": "f61b5377068f22c0be7b2f6e62961e620408beb2",
      "tree": "15971fe1cf0797fa0b8ac0507b1a88c206f6c22e",
      "parents": [
        "fe6bfba3153ab55dab3ec0d644d628136e5ff0a4"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jun 25 14:35:34 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jun 26 09:27:37 2014 +0100"
      },
      "message": "Re-enable tests with the optimizing compiler.\n\nTests run ok on my host/target. I reverted the move to\nusing thumb2, because tests were crashing. But I could not\nreproduce file limits issues.\n\nMake SignalTest as crashing for optimizing. We need to implement\nstack overflow checks.\n\nChange-Id: Ieda575501eaf30af7aaa2c44e71544c9c467c24f\n"
    },
    {
      "commit": "e61fd353c06f51f1b8ca5af69997d0185b7659b2",
      "tree": "984d0609bf71e7705117e19eb836ddf203be6d01",
      "parents": [
        "20550910e608ed7d86db97927d2ce9d2191061a4"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jun 25 14:15:06 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jun 25 14:15:06 2014 +0000"
      },
      "message": "Revert \"Re-enable tests with the optimizing compiler.\"\n\nThis reverts commit 20550910e608ed7d86db97927d2ce9d2191061a4.\n\nChange-Id: Ic28b719946c795378838a18162a2a2b2cf41a0e8\n"
    },
    {
      "commit": "20550910e608ed7d86db97927d2ce9d2191061a4",
      "tree": "685b5ede42c3583c0152f784567026b1afc8e55d",
      "parents": [
        "ae43e2b11cc5af5b632700a9e4e4d9ed436b24dc"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jun 25 14:35:34 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jun 25 14:35:34 2014 +0100"
      },
      "message": "Re-enable tests with the optimizing compiler.\n\nTests run ok on my host/target. I reverted the move to\nusing thumb2, because tests were crashing. But I could not\nreproduce file limits issues.\n\nChange-Id: I26bc4ec1eb6c227750d11210e012d9d3b1d824af\n"
    },
    {
      "commit": "20dfc797dc631bf8d655dcf123f46f13332d3074",
      "tree": "c1d4e4f919d54f39a6d39d9d769ed5a844afb22b",
      "parents": [
        "cbb0e809c0a4e8a4e8b7f5d3768a1864cfb381bb"
      ],
      "author": {
        "name": "Dave Allison",
        "email": "dallison@google.com",
        "time": "Mon Jun 16 20:44:29 2014 -0700"
      },
      "committer": {
        "name": "Dave Allison",
        "email": "dallison@google.com",
        "time": "Tue Jun 24 09:05:27 2014 -0700"
      },
      "message": "Add some more instruction support to optimizing compiler.\n\nThis adds a few more DEX instructions to the optimizing compiler\u0027s\nbuilder (constants, moves, if_xx, etc).\n\nAlso:\n* Changes the codegen for IF_XX instructions to use a condition\n  rather than comparing a value against 0.\n* Fixes some instructions in the ARM disassembler.\n* Fixes PushList and PopList in the thumb2 assembler.\n* Switches the assembler for the optimizing compiler to thumb2\n  rather than ARM.\n\nChange-Id: Iaafcd02243ccc5b03a054ef7a15285b84c06740f\n"
    },
    {
      "commit": "49c105d624e4bf8e56b85caaecfeb80864bd3f59",
      "tree": "a1fbfb6af61a3c5c4d605556ed67964c367a5a92",
      "parents": [
        "9613592aebace270e5d147c55e8d3c642fbb7541"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jun 13 10:29:43 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jun 13 10:29:43 2014 +0100"
      },
      "message": "Guard `Run` for platforms we\u0027re not compiling to, yet.\n\nChange-Id: I0dc210d2734e95714bed6c481a31fa4daabb9332\n"
    },
    {
      "commit": "9cf35523764d829ae0470dae2d5dd99be469c841",
      "tree": "889459a8ecf8fdf801ea46dd58d15268dfb25af8",
      "parents": [
        "b08f63c21de64f8b74003e3638e100471bd099f3"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jun 09 18:40:10 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jun 13 09:49:30 2014 +0100"
      },
      "message": "Add x86_64 support to the optimizing compiler.\n\nChange-Id: I4462d9ae15be56c4a3dc1bd4d1c0c6548c1b94be\n"
    },
    {
      "commit": "86dbb9a12119273039ce272b41c809fa548b37b6",
      "tree": "a4626e21ae16a9a5e133ea3e5e95b58d2ea4d8e5",
      "parents": [
        "c936622863a50bdda9b10062515dfc02a8c8b652"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jun 04 11:12:39 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Jun 12 10:02:06 2014 +0100"
      },
      "message": "Final CL to enable register allocation on x86.\n\nThis CL implements:\n1) Resolution after allocation: connecting the locations\n   allocated to an interval within a block and between blocks.\n2) Handling of fixed registers: some instructions require\n   inputs/output to be at a specific location, and the allocator\n   needs to deal with them in a special way.\n3) ParallelMoveResolver::EmitNativeCode for x86.\n\nChange-Id: I0da6bd7eb66877987148b87c3be6a983b4e3f858\n"
    },
    {
      "commit": "700a402244a1a423da4f3ba8032459f4b65fa18f",
      "tree": "4c22fcda04d271bd55a37aff30650214af17a90c",
      "parents": [
        "047c11adcbcbc0bcf210defdfcbada763961ffee"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Mon May 19 16:49:03 2014 -0700"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Mon May 19 22:27:39 2014 -0700"
      },
      "message": "Now we have a proper C++ library, use std::unique_ptr.\n\nAlso remove the Android.libcxx.mk and other bits of stlport compatibility\nmechanics.\n\nChange-Id: Icdf7188ba3c79cdf5617672c1cfd0a68ae596a61\n"
    },
    {
      "commit": "d8ee737fdbf380c5bb90c9270c8d1087ac23e76c",
      "tree": "becdbf2b4e2a3c84952bd7b1db60a2daccd47206",
      "parents": [
        "7f466c08888129a9923cb973a4dc73ee4a71574e"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Mar 28 15:43:40 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Mar 31 11:41:39 2014 +0100"
      },
      "message": "Add support for adding two integers in optimizing compiler.\n\nChange-Id: I5524e193cd07f2692a57c6b4f8069904471b2928\n"
    },
    {
      "commit": "787c3076635cf117eb646c5a89a9014b2072fb44",
      "tree": "3c9c6c6d56e3900cf2255a5d1ade008ec6a40681",
      "parents": [
        "b9d50a9829b795932eac4cc50a99b4ce80b0ecb4"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Mar 17 10:20:19 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Mar 18 11:20:20 2014 +0000"
      },
      "message": "Plug new optimizing compiler in compilation pipeline.\n\nAlso rename accessors to ART\u0027s conventions.\n\nChange-Id: I344807055b98aa4b27215704ec362191464acecc\n"
    },
    {
      "commit": "39d57e2de8ec7420f2395a28cd7bd51e658d57b8",
      "tree": "355feca4d3694cd1fd5afef99fe54d0db8886520",
      "parents": [
        "af7ec0e4efd43aaa58094d036c85736059d9f18d"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Mar 13 10:28:41 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Mar 13 10:28:41 2014 +0000"
      },
      "message": "Fix non-{arm, x86} builds.\n\nChange-Id: If4c13775f8e1fd0fd26b4a731f3011c77b0bfed1\n"
    },
    {
      "commit": "bab4ed7057799a4fadc6283108ab56f389d117d4",
      "tree": "ea1bf495458fd9f7a3ffbed0ea4e1dda5a0b8184",
      "parents": [
        "37d4c1db4d705f5a28001f65afdd68d0527948d8"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Mar 11 17:53:17 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu Mar 13 09:23:12 2014 +0000"
      },
      "message": "More code generation for the optimizing compiler.\n\n- Add HReturn instruction\n- Generate code for locals/if/return\n- Setup infrastructure for register allocation. Currently\n  emulate a stack.\n\nChange-Id: Ib28c2dba80f6c526177ed9a7b09c0689ac8122fb\n"
    },
    {
      "commit": "3ff386aafefd5282bb76c8a50506a70a4321e698",
      "tree": "5f6e990553daae150a168f581bac79e659f7f712",
      "parents": [
        "0307b5c91c287e08cd414ecc5de32befceb7e371"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Mar 04 14:46:47 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Mar 10 11:41:22 2014 +0000"
      },
      "message": "Add register support to the optimizing compiler.\n\nAlso make if take an input and build the use list for instructions.\n\nChange-Id: I1938cee7dce5bd4c66b259fa2b431d2c79b3cf82\n"
    },
    {
      "commit": "d4dd255db1d110ceb5551f6d95ff31fb57420994",
      "tree": "93c9dfff8d16f2b9675c35477cc4bcd8ea3f630c",
      "parents": [
        "b565506a63e75dac4a8bb9dd54dabf5259e5b95f"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Feb 28 10:23:58 2014 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue Mar 04 16:19:11 2014 +0000"
      },
      "message": "Add codegen support to the optimizing compiler.\n\nChange-Id: I9aae76908ff1d6e64fb71a6718fc1426b67a5c28\n"
    }
  ]
}