)]}'
{
  "log": [
    {
      "commit": "745da80dbf169d83e2acb847b0c9c07985d51bdf",
      "tree": "a01990e419ee49fe255a6df108027a89b568975a",
      "parents": [
        "16f7f8e384f0ae13c53525ff12affbc00605b0ec"
      ],
      "author": {
        "name": "Nikita Iashchenko",
        "email": "nikitai@google.com",
        "time": "Wed Jan 20 21:52:54 2021 +0000"
      },
      "committer": {
        "name": "Nikita Iashchenko",
        "email": "nikitai@google.com",
        "time": "Wed Feb 10 12:33:48 2021 +0000"
      },
      "message": "Add Math.multiplyHigh intrinsic\n\nTest: ./art/test/testrunner/testrunner.py --target  --optimizing --64 -t 082-inline-execute\nTest: ./art/test/testrunner/testrunner.py --host --optimizing --64 -t 082-inline-execute\nChange-Id: I4b6cafa8b9e513eca7c5c139440024d87a7ef758\n"
    },
    {
      "commit": "ac27ac01490f53f9e2413dc9b66fbb2880904c96",
      "tree": "271018e1ef33667bee8d57c40ffa3f4d9f8cf930",
      "parents": [
        "26bf47a60064fcc42e1b5e7b4b41deb8312d7330"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Feb 01 09:31:02 2021 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Feb 05 10:48:17 2021 +0000"
      },
      "message": "Implement Reference.refersTo() intrinsic.\n\nTest: Added tests to 122-npe and 160-read-barrier-stress\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: run-gtests.sh\nTest: testrunner.py --target --optimizing\nBug: 172573708\nChange-Id: I8342510565289058df218d3249ffac1eb993ca4f\n"
    },
    {
      "commit": "a3bd4ec050e10fbfb6df0fe024bc6f3851bcc326",
      "tree": "8a373f87b05b3580f564bd8561bf0dd4ebb9161e",
      "parents": [
        "b0f405e1482df602fc57ee2ed4434456c4dc2555"
      ],
      "author": {
        "name": "Artem Serov",
        "email": "artem.serov@linaro.org",
        "time": "Thu Aug 27 16:26:17 2020 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Sep 25 09:16:33 2020 +0000"
      },
      "message": "Introduce Long.divideUnsigned() intrinsic on ARM64.\n\nExtends the 082-inline-execute test and reorders\ndivideUnsigned intrinsic code before VarHandle code.\n\nTest: 082-inline-execute.\nTest: testrunner.py --target --optimizing --64\nBug: 156736938\nChange-Id: I8acf3db184da30640aff36cf02570ae0c6d2b88c\n"
    },
    {
      "commit": "dc787f488ce151478af1149c04a10b21b2b9fc6e",
      "tree": "38d402813c9c3f541630255e9f9890a9c6842c45",
      "parents": [
        "9a09e7cf11b2653e6da2b179ac03bc6bb71c81e3"
      ],
      "author": {
        "name": "Andra Danciu",
        "email": "andradanciu@google.com",
        "time": "Tue Jul 07 14:28:56 2020 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Jul 09 09:44:58 2020 +0000"
      },
      "message": "Make Integer.divideUnsigned intrinsic for x86.\n\nBug: 156736938\nTest: Added a test to 082-inline-execute.\nTest: art/test.py --host --32 -r -t 082-inline-execute\nChange-Id: Id516126fce10f2fa52b95c1b2b107ca7bf45e347\n"
    },
    {
      "commit": "457e9fa3833ef11530056d010f247ad087fd2184",
      "tree": "54b8a9dcf44646c3e43a9085d581660c5d9a0132",
      "parents": [
        "17a39babb7f42cbe108d6fab2760cbdc68b821a2"
      ],
      "author": {
        "name": "Usama Arif",
        "email": "usama.arif@linaro.org",
        "time": "Mon Nov 11 15:29:59 2019 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Nov 28 09:51:05 2019 +0000"
      },
      "message": "ARM64: FP16 greater/less/greaterEquals/lessEquals intrinsics for ARMv8\n\nThis CL implements intrinsics for greater, greaterEquals, less,\nlessEquals methods with ARMv8.2 FP16 instructions. This requires the\nARMv8.2 AArch64 asimd half precision extension.\n\nThe time required in milliseconds to execute the below code for the four\nintrinsics on Pixel3 is (The code below is for FP16.less but is similar\nfor the rest of the intrinsics):\n\n- Java implementation libcore.util.FP16.less():\n    - big cluster only: 19876\n    - little cluster only: 47525\n- arm64 Intrinisic implementationi for less:\n    - big cluster only: 14526 (~27% faster)\n    - little cluster only: 45815 (~4% faster)\n\n- Java implementation libcore.util.FP16.lessEquals():\n    - big cluster only: 19856\n    - little cluster only: 47419\n- arm64 Intrinisic implementation for lessEquals:\n    - big cluster only: 14469 (~27% faster)\n    - little cluster only: 45762 (~4% faster)\n\n- Java implementation libcore.util.FP16.greater():\n    - big cluster only: 19854\n    - little cluster only: 47623\n- arm64 Intrinisic implementation for greater:\n    - big cluster only: 14519 (~27% faster)\n    - little cluster only: 45722 (~4% faster)\n\n- Java implementation libcore.util.FP16.greaterEquals():\n    - big cluster only: 19865\n    - little cluster only: 47216\n- arm64 Intrinisic implementation for greaterEquals:\n    - big cluster only: 14485 (~27% faster)\n    - little cluster only: 45729 (~4% faster)\n\npublic static boolean benchmarkComparison(){\n    boolean ret \u003d false;\n    long before \u003d 0;\n    long after \u003d 0;\n    before \u003d System.currentTimeMillis();\n    for(long i \u003d 0; i \u003c 1e9; i++){\n        // FP16.toHalf(12.3) \u003d 0x4a26, FP16.toHalf(12.4) \u003d 0x4a33\n        // FP16.toHalf(-12.3) \u003d 0xca26, FP16.toHalf(-12.4) \u003d 0xca33\n        ret |\u003d FP16.less((short) 0x4a26,(short) 0x4a33);\n        ret |\u003d FP16.less((short) 0x4a33,(short) 0x4a26);\n        ret |\u003d FP16.less((short) 0xca26,(short) 0xca33);\n        ret |\u003d FP16.less((short) 0xca33,(short) 0xca26);\n    }\n    after \u003d System.currentTimeMillis();\n    System.out.println(\"Time of FP16.less (ms): \" + (after - before));\n    System.out.println(ret);\n    return ret;\n}\n\nTest: 580-fp16\nTest: art/test/testrunner/run_build_test_target.py -j80 art-test-javac\nChange-Id: Id1a2c3e7328c82c798fcaf1fa74f5908a822cd0b\n"
    },
    {
      "commit": "681692b6291008caaddf4971eab7ea9f9b25d9ca",
      "tree": "cad26b5b6016cc27baa480e5f4b83faac3317ef0",
      "parents": [
        "665aac46784684dfb85fe999f6a566ed0cf173ef"
      ],
      "author": {
        "name": "Usama Arif",
        "email": "usama.arif@linaro.org",
        "time": "Wed Oct 30 16:23:26 2019 +0000"
      },
      "committer": {
        "name": "Hans Boehm",
        "email": "hboehm@google.com",
        "time": "Tue Nov 12 20:58:17 2019 +0000"
      },
      "message": "ARM64: FP16.rint() intrinsic for ARMv8\n\nThis CL implements an intrinsic for rint() method with\nARMv8.2 FP16 instructions.\n\nThis intrinsic implementation achieves bit-level compatibility with the\noriginal Java implementation android.util.Half.rint().\n\nThe time required in milliseconds to execute the below code on Pixel3:\n- Java implementation android.util.Half.rint():\n    - big cluster only: 19828\n    - little cluster only: 61457\n- arm64 Intrinisic implementation:\n    - big cluster only: 14186 (~28% faster)\n    - little cluster only: 54405 (~11% faster)\n\nAnalysis of this function with simpleperf showed that approximately only\n60-65% of the time is spent in libcore.util.FP16.rint. So the percentage\nimprovement using intrinsics is likely to be more than the numbers stated\nabove.\n\nAnother reason that the performance improvement with intrinsic is lower\nthan expected is because the java implementation for values between -1 and\n1 (abs \u003c 0x3c00) only requires a few instructions and should almost give\na similar performance to the intrinsic in this case. In the benchmark function\nbelow, 46.8% of the values tested are between -1 and 1.\n\npublic static short benchmarkrint(){\n    short ret \u003d 0;\n    long before \u003d 0;\n    long after \u003d 0;\n    before \u003d System.currentTimeMillis();\n    for(int i \u003d 0; i \u003c 50000; i++){\n        for (short h \u003d Short.MIN_VALUE; h \u003c Short.MAX_VALUE; h++) {\n            ret +\u003d FP16.rint(h);\n        }\n    }\n    after \u003d System.currentTimeMillis();\n    System.out.println(\"Time of FP16.rint (ms): \" + (after - before));\n    System.out.println(ret);\n    return ret;\n}\n\nTest: 580-fp16\nTest: art/test/testrunner/run_build_test_target.py -j80 art-test-javac\nChange-Id: I075c3e85a36fd9bce14deee437c5b961bd667b5d\n"
    },
    {
      "commit": "665aac46784684dfb85fe999f6a566ed0cf173ef",
      "tree": "343d6956068b1c21e0fc4af018e1322d7685411b",
      "parents": [
        "b9f02c2f8624bbf0746939e3b2735a1537a567b6"
      ],
      "author": {
        "name": "Usama Arif",
        "email": "usama.arif@linaro.org",
        "time": "Tue Oct 29 11:13:18 2019 +0000"
      },
      "committer": {
        "name": "Hans Boehm",
        "email": "hboehm@google.com",
        "time": "Tue Nov 12 20:58:17 2019 +0000"
      },
      "message": "ARM64: FP16.ceil() intrinsic for ARMv8\n\nThis CL implements an intrinsic for ceil() method with\nARMv8.2 FP16 instructions.\n\nThis intrinsic implementation achieves bit-level compatibility with the\noriginal Java implementation android.util.Half.ceil().\n\nThe time required in milliseconds to execute the below code on Pixel3:\n- Java implementation android.util.Half.ceil():\n    - big cluster only: 19447\n    - little cluster only: 62638\n- arm64 Intrinisic implementation:\n    - big cluster only: 14260 (~27% faster)\n    - little cluster only: 54387 (~13% faster)\n\nAnalysis of this function with simpleperf showed that approximately only\n60-65% of the time is spent in libcore.util.FP16.ceil. So the percentage\nimprovement using intrinsics is likely to be more than the numbers stated\nabove.\n\nAnother reason that the performance improvement with intrinsic is lower\nthan expected is because the java implementation for values between -1 and\n1 (abs \u003c 0x3c00) only requires a few instructions and should almost give\na similar performance to the intrinsic in this case. In the benchmark function\nbelow, 46.8% of the values tested are between -1 and 1.\n\npublic static short benchmarkCeil(){\n    short ret \u003d 0;\n    long before \u003d 0;\n    long after \u003d 0;\n    before \u003d System.currentTimeMillis();\n    for(int i \u003d 0; i \u003c 50000; i++){\n        for (short h \u003d Short.MIN_VALUE; h \u003c Short.MAX_VALUE; h++) {\n            ret +\u003d FP16.ceil(h);\n        }\n    }\n    after \u003d System.currentTimeMillis();\n    System.out.println(\"Time of FP16.ceil (ms): \" + (after - before));\n    System.out.println(ret);\n    return ret;\n}\n\nTest: 580-fp16\nTest: art/test/testrunner/run_build_test_target.py -j80 art-test-javac\nChange-Id: I5474c1d0d7c08ec77a6f82c4fb67f555253bfa67\n"
    },
    {
      "commit": "b9f02c2f8624bbf0746939e3b2735a1537a567b6",
      "tree": "ac6ad1f4125bd459a3b424cb5ff8b8029a3d5c7e",
      "parents": [
        "f1b18facd1edd6c8652c42085c5432c878507c8e"
      ],
      "author": {
        "name": "Usama Arif",
        "email": "usama.arif@linaro.org",
        "time": "Fri Oct 25 17:37:33 2019 +0100"
      },
      "committer": {
        "name": "Hans Boehm",
        "email": "hboehm@google.com",
        "time": "Tue Nov 12 20:58:17 2019 +0000"
      },
      "message": "ARM64: FP16.floor() intrinsic for ARMv8\n\nThis CL implements an intrinsic for floor() method with ARMv8.2 FP16\ninstructions. This intrinsic calls a template GenerateFP16Round function\nwhich will be used to implement other intrinisics such as ceil and\nrint.\n\nThis intrinsic implementation achieves bit-level compatibility with the\noriginal Java implementation android.util.Half.floor().\n\nThe time required in milliseconds to execute the below code on Pixel3:\n- Java implementation android.util.Half.floor():\n    - big cluster only: 18623\n    - little cluster only: 60424\n- arm64 Intrinisic implementation:\n    - big cluster only: 14213 (~24% faster)\n    - little cluster only: 54398 (~10% faster)\n\nAnalysis of this function with simpleperf showed that approximately only\n60-65% of the time is spent in libcore.util.FP16.floor. So the percentage\nimprovement using intrinsics is likely to be more than the numbers stated\nabove.\n\nAnother reason that the performance improvement with intrinsic is lower\nthan expected is because the java implementation for values between -1 and\n1 (abs \u003c 0x3c00) only requires a few instructions and should almost give\na similar performance to the intrinsic in this case. In the benchmark function\nbelow, 46.8% of the values tested are between -1 and 1.\n\npublic static short benchmarkFloor(){\n    short ret \u003d 0;\n    long before \u003d 0;\n    long after \u003d 0;\n    before \u003d System.currentTimeMillis();\n    for(int i \u003d 0; i \u003c 50000; i++){\n        for (short h \u003d Short.MIN_VALUE; h \u003c Short.MAX_VALUE; h++) {\n            ret +\u003d FP16.floor(h);\n        }\n    }\n    after \u003d System.currentTimeMillis();\n    System.out.println(\"Time of FP16.floor (ms): \" + (after - before));\n    System.out.println(ret);\n    return ret;\n}\n\nTest: 580-fp16\nTest: art/test/testrunner/run_build_test_target.py -j80 art-test-javac\n\nChange-Id: Iad1dd032d456af54932f13c5cf27228f8652a0b5\n"
    },
    {
      "commit": "7f958e36546bc0ebf92573da24ff620179526243",
      "tree": "a712a5527fdb5fe0b3e14b6f17fea90a89f55ecc",
      "parents": [
        "7814c122dd35ac5c79e7b76b12f1ae95201739a1"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Oct 24 09:03:58 2019 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Oct 25 08:16:27 2019 +0000"
      },
      "message": "Revert^2 \"ARM64: toHalf() intrinsic for ARMv8\"\n\nThis reverts commit 67bf99b8a575b15c117a3fbf7aae421330e4795a.\n\nReason for revert: The original CL was reverted because\nof build breakages not directly related to the CL itself.\n\nChange-Id: Ic98e9912701d81d73bc3af719a7e3a8e44e8c058\n"
    },
    {
      "commit": "67bf99b8a575b15c117a3fbf7aae421330e4795a",
      "tree": "2077b459c5b43c3b1399544faf07a326e253681a",
      "parents": [
        "2cc0c0f4b6a76dfb1ad205cfd79efe7efe2904d6"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Oct 23 13:29:10 2019 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Oct 23 13:29:10 2019 +0000"
      },
      "message": "Revert \"ARM64: toHalf() intrinsic for ARMv8\"\n\nThis reverts commit 2cc0c0f4b6a76dfb1ad205cfd79efe7efe2904d6.\n\nReason for revert: Broke some builds. To be investigated.\n\nBug: 143205070\nChange-Id: Ib36e149cc5ed7f53c932c0b611b43c28d19f22dc\n"
    },
    {
      "commit": "2cc0c0f4b6a76dfb1ad205cfd79efe7efe2904d6",
      "tree": "5ff5f5f7c5c25f441a36506a84988fa95d2dbd46",
      "parents": [
        "b8c884e5f22390386b202459ab55ef3046631e42"
      ],
      "author": {
        "name": "Usama Arif",
        "email": "usama.arif@linaro.org",
        "time": "Tue Oct 15 15:36:51 2019 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Oct 23 12:04:00 2019 +0000"
      },
      "message": "ARM64: toHalf() intrinsic for ARMv8\n\nThis CL implements an intrinsic for toHalf() method with\nARMv8.2 FP16 instructions.\n\nThis intrinsic implementation achieves bit-level compatibility with the\noriginal Java implementation android.util.Half.toFloat().\n\nThe time required to execute the below code on Pixel3:\n- Java implementation android.util.Half.toFloat():\n    - big cluster only: 2136ms\n    - little cluster only: 6442ms\n- arm64 Intrinisic implementation:\n    - big cluster only: 1347ms (~37% faster)\n    - little cluster only: 4937ms (~ 23% faster)\n\nint benchmarkToHalf() {\n    int result \u003d 0;\n    // 5.9605E-8 is the smallest positive subnormal number that can be\n    // represented by FP16. This is 0x33800032 in float bits.\n    int raw_input \u003d 0x33800032;\n    long before \u003d 0;\n    long after \u003d 0;\n    before \u003d System.currentTimeMillis();\n    do {\n        float input \u003d Float.intBitsToFloat(raw_input);\n        short output \u003d FP16.toHalf(input);\n        result +\u003d output;\n    } while (++raw_input !\u003d 0x477fff00);\n    // 65535 is the max possible integer that can be represented by FP16.\n    //This is 0x477fff00 in float bits.\n    after \u003d System.currentTimeMillis();\n    System.out.println(\"Time of FP16.toHalf (ms): \" + (after - before));\n    return result;\n}\n\nTest: 580-fp16\nTest: art/test/testrunner/run_build_test_target.py -j80 art-test-javac\nTest: test-art-host, test-art-target\n\nChange-Id: I69b152682390e5ffa5b3fdca60b496261191655d\n"
    },
    {
      "commit": "9ce340f829f836560278ecd078fbefcf19c9d629",
      "tree": "3327d6d7dd3c0ff86861cdab67791ee7c8dbe3b8",
      "parents": [
        "d4fc62c66328c0944348a314e3770b4f2b8006ce"
      ],
      "author": {
        "name": "xueliang.zhong",
        "email": "xueliang.zhong@linaro.org",
        "time": "Tue Jan 22 17:46:09 2019 +0000"
      },
      "committer": {
        "name": "Hans Boehm",
        "email": "hboehm@google.com",
        "time": "Thu Aug 15 20:35:11 2019 +0000"
      },
      "message": "ARM64: toFloat() intrinsics with ARMv8 FP16.\n\nThis CL intrinsifies toFloat() method with ARMv8.2 FP16 instructions.\n\nThis CL depends on the android framework and libcore changes:\nmoving FP16 implementations into libcore.\n\nTested with local micro benchmark on Pixel 3, compared to original\nandroid.util.Half.toFloat() Java implementation, this intrinsic is\n50% faster.\n\nIn real-life case, the FP16 toFloat() intrinsic can help\naccelerate ColorLong ARGB decoding in Android framework.\n\nThis intrinsic implementation archieves bit-level compatibility with the\noriginal Java implementation android.util.Half.toFloat().\n\nTest: 580-fp16\nTest: art/test/testrunner/run_build_test_target.py -j80 art-test-javac\nTest: test-art-host, test-art-target\n\nChange-Id: I059c69747067b84f2c532465e32a1dcd3c25269f\n"
    },
    {
      "commit": "d456117108c1efad790808698787868813b428e2",
      "tree": "d5785c40ad689dbd158fc52eed8b32c9ced967d5",
      "parents": [
        "ba2531826613a21736dd170d09877d3eb7990c5d"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Oct 30 17:48:25 2017 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon May 13 15:36:23 2019 +0000"
      },
      "message": "ART: Mark StringBuilder.append()s as intrinsics.\n\nWe do not actually emit intrinsic implementations for these\nmethods but we use this designation to simplify their use\nknowing that they \"return this\". This also prepares for\nrecognizing and optimizing the StringBuilder append pattern.\n\nNote that intrinsics are never inlined but these methods are\ndefined in core-oj and therefore the rest of the boot image\nand prebuilts are not allowed to inline them anyway.\n\nBoot image sizes for aosp_taimen-userdebug:\n - before:\n   arm/boot*.oat: 19756400\n   arm64/boot*.oat: 23415656\n - after:\n   arm/boot*.oat: 19653872 (-100KiB)\n   arm64/boot*.oat: 23292784 (-120KiB)\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: aosp_taimen-userdebug boots\nTest: run-gtests.sh\nTest: testrunner.py --target --optimizing\nBug: 19575890\nChange-Id: I2f3bac17830ac1c51287b090a96facddd3d09f5c\n"
    },
    {
      "commit": "4bb2af5e6163cf68ec65c5497983303302a15a09",
      "tree": "6cc72eae79472645b2c4833acb69f74849e43b0a",
      "parents": [
        "975b77427413977665f3be66d02e1d164df1efbc"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Mar 22 11:09:19 2019 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Mar 22 13:08:16 2019 +0000"
      },
      "message": "ObjPtr\u003c\u003e-ify entrypoint utils.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing --interpreter\nBug: 31113334\nChange-Id: Id05ce5b827b5c11a0fa796bca0b939e29ecf3c5f\n"
    },
    {
      "commit": "776a7c294f6356b314505369679bffc73f4a345e",
      "tree": "ec1d678a0923d2c7ec869f806f5b4860e1a1a721",
      "parents": [
        "8ceeb2ede9a7280fab618dfcb55f424a79dc00ca"
      ],
      "author": {
        "name": "Evgeny Astigeevich",
        "email": "evgeny.astigeevich@linaro.org",
        "time": "Mon Dec 17 11:40:34 2018 +0000"
      },
      "committer": {
        "name": "Evgeny Astigeevich",
        "email": "evgeny.astigeevich@linaro.org",
        "time": "Wed Dec 19 23:01:02 2018 +0000"
      },
      "message": "ART: Add CRC32.updateByteBuffer intrinsic for ARM64\n\nUse crc32 instructions for\njava.util.zip.CRC32.updateByteBuffer(int, long, int, int).\n\nNote that CRC32 is an optional feature in ARMv8, this intrinsic\nis only enabled for devices supporting the CRC32 instructions.\n\nThe performance of the intrinsic is the same as the performance of the\nCRC32.updateBytes intrinsic. However the intrinsic does not have a\nrestriction on the size of the byte buffer. For big input data\nthe intrinsic will be faster than CRC32.updateBytes.\n\nTest: m test-art-target-gtest\nTest: m test-art-host-gtest\nTest: art/test.py --target --optimizing\nTest: art/test.py --host --optimizing\nTest: 580-crc32\n\nChange-Id: I6b6160b56e829731402bd5fc56bcac59664f634d\n"
    },
    {
      "commit": "15c5b97d0093a804881acf3a53bda8b6b4c1521d",
      "tree": "ad6befd10a3d6dee0f1667d254374e267ad89ce7",
      "parents": [
        "cfc4b3ac67b364d753d970d1adcf97668114e959"
      ],
      "author": {
        "name": "Evgeny Astigeevich",
        "email": "evgeny.astigeevich@linaro.org",
        "time": "Tue Nov 20 13:41:40 2018 +0000"
      },
      "committer": {
        "name": "Evgeny Astigeevich",
        "email": "evgeny.astigeevich@linaro.org",
        "time": "Thu Dec 06 22:19:23 2018 +0000"
      },
      "message": "ART: Add CRC32.updateBytes intrinsic for ARM64\n\nUse crc32 instructions for\njava.util.zip.CRC32.updateBytes(int,byte[],int,int).\n\nThe intrinsic is used if a number of processed bytes is less or equal to\nkCRC32UpdateBytesThreshold. If it exceeds kCRC32UpdateBytesThreshold the\ncore library provided function is used.\n\nNote that CRC32 is an optional feature in ARMv8, this intrinsic\nis only enabled for devices supporting the CRC32 instructions.\n\nThe CL is based on code from tim.zhang@linaro.org.\n\nPerformance improvements - speedup:\narray size | Cortex-A53 | Cortex-A57\n------------------------------------\n128        | 14x        | 20x\n256        | 10x        | 14x\n512        | 8x         | 11x\n1024       | 7x         | 9x\n2048       | 6x         | 8x\n4096       | 5x         | 7x\n8192       | 5x         | 7x\n16384      | 5x         | 7x\n32768      | 5x         | 7x\n65536      | 5x         | 7x\n\nTest: m test-art-target-gtest\nTest: m test-art-host-gtest\nTest: art/test/testrunner/testrunner.py --target --optimizing --interpreter\nTest: art/test/testrunner/testrunner.py --target --jit\nTest: art/test/testrunner/testrunner.py --host --optimizing --interpreter\nTest: art/test/testrunner/testrunner.py --host --jit\nTest: 580-crc32\n\nChange-Id: I0054cea41b5fc3e712e18b0afc7e3eacbf41feb6\n"
    },
    {
      "commit": "cb58b07d233c5f8e910e6e5946da8ac4ec3099f5",
      "tree": "bd19cb9a44555adf51e2d145c322a592c6cd3527",
      "parents": [
        "e2acc339ede3c620a476827880cf68d044dcd53e"
      ],
      "author": {
        "name": "xueliang.zhong",
        "email": "xueliang.zhong@linaro.org",
        "time": "Fri Oct 13 12:06:56 2017 +0100"
      },
      "committer": {
        "name": "Evgeny Astigeevich",
        "email": "evgeny.astigeevich@linaro.org",
        "time": "Fri Nov 02 10:07:12 2018 +0000"
      },
      "message": "ART: Add CRC32.udate(int,int) intrinsic for ARM64\n\nUse crc32 instructions for java.util.zip.CRC32.update(int,int).\n\nNote that CRC32 is an optional feature on ARMv8, this intrinsic\nis only enabled for devices with CRC32 intruction support.\n\nOriginal author: tim.zhang@linaro.org\n\nPerformance improvements in CRC32Bench.UpdateInt:\nPixel 2: 22.8x\nNexus 6P:\n  little core: 28.3x\n  big core   : 21.6x\n\nTest: m test-art-target-gtest\nTest: testrunner.py --target --optimizing --jit --interpreter\nTest: 580-crc32\n\nChange-Id: I1a9bc2befd2934b04103a27ce05806e919874070\n"
    },
    {
      "commit": "b8e5ad19e064611df15998d8d12cd7e804ccdfd4",
      "tree": "98ad9feeff53686af61f8e94895ffbc5e06953ed",
      "parents": [
        "4a25727eba333c19dc6eacc35950c526c11041d4"
      ],
      "author": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Fri Aug 31 07:02:02 2018 +0100"
      },
      "committer": {
        "name": "David Srbecky",
        "email": "dsrbecky@google.com",
        "time": "Fri Aug 31 07:37:03 2018 +0100"
      },
      "message": "Fix interpreter intrinsic for rotate left/right.\n\nTest: test.py --host -b -r -t 015-checker-rotate\nChange-Id: I0112aa026c565f0788ff6e926189d10db7d3ad44\n"
    },
    {
      "commit": "c7b28de9f8bf407d91cff22de782d022492b45f7",
      "tree": "7d85879a528f21e25b5ab36f20de716b4cf5892d",
      "parents": [
        "8fd8cdc43e10a421f6f63afb87f6f99c086058de"
      ],
      "author": {
        "name": "Hans Boehm",
        "email": "hboehm@hboehm.mtv.corp.google.com",
        "time": "Fri Mar 09 17:05:28 2018 -0800"
      },
      "committer": {
        "name": "Hans Boehm",
        "email": "hboehm@google.com",
        "time": "Thu Mar 29 10:42:58 2018 -0700"
      },
      "message": "Add reachabilityFence intrinsics\n\nAdd intrinsics that generate no code or do nothing for all architectures\nand for the interpreter. The only impact is to keep the argument live at\nall suspend points preceding the call. We ensure that the code is not\nmoved across other memory accesses by declaring it to have write side-effects.\n\nAdd a minimal test.\n\nModify 036-finalizer to use a reachabilityFence, hopefully making it\nmore robust to dead refererence elimination.\n\nBug: 72698200\n\nTest: Build and boot AOSP.\n      art/test.py --host -r -t 072-reachability-fence\n      Look at generated code.\n\nChange-Id: I0f298bf5cc375d8ebc19bb791cc05a8490d55430\n"
    },
    {
      "commit": "6446437eacf378b5d72a25718b19b777131d90e0",
      "tree": "8682a9ce0b0451a398db6d65813602c05c23d47b",
      "parents": [
        "68c506c7c7dd12d9c23bcfe264889677225a16c2"
      ],
      "author": {
        "name": "Hans Boehm",
        "email": "hboehm@google.com",
        "time": "Wed Mar 28 15:41:19 2018 -0700"
      },
      "committer": {
        "name": "Hans Boehm",
        "email": "hboehm@google.com",
        "time": "Wed Mar 28 15:41:19 2018 -0700"
      },
      "message": "Fix Long reverse intrinsic comment\n\nTest: TreeHugger only\nChange-Id: I8823e8d9a9db88ed280f9d968184153543697f39\n"
    },
    {
      "commit": "4d17987da58d9411adbed1a18203d76d6119612d",
      "tree": "f2953a0eb3ebc3f8533d22c14f4a09d7f0d4168d",
      "parents": [
        "e57043081e6b091a9fd23a84043373148ae72f1f"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Jan 19 14:50:10 2018 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Jan 22 18:35:16 2018 +0000"
      },
      "message": "ART: Add entrypoint and intrinsic for Math.pow().\n\nMathBenchmarks.java#timePow results on taimen\u0027s little cores\nfixed at frequency 1401600 with forced JIT compilation:\n  - before:\n    - X32: 356.33 (@FastNative), 315.39 (@CriticalNative)\n    - X64: 357.31 (@FastNative), 315.37 (@CriticalNative)\n  - after (LICM defeats the benchmark):\n    - X32: 2.88\n    - X64: 2.87\n  - after but with kAllSideEffects to prevent LICM:\n    - X32: 275.42\n    - X64: 275.67\n\nTest: Rely on TreeHugger.\nBug: 70727450\nChange-Id: Iaa31f70acabbd57c163cfeafe02eed67c1348861\n"
    },
    {
      "commit": "9e734c7ab4599d7747a05db0dc73c7b668cb6683",
      "tree": "dce1d1993734a947fb2e6f626eb1b425cb72143b",
      "parents": [
        "b496af808eaf3af5ebac50aef4fbec33323b5016"
      ],
      "author": {
        "name": "David Sehr",
        "email": "sehr@google.com",
        "time": "Thu Jan 04 17:56:19 2018 -0800"
      },
      "committer": {
        "name": "David Sehr",
        "email": "sehr@google.com",
        "time": "Fri Jan 05 11:07:19 2018 -0800"
      },
      "message": "Create dex subdirectory\n\nMove all the DexFile related source to a common subdirectory dex/ of\nruntime.\n\nBug: 71361973\nTest: make -j 50 test-art-host\nChange-Id: I59e984ed660b93e0776556308be3d653722f5223\n"
    },
    {
      "commit": "43f0cdbe3281cd5c9a33d5472b1538e5617f6691",
      "tree": "afed702b60c483bd5fa63be7cb3ad866b83d24d1",
      "parents": [
        "26ef34c01ae5db2d3c964844b3717b8974a612c9"
      ],
      "author": {
        "name": "Orion Hodson",
        "email": "oth@google.com",
        "time": "Tue Oct 10 14:47:32 2017 +0100"
      },
      "committer": {
        "name": "Orion Hodson",
        "email": "oth@google.com",
        "time": "Wed Nov 01 16:22:45 2017 +0000"
      },
      "message": "ART: Intrinsify polymorphic signature methods\n\nAdds VarHandle accessor method to list of intrinsics.\n\nAdds code to interpreter to ensure intrinsics with polymorphic\nsignatures are initialized.\n\nRename most uses of InvokePolymorphic to InvokeMethodHandle (and\nsimilar changes) to be clear that the particular code path applies to\nMethodHandle instances rather than VarHandle.\n\nChange-Id: Ib74865124a1e986badc0a7c4bb3d782af07225d4\nBug: 65872996\nTest: art/test.py --host\n"
    },
    {
      "commit": "26ef34c01ae5db2d3c964844b3717b8974a612c9",
      "tree": "8470588d8d0601626b3524abb5fbe19386ba7fe4",
      "parents": [
        "62540e3cc58abde95e147210d584614651d858b5"
      ],
      "author": {
        "name": "Orion Hodson",
        "email": "oth@google.com",
        "time": "Wed Nov 01 13:32:41 2017 +0000"
      },
      "committer": {
        "name": "Orion Hodson",
        "email": "oth@google.com",
        "time": "Wed Nov 01 16:21:52 2017 +0000"
      },
      "message": "ART: Move intrinsics definitions to runtime\n\nBug: 37538194\nTest: art/test.py --host\nChange-Id: Ic7adf5f8b14be0e1880ae898a4e199b4416a4d24\n"
    },
    {
      "commit": "4a4610a438ff2b836f6fe07839a0689ce618863a",
      "tree": "afb5c6303c6c8eb68f81752a642a5b036049b28d",
      "parents": [
        "865a0503515f78611dce103bd04b7c66c051d304"
      ],
      "author": {
        "name": "Orion Hodson",
        "email": "oth@google.com",
        "time": "Thu Sep 28 16:57:55 2017 +0100"
      },
      "committer": {
        "name": "Orion Hodson",
        "email": "oth@google.com",
        "time": "Mon Oct 02 14:09:21 2017 +0100"
      },
      "message": "ART: Add VarHandle fence intrinsics\n\nBug: 65872996\nTest: art/test/run-test --host --64 709\nTest: art/test.py --host -j32\nChange-Id: I6fa399bb00f0c83048ac2b4372b08e4b4b29ce7f\n"
    },
    {
      "commit": "365719c23d809e595cf320bfba40e76bb4e87940",
      "tree": "0939f0d8dc47723978a665fa11dd637f6976d521",
      "parents": [
        "d6705a0586377f1b0d7d14d3abe2b270bb0adb18"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Mar 08 13:11:50 2017 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Tue May 16 01:58:03 2017 +0100"
      },
      "message": "No need to lock when calling Thread.interrupted.\n\nAlso intrinsify the Thread.interrupted call.\n\nThe rationale behind this optimization is that the flag can only\nhave two values, and only self can set it to false.\n\nTest: libcore, jdwp, run-tests, 050-sync-test\nChange-Id: I5c2b43bf872ba0bfafcb54b2cfcd19181864bc4c\n"
    },
    {
      "commit": "d9911eeca13f609c885e0f6a5ce81af9b6340bfa",
      "tree": "f850510643ee120dba140bf0bb3e1c1b9c9ce4db",
      "parents": [
        "46bfb7c047a590ac5c24b658f31c170631556bb6"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Mar 27 13:27:24 2017 -0700"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Mar 27 13:53:48 2017 -0700"
      },
      "message": "ART: Clean up field initialization\n\nAdd explicit field initialization to default value where necessary.\nAlso clean up interpreter intrinsics header.\n\nTest: m\nChange-Id: I7a850ac30dcccfb523a5569fb8400b9ac892c8e5\n"
    },
    {
      "commit": "31afbec96e9f9c8e58778694e74aea7ce55e1378",
      "tree": "1ad1633c75fb6c65fbb25d09fb9dcf92c4a81b8c",
      "parents": [
        "c53528a048e47ef8c51fc5c9667061ebd840adf1"
      ],
      "author": {
        "name": "buzbee",
        "email": "buzbee@google.com",
        "time": "Tue Mar 14 15:30:19 2017 -0700"
      },
      "committer": {
        "name": "buzbee",
        "email": "buzbee@google.com",
        "time": "Thu Mar 16 05:31:59 2017 -0700"
      },
      "message": "ART: Bit intrinsics for Mterp interpreter\n\nAnother batch of interpreter intrinisics, mostly around bit\nmanipulation.  Also some formatting changes and inclusion of a\ncomprehensive list of recognized intrinisics (to assist with\ntelling what\u0027s left to do).\n\nBug: 30933338\n\nBenchmarks:\n   20% Improvement for Reversi\n   10% Improvement for Scimark2\n    3% Improvement for ChessBench\n\nTest: ART_TEST_INTERPRETER\u003dtrue m test-art-host\nTest: art/tools/run-libcore-tests --host (edited for force -Xint)\n\nNote: Added intrinsics have existing test coverage via\n082-inline-execute, 123-inline-execute2, 565-checker-rotate,\n564-checker-bitcount, 566-checker-signum \u0026 567-checker-compare\n\nChange-Id: I29f0386e28eddba37c44f9ced44e7d5f8206bb47\n"
    },
    {
      "commit": "e667a3c2e4cae5a977e412a1d80f31a1dc4f3028",
      "tree": "eb7b8832797e62d0389443148b1d5afb5e8d7071",
      "parents": [
        "c02fe5f31d487765a8c59922c46d459ba6ebf939"
      ],
      "author": {
        "name": "buzbee",
        "email": "buzbee@google.com",
        "time": "Thu Mar 09 13:51:23 2017 -0800"
      },
      "committer": {
        "name": "buzbee",
        "email": "buzbee@google.com",
        "time": "Fri Mar 10 13:08:32 2017 -0800"
      },
      "message": "ART: String intrinsics for Mterp interpreter\n\nAdds the most common java.lang.string intrinsics.  Includes change\nto jvalue handling to zero-exend setting of chars and booleans to\n64 bits (aligns with current sign-extension of shorts and ints).\n\nBug: 30933338\n\nBenchmarks:\n  2x boost for Caffeinemark String\n  11% improvement for Dhrystone\n\nTest: ART_TEST_INTERPRETER\u003dtrue m test-art-host\nTest: ART_TEST_INTERPRETER\u003dtrue m test-art-target (Bullhead)\n\nNote: Added intrinsics have existing test coverage via\n082-inline-execute and 123-inline-execute2.\n\nChange-Id: I64b35b1d7bdfe14da0c662594c0edf5cde667277\n"
    },
    {
      "commit": "78f1bdc6bbf0ac07a333ada2396987e8391eee49",
      "tree": "148edb8b92b9df1da50b61448417267c00d014a3",
      "parents": [
        "fddc19338d9fdee24c4e10b758db1a6997004e2e"
      ],
      "author": {
        "name": "buzbee",
        "email": "buzbee@google.com",
        "time": "Wed Mar 01 10:55:57 2017 -0800"
      },
      "committer": {
        "name": "buzbee",
        "email": "buzbee@google.com",
        "time": "Wed Mar 08 09:22:05 2017 -0800"
      },
      "message": "Interpreter intrinsics\n\nFirst of several intrinsic CLs.  This one provides the basic\nmechanism plus a handful of the most simple examples.  Note that\nIntrinsic support is limited to Mterp both to keep the switch\ninterpreter as a pure reference, and to avoid mixing debugging\nand intrinsics.\n\nBug: 30933338\n\nTest: ART_TEST_INTERPRETER m test-art-host\nTest: Note: existing 082-inline-execute, 123-inline-execute2\nTest:   cover intrinsics enabled by this CL.\n\nChange-Id: I9d79e23a84bf00cadb54e1db52d8ed193bbf8887\n"
    }
  ]
}