)]}'
{
  "log": [
    {
      "commit": "0866f4ed6338faa4a193b7e819fc7cd72bd7b0ae",
      "tree": "21d3eb3e35a5af9f3bbb183e12c2c30c2873e8c9",
      "parents": [
        "0841a6ddff92e6581fb61d9b72f7317ab4db7248"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Feb 22 10:03:12 2016 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Thu Feb 25 18:56:00 2016 -0800"
      },
      "message": "ART: Add unstarted-runtime functions\n\nAdd more functions to allow compile-time initialization of\ncode.\n\nBug: 27248115\nChange-Id: Iaf8d92deb73547ccd31c0d6dde68da3bc14c3985\n"
    },
    {
      "commit": "b0171b9573c446724c10c86d41887d0133590b6c",
      "tree": "6c75d0329a34bcde360dd5fa78d989a0023147af",
      "parents": [
        "4047c5b3b00f015b81cb52da0cda545d6a3820c8"
      ],
      "author": {
        "name": "Hans Boehm",
        "email": "hboehm@google.com",
        "time": "Thu Jan 28 17:19:15 2016 -0800"
      },
      "committer": {
        "name": "Hans Boehm",
        "email": "hboehm@google.com",
        "time": "Thu Jan 28 17:19:15 2016 -0800"
      },
      "message": "Do not use atomic increment in allocation as fence.\n\nA sequentially consistent fetch_and_add implemented with ARM v8 acquire\nrelease operations is not a fence.  Don\u0027t use it as one.\n\nThe result may also be somewhat faster, since a sequentially consistent\nincrement requires more fencing than needed for the increment.\n\nBug: 16377103\nChange-Id: I5b1add098d3488aa755f140612e54521b80aa749\n"
    },
    {
      "commit": "4d77b6a511659f26fdc711e23825ffa6e7feed7a",
      "tree": "7ac013467a20fcdf64cb6cf4c79a8ff67dc7690a",
      "parents": [
        "66f55237679db90cb0a0a265043a787932b466f8"
      ],
      "author": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Tue Dec 01 18:38:09 2015 +0000"
      },
      "committer": {
        "name": "Calin Juravle",
        "email": "calin@google.com",
        "time": "Thu Dec 24 12:02:12 2015 +0200"
      },
      "message": "Save profile information in a separate thread.\n\nPreviously we would save the profiling information only when the app\nwas sent to background. This missed on an important number of updates\non the jit code cache and it didn\u0027t work for background processes.\n\nBug: 26080105\n\nChange-Id: I84075629870e69b3ed372f00f4806af1e9391e0f\n"
    },
    {
      "commit": "1a5c40672783fac98aca5a04ac798a0a0014de65",
      "tree": "18545fd8c3588dd4f4dde91d367da82c53cf17a9",
      "parents": [
        "0223a19fa4fc39ba89de2b87b03b98a5fd97778b"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Thu Jan 15 12:10:47 2015 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Thu Jan 15 20:13:48 2015 -0800"
      },
      "message": "ART: Mips64 runtime support\n\nInterpret-only Mips64 runtime support.\n\nChange-Id: Iee22d0c8c77105d9b2f03a67dc4e09957fe0ab0a\n"
    },
    {
      "commit": "575e78c41ece0dec969d31f46be563d4eb7ae43b",
      "tree": "16906df0ba0912a6cb01b3139ba7c60d5f9d09b7",
      "parents": [
        "2998e9cdc9f19c30c4944a4726ed9f147de79ebd"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Nov 03 23:41:03 2014 -0800"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Mon Nov 03 23:41:03 2014 -0800"
      },
      "message": "ART: Replace COMPILE_ASSERT with static_assert (runtime)\n\nReplace all occurrences of COMPILE_ASSERT in the runtime tree.\n\nChange-Id: I01e420899c760094fb342cc6cb9e692dd670a0b2\n"
    },
    {
      "commit": "99c251bbd225dd97d0deece29559a430b12a0b66",
      "tree": "5a12988a3c53b5b1a7902f658ed179ed2d9a22e9",
      "parents": [
        "9c1dffed26aa1faa1db1f1875f135cce697d92c4",
        "aab0f86e3b079598d41c3a00bfa765a7589c5110"
      ],
      "author": {
        "name": "Dan Albert",
        "email": "danalbert@google.com",
        "time": "Tue Aug 12 21:42:23 2014 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Tue Aug 12 19:27:26 2014 +0000"
      },
      "message": "Merge \"Revert \"Revert \"Remove GCC atomic workarounds.\"\"\""
    },
    {
      "commit": "6a3f8d93ddf09b5f6667820089e488958cba8361",
      "tree": "0c20bb42a62b74e2bb647bf9a873be4b1fe81254",
      "parents": [
        "6814d7b68ee13ec1a13ace669b025aa080d8b53e"
      ],
      "author": {
        "name": "Dan Albert",
        "email": "danalbert@google.com",
        "time": "Tue Aug 12 11:48:34 2014 -0700"
      },
      "committer": {
        "name": "Dan Albert",
        "email": "danalbert@google.com",
        "time": "Tue Aug 12 13:37:26 2014 -0700"
      },
      "message": "Initialize art::Atomic\u0027s value to 0.\n\nart::Mutex and art::ConditionVariable were DCHECKing that the value was\nzero on entering the constructor without ever initializing the value.\nSince 0 is a sensible default, make it the default for art::Atomic\nrather than initializing for each use.\n\nBug: 16301104\nChange-Id: I9c98b82c80670b7a6c53d46a08236bbed6a64f8f\n"
    },
    {
      "commit": "aab0f86e3b079598d41c3a00bfa765a7589c5110",
      "tree": "40d6cfa6057b7b1228138add3888c24871294ab9",
      "parents": [
        "6814d7b68ee13ec1a13ace669b025aa080d8b53e"
      ],
      "author": {
        "name": "Dan Albert",
        "email": "danalbert@google.com",
        "time": "Mon Aug 11 16:38:02 2014 -0700"
      },
      "committer": {
        "name": "Dan Albert",
        "email": "danalbert@google.com",
        "time": "Mon Aug 11 16:38:02 2014 -0700"
      },
      "message": "Revert \"Revert \"Remove GCC atomic workarounds.\"\"\n\nThis reverts commit 626a2468e4e4f39db7b0f35a4fee87293e360e92.\n"
    },
    {
      "commit": "626a2468e4e4f39db7b0f35a4fee87293e360e92",
      "tree": "beba34c3ccf827411284a14c7e88adfa72a71ed6",
      "parents": [
        "a29ffd505328b3d580c25fff054e463b7cac08a8"
      ],
      "author": {
        "name": "Jeff Hao",
        "email": "jeffhao@google.com",
        "time": "Mon Aug 11 22:28:05 2014 +0000"
      },
      "committer": {
        "name": "Jeff Hao",
        "email": "jeffhao@google.com",
        "time": "Mon Aug 11 22:28:05 2014 +0000"
      },
      "message": "Revert \"Remove GCC atomic workarounds.\"\n\nThis reverts commit a29ffd505328b3d580c25fff054e463b7cac08a8.\n\nChange-Id: Ibb4845b8a1378f3d1fb0975f9677758f420f843f\n"
    },
    {
      "commit": "a29ffd505328b3d580c25fff054e463b7cac08a8",
      "tree": "94dec1fdc3df1e5150e89906d66fcd14e0c0001c",
      "parents": [
        "02a6317297b8745637b265ab75abbfa685879882"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Mon Aug 11 10:32:28 2014 -0700"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Mon Aug 11 10:32:28 2014 -0700"
      },
      "message": "Remove GCC atomic workarounds.\n\nlibcxx now has compatibility with GCC atomic support.\nBug: 16301104\n\nChange-Id: I0ba5abf7147e999a8329c9e8a48b3712370ee4a6\n"
    },
    {
      "commit": "c4f72ec44660f804b595bfaf2b959f46fd2ff00d",
      "tree": "df8764e4ec382b4e4810b8d0309823a40ef47d5c",
      "parents": [
        "af4cf5d72a2bf77f0e442bedb208f9227f262c89",
        "74240819ae09e29b2753ef38f4eb4be1c2762e2e"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Thu Jul 10 07:54:06 2014 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Wed Jul 09 14:45:53 2014 +0000"
      },
      "message": "Merge \"Use memory chunks for monitors on LP64\""
    },
    {
      "commit": "74240819ae09e29b2753ef38f4eb4be1c2762e2e",
      "tree": "61e2d3aa7268ce49fe77715593896f59feb92fe6",
      "parents": [
        "32710dd4a0232149002a5ae7bde1c640cdffd564"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Thu Apr 17 10:35:09 2014 -0700"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Thu Jul 10 00:51:04 2014 -0700"
      },
      "message": "Use memory chunks for monitors on LP64\n\nMonitor IDs in lock words are only 30b. On a 32b system that works\nfine, as memory is usually aligned enough that shifting works out.\nOn 64b systems, the virtual memory space is too large for that.\nThis adds memory chunks into which we allocate the monitors so that\nwe have base_addr + offset and can use the offset as the monitor ID.\nTo allow for relatively compact but growable storage, we use a list\nof chunks.\n\nAdded a global lock for the monitor pool.\n\nChange-Id: I0e290c4914a2556e0b2eef9902422d7c4dcf536d\n"
    },
    {
      "commit": "8c1b5f71a8005743756206120624121d7678381f",
      "tree": "8cc8f170ac94ca2018d2e6e3e24eeeb3ee7f97f3",
      "parents": [
        "070dfc4cebb9772a646382be9751d8f4c6b7d69a"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Wed Jul 09 22:02:36 2014 -0700"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Wed Jul 09 23:46:42 2014 -0700"
      },
      "message": "Missed use of android_atomic and thread state_.\n\nMove to using art::Atomic, add necessary FetchAnd... operations to art::Atomic.\n\nChange-Id: I32f1cdc4e0a2037b73f459bf4bb4d544f357f41b\n"
    },
    {
      "commit": "b8e087e0dfd619df90cbb56534478a60bc859ebf",
      "tree": "f6f4e896935b02c68a40ae1410edb08f7296cad9",
      "parents": [
        "43b6fe0270477cd47f8dd8b064d006961a44be54"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Wed Jul 09 21:12:06 2014 -0700"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Wed Jul 09 21:24:04 2014 -0700"
      },
      "message": "Move thread state to art::Atomic.\n\nLeaves the CAS operations as relaxed although art::Atomic treats relaxed CAS\nas a strong CAS when not compiling with clang.\n\nChange-Id: I6d37c22173540d166b624385e52e4ad05e592adc\n"
    },
    {
      "commit": "a55c697a8276b1c82b108a695bbd588725aa015e",
      "tree": "b636e82692421bc57b163a86ab8c103b03ada40a",
      "parents": [
        "cef85adb4933bbd00ca122aa7357e02c716df326"
      ],
      "author": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Fri Jun 06 21:27:01 2014 -0700"
      },
      "committer": {
        "name": "Andreas Gampe",
        "email": "agampe@google.com",
        "time": "Fri Jun 06 21:27:01 2014 -0700"
      },
      "message": "ART: Fix casts in atomic.h to please GCC\n\nGCC 4.9 for ARM64 is not happy about reinterpret_cast-ing between\nint64_t and uint64_t, which is according to spec. Change the\nconcrete casts to static_cast.\n\nHowever, we also use this for pointers, and we cannot static_cast\nthose to int64_t. So add a reinterpret_cast to uintptr_t.\n\nChange-Id: If6513fbcbb8ee8f610f172310af61cf2e9ab0c43\n"
    },
    {
      "commit": "2f4a2edda128bbee5c6ba6ba7e3cbca9260368c2",
      "tree": "13bed4f69c16cf6b1ac2f92b087a1435ca2e27b0",
      "parents": [
        "9e0d8d6efdbc46d3364eb3d02a4686f00cc8e6ca"
      ],
      "author": {
        "name": "Hans Boehm",
        "email": "hboehm@google.com",
        "time": "Fri Jun 06 18:17:43 2014 -0700"
      },
      "committer": {
        "name": "Hans Boehm",
        "email": "hboehm@google.com",
        "time": "Fri Jun 06 18:32:41 2014 -0700"
      },
      "message": "Don\u0027t assert int64_t alignment on x86.\n\nFix build.\n\nChange-Id: I1b798bb3c5ab4954b46d54cda8f8c237ab4ae53e\n"
    },
    {
      "commit": "a1ec065a4c5504d0619bde95e4da93c0564eafdb",
      "tree": "f58da5f56f128e4fba08df8d8be11d39731c2c6b",
      "parents": [
        "c2bb441a65c5d1dd0b73d04489514ab09bd53c8a"
      ],
      "author": {
        "name": "Hans Boehm",
        "email": "hboehm@google.com",
        "time": "Fri Jun 06 17:13:03 2014 -0700"
      },
      "committer": {
        "name": "Hans Boehm",
        "email": "hboehm@google.com",
        "time": "Fri Jun 06 17:18:49 2014 -0700"
      },
      "message": "Fix white space issues and long long use in assertion.\n\nFix Build.\n\nChange-Id: If67a910ffed25c03c46638d6c132dc0e3a20ef62\n"
    },
    {
      "commit": "3035961cb41865b80b927546be0c708b6389cec6",
      "tree": "27ed39f92c013381d08c7ad51d311cb29be230dc",
      "parents": [
        "e21bf0099117b82963cdf7f95a1b8dabfcf29397"
      ],
      "author": {
        "name": "Hans Boehm",
        "email": "hboehm@google.com",
        "time": "Wed May 21 17:46:23 2014 -0700"
      },
      "committer": {
        "name": "Hans Boehm",
        "email": "hboehm@google.com",
        "time": "Fri Jun 06 16:13:42 2014 -0700"
      },
      "message": "Clean up and augment Atomic class.  Replace QuasiAtomic MemBars.\n\nAdd a number of missing C++11 operations to Atomic class.\nInvoke the 64 bit routines in QuasiAtomic when necessary.\nReplace QuasiAtomic membars with fences that correspond to C++11 fences.\n\nQuasiAtomic was moved to the top of the file.  Only fence implementations\nactually changed.\n\nThis replaces some buggy uses of MembarStoreStore, as reported\nin b/14685856 .\n\nAvoid some redundant fences for long volatile operations.\n\nIncompletely converts low-level memory access operations to Atomic.\n\nChange-Id: Iea828431a0cea46540eb74fcaa02071cab6fdcda\n"
    },
    {
      "commit": "3e5cf305db800b2989ad57b7cde8fb3cc9fa1b9e",
      "tree": "52a737323ebd505cf37ca0e4b2dcee6524fba07f",
      "parents": [
        "27a2b70f612af9afc0fb5392fb10059f6a0a3569"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Tue May 20 16:40:37 2014 -0700"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Tue May 20 21:17:03 2014 -0700"
      },
      "message": "Begin migration of art::Atomic to std::atomic.\n\nChange-Id: I4858d9cbed95e5ca560956b9dabd976cebe68333\n"
    },
    {
      "commit": "63c5dd056fa20993b35ec5c8548b26c988445763",
      "tree": "53a306489c89fa69a756e37fbcaebffcfac04a82",
      "parents": [
        "1a5ff7c3a6508deacd3fd6473de80c62f7316a81"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Mon May 19 22:55:00 2014 -0700"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Mon May 19 22:55:00 2014 -0700"
      },
      "message": "Fix the sense of when mutexes are used for longs in atomic support.\n\nChange-Id: Ice50519a511e98fdc2fe74cd9eb77c32872022b4\n"
    },
    {
      "commit": "a984454098971739a1469d62cba02cda3600268b",
      "tree": "60b69e4b189bd3a3d0c374c7eccc760648aac295",
      "parents": [
        "96a4f29350bf279d48bff70e21e3264cce216683"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Mon Apr 21 17:01:02 2014 -0700"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Mon Apr 28 09:00:34 2014 -0700"
      },
      "message": "Avoid volatile 64-bit tearing on 32-bit architectures.\n\nChange b122a4bbed34ab22b4c1541ee25e5cf22f12a926 removed inline assembly for\nvolatile 64bit read/writes. This isn\u0027t sound in the general case, reinstate.\nMotivating change: https://android-review.googlesource.com/91250\nAdd optimizations for ARM in the case of LPAE support.\n\nChange-Id: Ie86d8885d27c8f0da75f0c3bd50d4553a331282f\n"
    },
    {
      "commit": "0b2b3dbaa3db62c0af0d2f23f6aa1c539afe7443",
      "tree": "6880465c7a36a2ed6f46b9321f9cf96512dcb9aa",
      "parents": [
        "f28072fdb6904ff6f715b1518a07e8efb897697f",
        "936b37f3a7f224d990a36b2ec66782a4462180d6"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Thu Feb 20 22:59:47 2014 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Thu Feb 20 22:59:47 2014 +0000"
      },
      "message": "Merge \"Upcall support for x86-64.\""
    },
    {
      "commit": "936b37f3a7f224d990a36b2ec66782a4462180d6",
      "tree": "94de34072e8ce0a2a251ed8d5ccc7d87709db750",
      "parents": [
        "fd80b5717c0cdd10ef2caabf4291415a52fcc874"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Fri Feb 14 00:52:24 2014 -0800"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Thu Feb 20 14:46:02 2014 -0800"
      },
      "message": "Upcall support for x86-64.\n\nSufficient to pass jni_internal_test.\n\nChange-Id: Ia0d9b8241ab8450e04765b9c32eb6dc8fc1a8733\n"
    },
    {
      "commit": "5817e899c5dd5e82949433d7bfcbe61f63b2a5ff",
      "tree": "f16197163aabfe925296370e6005cba263b5f26f",
      "parents": [
        "3188d117d6f1ba5f3a30d0ff231d816ebb59a7f7"
      ],
      "author": {
        "name": "Stuart Monteith",
        "email": "stuart.monteith@arm.com",
        "time": "Tue Feb 18 11:16:29 2014 +0000"
      },
      "committer": {
        "name": "Stuart Monteith",
        "email": "srdmarm@gmail.com",
        "time": "Thu Feb 20 11:19:31 2014 +0000"
      },
      "message": "Aarch64: Add aarch64 memory barriers.\n\nAarch64 memory barriers are essentially the same as on ARMv7.\n\nChange-Id: Id3e7ee5341833cae5062eec95dad888e1f60ae8d\nSigned-off-by: Stuart Monteith \u003cstuart.monteith@arm.com\u003e\n"
    },
    {
      "commit": "ef7d42fca18c16fbaf103822ad16f23246e2905d",
      "tree": "c67eea52a349c2ea7f2c3bdda8e73933c05531a8",
      "parents": [
        "822115a225185d2896607eb08d70ce5c7099adef"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Mon Jan 06 12:55:46 2014 -0800"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Thu Feb 06 23:20:27 2014 -0800"
      },
      "message": "Object model changes to support 64bit.\n\nModify mirror objects so that references between them use an ObjectReference\nvalue type rather than an Object* so that functionality to compress larger\nreferences can be captured in the ObjectRefererence implementation.\nObjectReferences are 32bit and all other aspects of object layout remain as\nthey are currently.\n\nExpand fields in objects holding pointers so they can hold 64bit pointers. Its\nexpected the size of these will come down by improving where we hold compiler\nmeta-data.\nStub out x86_64 architecture specific runtime implementation.\nModify OutputStream so that reads and writes are of unsigned quantities.\nMake the use of portable or quick code more explicit.\nTemplatize AtomicInteger to support more than just int32_t as a type.\nAdd missing, and fix issues relating to, missing annotalysis information on the\nmutator lock.\nRefactor and share implementations for array copy between System and uses\nelsewhere in the runtime.\nFix numerous 64bit build issues.\n\nChange-Id: I1a5694c251a42c9eff71084dfdd4b51fff716822\n"
    },
    {
      "commit": "b122a4bbed34ab22b4c1541ee25e5cf22f12a926",
      "tree": "624f16271f4481a8fd5aa2f607385f490dc7b3ae",
      "parents": [
        "e40687d053b89c495b6fbeb7a766b01c9c7e039c"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Tue Nov 19 18:00:50 2013 -0800"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Fri Dec 20 08:01:57 2013 -0800"
      },
      "message": "Tidy up memory barriers.\n\nChange-Id: I937ea93e6df1835ecfe2d4bb7d84c24fe7fc097b\n"
    },
    {
      "commit": "fc0e3219edc9a5bf81b166e82fd5db2796eb6a0d",
      "tree": "5fc7f5b941724a62f8e3411df09fae431ff5e3cf",
      "parents": [
        "56d947fbc9bc2992e2f93112fafb73e50d2aaa7a"
      ],
      "author": {
        "name": "Brian Carlstrom",
        "email": "bdc@google.com",
        "time": "Wed Jul 17 14:40:12 2013 -0700"
      },
      "committer": {
        "name": "Brian Carlstrom",
        "email": "bdc@google.com",
        "time": "Wed Jul 17 16:49:05 2013 -0700"
      },
      "message": "Fix multiple inclusion guards to match new pathnames\n\nChange-Id: Id7735be1d75bc315733b1773fba45c1deb8ace43\n"
    },
    {
      "commit": "7940e44f4517de5e2634a7e07d58d0fb26160513",
      "tree": "ac90242d96229a6942f6e24ab137bc1f8f2e0025",
      "parents": [
        "5cd9e3b122f276f610980cbaf0d2ad6ed4cd9088"
      ],
      "author": {
        "name": "Brian Carlstrom",
        "email": "bdc@google.com",
        "time": "Fri Jul 12 13:46:57 2013 -0700"
      },
      "committer": {
        "name": "Brian Carlstrom",
        "email": "bdc@google.com",
        "time": "Fri Jul 12 17:49:01 2013 -0700"
      },
      "message": "Create separate Android.mk for main build targets\n\nThe runtime, compiler, dex2oat, and oatdump now are in seperate trees\nto prevent dependency creep.  They can now be individually built\nwithout rebuilding the rest of the art projects. dalvikvm and jdwpspy\nwere already this way. Builds in the art directory should behave as\nbefore, building everything including tests.\n\nChange-Id: Ic6b1151e5ed0f823c3dd301afd2b13eb2d8feb81\n"
    },
    {
      "commit": "9adbff5b85fcae2b3e2443344415f6c17ea3ba0a",
      "tree": "e2893a0096a9c61f400d1f0bf0573eac75ae630d",
      "parents": [
        "cf07143e6b254a4087337d5f50bd7c1ee1b6a230"
      ],
      "author": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Wed Jan 23 18:19:03 2013 -0800"
      },
      "committer": {
        "name": "Ian Rogers",
        "email": "irogers@google.com",
        "time": "Wed Jan 23 18:41:54 2013 -0800"
      },
      "message": "Implement Intel QuasiAtomics.\n\nDon\u0027t use striped locks for 64bit atomics on x86.\nModify QuasiAtomic::Swap to be QuasiAtomic::Write that fits our current use of\nSwap and is closer to Intel\u0027s implementation.\nReturn that MIPS doesn\u0027t support 64bit compare-and-exchanges in AtomicLong.\nSet the SSE2 flag for host and target Intel ART builds as our codegen assumes\nit.\n\nChange-Id: Ic1cd5c3b06838e42c6f94e0dd91e77a2d0bb5868\n"
    },
    {
      "commit": "761600567d73b23324ae0251e871c15d6849ffd8",
      "tree": "4757cb01233394fa2e9c461a68fc37a35c12dabb",
      "parents": [
        "89c41e5f2fa10e7b97698b9714bd4883a73132f0"
      ],
      "author": {
        "name": "Elliott Hughes",
        "email": "enh@google.com",
        "time": "Wed Dec 12 16:31:20 2012 -0800"
      },
      "committer": {
        "name": "Elliott Hughes",
        "email": "enh@google.com",
        "time": "Wed Dec 12 16:31:20 2012 -0800"
      },
      "message": "Switch over to the google3 unix_file File*.\n\nI also moved macros.h to base/macros.h to ease google3 porting, at\nthe expense of a larger than necessary change. (I learned my lesson,\nthough, and didn\u0027t make the equivalent base/logging.h change.)\n\nI\u0027m not sure whether we want to keep the unix_file MappedFile given\nour existing MemMap, but it\u0027s easier to bring it over and then remove\nit (and possibly revert the removal) than to bring it over later.\n\nChange-Id: Id50a66faa5ab17b9bc936cc9043dbc26f791f0ca\n"
    },
    {
      "commit": "7c6169de901fd0a39c8e0c078874dc25207f5b59",
      "tree": "dd7adafc6bcdb734c26a495e4bd923081ef637e7",
      "parents": [
        "736df0253aa65ebccb29ddb6443c31b7730ca3e5"
      ],
      "author": {
        "name": "Elliott Hughes",
        "email": "enh@google.com",
        "time": "Wed May 02 16:11:48 2012 -0700"
      },
      "committer": {
        "name": "Elliott Hughes",
        "email": "enh@google.com",
        "time": "Wed May 02 16:11:48 2012 -0700"
      },
      "message": "Port my AOSP QuasiAtomic rewrite to art.\n\nChange-Id: I9e8fe487b15083cfc441a90ec1ec0eb5e645229e\n"
    },
    {
      "commit": "557e027f86d86f801e1b48055f8116f2d83d3d5c",
      "tree": "e63ea804f8dda2b9a32c7ed768edff9fac23ce60",
      "parents": [
        "6bf1915f20a11748d8d4b78ad020172bb2e6c946"
      ],
      "author": {
        "name": "Elliott Hughes",
        "email": "enh@google.com",
        "time": "Thu Sep 29 10:52:22 2011 -0700"
      },
      "committer": {
        "name": "Elliott Hughes",
        "email": "enh@google.com",
        "time": "Thu Sep 29 10:52:22 2011 -0700"
      },
      "message": "New atomics from dalvik.\n\nChange-Id: I00de43b180aaaf69f40f9bebddef641cffe949b7\n"
    },
    {
      "commit": "5ea047b386c5dac78eda62305d14dedf7b5611a8",
      "tree": "67f105b78df9d734a463b1194af11bf37ec6fe48",
      "parents": [
        "1d3f114124b140629a7d22fa5cfa20ab8fc96934"
      ],
      "author": {
        "name": "Elliott Hughes",
        "email": "enh@google.com",
        "time": "Tue Sep 13 14:38:18 2011 -0700"
      },
      "committer": {
        "name": "Elliott Hughes",
        "email": "enh@google.com",
        "time": "Tue Sep 13 14:38:18 2011 -0700"
      },
      "message": "Support 64-bit volatiles and reference/pointer volatiles.\n\nChange-Id: I62c0751747767c02d6c57afd0fce3db6c8b02510\n"
    }
  ]
}