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gerrit.witaqua.org / art / d3e9c62976780e830da79ae32be4192dee196db2 / compiler / optimizing
  1. d3e9c62 ARM: Allow FP args in core regs for @CriticalNative. by Vladimir Marko · 6 years ago
  2. d9af38a X86: VarHandle.Get() intrinsic for static primitive fields. by Andra Danciu · 6 years ago
  3. bf78fb5 ARM64: Fix VarHandle.Get() intrinsic static field check. by Vladimir Marko · 6 years ago
  4. 55cc586 ARM64: Fix VarHandle.Get() intrinsic for heap poisoning. by Vladimir Marko · 6 years ago
  5. 79db646 ARM64: VarHandle.Get() intrinsic for static primitive fields. by Vladimir Marko · 6 years ago
  6. e3e187f Check if VarHandle access mode is supported. by Andra Danciu · 6 years ago
  7. 5439f05 Revert^3 "VIXL simulator for ART (Stage1)" by Ulya Trafimovich · 6 years ago
  8. 2d45520 A few more inclusive language updates by Orion Hodson · 6 years ago
  9. 2446feb Dump ISA into .cfg by Evgeny Astigeevich · 6 years ago
  10. 2091019 Update invoke-type in HInvokePolymorphic by Orion Hodson · 6 years ago
  11. 3c359ee ARM64: Enable SDOT/UDOT instructions emission. by Artem Serov · 6 years ago
  12. 346fd96 More inclusive language in the runtime by David Srbecky · 6 years ago
  13. b931b8c Add clarification for HInvokePolymorphic constructor parameter by Andra Danciu · 6 years ago
  14. a0130e8 Prepare compiler for adding VarHandle support. by Andra Danciu · 6 years ago
  15. 2d53643 Update language to comply with Android’s inclusive language guidance by Ian Pedowitz · 6 years ago
  16. aacf977 Reword some comments to be more inclusive by Orion Hodson · 6 years ago
  17. 4ef451a Rename kDummy32BitOffset to kPlaceholder32BitOffset. by Vladimir Marko · 6 years ago
  18. 52d5354 Dump instruction set features in .cfg by Fabio Rinaldi · 6 years ago
  19. 4307cd7 LSE: Fix tracking heap values for small types. by Vladimir Marko · 6 years ago
  20. e886d68 Revert^2 "VIXL simulator for ART (Stage1)" by Ulyana Trafimovich · 6 years ago
  21. 3060bb9 Revert "VIXL simulator for ART (Stage1)" by Ulyana Trafimovich · 6 years ago
  22. 48ca6a6 VIXL simulator for ART (Stage1) by Xueliang Zhong · 7 years ago
  23. fab6f1c Fix incorrect LSE across throwing ArraySet. by Vladimir Marko · 6 years ago
  24. 2642cd4 Make Integer.divideUnsigned intrinsic for x86_64. by Andra Danciu · 6 years ago
  25. dc787f4 Make Integer.divideUnsigned intrinsic for x86. by Andra Danciu · 6 years ago
  26. f938841 ARM: Optimize Div/Rem by positive const for non-negative dividends by Evgeny Astigeevich · 6 years ago
  27. af92a0f ARM: Optimize Div/Rem by 2^n for non-negative dividends by Evgeny Astigeevich · 6 years ago
  28. 2d10117 ARM32: Combine LSR into ADD for Div by 2^n by Evgeny Astigeevich · 6 years ago
  29. dec7817 Optimizing: Introduce {Increase,Decrease}Frame(). by Vladimir Marko · 6 years ago
  30. 3d190c0 ART: Transform Sub+Sub into Sub+Add to merge Shl by Evgeny Astigeevich · 6 years ago
  31. 86c8752 Direct calls to @CriticalNative methods. by Vladimir Marko · 6 years ago
  32. 396198b Handle unresolved field type in compiler. by Nicolas Geoffray · 6 years ago
  33. 0d60a2b Introduce an enum for the compilation kind. by Nicolas Geoffray · 6 years ago
  34. 289bd1c Make GVN handle HDeoptimize better by Alex Light · 6 years ago
  35. 2b74f60 ART: Add recognition of optimized HRems in BCE by Evgeny Astigeevich · 6 years ago
  36. 6587d91 ART: Simplify HRem to reuse existing HDiv by Evgeny Astigeevich · 6 years ago
  37. 9974e3c Clean up generated operator<<(os, enum). by Vladimir Marko · 6 years ago
  38. 0771884 ART: Introduce predicated vector instructions. by Artem Serov · 6 years ago
  39. 9922f00 arm/arm64: Clean up intrinsic slow paths. by Vladimir Marko · 6 years ago
  40. 66704db x86/x86-64: Clean up intrinsic codegen for SSE4.1. by Vladimir Marko · 6 years ago
  41. ef89842 Run LSA as a part of the LSE pass. by Vladimir Marko · 6 years ago
  42. fc13652 Revert "Don't abort for min/max/abs intrinsics, baseline use them." by Vladimir Marko · 6 years ago
  43. 695348f Add compiler type to CompilerOptions. by Vladimir Marko · 6 years ago
  44. 8284e9a Add extra failed inlining reasons by Mathieu Chartier · 6 years ago
  45. 0ddb338 ARM64: Combine LSR+ADD into ADD_shift for Int32 HDiv/HRem by Evgeny Astigeevich · 6 years ago
  46. 1439e57 ART: Optimize ADD/SUB+ADD_shift into ADDS/SUBS+CINC for HDiv/HRem by Evgeny Astigeevich · 6 years ago
  47. 883c134 Revert^2 "Remove test_per_src from ART tests." by David Srbecky · 6 years ago
  48. f91fc12 Optimizing: Run gtests without creating the Runtime. by Vladimir Marko · 6 years ago
  49. 33c091e Code sinking can move around LoadString that can throw. by Nicolas Geoffray · 6 years ago
  50. 5d2311a Optimizing: Refactor ImprovedOptimizingUnitTest. by Vladimir Marko · 6 years ago
  51. 02ca05a Move HandleCache to HGraph. by Vladimir Marko · 6 years ago
  52. 5868ada Move implementations from class_root.h to -inl.h . by Vladimir Marko · 6 years ago
  53. 5a62af5 Optimizing: Create fewer handles in inliner. by Vladimir Marko · 6 years ago
  54. 85af16e Fix two bugs around aput-object. by Nicolas Geoffray · 6 years ago
  55. 968db3c ARM64: Combine LSR+ASR into ASR for Int32 HDiv/HRem by Evgeny Astigeevich · 6 years ago
  56. fc5e2ef Revert "Remove test_per_src from ART tests." by Christopher Ferris · 6 years ago
  57. 8103e47 Remove test_per_src from ART tests. by David Srbecky · 6 years ago
  58. a6653d3 ART: Refactor InstructionCodeGeneratorARM64::GenerateDivRemWithAnyConstant by Evgeny Astigeevich · 6 years ago
  59. 1a719e4 RFC: ARM64: Split arm64 codegen into scalar and vector (SVE and NEON). by Artem Serov · 7 years ago
  60. 0f5b2bf ART: Introduce Loop Versioning in SuberblockCloner. by Artem Serov · 7 years ago
  61. 5f84607 Optimizing: Construct intrinsic HIR in builder. by Vladimir Marko · 6 years ago
  62. c8150b5 ART: Refactor SIMD slots and regs size processing. by Artem Serov · 7 years ago
  63. b47b978 ART: Fix vectorizer HalvingAdd idiom. by Artem Serov · 7 years ago
  64. 2f40d24 Small cleanup in InstructionBuilder. by Vladimir Marko · 6 years ago
  65. 605c591 Add more DCHECKs to investigate build bot failure. by Nicolas Geoffray · 6 years ago
  66. fbf53b5 DCHECK to ensure processing instruction doesn't leave an exception. by Nicolas Geoffray · 6 years ago
  67. 4fa07a5 Add explicit compiler option to enable test-specific features. by David Srbecky · 6 years ago
  68. f368882 Add more debugging info around ResolveField. by Nicolas Geoffray · 6 years ago
  69. 41617b1 Add more logging and sanity checks for JIT mini-debug-info. by David Srbecky · 6 years ago
  70. 30fd851 Refactor RemoveNativeDebugInfoForJit. by David Srbecky · 6 years ago
  71. b1fe5e1 HStringBuilderAppend cannot be null. by Vladimir Marko · 6 years ago
  72. e521eb0 ART: Fix a compiler crash for VectorizeDef() idioms. by Artem Serov · 6 years ago
  73. 6a8e66c Remove JIT native debug info on failed commits. by David Srbecky · 6 years ago
  74. 1868de9 Refactor inliner by Eric Holk · 6 years ago
  75. 5b76889 Make `libart(d)-disassembler` a requirement of `libart(d)-compiler`. by Roland Levillain · 6 years ago
  76. 2925311 Prevent entering IMT conflict trampoline with j.l.Object methods. by Nicolas Geoffray · 6 years ago
  77. 67e4a4d ART: ARM64: Improve FP IsInfinity intrinsic. by Artem Serov · 6 years ago
  78. 54f4fbd Remove MIPS support from Optimizing. by Vladimir Marko · 6 years ago
  79. 002eac6 Only flush visualizer output at the end of the compilation. by Nicolas Geoffray · 6 years ago
  80. d71f1dc Enable support of VecLoad/VecStore in LSE by xueliang.zhong · 8 years ago
  81. c1cd133 Fix braino in arm64 codegen. by Nicolas Geoffray · 6 years ago
  82. 6a67bea Update InstructionBuilder's IsInBootImage for boot image extension. by Vladimir Marko · 6 years ago
  83. a18f5ae Fix StringBuilder append assumptions. by Vladimir Marko · 6 years ago
  84. 7ee34a1 Add OptimizingUnitTestHelper::GraphChecker methods by Evgeny Astigeevich · 6 years ago
  85. 796aa2c [baseline] Check that the profiling info is not null. by Nicolas Geoffray · 6 years ago
  86. 57cacb7 Refactor OSR related code to prepare for "true" OSR. by Nicolas Geoffray · 6 years ago
  87. 52506e2 Add ImprovedOptimizingUnitTest::CreateParameters for subclasses by Evgeny Astigeevich · 7 years ago
  88. 43f2f75 Revert^4 "Implement Dot Product Vectorization for x86" by Alex Light · 7 years ago
  89. 9b5271e Get the baseline information from the graph. by Nicolas Geoffray · 7 years ago
  90. 4f2e088 ARM64: Move from FPRegister to VRegister based API (continued (2)). by Roland Levillain · 7 years ago
  91. a59af8a JIT baseline: trigger optimized compilation on hotness threshold. by Nicolas Geoffray · 7 years ago
  92. 20036d8 JIT baseline: don't update inline caches for intrinsics. by Nicolas Geoffray · 7 years ago
  93. 457e9fa ARM64: FP16 greater/less/greaterEquals/lessEquals intrinsics for ARMv8 by Usama Arif · 7 years ago
  94. 17a39ba JIT baseline: Don't update the inline cache for an intrinsic. by Nicolas Geoffray · 7 years ago
  95. e2a3aa9 Baseline JIT: update inline caches in compiled code. by Nicolas Geoffray · 7 years ago
  96. 8e89500 Revert "Revert^2 "Implement Dot Product Vectorization for x86"" by Nicolas Geoffray · 7 years ago
  97. 7c9cfe8 Honor the --baseline flag for the JIT. by Nicolas Geoffray · 7 years ago
  98. aedc9bc Ensure we can always enter OSR code by Vladimir Marko · 7 years ago
  99. 142816a ARM64: Pass simd half floating point feature to VIXL macroassembler. by Usama Arif · 7 years ago
  100. 26f6330 Partial loop unrolling during auto-vectorization for x86_64 architectures. by Neeraj Solanki · 7 years ago