)]}' { "log": [ { "commit": "d49012909625c3bf87bf51138fe79315ce1b1bdc", "tree": "349ef2cdcb7255d042244046601bd0fd5eb3a092", "parents": [ "726e1793d3f54470705e5b84e7860074e029b0ed" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue May 30 18:41:34 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue May 30 20:44:33 2017 -0700" }, "message": "ART: Clean up heap headers\n\nUse more forward declarations for accounting structures and spaces.\nFactor out structs to reduce header surface. Remove heap include where\nunnecessary. Fix up transitive users. Move some debug-only code out\nof line.\n\nTest: m test-art-host\nChange-Id: I16db4aaa803f39e155ce6e1b0778b7e393dcbb17\n" }, { "commit": "deae7db5864fa50c5a1cd6c232a17aeb986b36e1", "tree": "cdedad3d0f921e4f82fa7b65d55820455b7ac0ea", "parents": [ "8d01c3708c4becb186979ed9377aed0fc2954d06" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue May 30 09:56:41 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue May 30 14:15:50 2017 -0700" }, "message": "ART: Add missing namespace comments\n\nAdd closing namespace comments.\n\nBug: 32619234\nTest: m\nChange-Id: I1f50e09dcd1038c4b540b87e5c19e319c1f592e4\n" }, { "commit": "6079dca3058e58bb9e12a60a10324a5218a99274", "tree": "19e3a8ccf7a8ac831c27658e0470c4f83debef74", "parents": [ "0a5ace58e973da278049f837bf2cdbaf7b44849c" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sun May 28 19:10:28 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sun May 28 20:17:39 2017 -0700" }, "message": "MIPS32R2: Fix MethodLoadKind::kBootImageLinkTimePcRelative\n\nThis makes MIPS32 boot again.\n\nThe issue was introduced in commit\n6597946d29be9108e2cc51223553d3db9290a3d9:\nStatic invokes in slow paths would sometimes get\nHMipsComputeBaseMethodAddress from the stack into the\nsame register where the art method pointer would later\nbe loaded (A0) with the former being overwritten in the\nprocess of loading the latter.\n\nTest: booted MIPS32R2 in QEMU\n\nChange-Id: Ib584cf66795574175650f42b191c797fb3b3965f\n" }, { "commit": "dbddc22f5dc2d1ff4d4783fbd66c27812f4980d1", "tree": "2a0a8efa1c2630e57ab48ab2de171f2847ff282f", "parents": [ "a559fa1b0d6c276dde2cdc707de1acd4950f7190" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Wed May 24 12:04:13 2017 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Thu May 25 16:59:44 2017 -0700" }, "message": "Refactor profiles to use TypeReference instead of ClassReference\n\nRefactor type reference into runtime and use it for profiles.\nClassReference was just duplicated code since it wasn\u0027t even using\nthe class def indexes.\n\nTest: test-art-host\n\nBug: 62040831\nChange-Id: Ia92f21c0e85c00321f52c97bb7a90158d882849b\n" }, { "commit": "a559fa1b0d6c276dde2cdc707de1acd4950f7190", "tree": "8314a003ff09cee50acd15929c1edbb8a448eef8", "parents": [ "673253e1628ca9483ea121571bb9a96f90a1c944", "e6f87cc95e5351f3872a4c50e18915a282578ff8" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu May 25 23:57:29 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 25 23:57:32 2017 +0000" }, "message": "Merge \"Fix compiler crash due to inline caches and improve docs\"" }, { "commit": "e6f87cc95e5351f3872a4c50e18915a282578ff8", "tree": "94af0c8fb8c8926f2bf3fe20d8c3ad6d7dcc4efb", "parents": [ "798ba16bda747d74a27b7a748d3bb5deb2ccbf68" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed May 24 17:41:05 2017 -0700" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu May 25 15:09:31 2017 -0700" }, "message": "Fix compiler crash due to inline caches and improve docs\n\nFix a potential crash when extracting the inline caches from the method.\nThe way we copied the inline cache into a new map was not correct. In\nProfileCompilationInfo::GetMethod() we reused the same profile arena\nfor allocation which is not thread safe. When compiling with multiple\nthreads the profile arena could become corrupted due to races.\n\nAddress all the comments from the late reviews on the CL which migrates\nthe profiles to arena storage.\n\nTest: m test-art-host\n compile with speed-profile apps on device\nBug: 37711886\nBug: 62062532\nChange-Id: I61af5175bc68b2c7dba77afb3cdff221989cc387\n" }, { "commit": "6dd5019cccf7016e5b1d86defb2807759c2a6e46", "tree": "20ee76d34e8154c9f374b749c23f57bc2ecbdc48", "parents": [ "8bdf4e0d2094b7c9a9a1ffc1a58dbdff4cbe7126", "af44e6c5ca0169bc19c6263288a7d889b37db549" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu May 25 18:09:22 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 25 18:09:24 2017 +0000" }, "message": "Merge \"Do not deopt when using AOT inline caches\"" }, { "commit": "af44e6c5ca0169bc19c6263288a7d889b37db549", "tree": "acdb4dab1e1ef19bfa941abae3305210d9421531", "parents": [ "a39fd980000d10ee0b3a49555cc8bcbbfacde943" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue May 23 14:24:55 2017 -0700" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed May 24 16:06:04 2017 -0700" }, "message": "Do not deopt when using AOT inline caches\n\nGenerating a deopt does not ensure that we will actually capture the new\ntypes; and the danger is that we could be stuck in a loop with \"forever\"\ndeoptimizations. For example, if the method never becomes hot again, the\ninline cache will not be updated and the AOT code will keep\ndeoptimizing.\n\nThis is a compromise because we will most likely never update the inline\ncache (unless there\u0027s another reason to deopt). So we might be stuck\nwith a sub-optimal inline cache. As a TODO, we could be smarter when\ncapturing inline caches to mitigate this. (e.g. by having different\nthresholds for new and old methods).\n\nDelete test 644 which was testing a regression involving deopts which is\nno longer applicable.\n\nBug: 38412648\nTest: m test-art-host\nChange-Id: Ib84559e84f07ec976feeb3a3120fa486d5bee3bf\n" }, { "commit": "ce38efef23c7a328efb105152bec41ee6ffa02ee", "tree": "67047bdec34c38261b09f506bdce4760d788c6c9", "parents": [ "0abc6bbde21e7b9d9104e8698946814649e51261", "fd522533bf8cea5a8334f233922c39536b1a3d29" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed May 24 16:59:43 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed May 24 16:59:46 2017 +0000" }, "message": "Merge \"ARM: Specify if some branches go to far targets\"" }, { "commit": "0abc6bbde21e7b9d9104e8698946814649e51261", "tree": "7434ce7aea5781576d143f12a8f092f5fbf1f19a", "parents": [ "ec89dfa25ae9e718730d775022aef505f7363d3a", "304c8a5dfe92d5677e9561270b19313d3e450c59" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed May 24 15:56:36 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed May 24 15:56:37 2017 +0000" }, "message": "Merge \"Support for narrow operands in \"dangerous\" operations.\"" }, { "commit": "304c8a5dfe92d5677e9561270b19313d3e450c59", "tree": "a5345d8d3467dde5f509dcc5dd0b3b170b021e60", "parents": [ "14538fb50832ac20445af5a92003bc250f486c22" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue May 23 11:01:13 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed May 24 15:56:14 2017 +0000" }, "message": "Support for narrow operands in \"dangerous\" operations.\n\nThis is a revert^2 of commit 636e870d55c1739e2318c2180fac349683dbfa97.\n\nRationale:\nUnder strict conditions, even operations that are sensitive\nto higher order bits can vectorize by inspecting the operands\ncarefully. This enables more vectorization, as demonstrated\nby the removal of quite a few TODOs.\n\nTest: test-art-target, test-art-host\nChange-Id: Ic2684f771d2e36df10432286198533284acaf472\n" }, { "commit": "19d7d50c0ae23f2041b1aee4aa8a5b789e3d2020", "tree": "c3483c46f7c967d21dcc1ace5d0af874f82e0288", "parents": [ "a4bf3c33e501758fa8e707ef30f9ee67ea20511e" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 24 13:04:14 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 24 13:19:23 2017 +0100" }, "message": "ARM64: Fix IsAdrpPatch().\n\nkMethodRelative patch can be an ADRP patch. Note that this\nminor bug had no real consequences as the patch would later\nbe filtered out in NeedsErratum843419Thunk() because we\ngenerate the instruction sequence ADRP+ADD in this case.\n\nAlso change the output for kDirectAddress from \"Direct\" to\n\"DirectAddress\". This kind is currently unused in checker\ntests.\n\nTest: Rely on TreeHugger.\nBug: 30627598\nChange-Id: I4e7c033aa010bbff53a554bfadd2ba0f03f69528\n" }, { "commit": "fd522533bf8cea5a8334f233922c39536b1a3d29", "tree": "8394d517d43c6b0a78b053ac7fe9f7bc61f387fa", "parents": [ "a4bf3c33e501758fa8e707ef30f9ee67ea20511e" ], "author": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Wed May 10 12:46:57 2017 +0100" }, "committer": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Wed May 24 11:35:08 2017 +0100" }, "message": "ARM: Specify if some branches go to far targets\n\nAlso avoids some branches to branches.\n\nTest: m test-art-target\nChange-Id: I839bcaa6ba5fba7aaa8474bee5532366ac0cc4ac\n" }, { "commit": "3b101e4bf11c5fa2d0f3d57d2fadccdc1dcdff93", "tree": "4620b702ae7728245071f557bfe8f284d7be6150", "parents": [ "81cbb240f86487e23409324a288f2155231e48f9", "f20729914d87ab30e6c96420720d8718affd587f" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed May 24 00:14:37 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed May 24 00:14:37 2017 +0000" }, "message": "Merge \"optimizing: Fix a potential nullptr dereference\"" }, { "commit": "f20729914d87ab30e6c96420720d8718affd587f", "tree": "d86efb150d9493c97cee50c2c2e9137ec7e4b309", "parents": [ "14538fb50832ac20445af5a92003bc250f486c22" ], "author": { "name": "George Burgess IV", "email": "gbiv@google.com", "time": "Tue May 23 15:36:41 2017 -0700" }, "committer": { "name": "George Burgess IV", "email": "gbiv@google.com", "time": "Tue May 23 15:42:07 2017 -0700" }, "message": "optimizing: Fix a potential nullptr dereference\n\nOperator precedence in C++ means the DCHECK was parsed as\nDCHECK((allocation !\u003d nullptr \u0026\u0026 allocation-\u003eIsNewInstance()) ||\n allocation-\u003eIsNewArray())\n\nCaught by the static analyzer:\nart/compiler/optimizing/instruction_builder.cc:1004:14: warning: Called\nC++ object pointer is null [clang-analyzer-core.CallAndMessage]\n\nBug: None\nTest: Reran the static analyzer. No more nullptr complaints. m builds\nthe file fine, as well.\nChange-Id: Iad94719fc013f1883746128e066452994740f171\n" }, { "commit": "81cbb240f86487e23409324a288f2155231e48f9", "tree": "2eb76fd357e42a4832e3abaf13b12987bf235bab", "parents": [ "14538fb50832ac20445af5a92003bc250f486c22", "cc3171ab3af35b4e4ad5671d7425aa8a6bfcc5f3" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue May 23 21:25:19 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue May 23 21:25:21 2017 +0000" }, "message": "Merge \"Use arena allocation for profiles\"" }, { "commit": "a17d6792358ffae7323e9f4e54e1b16eda5d6e0b", "tree": "fb404b64c184e6ddad4eea9135e0f9b43af39824", "parents": [ "4199aa0208309006cf8f37eea2c735c9364d409e", "6597946d29be9108e2cc51223553d3db9290a3d9" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue May 23 10:19:48 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue May 23 10:19:50 2017 +0000" }, "message": "Merge \"Use PC-relative pointer to boot image methods.\"" }, { "commit": "4199aa0208309006cf8f37eea2c735c9364d409e", "tree": "50a7721a18e9e2ac4fa793e01a13a6ec635295d7", "parents": [ "1f68cb5ad8b4b41bd61d0cdd1641cacde0fc87cf", "c239a2bb9474a1266c4882638fdb19056370e16d" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue May 23 08:37:39 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue May 23 08:37:41 2017 +0000" }, "message": "Merge \"Create load store analysis pass\"" }, { "commit": "1f68cb5ad8b4b41bd61d0cdd1641cacde0fc87cf", "tree": "9afe38869cac713b36b0b31aa6a1ecbf0895c872", "parents": [ "889ab40f1f2377d7291ddf9527ad9327b6b9def3", "9231690d586ecf45d5d9481bc5df5a5ad2628c89" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue May 23 08:06:29 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue May 23 08:06:30 2017 +0000" }, "message": "Merge \"Revert \"Support for narrow operands in \"dangerous\" operations.\"\"" }, { "commit": "9231690d586ecf45d5d9481bc5df5a5ad2628c89", "tree": "d48bf8b22461f6488821be6117ff2da4cc176093", "parents": [ "636e870d55c1739e2318c2180fac349683dbfa97" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue May 23 08:06:07 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue May 23 08:06:07 2017 +0000" }, "message": "Revert \"Support for narrow operands in \"dangerous\" operations.\"\n\nFails on armv8 / speed-profile\n\nThis reverts commit 636e870d55c1739e2318c2180fac349683dbfa97.\n\nChange-Id: Ib2a09b3adeba994c6b095672a1e08b32d3871872\n" }, { "commit": "cc3171ab3af35b4e4ad5671d7425aa8a6bfcc5f3", "tree": "ec2c8c37b4d4cb1c213aafd2e5ab41fb115fb241", "parents": [ "80dd30abe3fac52f6de4aec0543918d360f7d08a" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri May 19 16:47:53 2017 -0700" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Mon May 22 19:00:04 2017 -0700" }, "message": "Use arena allocation for profiles\n\nBy using our arena allocator we can madvise the memory used during\nprofile processing right way. jemalloc may defer the release based on\nunpredictable native allocation.\n\nThe other advantage of arenas is a much simpler way to measure the\nmemory needed by profiles.\n\nTest: m test-art-host\nTest: manual inspection with meminfo and heaptrack\nBug: 37711886\n\nChange-Id: Ib656a8ac63600477ff553831087a83dc40d9c537\n" }, { "commit": "2cd620bde125e8cc8653f482f44f81036d3a2846", "tree": "04831f0437cf8963564f7ad7077782b60979ba1b", "parents": [ "f14bb6c840ece68c64bebf5d0b7e0abb8c039e13", "636e870d55c1739e2318c2180fac349683dbfa97" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon May 22 17:52:31 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon May 22 17:52:33 2017 +0000" }, "message": "Merge \"Support for narrow operands in \"dangerous\" operations.\"" }, { "commit": "6597946d29be9108e2cc51223553d3db9290a3d9", "tree": "cea6647a45cc59fa1423751179e647124f269990", "parents": [ "a654e0378a8d0bb149362399917e4da2959e6991" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri May 19 17:25:12 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon May 22 18:35:05 2017 +0100" }, "message": "Use PC-relative pointer to boot image methods.\n\nIn preparation for adding ArtMethod entries to the .bss\nsection, add direct PC-relative pointers to methods so that\nthe number of needed .bss entries for boot image is small.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: testrunner.py --target on Nexus 6P\nTest: Nexus 6P boots.\nTest: Build aosp_mips64-userdebug\nBug: 30627598\nChange-Id: Ia89f5f9975b741ddac2816e1570077ba4b4c020f\n" }, { "commit": "5601d4e18594885260cbf3270273e5e35b3b0e8c", "tree": "3a6d29895d907bc279ba6a3a3c21a2ed5c679a32", "parents": [ "95c7d5b995a975723113a2ef38befb86e4bfbf45" ], "author": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Thu May 11 19:33:50 2017 +0100" }, "committer": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Mon May 22 10:19:14 2017 +0000" }, "message": "Revert \"Revert \"ARM: Improve the code generated for HCondition with a constant input\"\"\n\nThis reverts commit 3082661d260449e1d773f077e914160c7ad58de5, and\nfixes the handling of HCondition with boolean inputs.\n\nTest: m test-art-target-run-test-409-materialized-condition\nTest: art/tools/run-libcore-tests.sh\nChange-Id: Ib21e3a81ba41ce20c06e9a9e454c4322af1513ae\n" }, { "commit": "c239a2bb9474a1266c4882638fdb19056370e16d", "tree": "57fc8b0ba198cc6a6db65cbf48a600c38d269890", "parents": [ "80dd30abe3fac52f6de4aec0543918d360f7d08a" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Thu Apr 27 15:31:37 2017 +0100" }, "committer": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Fri May 19 17:17:06 2017 +0100" }, "message": "Create load store analysis pass\n\nThis CL separates load store analysis from LSE pass.\n\nThe load and store analysis in LSE pass records information\nabout heap memory accesses for arrays and fields.\nSuch information can also be used in the other optimizations like\ninstruction scheduling pass which can eliminate side-effect\ndependencies between memory accesses to different locations.\n\nTest: m test-art-host\nTest: m test-art-target\nTest: m test-art-host-gtest-load_store_analysis_test\nTest: 530-checker-lse\n\nChange-Id: I353a2b9a03b19bfa0e7ef07716d60bd4254c7ea7\n" }, { "commit": "636e870d55c1739e2318c2180fac349683dbfa97", "tree": "6c726b0b918e26aba5b5f9ec1bc900045ef2c3e3", "parents": [ "de31d084f7d64c94911aef927798559d39759f95" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu May 18 14:45:27 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu May 18 17:18:24 2017 -0700" }, "message": "Support for narrow operands in \"dangerous\" operations.\n\nRationale:\nUnder strict conditions, even operations that are sensitive\nto higher order bits can vectorize by inspecting the operands\ncarefully. This enables more vectorization, as demonstrated\nby the removal of quite a few TODOs.\n\nTest: test-art-target, test-art-host\nChange-Id: I2b0fda6a182da9aed9ce1708a53eaf0b7e1c9146\n" }, { "commit": "17481b5244e0cb23a5d3762cf035a2399600f715", "tree": "2577108fdd4168d7b972b47eadff0edfef94de19", "parents": [ "015a070503c297e0327bdaee0235c7bcb6687be0", "5f80500bba3df590f0bfffea2ebe2adee7c40763" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu May 18 18:39:16 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 18 18:39:19 2017 +0000" }, "message": "Merge \"Made idiom recognition more robust.\"" }, { "commit": "5f80500bba3df590f0bfffea2ebe2adee7c40763", "tree": "ed18a25cc6dd29acea8641069295d81c3390d88d", "parents": [ "536e54a6af85127d7f17037360deb08e0a7dc4eb" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue May 16 16:42:41 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu May 18 09:30:36 2017 -0700" }, "message": "Made idiom recognition more robust.\n\nRationale:\nRecognition is now more robust with respect to\noperation order or even cancelling constants.\n\nTest: test-art-target, test-art-host\nChange-Id: I4e920150e20e1453bb081e3f0ddcda8f1c605672\n" }, { "commit": "662ee25b95a908ab063d4a8ae136ab695ea22229", "tree": "1b8e89a0c1ac009490dd2e8c3a6c73ae30e4bf3e", "parents": [ "c1c3351492674f2e264f41d93ffc80b633726689", "79d8fa7c52c1810d4618c9bd1d43994be5abb53d" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu May 18 16:03:44 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 18 16:03:47 2017 +0000" }, "message": "Merge \"optimizing: Build HConstructorFence for HNewArray/HNewInstance nodes\"" }, { "commit": "79d8fa7c52c1810d4618c9bd1d43994be5abb53d", "tree": "411a76dec2adf4139328d5e607b498b72c9aa2af", "parents": [ "acac09dad3d5aa3922e6cdf54ff2e4fa6f176484" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Tue Apr 18 09:37:23 2017 -0700" }, "committer": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Thu May 18 14:14:13 2017 +0000" }, "message": "optimizing: Build HConstructorFence for HNewArray/HNewInstance nodes\n\nAlso fixes:\n* LSE, code_sinking to keep optimizing new-instance if it did so before\n* Various tests to expect constructor fences after new-instance\n\nSidenote: new-instance String does not get a ConstructorFence; the\nspecial StringFactory calls are assumed to be self-fencing.\n\nMetric changes on go/lem:\n* CodeSize -0.262% in ART-Compile (ARMv8)\n* RunTime -0.747% for all (linux-armv8)\n\n(No changes expected to x86, constructor fences are no-op).\n\nThe RunTime regression is temporary until art_quick_alloc_* entrypoints have their\nDMBs removed in a follow up CL.\n\nTest: art/test.py\nBug: 36656456\nChange-Id: I6a936a6e51c623e1c6b5b22eee5c3c72bebbed35\n" }, { "commit": "c1ff6bf32443ef79b0db30b10a08efbfa92420c4", "tree": "99cc8c5087526008da5fe137ebc388a332c7484b", "parents": [ "aad63d06328e745a7f13e812bf41676274aa8f49", "00916b9eb0d83f333a00d7c8b839a62aed967857" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 17 18:47:16 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed May 17 18:47:18 2017 +0000" }, "message": "Merge \"X86: Fix LoadString/Class for non-PIC boot image.\"" }, { "commit": "00916b9eb0d83f333a00d7c8b839a62aed967857", "tree": "2fe301ea898918e550f971fc2f164cf4ab3768a5", "parents": [ "2fad527ddf2b8d85df82468932ed724407f46be8" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 17 17:45:45 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 17 18:06:02 2017 +0100" }, "message": "X86: Fix LoadString/Class for non-PIC boot image.\n\nDo not check for PIC/non-PIC mode when recording patches.\nThis was erroneously missed in\n https://android-review.googlesource.com/397193\nand broke 916-obsolete-jit for no-image as it actually\ntries to compile the boot image in non-PIC mode.\n\nTest: testrunner.py --host --no-image -t 916-obsolete-jit\nBug: 33192586\nChange-Id: I068fbaa576635ea4f7d49521df55c98ba99dd34e\n" }, { "commit": "47aa869c1600b349de716f6990de0f431ce558a9", "tree": "2ca9a3b1919caef73f9ed810048adab331307858", "parents": [ "e74e120dbd3243ae6f43db6fd91ec201f96ef5ea", "365719c23d809e595cf320bfba40e76bb4e87940" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed May 17 14:02:58 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed May 17 14:02:59 2017 +0000" }, "message": "Merge \"No need to lock when calling Thread.interrupted.\"" }, { "commit": "d1c22768e77d2c9c06d7dfa36bde24bf5b6ac8a0", "tree": "d5f7c10205caa55ba75da223f6f7d012a8787130", "parents": [ "8e0a5dee37e848ae9bc7ff11c8a0eb66048a5e9e", "764d454d1d51448deb81f6e8d2d7d317c7f4d1b4" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 17 09:16:30 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed May 17 09:16:31 2017 +0000" }, "message": "Merge \"Remove LoadString/Class kind kBootImageLinkTimeAddress.\"" }, { "commit": "a1633a7077781d9c64a77b27deb1707d1a56906d", "tree": "505f2560cfd247b2e1aab86d3ab96e5c399cb05d", "parents": [ "a774575ae3af3d46955f941ddd08a79caf2aaa94", "c8e93c736c149ce41be073dd24324fb08afb9ae4" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue May 16 15:56:01 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue May 16 15:56:04 2017 +0000" }, "message": "Merge \"Min/max SIMDization support.\"" }, { "commit": "764d454d1d51448deb81f6e8d2d7d317c7f4d1b4", "tree": "029f9e65cfe7e953df55b7af45e099924ffdbbac", "parents": [ "7974468d32b817be1d49dfcf513605f646c481bc" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 16 10:31:41 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 16 15:08:55 2017 +0100" }, "message": "Remove LoadString/Class kind kBootImageLinkTimeAddress.\n\nWe no longer support non-PIC boot image compilation.\n\nAlso clean up some obsolete code for method patches\nand make JIT correctly report itself as non-PIC.\n\nTest: testrunner.py --host\nTest: testrunner.py --target\nBug: 33192586\nChange-Id: I593289c5c1b0e88b82b86a933038be97bbb15ad2\n" }, { "commit": "365719c23d809e595cf320bfba40e76bb4e87940", "tree": "0939f0d8dc47723978a665fa11dd637f6976d521", "parents": [ "d6705a0586377f1b0d7d14d3abe2b270bb0adb18" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Mar 08 13:11:50 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue May 16 01:58:03 2017 +0100" }, "message": "No need to lock when calling Thread.interrupted.\n\nAlso intrinsify the Thread.interrupted call.\n\nThe rationale behind this optimization is that the flag can only\nhave two values, and only self can set it to false.\n\nTest: libcore, jdwp, run-tests, 050-sync-test\nChange-Id: I5c2b43bf872ba0bfafcb54b2cfcd19181864bc4c\n" }, { "commit": "c8e93c736c149ce41be073dd24324fb08afb9ae4", "tree": "8e7154cf1bbcee8f5837ee9cb930174e2516ac03", "parents": [ "92f4672f811a4eccdc596f7c2235804abd196fde" ], "author": { "name": "Aart Bik", "email": "ajcbik@ajcbik2.mtv.corp.google.com", "time": "Wed May 10 10:49:22 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon May 15 11:44:58 2017 -0700" }, "message": "Min/max SIMDization support.\n\nRationale:\nThe more vectorized, the better!\n\nTest: test-art-target, test-art-host\n\nChange-Id: I758becca5beaa5b97fab2ab70f2e00cb53458703\n" }, { "commit": "f4e23a8a671e27065bf1cbef7e41403de166f321", "tree": "d25d31f7c1c53f4baf746baafa76b891596c5d49", "parents": [ "d6705a0586377f1b0d7d14d3abe2b270bb0adb18" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Tue May 09 15:43:45 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Fri May 12 15:08:27 2017 +0200" }, "message": "MIPS: Drop unnecessary code for R6 (NAN2008)\n\nThe latest MIPS64R6 emulator supports NAN2008 standard (it correctly\nsets FCSR.NAN2008 to 1 as it is required from R6). Because of that,\nmany workarounds can be removed.\n\nThis simplifies code generator and intrinsics.\n\nTest: ./testrunner.py --target --optimizing in QEMU for MIPS64R6\nTest: ./testrunner.py --target --optimizing in QEMU for MIPS32R6\nTest: ./testrunner.py --target --optimizing in QEMU for MIPS32R2\n\nChange-Id: Ib5335835b61f55690ff574bca580ea8f809657bb\n" }, { "commit": "63529dd46f4a38f9c35c549399480c725beee884", "tree": "6d67e0788607f788910a503b10000d990463ce47", "parents": [ "f4afd9f34035a67f4f845fc8c273589da7a09adc", "d8b6a53074be7d6b98c651ed8d2127f089da39a6" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu May 11 16:15:45 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 11 16:15:47 2017 +0000" }, "message": "Merge \"MIPS64: Saves 128-bit vector registers along SuspendCheckSlowPath\"" }, { "commit": "de6fc4a429b69f074dc6d28b52197b425aacd78c", "tree": "879e5eacda2af3bad1aa9dc81ea08922c6c26cc8", "parents": [ "99a77162e9dc351da14bb7819a2718395d7277ed", "e1811ed6b57a54dc8ebd327e4bd2c4422092a3a0" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu May 11 11:59:40 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 11 11:59:42 2017 +0000" }, "message": "Merge \"ARM64: Share address computation across SIMD LDRs/STRs.\"" }, { "commit": "7d157fcaaae137cc98dbfb872aa1bdc0105a898f", "tree": "2b7d8affda23908e5bfbfaad446079db2ef1ee09", "parents": [ "58d7ddc678e5bcd2364c24c4bdc8a3cfbcfc5358" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 10 16:29:23 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 11 11:14:54 2017 +0100" }, "message": "Clean up some uses of \"auto\".\n\nMake actual types more explicit, either by replacing \"auto\"\nwith actual type or by assigning std::pair\u003c\u003e elements of\nan \"auto\" variable to typed variables. Avoid binding const\nreferences to temporaries. Avoid copying a container.\n\nTest: m test-art-host-gtest\nChange-Id: I1a59f9ba1ee15950cacfc5853bd010c1726de603\n" }, { "commit": "58d7ddc678e5bcd2364c24c4bdc8a3cfbcfc5358", "tree": "60dfbcf84b234f25514007bb80beed946b4fbe8a", "parents": [ "a76e0caa541b4e5bd849c42bb8009330c0a49c4f", "f7caf682c6b4769b2a3dd2f2241532b98709c1a3" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu May 11 09:56:44 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 11 09:56:45 2017 +0000" }, "message": "Merge \"Instruction scheduling for ARM.\"" }, { "commit": "e1811ed6b57a54dc8ebd327e4bd2c4422092a3a0", "tree": "e3ce48e66190c11a8b5342f4ec0d1046ba28d788", "parents": [ "7113885fcd983b33ee1e350865d21517d6297843" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Thu Apr 27 16:50:47 2017 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Thu May 11 10:06:04 2017 +0100" }, "message": "ARM64: Share address computation across SIMD LDRs/STRs.\n\nFor array accesses the element address has the following structure:\nAddress \u003d CONST_OFFSET + base_addr + index \u003c\u003c ELEM_SHIFT\n\nTaking into account ARM64 LDR/STR addressing modes address part\n(CONST_OFFSET + index \u003c\u003c ELEM_SHIFT) can be shared across array\naccess with the same data type and index.\n\nFor example, for the following loop 5 accesses can share address\ncomputation:\n\nvoid foo(int[] a, int[] b, int[] c) {\n for (i...) {\n a[i] \u003d a[i] + 5;\n b[i] \u003d b[i] + c[i];\n }\n}\n\nTest: test-art-host, test-art-target\n\nChange-Id: I46af3b4e4a55004336672cdba3296b7622d815ca\n" }, { "commit": "92f4672f811a4eccdc596f7c2235804abd196fde", "tree": "03449148ef022c9c3afc50bc960f2851e0098f97", "parents": [ "5528d1c7cf686d2edea51ff12881e495c2124f09", "952b23505e2512c9327e6d20c8304493bf8fcf7c" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed May 10 17:24:56 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed May 10 17:24:58 2017 +0000" }, "message": "Merge \"Improve the documentation of an ARM64 parallel move resolver corner case.\"" }, { "commit": "270970e660d3c99e62a88b18144d159dd8699c55", "tree": "910248487abab475a9109925a9089fedd08b45c1", "parents": [ "201c81947f23b3f43c2ff78d9c1078dd53157fe5", "88abba2b0cb0151d89e16da3e64025878dc2f142" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed May 10 14:04:18 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed May 10 14:04:19 2017 +0000" }, "message": "Merge \"ARM/AOT: Allow 16-bit LDR for Baker read barrier loads.\"" }, { "commit": "c8a5b6c38a4e934a7953b07cc12046b01c32ae5d", "tree": "f1f5e3f57298a3f05d41e1a7f6847d73bac8e851", "parents": [ "ddc38fe3e5618e3922ecc445193dacb2f39ef736", "3082661d260449e1d773f077e914160c7ad58de5" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed May 10 11:59:42 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed May 10 11:59:45 2017 +0000" }, "message": "Merge \"Revert \"ARM: Improve the code generated for HCondition with a constant input\"\"" }, { "commit": "3082661d260449e1d773f077e914160c7ad58de5", "tree": "4407aec4c23d0fa52b9a3334529042797da2d24f", "parents": [ "b404f349d69f940ef2974915fe97c16070364efd" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed May 10 11:59:26 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed May 10 11:59:26 2017 +0000" }, "message": "Revert \"ARM: Improve the code generated for HCondition with a constant input\"\n\nReverting to see if that change is responsible for a crash. Will share with ARM if it is.\n\nThis reverts commit b404f349d69f940ef2974915fe97c16070364efd.\n\nChange-Id: Idd04f9109447319445ff49f3fd7dc5b069b4883f\n" }, { "commit": "ddc38fe3e5618e3922ecc445193dacb2f39ef736", "tree": "090cf77abda6a5755371673966ceea83f858048c", "parents": [ "45f9865cc974d344c9a859508c8ec8ce101f4c52", "4e92c3ce7ef354620a785553bbada554fca83a67" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed May 10 10:55:45 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed May 10 10:55:47 2017 +0000" }, "message": "Merge \"Add runtime reasons for deopt.\"" }, { "commit": "4e92c3ce7ef354620a785553bbada554fca83a67", "tree": "42029deff4d3ba7f89b5fdbf79ff410da575f431", "parents": [ "549844e9ccf432d1396b19af890eedb602b8ba04" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon May 08 09:34:26 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed May 10 09:27:33 2017 +0100" }, "message": "Add runtime reasons for deopt.\n\nCurrently to help investigate. Also:\n1) Log when deoptimization happens (which method and what reason)\n2) Trace when deoptimization happens (to make it visible in systrace)\n\nbug:37655083\nTest: test-art-host test-art-target\nChange-Id: I0c2d87b40db09e8e475cf97a7c784a034c585e97\n" }, { "commit": "1a9a9e363b37dd9ff008a0664e7f54431b670e0b", "tree": "e417ca37120858ddffaa83c7cb8a140ef4b96933", "parents": [ "d5580a920370920f107914869361e92f8da8e91d", "50e20d54670aecf1a4fdcf37ef1606d5ca990559" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue May 09 20:38:01 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue May 09 20:38:03 2017 +0000" }, "message": "Merge \"Moved knowledge on masking shift operands to simplifier.\"" }, { "commit": "50e20d54670aecf1a4fdcf37ef1606d5ca990559", "tree": "cb61312693cd392c3f9a569153a55c3eef936714", "parents": [ "e22445fba0e5747ea787429ac64577a9a62aded3" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri May 05 14:07:29 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue May 09 10:41:39 2017 -0700" }, "message": "Moved knowledge on masking shift operands to simplifier.\n\nRationale:\nIt is better to have a single place that simplifies shift\nfactors outside the 32-bit or 64-bit distance range, so\nthat other phases (induction variable analysis, loop optimizations,\netc.) do not have to know about that.\n\nTest: test-art-target, test-art-host\nChange-Id: Idfd90259cca085426cc3055eccb90f3c0976036b\n" }, { "commit": "88abba2b0cb0151d89e16da3e64025878dc2f142", "tree": "231e5551a1b8d3c8bf162c9d0f30916b36ba2742", "parents": [ "b9c3a99096c746b09af611e55e11b86600374011" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 03 17:09:25 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 09 15:43:34 2017 +0100" }, "message": "ARM/AOT: Allow 16-bit LDR for Baker read barrier loads.\n\nTest: m test-art-target-gtest\nTest: testrunner.py --target on Nexus 6P.\nTest: testrunner.py --target on Nexus 6P with heap poisoning enabled.\nTest: Repeat the above tests with ART_USE_OLD_ARM_BACKEND\u003dtrue.\nBug: 29516974\nBug: 30126666\nBug: 36141117\nChange-Id: I458f2ec5fe9abead4db06c7595d992945096fb68\n" }, { "commit": "da33049d2312a6706468c436edeb8ef662efaa67", "tree": "fe3c718872c0cb08480e0e10b9c5be36c491ace5", "parents": [ "cbf27b379c4632f4b17a07db128ada2db555d591", "b404f349d69f940ef2974915fe97c16070364efd" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue May 09 13:40:31 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue May 09 13:40:36 2017 +0000" }, "message": "Merge \"ARM: Improve the code generated for HCondition with a constant input\"" }, { "commit": "b404f349d69f940ef2974915fe97c16070364efd", "tree": "2d75a4452ab569c6aacad636fbf546faf3593d1c", "parents": [ "6b90142986f76436503bcdca37ace6537ba8f0d4" ], "author": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Thu Mar 30 16:00:41 2017 +0100" }, "committer": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Mon May 08 20:19:48 2017 +0100" }, "message": "ARM: Improve the code generated for HCondition with a constant input\n\nTest: m test-art-target-run-test-409-materialized-condition\nTest: m test-art-target-run-test-570-checker-select\nChange-Id: Ie3418fbac1d2ecb4d7fc847d4722758e1e01bc2e\n" }, { "commit": "bf2dd4baecee0e82608a83eca9738205446bcb03", "tree": "a321c0bfb58a3d8caa1e4f95b1860656ab2fad97", "parents": [ "b9c3a99096c746b09af611e55e11b86600374011", "6d482aa01d2190e7f972553f359df7958d31af57" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon May 08 14:47:09 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon May 08 14:47:11 2017 +0000" }, "message": "Merge \"MIPS32: Implement branchless HCondition for longs\"" }, { "commit": "d8b6a53074be7d6b98c651ed8d2127f089da39a6", "tree": "f0780307647818a97f041e62d31cc27fa4cc971a", "parents": [ "81c50bf31d9f9e35890404a2baf93f2c1e061ad9" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Thu Apr 20 11:42:30 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Mon May 08 13:05:20 2017 +0200" }, "message": "MIPS64: Saves 128-bit vector registers along SuspendCheckSlowPath\n\nWe need to save 128 bits of data. This is only done for vector\nregisters that are live, so overhead is not too big.\n\nTest: mma test-art-host-gtest\nTest: ./testrunner.py --optimizing --target in QEMU (MIPS64)\n\nChange-Id: I2cdfeb8056dc5ef35c92f589d8c0399c41d913b2\n" }, { "commit": "93029177d766269e2685cf60625f61e38820e78d", "tree": "744e11e81a301a59c2be15adf3bc7fe4190ccdd5", "parents": [ "91f956c925f015b8cd355e8ec2a697a4ba69f7ab", "ff48700df9da9aa0c6a8c1f65c9d862f936e1a89" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon May 08 08:58:16 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon May 08 08:58:18 2017 +0000" }, "message": "Merge \"Improve the implementation of UnsafeCASObject with Baker read barriers.\"" }, { "commit": "f7caf682c6b4769b2a3dd2f2241532b98709c1a3", "tree": "88ecbd1fa756e722fd79e2b696620cd61ac3305f", "parents": [ "91f956c925f015b8cd355e8ec2a697a4ba69f7ab" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Wed Mar 01 16:07:02 2017 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon May 08 08:33:07 2017 +0000" }, "message": "Instruction scheduling for ARM.\n\nPerformance improvements on various benchmarks with this CL:\n\nbenchmarks improvements\n---------------------------\nalgorithm 1%\nbenchmarksgame 2%\ncaffeinemark 2%\nmath 3%\nstanford 4%\n\nTested on ARM Cortex-A53 CPU.\n\nThe code size impact is negligible.\n\nTest: m test-art-host\nTest: m test-art-target\nChange-Id: I314c90c09ce27e3d224fc686ef73c7d94a6b5a2c\n" }, { "commit": "ff48700df9da9aa0c6a8c1f65c9d862f936e1a89", "tree": "932dd5749a82d9477d24200db6d747d6008a0a5d", "parents": [ "15cb9753075bcaa5b91a6497a2d35e8bd98af1f0" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Mar 07 16:50:01 2017 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri May 05 16:08:50 2017 +0100" }, "message": "Improve the implementation of UnsafeCASObject with Baker read barriers.\n\nOn ARM and ARM64, avoid loading the reference altogether when the\nGC is not marking.\n\nAlso, extract the code logic for updating a reference field from\nGenerateReferenceLoadWithBakerReadBarrier routines and move it to\nnew routines (UpdateReferenceFieldWithBakerReadBarrier), to make\nthe implementation more legible.\n\nTest: Run ART target tests in Baker read barrier configuration.\nBug: 29516974\nChange-Id: I11c53f0607e997cd02ec7911725e98ef3dc97d90\n" }, { "commit": "fe307fd79220135b1a5c74eca28fb2b58c30c2df", "tree": "8e7c63a3347c4fbc70278b50d296cfda35c43844", "parents": [ "4eacc7f1c97dff74eb6c01d838a1ee586ae969ae", "eee1c0ec2b08a6be642b329dc2fe885391127da3" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri May 05 13:33:28 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri May 05 13:33:30 2017 +0000" }, "message": "Merge \"ARM: Link-time generated thunks for Baker CC read barrier.\"" }, { "commit": "eee1c0ec2b08a6be642b329dc2fe885391127da3", "tree": "960bb4df48b4a320df3c58682449abb24b5fb122", "parents": [ "c7cee403ad9a3f7097f5157a621a6a8cb991222e" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Apr 21 17:58:41 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri May 05 12:51:11 2017 +0100" }, "message": "ARM: Link-time generated thunks for Baker CC read barrier.\n\nRemaining work for follow-up CLs:\n - use implicit null check in field thunk,\n - use 16-bit LDRs for fields and GC roots.\n\nTest: m test-art-target-gtest\nTest: testrunner.py --target on Nexus 6P.\nTest: testrunner.py --target on Nexus 6P with heap poisoning enabled.\nTest: Repeat the above tests with ART_USE_OLD_ARM_BACKEND\u003dtrue.\nBug: 29516974\nBug: 30126666\nBug: 36141117\nChange-Id: Iad5addab72d790a9d61879f61f2e75b246bcdf5a\n" }, { "commit": "4ae432df025804031ea89285dd9f89051124a966", "tree": "7eae9b85539dd305d7c0aa02c061e960719e9389", "parents": [ "acac09dad3d5aa3922e6cdf54ff2e4fa6f176484" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Thu May 04 14:15:08 2017 -0700" }, "committer": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Thu May 04 14:15:08 2017 -0700" }, "message": "optimizing: Fix undefined behavior in graph checker\n\nChecking a variable being null after dereference is undefed behavior\nand the null check is often optimized out.\n\nChange-Id: I4d80510af6d49def1f9f7bd82c25eb366169babb\n" }, { "commit": "f3fb1fc453c253a075050910a558c89c1330b5af", "tree": "ca758f050dc3a892e360af094f36fde056e40fef", "parents": [ "9459127abb57b0892d3ddeb1e30ac0bf28c93761", "c61c0761150340263160b568d8a952e9a3d80d56" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu May 04 14:46:32 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 04 14:46:33 2017 +0000" }, "message": "Merge \"MIPS: Change remaining entrypoints to save everything.\"" }, { "commit": "286fb4487c73d5ef1a9ff7ad69929d37d9dcdbee", "tree": "aa1975dd6671301ebd295d8bfdf69256bef78d40", "parents": [ "c7cee403ad9a3f7097f5157a621a6a8cb991222e", "e39e702b7d09ed92a8b6af635bc0ea25c147f8b7" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu May 04 13:17:13 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 04 13:17:14 2017 +0000" }, "message": "Merge \"ARM/VIXL: Remove obsolete DeduplicateDexCacheAddressLiteral().\"" }, { "commit": "e39e702b7d09ed92a8b6af635bc0ea25c147f8b7", "tree": "05e98008abefb36256c783c31430ddebb317279f", "parents": [ "3f5f85d9382416b053359c3c1f11ab824843f3b4" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 04 11:54:35 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 04 11:54:35 2017 +0100" }, "message": "ARM/VIXL: Remove obsolete DeduplicateDexCacheAddressLiteral().\n\nTest: Rely on TreeHugger.\nBug: 30627598\nChange-Id: Ib6215e2051d14c8a4926e05bd7719d2b9a8122c1\n" }, { "commit": "3d0731a2a3bde17999e3566b773ab611363352e5", "tree": "77c6f9c3529dd4013180c57baa97833e772396bd", "parents": [ "824fd239f7260d9cc0e9ce95e512bacfb156a81b", "e22445fba0e5747ea787429ac64577a9a62aded3" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu May 04 00:05:16 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 04 00:05:20 2017 +0000" }, "message": "Merge \"Fixed bug due to not updating TC information (with regression test)\"" }, { "commit": "e22445fba0e5747ea787429ac64577a9a62aded3", "tree": "d6416b9fff5180af78867d32ea24e3663cf369e2", "parents": [ "7113885fcd983b33ee1e350865d21517d6297843" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed May 03 14:29:20 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed May 03 14:29:20 2017 -0700" }, "message": "Fixed bug due to not updating TC information\n(with regression test)\n\nBug: 37768917\nTest: test-art-target, test-art-host\nChange-Id: Ia0cd4e0874941a047625448cbb95b7b4733d70d1\n" }, { "commit": "952b23505e2512c9327e6d20c8304493bf8fcf7c", "tree": "ff82866fef9b738a3d90df30fd31c0fdafb8c4de", "parents": [ "15cb9753075bcaa5b91a6497a2d35e8bd98af1f0" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed May 03 19:49:14 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed May 03 19:52:06 2017 +0100" }, "message": "Improve the documentation of an ARM64 parallel move resolver corner case.\n\nTest: m test-art-host-gtest-codegen_test\nBug: 34760542\nBug: 34834461\nChange-Id: I7e716c4b665ed51af9908042f88fb2e4bcefb849\n" }, { "commit": "3650acb134b4e68ba3f190772b02105f74081bf2", "tree": "af9fe3020cd389105a8bb03c8680289f4287953e", "parents": [ "19052df43919bac16ce7df488f377f06a434ce4a", "07f01dfa26e97f48662b6ef40fdc0926cecd7664" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed May 03 18:23:56 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed May 03 18:23:57 2017 +0000" }, "message": "Merge \"inliner: Do not assume that the outermost_graph has an art method\"" }, { "commit": "07f01dfa26e97f48662b6ef40fdc0926cecd7664", "tree": "6441225d973ef1c8d21b8b0c368b8652d1257055", "parents": [ "70940dfe99df0084a3f3fed1a88255ec976a60e3" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Apr 28 19:58:01 2017 -0700" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed May 03 09:35:39 2017 -0700" }, "message": "inliner: Do not assume that the outermost_graph has an art method\n\nThe outermost method may be in an unresolved class. If that\u0027s the case\ndo not assume anything about the referrer in HLoadClass.\n\nTest: m test-art-host\nBug: 37588888\nChange-Id: I1a59325740ac9c5bcadc12661f5a82f642747bf9\n" }, { "commit": "29825550d6bd7f1185e16b3925c7f084078e688e", "tree": "ce96bd0b74266b14d47419cd1d4dd969801198eb", "parents": [ "15cb9753075bcaa5b91a6497a2d35e8bd98af1f0", "d01745ef88bfd25df574a885d90a1a7785db5f5b" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed May 03 14:13:58 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed May 03 14:13:59 2017 +0000" }, "message": "Merge \"optimizing: constructor fence redundancy elimination - remove dmb after LSE\"" }, { "commit": "d01745ef88bfd25df574a885d90a1a7785db5f5b", "tree": "058eb1593dbb0fe8a8e26b901909bec8aa01d474", "parents": [ "a57c334075b193de9690fff97acf6c1b1d1283fc" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Wed Apr 05 16:40:31 2017 -0700" }, "committer": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Tue May 02 09:45:45 2017 -0700" }, "message": "optimizing: constructor fence redundancy elimination - remove dmb after LSE\n\nPart one of a few upcoming CLs to optimize constructor fences.\n\nThis improves load-store-elimination; all singleton objects that are not\nreturned will have their associated constructor fence removed.\n\nIf the allocation is removed, so is the fence. Even if allocation is not\nremoved, fences can sometimes be removed.\n\nThis change is enabled by tracking the \"this\" object associated with the\nconstructor fence as an input. Fence inputs are considered weak; they do not keep\nthe \"this\" object alive; if the instructions for \"this\" are all deleted,\nthe fence can also be deleted.\n\nBug: 36656456\nTest: art/test.py --host \u0026\u0026 art/test.py --target\nChange-Id: I05659ab07e20d6e2ecd4be051b722726776f4ab1\n" }, { "commit": "7113885fcd983b33ee1e350865d21517d6297843", "tree": "72efffab78226beefa48388f2d332c7de1cc25ba", "parents": [ "19cb5cae136665c6ebb082062508d874fa7d271e", "d58bc3212a968fe5a2e1fba51df9a7efedcf1b60" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue May 02 16:06:24 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue May 02 16:06:57 2017 +0000" }, "message": "Merge \"Allow same-length integral type mixing in SIMD.\"" }, { "commit": "bf065261f65692a312439b453bdd328369793d69", "tree": "1c83096a38d4d1ec749cac861e2326744d19b728", "parents": [ "874610010fc9f2191a55c281347995da0f43ce61", "65ffd8ef044465c47d4f97ab2556310f9ee30a01" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue May 02 16:04:38 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue May 02 16:04:39 2017 +0000" }, "message": "Merge \"Bug fix on shift that exceeds \"lane width\".\"" }, { "commit": "920f9b19e66c1ece38a28ddf45bd371ee83701ab", "tree": "c76047e2d030055cba56c6231fd7ad9396109183", "parents": [ "267a4360581197c5a606c767fc1d7aaed5d53ace", "6c3af16609a71286b3d2e93131034248a4f639ba" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue May 02 13:49:34 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue May 02 13:49:36 2017 +0000" }, "message": "Merge \"Use dex2oat instead of dex2oatd in non-debug run-tests.\"" }, { "commit": "267a4360581197c5a606c767fc1d7aaed5d53ace", "tree": "c05093f0e5cb1ff85b00db293995c1b5598ea7ce", "parents": [ "df48db90d5709542f2531fd1df310e81814ab788", "5633ce718b9544af1c7b1a811ed2872889019c84" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue May 02 13:14:30 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue May 02 13:14:32 2017 +0000" }, "message": "Merge \"MIPS: java.lang.Integer.valueOf intrinsic.\"" }, { "commit": "6c3af16609a71286b3d2e93131034248a4f639ba", "tree": "1ccde82894a10fd143c48049e12175a72c37e43a", "parents": [ "9975c7126de5414263d52597a91a431c2dcb379f" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Apr 27 11:18:56 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue May 02 13:08:48 2017 +0100" }, "message": "Use dex2oat instead of dex2oatd in non-debug run-tests.\n\nThe \"$inline$\" and \"$noinline$\" substrings in methods\u0027 names are now\nalways honored when compiling with a core image, regardless of the\ndebug mode status.\n\nTest: art/test/testrunner/testrunner.py --ndebug --debug\nChange-Id: I3c3e0fb9c33644093bb5fb218180b68dcc10fc83\n" }, { "commit": "c83dd7bfde2171c879efb92a31a363505385ffb9", "tree": "3539033c43497e7d8bfd01cc4c4983a02957016a", "parents": [ "a7c6a23cc96a24ccb1b32bd4397e4a8bdde58e16" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Tue May 02 04:14:17 2017 +0000" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon May 01 21:26:23 2017 -0700" }, "message": "Revert \"Add concurrent card graying for immune spaces\"\n\nBug: 37876887\n\nThis reverts commit 88d329a698ba186aeb1f1ef8794355512ada84a9.\n\nTest: mm\n\nChange-Id: I93880fb7cd8c4c27c65777079d48947075f8cb64\n" }, { "commit": "65ffd8ef044465c47d4f97ab2556310f9ee30a01", "tree": "b520b0071f80d6c6f9c4cc649a079969ef3e0d20", "parents": [ "c009d14ce52bca0de34b441f8a575b0d36c1d69e" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon May 01 16:50:45 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon May 01 16:50:45 2017 -0700" }, "message": "Bug fix on shift that exceeds \"lane width\".\n\nRationale:\nARM is a bit less forgiving on shifting more than\nthe lane width of the SIMD instruction (rejecting\nsuch cases is no loss, since it yields 0 anyway\nand should be optimized differently).\n\nBug: 37776122\nTest: test-art-target, test-art-host\nChange-Id: I22d04afbfce82b4593f17c2f48c1fd5a0805d305\n" }, { "commit": "d58bc3212a968fe5a2e1fba51df9a7efedcf1b60", "tree": "62d442542629674b503d7005977e73c99b3d5d37", "parents": [ "18df7714111bdd3c5737f1ef2fa587d9957f8a2f" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon May 01 14:49:18 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon May 01 15:14:27 2017 -0700" }, "message": "Allow same-length integral type mixing in SIMD.\n\nRationale:\nJust like the incoming sequential code, the SIMD\ncode allows for some type matching, as long as\nit is integral and same length.\n\nBug: 37764324\nTest: test-art-target, test-art-host\nChange-Id: Ide1c5403e0f3b8c5372e8ac6dd282d8211ca8f1b\n" }, { "commit": "18df7714111bdd3c5737f1ef2fa587d9957f8a2f", "tree": "dcb8a86843ffa3a3f0b5155d53ea578f88fa0f01", "parents": [ "73ff983db34faadda86bfe0bbdd5d4d5f916e0b9", "472821b210a7fc7a4d2e3d45762c7b5b9628a35b" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon May 01 17:33:45 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon May 01 17:33:46 2017 +0000" }, "message": "Merge \"Enable string \"array get\" vectorization.\"" }, { "commit": "88d329a698ba186aeb1f1ef8794355512ada84a9", "tree": "bb34e52fde853941b0e17f08cbcdc07b9b7e527d", "parents": [ "3f5f85d9382416b053359c3c1f11ab824843f3b4" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Thu Apr 27 11:32:14 2017 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon May 01 09:37:01 2017 -0700" }, "message": "Add concurrent card graying for immune spaces\n\nWe now age the cards and gray the objects before the GC pause. This\nis done to reduce how much work is required during the pause and\nallows increasing the card size without regressing the GC pause\ntime.\n\nWe rescan the cards in the pause and only process the cards that were\ndirtied since the concurrent graying.\n\nPause time spent graying objects on maps (Pixel). The average is the\nper GC metric.\n\nDisabled entrypoint switching for x86 and x86_64. This is to fix a\ncase where the gray bit is set but the entrypoint is null, resulting\nin crashes.\n\nAlso reverted to checking \"is gc marking\" for x86 and x86_64 codegen\nto prevent performance regressions.\n\n128 byte cards without the change:\nSum: 1.912ms 99% C.I. 125us-244us Avg: 159.333us Max: 244us\n\n512 byte cards without the change:\nSum: 12.027ms 99% C.I. 0.940ms-1.495ms Avg: 1.202ms Max: 1.495ms\n\n512 byte cards with concurrent graying:\nSum: 1.385ms 99% C.I. 51us-239us Avg: 86.562us Max: 239us\n\nBug: 36457259\nBug: 12687968\nBug: 31022084\n\nTest: test-art-host\n\n(cherry picked from commit a3856d0d801f066b9b09649b3a17bdbb747f012d)\n\nChange-Id: I7e8f8a5716f96dde827377234f854482452bc9cd\n" }, { "commit": "c61c0761150340263160b568d8a952e9a3d80d56", "tree": "105418862af2193d590fc5da868e4c72da7d6e6a", "parents": [ "a57c334075b193de9690fff97acf6c1b1d1283fc" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Mon Apr 10 13:54:23 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sun Apr 30 15:30:58 2017 -0700" }, "message": "MIPS: Change remaining entrypoints to save everything.\n\nThis also fixes two issues:\n1. Missing restore of the callee-clobbered gp register on\n MIPS32\n2. Incorrect DCHECK causing test 916-obsolete-jit to fail\n on MIPS32 in the ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\n configuration\n\nTest: booted MIPS32R2 in QEMU\nTest: test-art-target-gtest\nTest: testrunner.py --target --optimizing\nTest: booted MIPS64 (with 2nd arch MIPS32R2) in QEMU\nTest: same tests as above for both MIPS32R6 and MIPS64R6\nTest: repeat all of the above in two configurations:\n ART_READ_BARRIER_TYPE\u003dTABLELOOKUP,\n ART_USE_READ_BARRIER\u003dfalse.\n\nChange-Id: I06a3c24579242a632ec8c373c233217d558a8401\n" }, { "commit": "5633ce718b9544af1c7b1a811ed2872889019c84", "tree": "2ffc0f10ba7f2b9f19403187f3eaee37f17b811c", "parents": [ "a57c334075b193de9690fff97acf6c1b1d1283fc" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Mon Apr 10 15:47:40 2017 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Sun Apr 30 08:29:49 2017 -0700" }, "message": "MIPS: java.lang.Integer.valueOf intrinsic.\n\nTest: run-test --64 --optimizing 640-checker-integer-valueof\nTest: run-test --64 640-checker-integer-valueof\nTest: run-test --64 --no-prebuild --optimizing 640-checker-integer-valueof\nTest: run-test --64 --no-prebuild 640-checker-integer-valueof\nTest: run-test --optimizing 640-checker-integer-valueof\nTest: run-test 640-checker-integer-valueof\nTest: run-test --no-prebuild --optimizing 640-checker-integer-valueof\nTest: run-test --no-prebuild 640-checker-integer-valueof\nTest: mma test-art-host\nTest: mma test-art-target\n\nBooted on both MIPS32 and MIPS64 emulators.\n\nChange-Id: I5b2f21cf2334c392080cff9654150504207f4c01\n" }, { "commit": "472821b210a7fc7a4d2e3d45762c7b5b9628a35b", "tree": "d3dad427cdfcf4ebe8d324bcd3b7618ed42d14dd", "parents": [ "70940dfe99df0084a3f3fed1a88255ec976a60e3" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Apr 27 17:23:51 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Apr 28 09:49:26 2017 -0700" }, "message": "Enable string \"array get\" vectorization.\n\nRationale:\nLike its scalar counterpart, the SIMD implementation of array get from\na string needs to deal with compressed and uncompressed cases.\nMicro benchmarks shows 2x to 3x speedup for just copying data!\n\nTest: test-art-target, test-art-host\nChange-Id: I2fd714e50715b263123c215cd181f19194456d2b\n" }, { "commit": "ec0c057557836d2848399f43908d1e1e4977f355", "tree": "c09b8bf84d26be2975a9215036794ddfecc95ce6", "parents": [ "04471122e705aba2b3b30651457097a8f3ac97b6", "db14fcf45effb7dd4b3febd697ff5f0541119835" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Apr 27 20:59:14 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Apr 27 20:59:16 2017 +0000" }, "message": "Merge \"Pack booleans in the already existing bit field.\"" }, { "commit": "dc8d7b63a8de1749b8832257549d0b60c9cf4c50", "tree": "12670940247a2ca216adae64d40a0b30179f537e", "parents": [ "204db008e0d6d21463038acb9b9aeff407a285a9", "72155d2f05e38b265cb79a31abdbe65cd29d3a5b" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Apr 27 10:53:09 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Apr 27 10:53:11 2017 +0000" }, "message": "Merge \"fix a null pointer dereference\"" }, { "commit": "72155d2f05e38b265cb79a31abdbe65cd29d3a5b", "tree": "b699f16d33985384efa8494ba93866298c59c46b", "parents": [ "0d2ea2f09937e55600f8a1eda6b102fef1ab9c0b" ], "author": { "name": "George Burgess IV", "email": "gbiv@google.com", "time": "Tue Apr 25 15:17:16 2017 -0700" }, "committer": { "name": "George Burgess IV", "email": "gbiv@google.com", "time": "Wed Apr 26 10:40:05 2017 -0700" }, "message": "fix a null pointer dereference\n\nCaught by the static analyzer:\nart/compiler/optimizing/graph_checker.cc:501:10: warning: Called C++\nobject pointer is null [clang-analyzer-core.CallAndMessage]\n\nBug: None\nTest: Still builds; static analyzer no longer complains.\nChange-Id: Iba20a0cd859cca0cf38f6e10c3685cc986b5baa5\n" }, { "commit": "02b1976a9d25fb3649f734962f1127786cf9dc81", "tree": "d2889650a4d04495fa230384fd7dad66e46d52f3", "parents": [ "d21711eae1224c18690d1a460b5b986fb4885654", "66d691de219e840b3f84385d8bd1b7001562b0e5" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 26 15:27:13 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Apr 26 15:27:15 2017 +0000" }, "message": "Merge \"ARM64: Link-time generated thunks for ArrayGet Baker CC read barrier.\"" }, { "commit": "db14fcf45effb7dd4b3febd697ff5f0541119835", "tree": "4197a7be031e7206b1c4f55a51821e9b273b1b36", "parents": [ "06660db82d6b3d59080584431addf3797a468a70" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Apr 25 15:53:58 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Apr 25 16:13:55 2017 -0700" }, "message": "Pack booleans in the already existing bit field.\n\nAlso adds is_string_char_at boolean in preparation of\n[un]compressed string vectorization support.\n\nTest: test-art-target, test-art-host\nChange-Id: Ia99b28564727bf91b3d5cfc49f6d40a4dd1ffd3b\n" }, { "commit": "66d691de219e840b3f84385d8bd1b7001562b0e5", "tree": "4034e867246db26acaa1a36b89b823ce5d0f1a58", "parents": [ "38870a8a2717ccf1bcd3faddc53b1999985bb29f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Apr 07 17:53:39 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Apr 25 18:29:33 2017 +0100" }, "message": "ARM64: Link-time generated thunks for ArrayGet Baker CC read barrier.\n\nTest: Added a test to relative_patcher_arm64\nTest: m test-art-target-gtest on Nexus 6P.\nTest: Nexus 6P boots.\nTest: testrunner.py --target on Nexus 6P.\nTest: Nexus 6P boots with heap poisoning.\nTest: testrunner.py --target on Nexus 6P with heap poisoning.\nBug: 29516974\nBug: 30126666\nBug: 36141117\nChange-Id: Id0f23089c55cbb53b84305c11bb4b03718561ade\n" }, { "commit": "6d7abbd2324f544c6b6da42bb6b9b531df0ce3cd", "tree": "669705a042bbc77c7963c117a9bf6f7a2308f9c8", "parents": [ "0dfc315a096bf5678cb5182771e3fdcca8ea4433" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Apr 24 13:19:09 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Apr 24 14:18:45 2017 -0700" }, "message": "ART: More header cleanup - method_verifier.h\n\nMove enumerations to own header. Move the compiler interface (of what\nthe compiler can tolerate) into its own header. Replace or remove\nmethod_verifier.h where possible.\n\nTest: mmma art\nChange-Id: I075fcb10b02b6c1c760daad31cb18eaa42067b6d\n" }, { "commit": "c15a2f4f45661a7f5f542e406282c146ea1a968d", "tree": "50ad6104b0b8739f272782c35a7022cca64d2601", "parents": [ "9ae527f615f61aec4aaca310c52f373e8c3d8d58" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Apr 21 12:09:39 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Apr 21 16:48:00 2017 -0700" }, "message": "ART: Add object-readbarrier-inl.h\n\nMove some read-barrier code into a new header. This prunes the\ninclude tree for the concurrent-copying collector. Clean up other\nrelated includes.\n\nTest: mmma art\nChange-Id: I40ce4e74f2e5d4c692529ffb4df933230b6fd73e\n" }, { "commit": "2d4d161f26b06561c8f0118592c6a7291b3e1680", "tree": "272824cdb154e61a806279974b179000dcb22d01", "parents": [ "1cd51da49c7b3335bc9fbde86fbb1c1308096807", "8de5916666ab5d146ac1bdac7d7748e197ae347e" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Apr 21 20:01:32 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 21 20:01:33 2017 +0000" }, "message": "Merge \"Factor vector unary/binary shared code out into superclass.\"" }, { "commit": "1cd51da49c7b3335bc9fbde86fbb1c1308096807", "tree": "188a79fcdd41701169b1f54b89b62aa3564a5bb2", "parents": [ "6b8b07521125e7744327d00e64f897b4dd5d1db9", "0225b7712202d95ac7ba40ec96e95e14c4ce0895" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Apr 21 20:00:37 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 21 20:00:38 2017 +0000" }, "message": "Merge \"ARM64: Improve SIMD LDR/STR.\"" }, { "commit": "6b8b07521125e7744327d00e64f897b4dd5d1db9", "tree": "1a8d6cd6c50fdcb5edc388588e36eb41c78e1324", "parents": [ "e0ffd22714fd4bc4edf81000966b98eae59788dd", "a1d2f957a21319d1110bebb9a52f46fd1c67ffaf" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Apr 21 18:57:25 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 21 18:57:27 2017 +0000" }, "message": "Merge changes I6ff2d6f8,I8f60f116\n\n* changes:\n ART: Clean up art_field.h\n ART: Clean up art_method.h\n" }, { "commit": "8de5916666ab5d146ac1bdac7d7748e197ae347e", "tree": "87a7cfda1a91ef4335f78a59edf2d5fcca6e8e46", "parents": [ "f99f62f8e04aecbbe1615e242a19ac475f66e565" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Apr 21 09:42:01 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Apr 21 11:00:26 2017 -0700" }, "message": "Factor vector unary/binary shared code out into superclass.\n\nTest: test-art-target, test-art-host\nChange-Id: I42770d9a9142f2e53d3b5bd60bd25593b2154a7c\n" }, { "commit": "0225b7712202d95ac7ba40ec96e95e14c4ce0895", "tree": "cb5fdd6a7b95322ce7fa95b77aba8021e287c7fb", "parents": [ "6d3c61d8c6d2f96dec8345263c948fae3caa4e1a" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Wed Apr 19 15:43:53 2017 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Fri Apr 21 17:41:42 2017 +0100" }, "message": "ARM64: Improve SIMD LDR/STR.\n\nTest: 640-checker-*-simd\nTest: test-art-target, test-art-host\n\nChange-Id: I2bcdef3f5cb7c0e7d1b3d02910fbf89ac694d89a\n" }, { "commit": "b95c74b9788886b24b04db782ce64867cb4960d5", "tree": "f9b01a5b509d70bf66cfb69433f23d7019b892ce", "parents": [ "d68677c5fde1ace16ea58d65733776c954e7acb4" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Apr 20 19:43:21 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Apr 21 09:41:03 2017 -0700" }, "message": "ART: Move InlineMethodAnalyzer into compiler\n\nMove the infrastructure, which is now only used by the compiler.\n\nTest: mmma art\nChange-Id: I4a61e35f23736b226523d7349f49208ad852ad2f\n" } ], "next": "a1d2f957a21319d1110bebb9a52f46fd1c67ffaf" }