)]}' { "log": [ { "commit": "ae7ff92c430aa12484ff8258ee4ed13421ac7934", "tree": "32774f5b3b0f96b921145a4af62dce182882fb7c", "parents": [ "6e5fa09510c7280168e040382d27dd8b55760d9a" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Thu Oct 06 14:59:19 2016 -0700" }, "committer": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Thu Oct 13 17:26:37 2016 +0000" }, "message": "jni: Add read barrier fast path to jni compiler\n\nStatic method dispatch via JNI requires a read barrier\nfor the ArtMethod::GetDeclaringClass() load before adding it to the\nJNI StackHandleScope.\n\nWe used to call ReadBarrierJni unconditionally but add a branch\nto skip calling it if the GC is not currently in the marking phase.\n\nTest: ART_USE_READ_BARRIER\u003dtrue make test-art-host test-art-target\nBug: 30437917\nChange-Id: I4f505ebde17c0a67209c7bb51b3f39e37a06373a\n" }, { "commit": "aad75c6d5bfab2dc8e30fc99fafe8cd2dc8b74d8", "tree": "c1b9e1eabcf35c5cbb5b4f46313a4e062f2d5d51", "parents": [ "82d4838d6bb3480cd25327cedc5179fb2d86881c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 03 08:46:48 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Oct 04 17:51:46 2016 +0100" }, "message": "Revert \"Revert \"Store resolved Strings for AOT code in .bss.\"\"\n\nFixed oat_test to keep dex files alive. Fixed mips build.\nRewritten the .bss GC root visiting and added write barrier\nto the artResolveStringFromCode().\n\nTest: build aosp_mips-eng\nTest: m ART_DEFAULT_GC_TYPE\u003dSS test-art-target-host-gtest-oat_test\nTest: Run ART test suite on host and Nexus 9.\nBug: 20323084\nBug: 30627598\n\nThis reverts commit 5f926055cb88089d8ca27243f35a9dfd89d981f0.\n\nChange-Id: I07fa2278d82b8eb64964c9a4b66cb93726ccda6b\n" }, { "commit": "5f926055cb88089d8ca27243f35a9dfd89d981f0", "tree": "8d87d400e36301eb648e19bcd225f13c469648ad", "parents": [ "9e5739aaa690a8529c104f4c05035a657616c310" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Sep 30 17:04:49 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Sep 30 18:08:09 2016 +0100" }, "message": "Revert \"Store resolved Strings for AOT code in .bss.\"\n\nThere are some issues with oat_test64 on host and aosp_mips-eng.\n\nAlso reverts \"compiler_driver: Fix build.\"\n\nBug: 20323084\nBug: 30627598\n\nThis reverts commit 63dccbbefef3014c99c22748d18befcc7bcb3b41.\nThis reverts commit 04a44135ace10123f059373691594ae0f270a8a4.\n\nChange-Id: I568ba3e58cf103987fdd63c8a21521010a9f27c4\n" }, { "commit": "63dccbbefef3014c99c22748d18befcc7bcb3b41", "tree": "60a498041bebff43bc1f43d438e3bc34a30887f7", "parents": [ "6bee25976782a063d6b44f7718a6302761bf6403" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Sep 21 13:51:10 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 29 15:58:43 2016 +0100" }, "message": "Store resolved Strings for AOT code in .bss.\n\nAnd do some related refactorings.\n\nBug: 20323084\nBug: 30627598\nTest: Run ART test suite including gcstress on host and Nexus 9.\nTest: Run ART test suite including gcstress with baker CC on host and Nexus 9.\nTest: Build aosp_mips64-eng.\nChange-Id: I1b12c1570fee8e5da490b47f231050142afcbd1e\n" }, { "commit": "f4d6aee7786176df65b093690686617725f08378", "tree": "14aae464b9214c822736a61272da090fafd47512", "parents": [ "f65366918e0cec5ca2c5214128f0a65a3f1bddd6" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Jul 11 10:41:45 2016 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Sep 19 15:03:45 2016 +0100" }, "message": "ARM: Use stm/ldm for live registers save/restore in SlowPathCode.\n\nIn case when there is more than 4 register to save/restore in the\nSlowPathCode stm/ldm can save some code size.\n\nTest: m test-art-target; m test-art-host\n\nChange-Id: I2d5b44bab58b67207105302cd7d8ee3300b9040a\n" }, { "commit": "f58b24831f7203e248798dce4c62bf61c51ba15d", "tree": "ab7c886781ba6328b350513352b763cd433627a3", "parents": [ "7d26164308e9eab5c596a19b841e4ab1c27828a8" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Fri Sep 02 22:14:06 2016 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Thu Sep 15 19:11:14 2016 -0700" }, "message": "MIPS32: Improve storing of constants in fields and array elements\n\nTest: booted MIPS32 in QEMU\nTest: test-art-target-run-test-optimizing on CI20\nTest: test-art-host-gtest\n\nChange-Id: Ifcf8c1e215e3768711c391e8da6f663bba71f8d9\n" }, { "commit": "6b4d988feb18559204f7175914851baf28febd8c", "tree": "b8bb9bf3e2bcc3a2219ec5385aa003058cb717e9", "parents": [ "5a7c611d7e9ab5d01eca58010b5dfc22d7ca720e", "a5931185c97c7b17981a9fc5016834a0bdd9480b" ], "author": { "name": "Chih-hung Hsieh", "email": "chh@google.com", "time": "Thu Sep 15 18:16:43 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Sep 15 18:16:44 2016 +0000" }, "message": "Merge \"Fix google-explicit-constructor warnings in art.\"" }, { "commit": "fad6f4dbf914418e7b16fc78a77578edfa618b72", "tree": "187d5127417936d926a6e7830760090647509bd7", "parents": [ "fce42f486d9a607fb4fb472ec142a82ceccb6b5f", "167bc0b5275038cbe86112e1df12c8988aa6612e" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Sep 15 16:25:58 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Sep 15 16:25:58 2016 +0000" }, "message": "Merge \"ARM: Try to emit branches early to save memory.\"" }, { "commit": "a5931185c97c7b17981a9fc5016834a0bdd9480b", "tree": "22f1a57647d7113c7c5aa5e0f0db5937380f2739", "parents": [ "fce42f486d9a607fb4fb472ec142a82ceccb6b5f" ], "author": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Thu Sep 01 15:08:13 2016 -0700" }, "committer": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Thu Sep 15 09:09:35 2016 -0700" }, "message": "Fix google-explicit-constructor warnings in art.\n\n* Add explicit keyword to conversion constructors,\n or NOLINT for implicit converters.\nBug: 28341362\nTest: build with WITH_TIDY\u003d1\n\nChange-Id: I1e1ee2661812944904fedadeff97b620506db47d\n" }, { "commit": "167bc0b5275038cbe86112e1df12c8988aa6612e", "tree": "fb2080cd9686de6b926f2e5e4157c551a0405b9b", "parents": [ "8fb627442ec7330939c920076714eb120363f95e" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 13 15:11:50 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Sep 15 15:35:01 2016 +0100" }, "message": "ARM: Try to emit branches early to save memory.\n\nTry to emit unexpanded branches when binding a Label to\nreduce the memory needed for Fixup dependencies. We use\na simple heuristic to limit the time we spend trying\nbut this heuristic is enough to resolve all branches in\nthe emitted String.equals() intrinsic.\n\nTest: Run ART test suite on host and Nexus 6.\nTest: Manually check memory usage for a certain apk.\nBug: 28603175\nChange-Id: I362e07c2c1285ff609cf8df0a00b6b420729b9ce\n" }, { "commit": "755bebaa1922436e6a9568042e975cec8a23bf66", "tree": "ea8e42919b9a99b2df19a7477dd182d2c6a1347b", "parents": [ "602700c3051c0b7721b622b1c94772208cc598ea", "d9c90373d640a5e08072cf469c372e24a8c0fc35" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Sep 15 09:14:49 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Sep 15 09:14:49 2016 +0000" }, "message": "Merge \"Move ArrayRef to runtime/base\"" }, { "commit": "a3735f7ccb0dfeab639ac2faf34af752e1415cdf", "tree": "3faf461f77b41cb783b89a974e83b70c0bf13622", "parents": [ "26ead4975e1752e8ae2f5ed6fda73876c4f9ff59" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Wed Sep 14 13:36:16 2016 -0700" }, "committer": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Wed Sep 14 20:46:34 2016 +0000" }, "message": "jni: Update VIXL macro assembler to have vmovdrr/vmovsr support\n\nThis is sometimes used by @CriticalNative JNI compiler\nto avoid spilling the user native function pointer to the stack.\n\n(Also fixes the failing target jni_compiler_test32)\n\nTest: make -j test-art-target-gtest-jni_compiler_test32\nBug: 31469040\nChange-Id: I04a5ec20272fe89e613959a37da1cb472c4ebdf9\n" }, { "commit": "d9c90373d640a5e08072cf469c372e24a8c0fc35", "tree": "35615699aa6c12b21d9c0de7d11ccf0f088ba0d8", "parents": [ "b180b893b5acb5c55251522465f9d20ed45c3b5a" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Sep 14 16:53:55 2016 +0100" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Wed Sep 14 19:57:21 2016 +0100" }, "message": "Move ArrayRef to runtime/base\n\nWill be used in upcoming CLs regarding VDEX and VerifierDeps.\n\nTest: m test-art-host\nChange-Id: I68e611a4a52246c2bdf45eab7c61f3212908afd4\n" }, { "commit": "96b6682d2d65f94c262590ef88bafdc70171ab8c", "tree": "ebb8a72edbaff6a6c62a6ce8bfb177a57389abaf", "parents": [ "9ef68a3ad02eb7e2242a6d7f6a208c7a9b8ac407" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sat Sep 10 02:32:44 2016 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Sep 14 00:44:11 2016 -0700" }, "message": "MIPS32: Implement table-based packed switch\n\nTest: booted MIPS32R2 in QEMU\nTest: test-art-target-run-test-optimizing (MIPS32R2) on CI20\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-run-test-optimizing (MIPS32R6) in QEMU\nTest: test-art-host-gtest\n\nChange-Id: I2e1a65ff1ba9406b84351ba7998f853b1ce4aef9\n" }, { "commit": "367f3dd32454858b8b25d87feb8f6599d3b4c9dd", "tree": "9fe45c9f6785c31918f70ed2d12683f9c8d702af", "parents": [ "fa7b5c97db681e3d64d145807927cfafae78729b" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Thu Sep 01 17:00:24 2016 -0700" }, "committer": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Fri Sep 09 10:48:56 2016 -0700" }, "message": "jni: Add @CriticalNative optimization to speed up JNI transitions\n\nChange-Id: I963059ac3a72dd8e6a867596c356d7062deb6da7\n" }, { "commit": "b03d640c78acad1cf1f8fbeb894ac3366aa164be", "tree": "11bcaea60278962806c211ae8520cb3217f929ea", "parents": [ "a1be503a70c5d0038cfbf917a978c108e2e8b4bd" ], "author": { "name": "jessicahandojo", "email": "jessicahandojo@google.com", "time": "Wed Sep 07 12:16:53 2016 -0700" }, "committer": { "name": "jessicahandojo", "email": "jessicahandojo@google.com", "time": "Wed Sep 07 14:47:33 2016 -0700" }, "message": "Adding x86 compiler utils instructions and tests\n\nInstructions added are (repne scasb), (repne movb),\nand (repne cmpsb) for x86.\nInstructions added is (repne scasb) for x86_64.\n\nTest: m -j31 test-art-host-gtest-assembler_x86_test\n m -j31 test-art-host-gtest-assembler_x86_64_test\n\nChange-Id: I137bf5fe1174b1dcc0166f7f2e0cffadbc0ca7f5\n" }, { "commit": "52d0fce5958013d8e6fe50919d48efacbfcb3d3e", "tree": "95808a4b141c868ea8cb0a0ce6e9eaae95e86f0e", "parents": [ "b0f443217306b8a307f73d35cb27c1cac2e1c360" ], "author": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Fri Sep 02 20:55:46 2016 +0100" }, "committer": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Mon Sep 05 16:02:54 2016 +0100" }, "message": "ARM: VIXL32: Support a newer version of VIXL.\n\nChange-Id: I410c1536637a3282640d06894632491fe5d3c72a\n" }, { "commit": "57eb0f58419e0e6773f69cf6e0c78e5fed0464cd", "tree": "5104bb1c1ad04f9f6a04fcac5d497d54ed0c97ab", "parents": [ "d7eabc2cc1a88c1f7f927da61246ae65aab0626c" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Fri Jul 29 22:04:46 2016 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Aug 30 16:50:28 2016 -0700" }, "message": "MIPS32: Fill branch delay slots\n\nTest: booted MIPS32 in QEMU\nTest: test-art-host-gtest\nTest: test-art-target-gtest\nTest: test-art-target-run-test-optimizing on CI20\n\nChange-Id: I727e80753395ab99fff004cb5d2e0a06409150d7\n" }, { "commit": "1a0de6acd03b43a03678b58f47b2f21b5215cc22", "tree": "7d03f89b9d64ebc40ea382011de524d18a004f73", "parents": [ "cc55a7ce2aa0f10c2da9efaa89855cf075e56e20" ], "author": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Fri Aug 26 15:06:11 2016 -0700" }, "committer": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Fri Aug 26 17:52:41 2016 -0700" }, "message": "Fix clang-tidy warnings in art.\n\n* Add parentheses around macro parameters, or\n use NOLINT to suppress warning.\nBug: 28705665\n\nTest: build with WITH_TIDY\u003d1\nChange-Id: Ifc922c2e66215772042bac372754ea70074f0053\n" }, { "commit": "912883db925ab9f0fec0290a81a4a5ce87d013a5", "tree": "51e9b78b5480103c7e1fec3d7bbb1d53b4428c97", "parents": [ "b26918002ca317e0ce54980e37a9ca1af99deb8f", "c733dca42157cafe8751b558f1f8ab65efdeaa63" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Aug 26 00:48:38 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Aug 26 00:48:38 2016 +0000" }, "message": "Merge \"MIPS64: Improve non-trivial 64-bit constant loading.\"" }, { "commit": "0e851e2fb55773e2ad5f06b89ed5e655ca3eb846", "tree": "caaa0c8655628cafeba73c44d98525dfc2262326", "parents": [ "ca11dc008457e1596554eb9b1b77c823ae9dcf54" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 25 18:17:56 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 25 18:20:25 2016 +0100" }, "message": "Fix VIXL assembler test for heap-poisoning configurations.\n\nAnd fix a typo in test name.\n\nTest: ART_HEAP_POISONING\u003dtrue m test-art-host-gtest-assembler_thumb_test\nChange-Id: Ibc3750676aa7a7b23c93ee0babb8d9c207cb762a\n" }, { "commit": "3e93a40f08d67cd4be6b91358281ce8b7a6f6fb2", "tree": "0e26531509204a099b0f9eee5c596cfd3c9f9da1", "parents": [ "e7c85ad018185713f8a9baa7fe17619975f76723", "f77d156168496b9793d893980123efd0ad38d5ee" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Aug 25 15:12:19 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Aug 25 15:12:20 2016 +0000" }, "message": "Merge \"ARM: VIXL32: Switch JNI compiler to use VIXL Assembler.\"" }, { "commit": "e7c85ad018185713f8a9baa7fe17619975f76723", "tree": "0b6da921b4419986de50974ee7b2513837216647", "parents": [ "a518c150add36b71aaaf9b904d9f5b4ad61b8c8c", "12e097c84cef710fa4f254b1811ff70b876e9e9a" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Aug 25 15:11:52 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Aug 25 15:11:53 2016 +0000" }, "message": "Merge \"ARM: VIXL32: Implement VIXL-based assembler.\"" }, { "commit": "a518c150add36b71aaaf9b904d9f5b4ad61b8c8c", "tree": "7daa4cc425a5e29179e310646f9c99ce2ebf84b1", "parents": [ "c8cbbf518d8a23fecaedb22c71e44ef3736b08e2", "ba6b679bd34449ec56508966706ca1b8d5e7cb17" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Aug 25 12:19:36 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Aug 25 12:19:36 2016 +0000" }, "message": "Merge \"ARM: Purge Arm32Assembler.\"" }, { "commit": "2923db7314da613d50c9e6e44f38bb8d3e1c49f0", "tree": "063590a45f9f384872b8fa14f9f0bd2f014f0d66", "parents": [ "897b8f5da90b38b030826273f4c9bd8fbc32759e" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sat Aug 20 01:55:47 2016 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Aug 24 17:27:35 2016 -0700" }, "message": "MIPS32: Refactor implicit null checks in array/field get/set.\n\nRationale: on MIPS32 64-bit loads and stores may be performed\nas pairs of 32-bit loads/stores. Implicit null checks must be\nassociated with the first 32-bit load/store in a pair and not\nthe last. This change ensures proper association of said checks\n(a few were done after the last 32-bit load/store in a pair)\nand lays ground for further improvements in array/field get/set.\n\nTest: booted MIPS32 in QEMU\nTest: test-art-host-gtest\nTest: test-art-target-run-test-optimizing in QEMU\n\nChange-Id: I3674947c00bb17930790a7a47c9b7aadc0c030b8\n" }, { "commit": "c733dca42157cafe8751b558f1f8ab65efdeaa63", "tree": "1ab19705221989f57b93e95e8ff2f75108603061", "parents": [ "897b8f5da90b38b030826273f4c9bd8fbc32759e" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Fri May 13 16:11:47 2016 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Wed Aug 24 13:44:16 2016 -0700" }, "message": "MIPS64: Improve non-trivial 64-bit constant loading.\n\n- Add special case where the upper 32 bits of the constant are equal to\n the lower 32 bits of the constant. Use the \"dinsu\" instruction to\n replicate the bottom 32 bits into the top 32 bits.\n\n- Test output of LoadConst32()/LoadConst64() against various test\n constants.\n o Make the implementation of LoadConst64() into a template.\n o Using the template code for LoadConst64() implement test\n cases which simulate the computation of the value which the\n generated code sequence is actually supposed to load.\n o Add conditionally compiled code to verify that all of the\n various data paths through the LoadConst64() function\n actually get exercised.\n\nTest: Booted MIPS64 in QEMU, and ran assembler tests.\n\nChange-Id: Ie1ec050e65c666168a9ea582bae9fda97e4cf36a\n" }, { "commit": "953437bd51059801d92079295f728d0260efca31", "tree": "b52816b5092a143361ea3878ef0e06d311c4a56f", "parents": [ "c67d22ac6db73aaa9540294c86344bf8021495b3" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 24 08:30:46 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 24 13:20:32 2016 +0100" }, "message": "Revert \"Revert \"x86/x86-64: Avoid temporary for read barrier field load.\"\"\n\nFixed the fault handler recognizing the TEST instruction and\nfault address within the lock word. Added tests to 439-npe.\n\nBug: 29966877\nBug: 12687968\nTest: Tested with ART_USE_READ_BARRIER\u003dtrue on host.\nTest: Tested with ART_USE_READ_BARRIER\u003dtrue ART_HEAP_POISONING\u003dtrue on host.\n\nThis reverts commit ccf15bca330f9a23337b1a4b5850f7fcc6c1bf15.\n\nChange-Id: I8990def5f719c9205bf6e5fdba32027fa82bec50\n" }, { "commit": "ccf15bca330f9a23337b1a4b5850f7fcc6c1bf15", "tree": "8e271269eb0f3e40388311478fe441bfeb47ab47", "parents": [ "ccf06d8f19a37432de4a3b768747090adfbd18ec" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 23 17:48:38 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 23 17:48:38 2016 +0000" }, "message": "Revert \"x86/x86-64: Avoid temporary for read barrier field load.\"\n\nFault handler does not recognize the instruction\n F6 /0 ib TEST r/m8, imm8\nso we get crashes instead of NPEs.\n\nBug: 29966877\nBug: 12687968\n\nThis reverts commit ccf06d8f19a37432de4a3b768747090adfbd18ec.\n\nChange-Id: Ib7db3b59f44c0d3ed5e24a20b6c6ee596a89d709\n" }, { "commit": "ccf06d8f19a37432de4a3b768747090adfbd18ec", "tree": "fcb3ba46184db6882e695cecf1cfe495417593ae", "parents": [ "cf834d00de838272cf28f2382ffc26fe716aae5c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Aug 12 13:37:55 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 23 11:41:44 2016 +0100" }, "message": "x86/x86-64: Avoid temporary for read barrier field load.\n\nAdd TEST instructions for memory and immediate. Use the byte\nversion to avoid a temporary in read barrier field load.\n\nTest: Tested with ART_USE_READ_BARRIER\u003dtrue on host.\nTest: Tested with ART_USE_READ_BARRIER\u003dtrue ART_HEAP_POISONING\u003dtrue on host.\nBug: 29966877\nBug: 12687968\nChange-Id: Ia415d3c2e1ae1ff6dff11d72bbb7d96d5deed6ee\n" }, { "commit": "75214833572bcdebd498f566212b9240cdd66fcf", "tree": "ca6f684191fc713b4c019fd01f35ba06b158f931", "parents": [ "ca1d99f530429307bb9d13d7ca138a318bcb2670", "a75b01a549f0c86669dd24e53c9e3e74f0bf5b40" ], "author": { "name": "Colin Cross", "email": "ccross@android.com", "time": "Fri Aug 19 20:16:29 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Aug 19 20:16:29 2016 +0000" }, "message": "Merge \"Fix building tests with partial arch codegen support\"" }, { "commit": "a75b01a549f0c86669dd24e53c9e3e74f0bf5b40", "tree": "fbca55a54871421db00709e6bbb51e48c851069f", "parents": [ "3049b2a54b5b55d094fea603236f492c31b842e1" ], "author": { "name": "Colin Cross", "email": "ccross@android.com", "time": "Thu Aug 18 13:45:24 2016 -0700" }, "committer": { "name": "Colin Cross", "email": "ccross@android.com", "time": "Fri Aug 19 10:47:35 2016 -0700" }, "message": "Fix building tests with partial arch codegen support\n\nAdd conditionals around more code that is only used for codegen for\nspecific architectures, and move a few more files into the\narchitecture-specific codegen lists.\n\nTests: ART_HOST_CODEGEN_ARCHS\u003d\"x86_64 mips\" m -j ART_TARGET_CODEGEN_ARCHS\u003dsvelte test-art-host\nBug: 30928847\nChange-Id: I0444d15e1cafe4c9b13ff78718c3b13b544270e7\n" }, { "commit": "0b671c0408e98824e1f92b1ee951b210c090fe7a", "tree": "0bc58c031cd899aa856677fe8c9ffa376228806f", "parents": [ "36bf3a2d281892e7906d3eaf9d7455b0656c9a25" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Aug 19 12:02:34 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Aug 19 16:00:09 2016 +0100" }, "message": "Add support for Baker read barriers in SystemArrayCopy intrinsics.\n\nBenchmarks (ARM64) score variations on Nexus 5X with CPU\ncores clamped at 960000 Hz (aosp_bullhead-userdebug build):\n- Ritzperf - average (lower is better): -3.03% (slightly better)\n- CaffeineMark - average (higher is better): +1.26% (slightly better)\n- DeltaBlue (lower is better): -10.50% (better)\n- Richards - average (lower is better): -3.36% (slightly better)\n- SciMark2 - average (higher is better): +0.26% (virtually unchanged)\n\nDetails about Ritzperf benchmarks with meaningful variations\n(lower is better):\n- FormulaEvaluationActions.EvaluateAndApplyChanges: -13.26% (better)\n- FormulaEvaluationActions.EvaluateCascadingSums: -10.94% (better)\n- FormulaEvaluationActions.EvaluateComplexFormulas: -15.50% (better)\n- FormulaEvaluationActions.EvaluateFibonacci: -10.41% (better)\n- FormulaEvaluationActions.EvaluateLargeSums: +6.02% (worse)\n\nBoot image code size variation on Nexus 5X\n(aosp_bullhead-userdebug build):\n- total ARM64 framework Oat files size change:\n 107047632 bytes -\u003e 107154128 bytes (+0.10%)\n- total ARM framework Oat files size change:\n 90932028 bytes -\u003e 91009852 bytes (+0.09%)\n\nTest: ART host and target (ARM, ARM64) tests + Nexus 5X boot.\nBug: 29516905\nBug: 29506760\nBug: 12687968\nChange-Id: I85431368d09965687a0301ae2eb3c991f276ce5d\n" }, { "commit": "f77d156168496b9793d893980123efd0ad38d5ee", "tree": "9f06af1cf240eb851ee5a707d0688ebfa612b100", "parents": [ "12e097c84cef710fa4f254b1811ff70b876e9e9a" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Aug 08 15:14:18 2016 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Fri Aug 19 15:53:04 2016 +0100" }, "message": "ARM: VIXL32: Switch JNI compiler to use VIXL Assembler.\n\nChange-Id: I9f9ef1a9c9c9eb796d52980916e56e841aa52a0f\n" }, { "commit": "12e097c84cef710fa4f254b1811ff70b876e9e9a", "tree": "d8044470b0006a5ff22207ae589a8b05829dfdfa", "parents": [ "ba6b679bd34449ec56508966706ca1b8d5e7cb17" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Aug 08 15:13:26 2016 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Fri Aug 19 15:52:58 2016 +0100" }, "message": "ARM: VIXL32: Implement VIXL-based assembler.\n\nThis patch introduces new ARM assembler (Thumb2) based on VIXL and\nARM VIXL JNI Macro Assembler. Both are turned off by default (JNI\none will be turned on in the following patch).\n\nChange-Id: I5f7eb35da5318d7170b3c7e8553364ebe29cc991\n" }, { "commit": "ba6b679bd34449ec56508966706ca1b8d5e7cb17", "tree": "ec5985cc0f9e8a75c717513954d25d69e526065e", "parents": [ "f606c3a687e3eae94296ba74d2d820b6e37692ff" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Aug 15 14:22:07 2016 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Fri Aug 19 10:39:23 2016 +0100" }, "message": "ARM: Purge Arm32Assembler.\n\nUse Thumb2Assembler always. This originated from finding out that\nthe JNI tests are run using the Arm32Assembler however in real\nworld Thumb2Assembler is used for JNI. Therefore Arm32Assembler\ncode is dead except its own tests and the illegitimate use in\nJNI tests.\n\nChange-Id: I9ca6b83582bf97149a46690518ccb9312b1a3b68\n" }, { "commit": "fe74ba9ea6c2c47a02d2ba7436b3a603b459468c", "tree": "a3bba08767d44b60a38af6a0ad67dacb260d4daa", "parents": [ "85b1811f0de0cb8fb2a9ae37f53c6056a2de6867", "af4e42a0d210aa3aa5d52926536b2ca5c2952934" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Aug 15 10:03:32 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Aug 15 10:03:32 2016 +0000" }, "message": "Merge \"ARM64: VIXL: Support a newer version of VIXL.\"" }, { "commit": "2b3201a04dd7894dc916bc59e5a52427e4d1a3b2", "tree": "523549575272d006bd4a9d231c183b5e6c577f2c", "parents": [ "dce74be0c49e8a540affc0b5649a9cf8756b809b" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Aug 12 14:26:15 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Aug 12 14:30:44 2016 +0100" }, "message": "Fix duplicate checks in JNI macro assemblers.\n\nInstead of checking one register twice, check the other\nregister passed to the function.\n\nTest: Run ART test suite on host and Nexus 5.\nBug: 30739460\nChange-Id: If868ea14f5c192982488ed065b279a019b5b7cf4\n" }, { "commit": "af4e42a0d210aa3aa5d52926536b2ca5c2952934", "tree": "b64d683ba6ac11c0b7730df9a579aead2905dfff", "parents": [ "dce74be0c49e8a540affc0b5649a9cf8756b809b" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Aug 08 15:11:24 2016 +0100" }, "committer": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Fri Aug 12 13:22:34 2016 +0100" }, "message": "ARM64: VIXL: Support a newer version of VIXL.\n\nPlease note that compiling VIXL with -Wshadow is a known VIXL issue.\n\nThis will be resolved in a later version of VIXL, when we can drop\nthe deprecated API for getters and setters.\n\nFor more info take a look at VIXL_DEPRECATED in the VIXL source code.\n\nChange-Id: Iea30b1a7b065f9b16a92c6cc7ebdc50ef068b348\n" }, { "commit": "dce74be0c49e8a540affc0b5649a9cf8756b809b", "tree": "cdda95f53f6579d96aebe2ce3cf1773cfac21a9c", "parents": [ "3d1d18d74dfac5039b6093ddf04f74eee4f157a3", "cb3cf4a5c4edf0d9796ed08f2f4e1140f53dae4d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Aug 12 11:23:40 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Aug 12 11:23:40 2016 +0000" }, "message": "Merge \"ARM: Add vldm/vstm assembler support.\"" }, { "commit": "cb3cf4a5c4edf0d9796ed08f2f4e1140f53dae4d", "tree": "9ffb088c8bcd2ea68c387ba7093f83d7cd97eb65", "parents": [ "33699c9529add1c1ec4bb5dcb0807942709de224" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Fri Jul 15 15:01:13 2016 +0100" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Thu Aug 11 18:43:23 2016 +0100" }, "message": "ARM: Add vldm/vstm assembler support.\n\nChange-Id: Id97417de8ebd07fc1fbee5d17e4b1c620a2c44cc\n" }, { "commit": "961ea1286f670a9ac9fc673308a9cf56137acb95", "tree": "e4158b237c7527d18be3e9fbf5bac322df935aee", "parents": [ "33699c9529add1c1ec4bb5dcb0807942709de224" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 11 14:16:57 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 11 14:17:21 2016 +0100" }, "message": "x86/x86-64: Shorter fast-path for read barrier field load.\n\nTest: Tested with ART_USE_READ_BARRIER\u003dtrue on host.\nBug: 29966877\nBug: 12687968\nChange-Id: I73359495910dacb2cc28f1a21ef9e610bab5a476\n" }, { "commit": "dfdf1e5343ba9c05adff4cefeedd7d7b5fd49f6a", "tree": "3e68dfa7106d9e9d56c472dc4cd9590a3281bc28", "parents": [ "c21f1c5b293a2830ef4a06f032cebd98d9596d4a", "60b1e1d5e10869cf3f0692a97499e0dfedea3373" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Aug 10 00:20:25 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Aug 10 00:20:26 2016 +0000" }, "message": "Merge \"ART: Extract JNI macro assembler for arm\"" }, { "commit": "60b1e1d5e10869cf3f0692a97499e0dfedea3373", "tree": "2aa73972874af2c5aad9447cfe41f1f7ba608545", "parents": [ "5c6233c00f1f50e8539fdfffd06c31359eac8b89" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Aug 08 17:32:34 2016 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Aug 09 15:24:40 2016 -0700" }, "message": "ART: Extract JNI macro assembler for arm\n\nExtract the JNI assembler parts from the regular assembler.\n\nChange-Id: Ice39ffeb854f8651e93443dd69f4c9e0e802975c\nTest: m test-art-target (N6)\n" }, { "commit": "dcf3014718d9542927a4c8dc93701ce892484c84", "tree": "94f02d407c062abd836a97b76fd9c4adc99335f4", "parents": [ "5c6233c00f1f50e8539fdfffd06c31359eac8b89" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Aug 08 16:06:34 2016 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Aug 08 20:20:03 2016 -0700" }, "message": "ART: Extract JNI macro assembler for arm64\n\nExtract the JNI assembler parts from the regular assembler.\n\nChange-Id: I0b0ad32e18f585b75e9da0237afe082c25a1d291\nTest: m test-art-target (N9)\n" }, { "commit": "c0362b5f93a2d5d34f8a660804920dbb236ad625", "tree": "bc093f1e8a85c0d5201cbf541489a0ff5da33026", "parents": [ "af2962caff1a13ef3a9b3deb3f2e1c9bbdc5aed3", "9954e3b2fe94bf46100183e39478bc57b3a212a1" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon Aug 08 19:39:51 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Aug 08 19:39:51 2016 +0000" }, "message": "Merge \"ART: Extract JNI macro assembler for x86\"" }, { "commit": "1ace16bfe8727430809f1e83745e13c52f9610cd", "tree": "02f785b32920a10907753b8154f7b2f2232483de", "parents": [ "95a976a3d1842384ed71bcc6e6449de95ec69961" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Aug 05 09:01:50 2016 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Aug 08 11:44:25 2016 -0700" }, "message": "ART: Extract JNI macro assembler for x86-64\n\nExtract the JNI assembler parts from the regular assembler.\n\nTest: m test-art-host\nChange-Id: I291fb76ad9232123b4c1992488ee81fec3c1db47\n" }, { "commit": "9954e3b2fe94bf46100183e39478bc57b3a212a1", "tree": "97b4b7a3fb16ee0aa7fe1f1e0e5d7680540063c1", "parents": [ "95a976a3d1842384ed71bcc6e6449de95ec69961" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Aug 05 20:34:39 2016 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Aug 08 11:43:16 2016 -0700" }, "message": "ART: Extract JNI macro assembler for x86\n\nExtract the JNI assembler parts from the regular assembler.\n\nChange-Id: I0b47af03ca12798f58dafec716a529eb0edf9649\nTest: m test-art-host\n" }, { "commit": "3b165bc53c2f063e3a9c644d0edc7bc30c634884", "tree": "a408bcb65e848d76a22fcd0367a96ed2630a50b8", "parents": [ "11a59a48474caa818ddf344575aa6afc51f45590" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Aug 01 22:07:04 2016 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Aug 05 17:57:26 2016 -0700" }, "message": "ART: Extract macro assembler\n\nExtract macro assembler functionality used by the JNI compiler from\nthe assembler interface. Templatize the new interface so that\ntype safety ensures correct usage.\n\nChange-Id: Idb9f56e5b87e43ee6a7378853d8a9f01abe156b2\nTest: m test-art-host\n" }, { "commit": "1a2e5e67bc6fd9df4154f0add1d1163af6aa9bf2", "tree": "ace009be8b3d29fa54dff3c833aa4c2f67e6ba2f", "parents": [ "e250cb82e55e47009fdddbebaec9c3f09b36a41b", "3a656e183ab3131d4a0e1fa79acc79e8da762508" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Aug 04 16:46:17 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Aug 04 16:46:17 2016 +0000" }, "message": "Merge \"Thumb2: Clean up 16-bit LDR/STR detection.\"" }, { "commit": "3a656e183ab3131d4a0e1fa79acc79e8da762508", "tree": "fa68a3b838778c89cbcd3c6f234513edbb43312e", "parents": [ "3d6094531e3790b25c43e59fd6cd0b6b99d3447c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 02 14:57:56 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 04 16:52:11 2016 +0100" }, "message": "Thumb2: Clean up 16-bit LDR/STR detection.\n\nThe 16-bit LDR/STR sp, #N can be used for N \u003d (imm8 \u003c\u003c 2)\nbut it was previously used only for N \u003c 128. This cleans up\nthe 16-bit instruction availability calculation for this\ncase as well as for byte and half word loads and stores.\nHowever, only the LDR/STR sp, #N has impact on the code we\ncurrently generate in Optimizing.\n\nReduces aosp_hammerhead-userdebug boot.oat by 108KiB.\n\nTest: Run ART test suite on Nexus 5.\nChange-Id: Ie06d130a48efad10c23f8ff2596a51efd98d0761\n" }, { "commit": "087930f2be5a628c65db280a73fecf468899d983", "tree": "d7fbf94ce260ddbb722a3731fe393bc9ef6e1bbc", "parents": [ "3d6094531e3790b25c43e59fd6cd0b6b99d3447c" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Tue Aug 02 13:45:28 2016 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Tue Aug 02 15:47:28 2016 +0000" }, "message": "ARM64: Make the VIXL macro assembler part of ART ARM64\u0027s assembler.\n\nThis avoids a dynamic allocation of the VIXL macro assembler.\n\nChange-Id: I4cd62678d0978f1ad6f32ea0ce7279e09152be38\n" }, { "commit": "ba65cc4a71273904294245cb37ce70e5bce797e3", "tree": "d53a7a816ec4c8e5bdbf80729ac945787b27bf2c", "parents": [ "1a827a05afbffd5bee241f245f9aa3c40b4dbae4", "542451cc546779f5c67840e105c51205a1b0a8fd" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Aug 02 03:47:35 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Aug 02 03:47:35 2016 +0000" }, "message": "Merge \"ART: Convert pointer size to enum\"" }, { "commit": "542451cc546779f5c67840e105c51205a1b0a8fd", "tree": "11e09bb5abaee12dddffefbe7e425291076dfa7a", "parents": [ "85c4a4b8c9eabfe16e4e49f9b4aa78c1bf4be023" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Jul 26 09:02:02 2016 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Aug 01 18:54:48 2016 -0700" }, "message": "ART: Convert pointer size to enum\n\nMove away from size_t to dedicated enum (class).\n\nBug: 30373134\nBug: 30419309\nTest: m test-art-host\nChange-Id: Id453c330f1065012e7d4f9fc24ac477cc9bb9269\n" }, { "commit": "33dd909468e377aaa8f0ec27fc4b3cb4d8481119", "tree": "fc6c11800d7fa7ace2f44d0bf863f23b54084a18", "parents": [ "e304fc28c4a7d57532498239f9b52d2d5b8974d5" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Aug 01 15:55:36 2016 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Aug 01 16:11:10 2016 -0700" }, "message": "Fixed bug in disassembly of roundss/roundsd\n\nRationale:\nThese instructions should be marked as load, so that, using\nIntel syntax, destination (xmm0) appears at left hand side, as in\n roundss xmm0, xmm1\nand not the other way around. First I suspected a bug in the\nencoding (hence the test) and even the register allocator, but\nsince the code behaved correctly, only disassembly was really wrong.\n\nTest: disassembler_x86_test (but nothing for actual disassembly)\n\nBUG\u003d26327751\n\nChange-Id: I060ef57f4d5a64cdc04b97ae8a799d1c0d22da05\n" }, { "commit": "18ba121e7d706ce03b5b52f632b7c14cff685eab", "tree": "6ae5b61dcbe9a208dfb07d311052e3bb31477f57", "parents": [ "6e5e3b2e914cf4bdc5f17a6011fc2b1937eb9641" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Aug 01 14:11:20 2016 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Aug 01 14:11:20 2016 -0700" }, "message": "Added direct memory operand support for comiss/sd on x86.\n\nRationale:\nMemory operands allows for shorter instruction sequences.\nSomething that may be used e.g. the upcoming implementation\nof the round intrinsic.\n\nBug\u003d26327751\n\nChange-Id: Ifd976ed86917de1879fa036cbbbff5edf4fb741d\nTest: assembler_x86_test\n" }, { "commit": "06a46c44bf1a5cba6c78c3faffc4e7ec1442b210", "tree": "fa82ec7a787200e475e567a51c2839349a513021", "parents": [ "9755c262df1be7f5d5b98d038c8fd3734e974f9d" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Jul 19 15:00:40 2016 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Jul 27 20:02:48 2016 -0700" }, "message": "MIPS32: Improve string and class loads\n\nTested:\n- MIPS32 Android boots in QEMU\n- test-art-host-gtest\n- test-art-target-run-test-optimizing in QEMU, on CI20\n- test-art-target-gtest on CI20\n\nChange-Id: I70fd5d5267f8594c3b29d5a4ccf66b8ca8b09df3\n" }, { "commit": "2e4fcc99c12d09c47eb64828169211ce8c5a9a8d", "tree": "126d7a03e7efbcd09395f393cd19c19d64c17fdf", "parents": [ "4c489f48ef432126b8e7a84b61c1c13a7514c085" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Jul 11 14:00:46 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jul 19 09:41:31 2016 +0000" }, "message": "ARM: Fix shifted register offset mem address mode for load signed.\n\nFor example \u0027ldrsh r0, [sp, r1, LSL #2]\u0027 previously\nwas assembled as \u0027ldrh\u0027.\n\nTest: New test in assembler_thumb2_test.cc .\nChange-Id: I1d30724f0c2745b131876bffefdc0a780d76f6a1\n" }, { "commit": "5668e58daf0f54d6cc8a6919033acc3506fc86ee", "tree": "de19460ff3c2f940ce5b0f7036a4bf756b59ed4e", "parents": [ "24670a7aac24c7a9b661220ab76b36c75f1494c5", "97c72b76cf776228196c6abd33973ef751de61ad" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Jul 18 14:28:05 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jul 18 14:28:06 2016 +0000" }, "message": "Merge \"Fixes to build against new VIXL interface.\"" }, { "commit": "97c72b76cf776228196c6abd33973ef751de61ad", "tree": "7a78a2b19b0847281f8cf69af735b30b15732fa8", "parents": [ "1fd347303275a424d114c9833f954e8e27812554" ], "author": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Fri Jun 24 16:19:36 2016 +0100" }, "committer": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Fri Jul 15 09:48:07 2016 +0100" }, "message": "Fixes to build against new VIXL interface.\n\n- Fix namespace usage and use of deprecated functions.\n- Link all dependants to new libvixl-arm64 target for now.\n\nChange-Id: Iee6f299784fd663fc2a759f3ee816fdbc511e509\n" }, { "commit": "dc00f184b57086263587f1a1c1991336c07a8e4a", "tree": "3e4ad30844658b9ccc48f80def1b8de66e2e2622", "parents": [ "2c30a373428b8d19bf97866d5d323c4ca2fbca72" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Thu Jul 14 10:10:44 2016 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Thu Jul 14 13:09:51 2016 -0700" }, "message": "Revert \"Revert \"Dump more dex file data in oatdump\"\"\n\nDelete runtime to fix leak before callin exit.\n\nBug: 29462018\n\nThis reverts commit 9c05578dd2306231437bd290c0f70abc2bb3b6d8.\n\nChange-Id: Ica23ba0f2d07496d0e4a3288329945f612ac3b20\n" }, { "commit": "9c05578dd2306231437bd290c0f70abc2bb3b6d8", "tree": "0f9983cabba29de867051ea990221603f0ff765a", "parents": [ "8e2c56252aa9527bd9a82bdd147fdc46cf5deb9c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jul 14 09:24:30 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jul 14 09:24:30 2016 +0000" }, "message": "Revert \"Dump more dex file data in oatdump\"\n\nBreaks valgrind.\n\nBug: 29462018\n\nThis reverts commit 8e2c56252aa9527bd9a82bdd147fdc46cf5deb9c.\n\nChange-Id: If58cedcee75dd0eda8571e90d63e080a4709d773\n" }, { "commit": "8e2c56252aa9527bd9a82bdd147fdc46cf5deb9c", "tree": "4b300a176d73caae6c63768e951976a4fde993ef", "parents": [ "633c22de95fe6f80c0dd3176e15de4de3ee4bc79" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Tue Jun 21 15:14:20 2016 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Wed Jul 13 13:20:55 2016 -0700" }, "message": "Dump more dex file data in oatdump\n\nDump some statistics for each dex file along side with strings loaded\nfrom code and dex code bytes.\n\nSample output:\nCumulative dex file data\nNum string ids: 202809\nNum method ids: 320464\nNum field ids: 162822\nNum type ids: 68151\nNum class defs: 48061\nUnique strings loaded from dex code: 51049\nTotal strings loaded from dex code: 106651\nNumber of unique dex code items: 247929\nTotal number of dex code bytes: 11090574\n\nAdded content testing to oat dump test. No significant slowdown.\n\nTEST: test-art-host\nBug: 29462018\n\nChange-Id: I60effd3087d8c427eda4ee26431d5d77165b3939\n" }, { "commit": "ebdbf4b6f213fb98654604073985fb074c7beca1", "tree": "4901cc586575c92b87e72f159ce3335805e0fb91", "parents": [ "74c0d1bb67f9c6ee8306f0318ab7251d56dc99d6" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jul 07 15:37:02 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jul 08 14:33:16 2016 +0100" }, "message": "ARM: Use 64-bit literals for LoadDImmediate().\n\nAnd rewrite the medium-range long/fp literal to use\nMOVW+ADD+LDRD/VLDR because the old instruction sequence\nwas broken if the \"ADD ip, pc\" was not 4-byte aligned.\n\nTest: assembler_thumb2_test has been updated. Standard\n ART test suite has been run on host and Nexus 5.\nChange-Id: I37c6a62aa6e77c6a9701b5a1fb4db2e666c1eae9\n" }, { "commit": "e3fb245fbdb5e91cf8a9750504df40bd629e0080", "tree": "a3882db92b7942b2edd6add3090b5c875fef2d09", "parents": [ "1fdb340de4e608a88e8683c857cad5d0da2c16de" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue May 10 16:08:05 2016 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Fri Jul 01 14:10:14 2016 -0700" }, "message": "MIPS32: Improve method invocation\n\nImprovements include:\n- CodeGeneratorMIPS::GenerateStaticOrDirectCall() supports:\n - MethodLoadKind::kDirectAddressWithFixup (via literals)\n - CodePtrLocation::kCallDirectWithFixup (via literals)\n - MethodLoadKind::kDexCachePcRelative\n- 32-bit literals to support the above (not ready for general-\n purpose applications yet because RA is not saved in leaf\n methods, but is clobbered on MIPS32R2 when simulating\n PC-relative addressing (MIPS32R6 is OK because it has\n PC-relative addressing with the lwpc instruction))\n- shorter instruction sequences for recursive static/direct\n calls\n\nTested:\n- test-art-host-gtest\n- test-art-target-gtest and test-art-target-run-test-optimizing on:\n - MIPS32R2 QEMU\n - CI20 board\n - MIPS32R6 (2nd arch) QEMU\n\nChange-Id: Id5b137ad32d5590487fd154c9a01d3b3e7e044ff\n" }, { "commit": "e90049140fdfb89080e5cc9b000b0c9be8c18bcd", "tree": "66b45c052b6778fabd7847a44af5e610808fa867", "parents": [ "a77ceae14a7be2494874d9256327efa8c522e234" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jun 16 16:50:52 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jul 01 13:26:24 2016 +0100" }, "message": "Create a typedef for HInstruction::GetInputs() return type.\n\nAnd some other cleanup after\n https://android-review.googlesource.com/230742\n\nTest: No new tests. ART test suite passed (tested on host).\nChange-Id: I4743bf17544d0234c6ccb46dd0c1b9aae5c93e17\n" }, { "commit": "a77ceae14a7be2494874d9256327efa8c522e234", "tree": "e0f95e465187f0790617123257783fdf102b5547", "parents": [ "19c10147cd5f3270c8604d06c4a0e05cbc49e2f1", "a8aaf5a18ad42f3aea9afb3c8d383fe331798c9f" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Jun 30 13:41:55 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jun 30 13:41:55 2016 +0000" }, "message": "Merge \"MIPS32: Disassemble and test movf.fmt and movt.fmt (missed earlier)\"" }, { "commit": "a8aaf5a18ad42f3aea9afb3c8d383fe331798c9f", "tree": "56c7500a4c362f56d1c8fec471c61baf810b6658", "parents": [ "12e6e9f3f1352ed58ddd41c7f31831011695b9e4" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Mon Jun 27 14:48:20 2016 -0700" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jun 30 13:41:14 2016 +0000" }, "message": "MIPS32: Disassemble and test movf.fmt and movt.fmt (missed earlier)\n\nTest: ART gtest assembler_mips_test\nChange-Id: Iafedfafe6ccd76127461d66dfa7984f196be6bd2\n" }, { "commit": "34bccc1d85787658a5d04d2caa52b6eeca18710f", "tree": "37485e533353bcf1c86bd9cba749980dc403f39d", "parents": [ "bb8d501c9bb882a8927c6ceda07bf9577e06c3e1", "bde6ae1c6e1bc0ea1c8d80e3b0ec401517c6d7f7" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Jun 29 11:34:00 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Jun 29 11:34:00 2016 +0000" }, "message": "Merge \"ARM64: Ensure stricter alignment when loading and storing register pairs\"" }, { "commit": "5cb6513d516ad8003c9a69c374861578406bd188", "tree": "d1da9894e0b29692610b738247b13aa721f44238", "parents": [ "ece0c2e4dedd9122903bf0fc1d09f060309f8ead", "e652c122d8cc9697d368b9ceada9b377d091e4fd" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Jun 28 14:25:37 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jun 28 14:25:38 2016 +0000" }, "message": "Merge \"ARM assembler support for VCNT and VPADDL.\"" }, { "commit": "e652c122d8cc9697d368b9ceada9b377d091e4fd", "tree": "699f7f7bc88ff28d2b8f8e735ea48693aa653c95", "parents": [ "ca7399a1d7b3c92d73322adf54187fde31eee1bd" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Mon Jun 13 14:42:27 2016 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jun 28 13:29:29 2016 +0000" }, "message": "ARM assembler support for VCNT and VPADDL.\n\nTest: Gtest assembler_thumb2_test.\nChange-Id: I8a0e47da746e1c67650cb68196a9f661deed7383\n" }, { "commit": "bde6ae1c6e1bc0ea1c8d80e3b0ec401517c6d7f7", "tree": "b8b358dbab45a235af3413b6750db13419d81dc2", "parents": [ "47fe36d8dea0309e5ff08fc77244a371ba10d9db" ], "author": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Fri Jun 10 17:46:12 2016 +0100" }, "committer": { "name": "Anton Kirilov", "email": "anton.kirilov@linaro.org", "time": "Tue Jun 28 11:07:24 2016 +0100" }, "message": "ARM64: Ensure stricter alignment when loading and storing register pairs\n\nThe impetus for this change is the fact that loads that cross a 64 byte\nboundary and stores that cross a 16 byte boundary are a performance issue\non Cortex-A57 and A72.\n\nChange-Id: I81263dc72272192ad2d190b741a955f175880461\n" }, { "commit": "5c6a58734ef0c07dbb1e951e91c66b20a25160ce", "tree": "c9b4e7fda6b1314b3315e3ee84adc2e42fe74590", "parents": [ "1e28d1e145a898e34dbb43bb655d905653e9c1e9" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 27 13:50:16 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 27 15:53:11 2016 +0100" }, "message": "Clean up StringReferenceValueComparator and DexFile.\n\nAdd a helper function to StringReference, so that the\nStringReferenceValueComparator doesn\u0027t need to repeatedly\nreference the same StringReference variable which led to\nthe bug 29602109.\n\nAlso clean up the DexFile, moving definitions of functions\nthat depend on the dex_file-inl.h from dex_file.h also to\nthe dex_file-inl.h.\n\nTest: Run standard ART test suite on host and Nexus 5.\nBug: 29602109\nChange-Id: I83e2aa67173c62b3432c26478e528bbb53b6d09f\n" }, { "commit": "4d2bb1bc0a31e52910d2dcac60c685f5ef89ffbf", "tree": "1eb3bc323ffe117449212e21110fd8e781a9b3dd", "parents": [ "ee2d222cc5a2e498540b7f767e76d602efc27178" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 24 11:56:59 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 24 15:42:36 2016 +0100" }, "message": "Fix StringReferenceValueComparator.\n\nTest: Added a regression test in string_reference_test.cc,\nrun the standard ART test suite on host and Nexus 5.\n\nBug: 29602109\nChange-Id: Idcc059a07df048a0e3ece257b16b6556f242243e\n" }, { "commit": "37d6a3bbf5826abb73f872ed0bc4c6ae9553e274", "tree": "0fbe5fda78e251597f909f654014f2c25efa62e5", "parents": [ "739dc72773c5dee583a1d322f91b5abd61f9889d" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Jun 21 18:30:10 2016 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Jun 22 15:39:07 2016 -0700" }, "message": "Support the -i flag in the new dexdump.\n\nRationale:\nThe old dexdump supported the -i feature (ignore checksum failures).\nThis CL adds the same functionality to the new dexdump. Note that\nthis feature is, for example, useful to inspect DEX files that are\nextracted from images (with quickened instructions), since the\nchecksum is not always valid in those cases.\n\nBUG\u003d29548017\n\nChange-Id: I6017b2f3d789f450560b568297f43c62bf9453b1\n" }, { "commit": "dbb7f5bef10138ade0fb202da1d61f562b2df649", "tree": "f0aa4b390c534b215a6e000c865783cdd9852353", "parents": [ "b94b5706f0b8e2e1c7e1db22274f9f4bae0c4b5a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Mar 30 13:23:58 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jun 21 15:11:57 2016 +0100" }, "message": "Improve HLoadClass code generation.\n\nFor classes in the boot image, use either direct pointers\nor PC-relative addresses. For other classes, use PC-relative\naccess to the dex cache arrays for AOT and direct address of\nthe type\u0027s dex cache slot for JIT.\n\nFor aosp_flounder-userdebug:\n - 32-bit boot.oat: -252KiB (-0.3%)\n - 64-bit boot.oat: -412KiB (-0.4%)\n - 32-bit dalvik cache total: -392KiB (-0.4%)\n - 64-bit dalvik-cache total: -2312KiB (-1.0%)\n (contains more files than the 32-bit dalvik cache)\nFor aosp_flounder-userdebug forced to compile PIC:\n - 32-bit boot.oat: -124KiB (-0.2%)\n - 64-bit boot.oat: -420KiB (-0.5%)\n - 32-bit dalvik cache total: -136KiB (-0.1%)\n - 64-bit dalvik-cache total: -1136KiB (-0.5%)\n (contains more files than the 32-bit dalvik cache)\n\nBug: 27950288\nChange-Id: I4da991a4b7e53c63c92558b97923d18092acf139\n" }, { "commit": "3add9cb5e94202e65ec3c80f0b70b670d4fa63a1", "tree": "8a6b6def3ead8480bdd401534d0f148b4bbbfa13", "parents": [ "63e0a7d057adbe17ba0d34624d83f1120cb1162f" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Thu Apr 14 14:01:33 2016 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Tue Jun 14 10:31:31 2016 -0700" }, "message": "MIPS32: Assembler tests for MIPS32R6\n\nChange-Id: Iee3f4447a6182a769490b3235abeea9551111193\n" }, { "commit": "614968198625a6693666bdc1e5609e2f663f5638", "tree": "d4f427a47869bd902b24ed4fa7fe386030e2912a", "parents": [ "5fe5bd9f176378cbae3ebf4b5b2e729e276bb897", "cad3a4c890a5df1dfd294b74384ca3c27888cd0a" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon Jun 13 18:47:31 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jun 13 18:47:31 2016 +0000" }, "message": "Merge \"MIPS32: Improve offset calculations in loads and stores\"" }, { "commit": "cad3a4c890a5df1dfd294b74384ca3c27888cd0a", "tree": "141ab495cdd7e15e3c7c24979544820b122a325c", "parents": [ "d27fd40d5353141660c033156492efd639c4d048" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Jun 07 23:40:37 2016 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Fri Jun 10 14:51:25 2016 -0700" }, "message": "MIPS32: Improve offset calculations in loads and stores\n\nChange-Id: I6c3773e8bc1233bcda83d5b7254438ef69e9570d\n" }, { "commit": "372f10e5b0b34e2bb6e2b79aeba6c441e14afd1f", "tree": "1f29c2467c8909ef0e0147f37f176caa1bcd2ccc", "parents": [ "1b66fdf3f33c72dfdda4d31f6f17b6a0d8607402" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 17 16:30:10 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jun 02 19:04:20 2016 +0100" }, "message": "Refactor handling of input records.\n\nIntroduce HInstruction::GetInputRecords(), a new virtual\nfunction that returns an ArrayRef\u003c\u003e to all input records.\nImplement all other functions dealing with input records as\nwrappers around GetInputRecords(). Rewrite functions that\npreviously used multiple virtual calls to deal with input\nrecords, especially in loops, to prefetch the ArrayRef\u003c\u003e\nonly once for each instruction. Besides avoiding all the\nextra calls, this also allows the compiler (clang++) to\nperform additional optimizations.\n\nThis speeds up the Nexus 5 boot image compilation by ~0.5s\n(4% of \"Compile Dex File\", 2% of dex2oat time) on AOSP ToT.\n\nChange-Id: Id8ebe0fb9405e38d918972a11bd724146e4ca578\n" }, { "commit": "247250f28028a5b2260ba2eb0a7f555a183b996a", "tree": "5c144bbca4cadd3726e9887ef8cb910bbccfec48", "parents": [ "4020ecd536601213b3262b2a6a8bb922d594b994", "3224838dfe9c95330ad963286f2c47e9546d3b5c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 19 17:37:39 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 19 17:37:40 2016 +0000" }, "message": "Merge \"Clean up JNI calling convention callee saves.\"" }, { "commit": "4020ecd536601213b3262b2a6a8bb922d594b994", "tree": "fed5aaa53f80f368872bfcc963047ada5b12ab0b", "parents": [ "2f710e0b26049557ad52fdbfde49999e4f36d6c2", "f09d532a5eeda4b8c629c3d7aa207ac63c4a9070" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu May 19 17:25:26 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu May 19 17:25:26 2016 +0000" }, "message": "Merge \"MIPS32: java.lang.Math.round(float)\"" }, { "commit": "3224838dfe9c95330ad963286f2c47e9546d3b5c", "tree": "50d1b8759c61d392ecc159ede7efab94ecbfcde8", "parents": [ "db9fcb30402a2726564905c206fa23ee86e146c3" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 19 10:37:24 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 19 18:12:22 2016 +0100" }, "message": "Clean up JNI calling convention callee saves.\n\nPrecalculate callee saves at compile time and return them\nas ArrayRef\u003c\u003e instead of keeping then in a std::vector\u003c\u003e.\n\nChange-Id: I4fd7d2bbf6138dc31b0fe8554eac35b0777ec9ef\n" }, { "commit": "3b62593ba55f6bdb37ca84f64930654ff4f09464", "tree": "8b521397c856259c9049b52d86e40bfd2c84f0f4", "parents": [ "9858f04577d2ca7400660dba9b3abe8b33bab96c" ], "author": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Fri May 06 10:24:17 2016 +0600" }, "committer": { "name": "Serguei Katkov", "email": "serguei.i.katkov@intel.com", "time": "Fri May 06 17:55:14 2016 +0600" }, "message": "Add cmpb instruction to x86 and x86_64 assembler\n\nChange-Id: I43f41ef2fdf6475238f0987842aefb1c2eb6a36d\nSigned-off-by: Serguei Katkov \u003cserguei.i.katkov@intel.com\u003e\n" }, { "commit": "f09d532a5eeda4b8c629c3d7aa207ac63c4a9070", "tree": "7194c02dfbe75a1336a08b499ab94b0b590ff519", "parents": [ "4e377e58066ccef401276d7d0985521e5e63d1fb" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Fri Apr 22 12:06:34 2016 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Tue Apr 26 16:51:59 2016 -0700" }, "message": "MIPS32: java.lang.Math.round(float)\n\nBUG\u003d26327751\n\nChange-Id: I9ec0d600bbbbcf9e1ed07fbfc0ce9187a2ae5727\n" }, { "commit": "dbea8b4eacb62b357bce1bc299c8442788b288a1", "tree": "97a24b4ca4a55233ad2dd2247f5e287b91d506cc", "parents": [ "1de88ac1bdb7e371fef980501200288ea5ade612", "a64f249add4a0a9e93aa6f246045ca79f5916dcd" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Apr 25 17:05:29 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Apr 25 17:05:29 2016 +0000" }, "message": "Merge \"Revert \"Revert \"Thumb2: Reduce memory used for fixup dependencies.\"\"\"" }, { "commit": "a64f249add4a0a9e93aa6f246045ca79f5916dcd", "tree": "46b9b896a0922f40d3fc6d240460919a55a688c2", "parents": [ "900d7d44633675621e665536742a7a2b40dcc7f0" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Apr 25 12:43:50 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Apr 25 16:58:47 2016 +0100" }, "message": "Revert \"Revert \"Thumb2: Reduce memory used for fixup dependencies.\"\"\n\nFix: Correctly ignore dependencies of the non-expandable\nfixups rather than non-expandable dependents of any fixups.\n\nBug: 28343425\nBug: 28256882\n\nThis reverts commit d89e2418f2c6d9897fee219f8df9c20ca93c80db.\n\nChange-Id: I7161fbfd094ce1ddc097826b53c894a7377a2b9d\n" }, { "commit": "27983255b19b633e91cf62883035b8af02b94eb0", "tree": "9ad9f1e0be35c475be8bc23730fee17975c68766", "parents": [ "88b891534b7b9218faa7f021e5b0768a7b519ae3", "3e0e7173c0cdfc57dba39fe781e30d187d50fa9c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Apr 25 13:50:13 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Apr 25 13:50:13 2016 +0000" }, "message": "Merge \"Reduce memory lost by ArenaAllocator for large allocations.\"" }, { "commit": "3e0e7173c0cdfc57dba39fe781e30d187d50fa9c", "tree": "8552d3f59307098dca69bfbcf64228c2c70c2496", "parents": [ "4f4a6c47ef269c68bc136f0805e5e99512d970b7" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Apr 22 18:07:13 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Apr 25 13:57:56 2016 +0100" }, "message": "Reduce memory lost by ArenaAllocator for large allocations.\n\nWhen allocating from a new arena, check if the old arena has\nmore remaining space than the new one after the current\nallocation. If so, keep using the old arena to reduce the\namount of \"lost\" arena memory. This can happen when we try\nto allocate more than half the default arena size. If the\nallocation exceeds the default arena size, it\u0027s very likely\nto happen even though the ArenaPool could still provide some\nmuch larger previously allocated arena.\n\nAlso avoid artithmetic overflow when checking if the\nrequest can be satisfied from the current arena.\nAnd abort immediately if calloc() fails.\n\nBug: 28173563\nBug: 28256882\nChange-Id: I1b4bda5d3f32ecd95fbd11addd1f0ca6dcc33e45\n" }, { "commit": "d89e2418f2c6d9897fee219f8df9c20ca93c80db", "tree": "86cc7ff6e15d316be62f9621d4f34e1ebc1eb07f", "parents": [ "1f2ce44db2613a1e60a66c3c454834b72e994f57" ], "author": { "name": "Guang Zhu", "email": "guangzhu@google.com", "time": "Sun Apr 24 05:17:17 2016 +0000" }, "committer": { "name": "Guang Zhu", "email": "guangzhu@google.com", "time": "Sun Apr 24 05:17:17 2016 +0000" }, "message": "Revert \"Thumb2: Reduce memory used for fixup dependencies.\"\n\nBug: 28343425\n\nThis reverts commit 1f2ce44db2613a1e60a66c3c454834b72e994f57.\n\nChange-Id: I39edb37fb6fa4e84ac3fd0e11650fbb92d05ffcb\n" }, { "commit": "1f2ce44db2613a1e60a66c3c454834b72e994f57", "tree": "72d4f3a908b97ed9b3ce4d52f3e30703f7367fe5", "parents": [ "1bfc7e5ebf22aac51019937849499f3d7f389db0" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Apr 22 12:16:29 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Apr 22 15:39:46 2016 +0100" }, "message": "Thumb2: Reduce memory used for fixup dependencies.\n\nMark fixups for far backward branches as 32-bit from the\nbeginning and ignore their dependencies since they cannot\nbe expanded anymore. This reduces the memory used by the\nfixup_dependents_ when compiling methods with a lot of\nslow paths.\n\nBug: 28256882\nChange-Id: I0b7155ed8970b69703fa9c4666d9c4961e425721\n" }, { "commit": "bb661c0f0cb72d4bbfc2e251f6ded6949a713292", "tree": "4fe7e66f3385b1955934d3ec6f02e00bde6e13b8", "parents": [ "f7cda8088ec57ab1422f85f08df78e217a9f7094" ], "author": { "name": "Bilyan Borisov", "email": "bilyan.borisov@linaro.org", "time": "Mon Apr 04 16:27:32 2016 +0100" }, "committer": { "name": "Bilyan Borisov", "email": "bilyan.borisov@linaro.org", "time": "Fri Apr 22 13:33:30 2016 +0100" }, "message": "Refactor use of __ANDROID__ macro\n\nWe use the __ANDROID__ macro, which is provided by the toolchain, in\nnumerous places. This patch refactors the usage of this by defining a\nnew macro, ART_TARGET_ANDROID, that is being passed during build to\nART_TARGET_CFLAGS in Android.common_build.mk on the same line as\nART_TARGET. The codebase currently assumes that the existence of the\n__ANDROID__ macro implies that we are compiling art for an android\ntarget device. This is because, currently, target builds are compiled\nwith target toolchains that provide the macro, while host toolchains\ndo not. With this change this assumption is still preserved. However,\nin a future patch we will add the ability to compile art for a linux\ntarget, and in that case the ART_TARGET_ANDROID macro won\u0027t be passed\nanymore.\n\nChange-Id: I1f3a811aa735c87087d812da27fc6b08f01bad51\n" }, { "commit": "c6b5627c25ff5653e97ccff8c5ccf6ac967b6f83", "tree": "8cec0d66bdd5e5a9be14bbb881eb36d09868ab39", "parents": [ "a584db5460a31198bf621cdacf5bc304a984efa4" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 20 18:45:25 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 20 19:40:35 2016 +0100" }, "message": "Fix HInstruction::ReplaceInput(), allow no-op.\n\nAllow HInstruction::ReplaceInput() to be called with\na `replacement` being the same as the old input and\ndo nothing in that case.\n\nThis is a follow-up to\n https://android-review.googlesource.com/216923\nwhere I erroneously assumed that it never happens.\n\nAlso adhere to the standard C++ std::forward_list\u003c\u003e\nsemantics in the single-element overload of\n`IntrusiveForwardList\u003c\u003e::splice_after()`.\n\nBug: 28173563\nChange-Id: I5cea14c212b1083f90ffe6b5b53324ad663d57d8\n" }, { "commit": "9152fed693f5d823ef29c373d658adc67fa92fe7", "tree": "ef0ec2b7332db9e0361d61dcb588518103636a5e", "parents": [ "ac6d660672c21a0ace14276e9c356906218b4412" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 20 14:39:47 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 20 14:39:47 2016 +0100" }, "message": "Thumb2: Fix EmitJumpTables() to extend buffer only if needed.\n\nBug: 28256882\nChange-Id: I15227535c0fcb73c04b0b05160852c4b1bebee49\n" }, { "commit": "46817b876ab00d6b78905b80ed12b4344c522b6c", "tree": "6715bee60b0682a10437866c9617cb442146aa2f", "parents": [ "f59149a151ee694484e21da7b3b207920dead5a6" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Mar 29 12:21:58 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Apr 19 18:33:06 2016 +0100" }, "message": "Use iterators \"before\" the use node in HUserRecord\u003c\u003e.\n\nCreate a new template class IntrusiveForwardList\u003c\u003e that\nmimicks std::forward_list\u003c\u003e except that all allocations\nare handled externally. This is essentially the same as\nboost::intrusive::slist\u003c\u003e but since we\u0027re not using Boost\nwe have to reinvent the wheel.\n\nUse the new container to replace the HUseList and use the\niterators to \"before\" use nodes in HUserRecord\u003c\u003e to avoid\nthe extra pointer to the previous node which was used\nexclusively for removing nodes from the list. This reduces\nthe size of the HUseListNode by 25%, 32B to 24B in 64-bit\ncompiler, 16B to 12B in 32-bit compiler. This translates\ndirectly to overall memory savings for the 64-bit compiler\nbut due to rounding up of the arena allocations to 8B, we\ndo not get any improvement in the 32-bit compiler.\n\nCompiling the Nexus 5 boot image with the 64-bit dex2oat\non host this CL reduces the memory used for compiling the\nmost hungry method, BatteryStats.dumpLocked(), by ~3.3MiB:\n\nBefore:\n MEM: used: 47829200, allocated: 48769120, lost: 939920\n Number of arenas allocated: 345,\n Number of allocations: 815492, avg size: 58\n ...\n UseListNode 13744640\n ...\nAfter:\n MEM: used: 44393040, allocated: 45361248, lost: 968208\n Number of arenas allocated: 319,\n Number of allocations: 815492, avg size: 54\n ...\n UseListNode 10308480\n ...\n\nNote that while we do not ship the 64-bit dex2oat to the\ndevice, the JIT compilation for 64-bit processes is using\nthe 64-bit libart-compiler.\n\nBug: 28173563\nChange-Id: I985eabd4816f845372d8aaa825a1489cf9569208\n" }, { "commit": "979fb0090c5c9de1da62735b8611a3c9028ed0aa", "tree": "544d97aa662329876c74780f95ed4f6fcc3a4542", "parents": [ "05241f4edbf6960aac7c04b0b98d05f16a23962b", "c01a66465a398ad15da90ab2bdc35b7f4a609b17" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Apr 15 18:55:20 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Apr 15 18:55:20 2016 +0000" }, "message": "Merge \"Fix: correctly destruct VIXL labels.\"" }, { "commit": "c01a66465a398ad15da90ab2bdc35b7f4a609b17", "tree": "e85cb2aa05be5c1491814fa83b94748439b8394b", "parents": [ "dad35b0762f97ce79ce3b9a35c9df5021b7dbd17" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Fri Apr 15 11:54:06 2016 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Fri Apr 15 11:54:06 2016 +0100" }, "message": "Fix: correctly destruct VIXL labels.\n\nBug: 27505766\nChange-Id: I077465e3d308f4331e7a861902e05865f9d99835" }, { "commit": "6134ba19ac3a9ed9a4a88fac787fcfcea9fd712b", "tree": "cba6a84457c976c73e4976b1ffef323058a0fc38", "parents": [ "8d4b37ed048487561358e13e2a18ad9ca0dab3c0" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Apr 14 11:27:34 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Apr 14 11:27:34 2016 +0100" }, "message": "Fix CFI fixups for long branches on MIPS.\n\nChange-Id: Ibc078e6dc5d7ef423c6a3db855f19f1426e0ea5a\n" }, { "commit": "93205e395f777c1dd81d3f164cf9a4aec4bde45f", "tree": "1d08efd9b7bca9fe23df9ae9489c5dd575d3c6df", "parents": [ "6990775e323cd9164d6cc10955a047b9d9f15f32" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 13 11:59:46 2016 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Apr 13 17:50:16 2016 +0100" }, "message": "Move Assemblers to the Arena.\n\nAnd clean up some APIs to return std::unique_ptr\u003c\u003e instead\nof raw pointers that don\u0027t communicate ownership.\n\nChange-Id: I3017302307a0253d661240750298802fb0d9585e\n" }, { "commit": "cac5a7e871f1f346b317894359ad06fa7bd67fba", "tree": "2df7d4892216a7c976dfe848c9893cb5eb8fa6a5", "parents": [ "6f51d7756a9c66007fe7666b19399e1f60ff6092" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Feb 22 10:39:50 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Mar 29 19:27:40 2016 +0100" }, "message": "Optimizing: Improve const-string code generation.\n\nFor strings in the boot image, use either direct pointers\nor pc-relative addresses. For other strings, use PC-relative\naccess to the dex cache arrays for AOT and direct address of\nthe string\u0027s dex cache slot for JIT.\n\nFor aosp_flounder-userdebug:\n - 32-bit boot.oat: -692KiB (-0.9%)\n - 64-bit boot.oat: -948KiB (-1.1%)\n - 32-bit dalvik cache total: -900KiB (-0.9%)\n - 64-bit dalvik cache total: -3672KiB (-1.5%)\n (contains more files than the 32-bit dalvik cache)\nFor aosp_flounder-userdebug forced to compile PIC:\n - 32-bit boot.oat: -380KiB (-0.5%)\n - 64-bit boot.oat: -928KiB (-1.0%)\n - 32-bit dalvik cache total: -468KiB (-0.4%)\n - 64-bit dalvik cache total: -1928KiB (-0.8%)\n (contains more files than the 32-bit dalvik cache)\n\nBug: 26884697\nChange-Id: Iec7266ce67e6fedc107be78fab2e742a8dab2696\n" }, { "commit": "c49618160d5fa64ca4883d2e09fa34b83491c8ea", "tree": "50065864dd6131a19c119eef877e936a44ec5778", "parents": [ "7ee5bc54fbe1bf5218696e63a80e76cd0c8ea387" ], "author": { "name": "Alex Light", "email": "allight@google.com", "time": "Wed Mar 23 10:20:41 2016 -0700" }, "committer": { "name": "Alex Light", "email": "allight@google.com", "time": "Thu Mar 24 15:17:16 2016 -0700" }, "message": "Add support for Dex version 37 in Runtime.\n\nWe are skipping version 36 of the dex file format due to a bug in\nDalvik dating back to ICS where dex files marked version 036 would\nerroneously be accepted.\n\nBug: 27538761\nBug: 27809626\n\nChange-Id: Ic053f7e25f5a8c3df83ff34b6656528824b2df12\n" } ], "next": "51aff3a6564303cab0b7ac82495b4e2e349c6ff3" }