)]}' { "log": [ { "commit": "e943c3b831dc0da4a6b09e940ae25c3285850e96", "tree": "b4756bbc16f49d50087a881b40722657451e6eac", "parents": [ "7c06aef061fa176331b77a88c1ff2c6ae401a5f0", "d28f4a00933a4a3b8d5e9db73b8532924d0f989d" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Mar 18 12:37:03 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Mar 18 12:37:03 2016 +0000" }, "message": "Merge \"Generate native debug stackmaps before calls as well.\"" }, { "commit": "d28f4a00933a4a3b8d5e9db73b8532924d0f989d", "tree": "1205844a68ee9e2c502f8ecbfd2d5cf96acd4190", "parents": [ "fbc61e19578d281d05728bcd120e1ace57c2fbd8" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Mar 14 17:14:24 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Mar 17 16:58:55 2016 +0000" }, "message": "Generate native debug stackmaps before calls as well.\n\nThe debugger looks up PC of the call instruction, so the runtime\u0027s\nstackmap is not sufficient since it is at PC after the instruction.\n\nChange-Id: I0dd06c0b52e8079ea5d064ea10beb12c93584092\n" }, { "commit": "a5c4a4060edd03eda017abebc85f24cffb083ba7", "tree": "85f69512d33c19d82e172a490a241f3a17d66560", "parents": [ "713c519db15aaa8d6f33b744fd28adddb97a07c2" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Mar 15 15:02:50 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Mar 16 16:49:36 2016 +0000" }, "message": "Make art::HCompare support boolean, byte, short and char inputs.\n\nAlso extend tests covering the IntegerSignum, LongSignum,\nIntegerCompare and LongCompare intrinsics and their\ntranslation into an art::HCompare instruction.\n\nBug: 27629913\nChange-Id: I0afc75ee6e82602b01ec348bbb36a08e8abb8bb8\n" }, { "commit": "914d71ead70bb6f2084b2ed39a9fd58fd014f67d", "tree": "50f30d6e47d18aa6c3ccec9f05727b4898268b20", "parents": [ "1583e624d4c970d8e571b265b9a8f08402d91f82", "2ae48182573da7087bffc2873730bc758ec29696" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Mar 16 14:40:08 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Mar 16 14:40:08 2016 +0000" }, "message": "Merge \"Clean up NullCheck generation and record stats about it.\"" }, { "commit": "2ae48182573da7087bffc2873730bc758ec29696", "tree": "d6955329ad876aefd477f7ef8905b070b9ab95dd", "parents": [ "6915898b28cea6c9836ca1be6814d87e89cc6d76" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Mar 16 14:05:09 2016 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Mar 16 14:10:27 2016 +0000" }, "message": "Clean up NullCheck generation and record stats about it.\n\nThis removes redundant code from the generators and allows for easier\nstat recording.\n\nChange-Id: Iccd4368f9e9d87a6fecb863dee4e2145c97851c4\n" }, { "commit": "e5671618d19489ad0781ec0d204c7765317170cf", "tree": "317d451ebf639f89e91d4c1e482d950579da0a0f", "parents": [ "d35f4a2eacf9ee9c9d75bb0c00eec7ae31ad1949" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Mar 16 11:03:54 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Mar 16 11:14:20 2016 +0000" }, "message": "Accept boolean as an input of HDivZeroCheck.\n\nAll our arithmetic operations accept it.\n\nbug:27624718\nChange-Id: I1f6bb95dc77ecb3fb2fcabb35a93b31c524bfa0a\n" }, { "commit": "7fc6350f6f1ab04b52b9cd7542e0790528296cbe", "tree": "26a33ef7bb2e49a9b7c7d9436194a92cb447b317", "parents": [ "b7f257f353b1eb2db2732939a0404c118316891d" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Tue Feb 09 17:15:29 2016 +0000" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Fri Mar 11 12:49:27 2016 +0000" }, "message": "Integrate BitwiseNegated into shared framework.\n\nShare implementation between arm and arm64.\n\nChange-Id: I0dd12e772cb23b4c181fd0b1e2a447470b1d8702\n" }, { "commit": "01c30e8dbc45bdc5d922cef6e5a404be7bed0e8c", "tree": "45d5c735386d3253e65a986b15e3eab9b9bf75cd", "parents": [ "af86c4e44184bd17411de330d48aad7784d569d4", "a1de9188a05afdecca8cd04ecc4fefbac8b9880f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Feb 26 16:39:57 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Feb 26 16:39:57 2016 +0000" }, "message": "Merge \"Optimizing: Reduce memory usage of HInstructions.\"" }, { "commit": "a1de9188a05afdecca8cd04ecc4fefbac8b9880f", "tree": "a671c8aef814ccf194e5c3950a551f2711516c53", "parents": [ "950d063395c7cecbbe372fd607468018d661a35c" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Feb 25 11:37:38 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Feb 26 16:01:59 2016 +0000" }, "message": "Optimizing: Reduce memory usage of HInstructions.\n\nPack narrow fields and flags into a single 32-bit field.\n\nChange-Id: Ib2f7abf987caee0339018d21f0d498f8db63542d\n" }, { "commit": "9ff0d205fd60cba6753a91f613b198ca2d67f04d", "tree": "86689672064d66d2c473045f934f948211ba0389", "parents": [ "950d063395c7cecbbe372fd607468018d661a35c" ], "author": { "name": "Kevin Brodsky", "email": "kevin.brodsky@linaro.org", "time": "Mon Jan 11 13:43:31 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Feb 25 16:26:13 2016 +0000" }, "message": "Optimizing: ARM64 negated bitwise operations simplification\n\nUse negated instructions on ARM64 to replace [bitwise operation + not]\npatterns, that is:\na \u0026 ~b (BIC)\na | ~b (ORN)\na ^ ~b (EON)\n\nThe simplification only happens if the Not is only used by the bitwise\noperation. It does not happen if both inputs are Not\u0027s (this should be\nhandled by a generic simplification applying De Morgan\u0027s laws).\n\nChange-Id: I0e112b23fd8b8e10f09bfeff5994508a8ff96e9c\n" }, { "commit": "4a0dad67867f389e01a5a6c0fe381d210f687c0d", "tree": "91f1e70f4a2d0bd32aa7eb51e546f5330d72f772", "parents": [ "d15ede2df7d157ea5480614fd18c2bf0d37a6c2a" ], "author": { "name": "Artem Udovichenko", "email": "artem.u@samsung.com", "time": "Tue Jan 26 12:28:31 2016 +0300" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Feb 25 10:14:30 2016 +0000" }, "message": "Revert \"Revert \"ARM/ARM64: Extend support of instruction combining.\"\"\n\nThis reverts commit 6b5afdd144d2bb3bf994240797834b5666b2cf98.\n\nChange-Id: Ic27a10f02e21109503edd64e6d73d1bb0c6a8ac6\n" }, { "commit": "9cd6d378bd573cdc14d049d32bdd22a97fa4d84a", "tree": "be293c89806b919143b7dcd203bae14f5f4eaf04", "parents": [ "0e02ee9efbf1dbdde05d2b10f7307bbe191c52f5" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Feb 09 15:24:47 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Feb 24 10:25:29 2016 +0000" }, "message": "Associate slow paths with the instruction that they belong to.\n\nAlmost all slow paths already know the instruction they belong to,\nthis CL just moves the knowledge to the base class as well.\n\nThis is needed to be be able to get the corresponding dex pc for\nslow path, which allows us generate better native line numbers,\nwhich in turn fixes some native debugging stepping issues.\n\nChange-Id: I568dbe78a7cea6a43a4a71a014b3ad135782c270\n" }, { "commit": "c7098ff991bb4e00a800d315d1c36f52a9cb0149", "tree": "3a150e927bc7f4894f5b148ec6f5a2b796cdd80d", "parents": [ "5322e55ab9a15996a197456ca39d9c77488cd5c1" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Feb 09 14:30:11 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Feb 24 10:21:57 2016 +0000" }, "message": "Remove HNativeDebugInfo from start of basic blocks.\n\nWe do not require full environment at the start of basic block.\nThe dex pc contained in basic block is sufficient for line mapping.\n\nChange-Id: I5ba9e5f5acbc4a783ad544769f9a73bb33e2bafa\n" }, { "commit": "c0b601b5e4c1add5eefd45f2f4d2c376a20ba4d4", "tree": "5afda879812dd7984f2d5970d4ff4ab3bc22a7d0", "parents": [ "b3ba4ec3fac34f0a45aa654ef88033b2f34c3640" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Feb 08 14:20:45 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Feb 15 13:11:04 2016 +0000" }, "message": "ART: Implement HSelect with CSEL/FCSEL on arm64\n\nChange-Id: I549af0cba3c5048066a2d1206b78a70b496d349e\n" }, { "commit": "6e332529c33be4d7dae5dad3609a839f4c0d3bfc", "tree": "cedd2e1beb170fd5821136fe974e3f34adfcddc2", "parents": [ "d3caabd4f85f86dd744da432993e12935d843a83" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Feb 02 16:15:27 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Feb 12 15:17:50 2016 +0000" }, "message": "ART: Remove HTemporary\n\nChange-Id: I21b984224370a9ce7a4a13a9652503cfb03c5f03\n" }, { "commit": "ca0bf0349f8da35b284df49732e30eeb62591034", "tree": "5275be61f01748fc01137147740a19b30f2142a6", "parents": [ "f637d80872d418fc62ee1d40b19e1f5a676d1399" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Feb 09 12:49:18 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Feb 09 12:49:18 2016 +0000" }, "message": "Fix ARM64 Baker\u0027s read barrier fast path for ArraySet.\n\nDo not exhaust the pool of scratch (temporary) registers\ngratuitously when emitting an instrumented array load with a\nlarge constant index.\n\nBug: 26817006\nBug: 12687968\nChange-Id: I65a4fe676aa3c9e2c8d7e26195d9af6432c83ff9\n" }, { "commit": "a19616e3363276e7f2c471eb2839fb16f1d43f27", "tree": "ad3e7fd0f53229e95fb0443586fc30eedabe6967", "parents": [ "9fba3f67a0792ad5eeb495e489d11a87211c318f" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Feb 01 18:57:58 2016 -0800" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Feb 05 09:26:21 2016 -0800" }, "message": "Implemented compare/signum intrinsics as HCompare\n(with all code generation for all)\n\nRationale:\nAt HIR level, many more optimizations are possible, while ultimately\ngenerated code can take advantage of full semantics.\n\nChange-Id: I6e2ee0311784e5e336847346f7f3c4faef4fd17e\n" }, { "commit": "5f16c05407ed5f7f72fa761263fd5eac37de0077", "tree": "69983c047840a25851ad570eb838675284ccaa56", "parents": [ "b86f963ce95b25bfae892fa425ab02f2fb706f87", "4a6a67ca93289b232a620bdf8bf30ff8b7b0b428" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Feb 02 14:36:58 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Feb 02 14:36:58 2016 +0000" }, "message": "Merge \"Remove unused DMB code paths in the ARM64 Optimizing Compiler\"" }, { "commit": "9ff1de06d6ed1da36f7e976224a2d13e5e9882bf", "tree": "9121c384f3e0375fccfa4ca9f71c7d86baf38904", "parents": [ "bee600ff66e3e233274faa1391890ff424a8244e", "a42363f79832a6e14f348514664dc6dc3edf9da2" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 28 16:09:16 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jan 28 16:09:16 2016 +0000" }, "message": "Merge \"Implement first kind of polymorphic inlining.\"" }, { "commit": "a42363f79832a6e14f348514664dc6dc3edf9da2", "tree": "bcd43acdf9903a704b566af00b5c740786284b7b", "parents": [ "9cea9139033a4d04437ebc5542e9466fd67137fe" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Dec 17 14:57:09 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jan 28 15:55:46 2016 +0000" }, "message": "Implement first kind of polymorphic inlining.\n\nAdd HClassTableGet to fetch an ArtMethod from the vtable or imt,\nand compare it to the only method the profiling saw.\n\nChange-Id: I76afd3689178f10e3be048aa3ac9a97c6f63295d\n" }, { "commit": "74eb1b264691c4eb399d0858015a7fc13c476ac6", "tree": "0b6fc4f3003d50bf6c388601013cdfc606e53859", "parents": [ "75fd2a8ab9b4aff59308034da26eb4986d10fa9e" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Dec 14 11:44:01 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 28 15:50:27 2016 +0000" }, "message": "ART: Implement HSelect\n\nThis patch adds a new HIR instruction to Optimizing. HSelect returns\none of two inputs based on the outcome of a condition.\n\nThis is only initial implementation which:\n - defines the new instruction,\n - repurposes BooleanSimplifier to emit it,\n - extends InstructionSimplifier to statically resolve it,\n - updates existing code and tests accordingly.\n\nCode generators currently emit fallback if/then/else code and will be\nupdated in follow-up CLs to use platform-specific conditional moves\nwhen possible.\n\nChange-Id: Ib61b17146487ebe6b55350c2b589f0b971dcaaee\n" }, { "commit": "b3e773eea39a156b3eacf915ba84e3af1a5c14fa", "tree": "6c0d3a748d7b445a0d776ed306c7add43a0e1dd3", "parents": [ "05aeb408f292d8d94af1646a94bc69faf77f0b46" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Jan 26 11:28:37 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 28 15:48:00 2016 +0000" }, "message": "ART: Implement support for instruction inlining\n\nOptimizing HIR contains \u0027non-materialized\u0027 instructions which are\nemitted at their use sites rather than their defining sites. This\nwas not properly handled by the liveness analysis which did not\nadjust the use positions of the inputs of such instructions.\nDespite the analysis being incorrect, the current use cases never\nproduce incorrect code.\n\nThis patch generalizes the concept of inlined instructions and\nupdates liveness analysis to set the compute use positions correctly.\n\nChange-Id: Id703c154b20ab861241ae5c715a150385d3ff621\n" }, { "commit": "4a6a67ca93289b232a620bdf8bf30ff8b7b0b428", "tree": "54e8c8fad3de00a8edd2fb8766bdfb0e2b6fc533", "parents": [ "2aaf58e90c9229610b2a16644e9866b6741ce9ca" ], "author": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Wed Jan 27 09:19:56 2016 +0000" }, "committer": { "name": "Serban Constantinescu", "email": "serban.constantinescu@linaro.org", "time": "Wed Jan 27 21:24:08 2016 +0000" }, "message": "Remove unused DMB code paths in the ARM64 Optimizing Compiler\n\nCurrently all ARM64 CPUs will be using the acquire-release code paths.\nThis patch removes the instruction set feature PreferAcquireRelease()\nas well as all the unused DMB code paths.\n\nChange-Id: I61c320d6d685f96c9e260f25eac3593907793830\nSigned-off-by: Serban Constantinescu \u003cserban.constantinescu@linaro.org\u003e\n" }, { "commit": "7d9f95f29d07c455c3ab76d89b7952755a3e0a28", "tree": "155e5e1f0a88f5d5c713f3a248741389bdc8c5b0", "parents": [ "a7d507eb0fc55240700232a0b6269d1388e9b5a5", "44015868a5ed9f6915d510ade42e84949b719e3a" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 22 14:20:37 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jan 22 14:20:37 2016 +0000" }, "message": "Merge \"Revert \"Revert \"ARM64 Baker\u0027s read barrier fast path implementation.\"\"\"" }, { "commit": "44015868a5ed9f6915d510ade42e84949b719e3a", "tree": "c23fd6c5de3d727ff310ef6fe06574a502133150", "parents": [ "28a2ff0bd6c30549f3f6465d8316f5707b1d072f" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 22 11:47:17 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 22 11:47:17 2016 +0000" }, "message": "Revert \"Revert \"ARM64 Baker\u0027s read barrier fast path implementation.\"\"\n\nThis reverts commit 28a2ff0bd6c30549f3f6465d8316f5707b1d072f.\n\nBug: 12687968\nChange-Id: I6e25c70f303368629cdb1084f1d7039261cbb79a\n" }, { "commit": "6b5afdd144d2bb3bf994240797834b5666b2cf98", "tree": "d536cd7b3aaf55c563e82c2c522521a91b2bb953", "parents": [ "debeb98aaa8950caf1a19df490f2ac9bf563075b" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jan 22 09:31:52 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jan 22 09:31:52 2016 +0000" }, "message": "Revert \"ARM/ARM64: Extend support of instruction combining.\"\n\nThe test fails its checker parts.\n\nThis reverts commit debeb98aaa8950caf1a19df490f2ac9bf563075b.\n\nChange-Id: I49929e15950c7814da6c411ecd2b640d12de80df\n" }, { "commit": "28a2ff0bd6c30549f3f6465d8316f5707b1d072f", "tree": "4d181bd254584f78cf1f3d81d3acb23d6f2f8b3d", "parents": [ "c8f1df9965ca7f97ba9e6289f8c7a717765a59a9" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Thu Jan 21 18:21:59 2016 +0000" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Thu Jan 21 18:21:59 2016 +0000" }, "message": "Revert \"ARM64 Baker\u0027s read barrier fast path implementation.\"\n\nThis reverts commit c8f1df9965ca7f97ba9e6289f8c7a717765a59a9.\n\nThis breaks master.\n\nChange-Id: Ic07f602af8732e2835bd11f65e3b9e766d3349c7\n" }, { "commit": "debeb98aaa8950caf1a19df490f2ac9bf563075b", "tree": "b2a7a7cc6fb2f56d4bcc6cecaa80035668f38dc4", "parents": [ "6aadaef35ea52506db61e463910c2520b702ca5e" ], "author": { "name": "Ilmir Usmanov", "email": "i.usmanov@samsung.com", "time": "Fri Dec 11 11:39:44 2015 +0300" }, "committer": { "name": "Artem Udovichenko", "email": "artem.u@samsung.com", "time": "Thu Jan 21 11:07:38 2016 +0300" }, "message": "ARM/ARM64: Extend support of instruction combining.\n\nCombine multiply instructions in the following way:\nARM64:\nMUL/NEG -\u003e MNEG\nARM32 (32-bit integers only):\nMUL/ADD -\u003e MLA\nMUL/SUB -\u003e MLS\n\nChange-Id: If20f2d8fb060145ab6fbceeb5a8f1a3d02e0ecdb\n" }, { "commit": "086d27e2ef9d11138f8832190d09a56e72346f15", "tree": "30217b1a5b8bb0cfdb6c351058678a7ad128950f", "parents": [ "0021c310e2e613d6d180acda0d9d422dba8688b0" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Jan 20 17:02:00 2016 -0800" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Jan 20 19:19:24 2016 -0800" }, "message": "Fix missing case in ARM64 codegen.\n\nRationale:\nRather than excluding conditions that are not handled,\nchanged the right-hand-side is zero optimized code\nto list handled conditions explicitly instead.\n\nbug\u003d26689526\n\nChange-Id: I636e01548659c579d9e318f07bda2c24a12371e5\n" }, { "commit": "c8f1df9965ca7f97ba9e6289f8c7a717765a59a9", "tree": "7c04fd5601293cc251651ce2df2dfd2416737a1c", "parents": [ "fef7aabd582ae0237a44947c5e0b24cb63e395f0" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jan 20 16:38:05 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jan 20 16:38:05 2016 +0000" }, "message": "ARM64 Baker\u0027s read barrier fast path implementation.\n\nIntroduce an ARM64 fast path implementation in Optimizing\nfor Baker\u0027s read barriers (for both heap reference loads and\nGC root loads). The marking phase of the read barrier is\nperformed by a slow path, invoking the runtime entry point\nartReadBarrierMark.\n\nOther read barrier algorithms continue to use the original\nslow path based implementation, which has been renamed as\nGenerateReadBarrierSlow/GenerateReadBarrierForRootSlow.\n\nBug: 12687968\nBug: 26601270\nChange-Id: I60da15249b58a8ee1a065ed9be2c4e438ee17150\n" }, { "commit": "955d24c4221aa514067dc13d8a40c8b5071f467d", "tree": "67a527b7e8360579d233ece14b1bb6718b39777a", "parents": [ "ae9f99e2973edd24302b893d109224e8b05dbdf6", "58282f4510961317b8d5a364a6f740a78926716f" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Jan 18 17:13:14 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jan 18 17:13:14 2016 +0000" }, "message": "Merge \"ART: Remove Baseline compiler\"" }, { "commit": "58282f4510961317b8d5a364a6f740a78926716f", "tree": "5d97c0db9fe01dd6e8df2357ef11f614abb853e8", "parents": [ "b8bb9f6d0b59be125066f604f134155f8998f5ae" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 14 12:45:10 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Mon Jan 18 16:39:30 2016 +0000" }, "message": "ART: Remove Baseline compiler\n\nWe don\u0027t need Baseline any more and it hasn\u0027t been maintained for\na while anyway. Let\u0027s remove it.\n\nChange-Id: I442ed26855527be2df3c79935403a25b1ee55df6\n" }, { "commit": "d6e069b16a7d4964e546daf3d340ea11756ab090", "tree": "3b6509b03527e2cb0d9135bdccb02ddf9ea00cd8", "parents": [ "b8bb9f6d0b59be125066f604f134155f8998f5ae" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jan 18 11:11:01 2016 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jan 18 13:16:48 2016 +0000" }, "message": "Optimizing: Improve floating point comparisons on arm and arm64.\n\nAvoid the extra check for unordered inputs by using the\nappropriate arm/arm64 condition.\n\nChange-Id: Ib5e775a90428db7a2cf377ad9fd6a3192d670617\n" }, { "commit": "cd3d0fb5a4c113cfdb610454d133762a2ab0e6de", "tree": "482d31703326300fd8c53a2ebbfe6dbf58a74448", "parents": [ "8c8e997d29fadaa9bfb4007e95a8cd6cb76d6e80" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jan 15 19:26:48 2016 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Sun Jan 17 11:58:18 2016 +0000" }, "message": "Do not use HArm64IntermediateAddress with read barriers.\n\nThis ARM64 instruction simplification does not yet work\ncorrectly with the read barrier compiler instrumentation.\n\nBug: 26601270\nBug: 12687968\nChange-Id: I0c3c5d0043ebd936e00984740efbae8b3025c7ca\n" }, { "commit": "6de1938e562b0d06e462512dd806166e754035ea", "tree": "f9df086a73860c20768d17ff7bc5be4139567941", "parents": [ "f5b84ee14a3bc578f799a39dca1ae512b49356ea" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Fri Jan 08 17:37:10 2016 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Jan 14 16:22:13 2016 +0000" }, "message": "ART: Remove incorrect HFakeString optimization\n\nSimplification of HFakeString assumes that it cannot be used until\nString.\u003cinit\u003e is called which is not true and causes different\nbehaviour between the compiler and the interpreter. This patch\nremoves the optimization together with the HFakeString instruction.\n\nInstead, HNewInstance is generated and an empty String allocated\nuntil it is replaced with the result of the StringFactory call. This\nis consistent with the behaviour of the interpreter but is too\nconservative. A follow-up CL will attempt to optimize out the initial\nallocation when possible.\n\nBug: 26457745\nBug: 26486014\n\nChange-Id: I7139e37ed00a880715bfc234896a930fde670c44\n" }, { "commit": "42249c3602c3d0243396ee3627ffb5906aa77c1e", "tree": "1e822a21c87331246cbde3923eac88fa315fa2cc", "parents": [ "922698ded1e80cad1ecce4c2172a88c76a216373" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Jan 07 15:33:50 2016 -0800" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Tue Jan 12 16:39:20 2016 -0800" }, "message": "Reduce code size by sharing slow paths.\n\nRationale:\nSharing identical slow path code reduces code size.\n\nBackground:\nCurrently, slow paths with the same dex-pc, same physical register\nspilling code, and identical stack maps are shared (making this\nonly useful for deopt slow paths). The newly introduced mechanism\nis sufficiently general to allow future improvements by e.g.\nallowing different dex-pc (by passing this to runtime) or even\nthe kind of slow paths (by passing runtime addresses to the slowpath).\n\nChange-Id: I819615c47b4fd98440a241f681f93e4fc22d12e0\n" }, { "commit": "8566a91502db625ff9428a3c2418714488ecd5d9", "tree": "fc3ade71413203fd053d06b98210f263084e34c9", "parents": [ "20b6863769357d798464a65c5ee5dfd64464d400", "b7070a2db8b0b7eca14f01f932be305be64ded57" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Jan 11 14:47:37 2016 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jan 11 14:47:37 2016 +0000" }, "message": "Merge \"Generate Nops to ensure that debug stack maps have distinct PC.\"" }, { "commit": "b7070a2db8b0b7eca14f01f932be305be64ded57", "tree": "06ba87d56a708712fb206e23d3abd55f21934373", "parents": [ "ae6f23c83e1c8dcfbc4f74186ea1a37f1044414b" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Jan 08 18:13:53 2016 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Jan 11 12:22:17 2016 +0000" }, "message": "Generate Nops to ensure that debug stack maps have distinct PC.\n\nChange-Id: I5740ec958a20d236634b66df0e675382ed5c16fc\n" }, { "commit": "68f6289fbc1b14ed814722c023b3f343c1e59a79", "tree": "86bf0f10e1368871e567145a0d70087cb8f74a4f", "parents": [ "b7371a5517f78f61759f7e6124f2d957d974d9cd" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 04 08:39:49 2016 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 11 11:36:48 2016 +0000" }, "message": "Don\u0027t use std::abs on INT_MIN/LONG_MIN, it\u0027s undefined.\n\nbug:25494265\n\nChange-Id: I560a3a589b92440020285f9adfdf7c9efb06217c\n" }, { "commit": "0cf4493166ff28518c8eafa2d0463f6e817cce75", "tree": "6d207db3fb655bbd692f2b01fa963c603619bd0e", "parents": [ "d674bf7ba2a209790cea8ef8d935480ef515c9e1" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Dec 09 14:09:59 2015 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Dec 23 13:19:16 2015 +0000" }, "message": "Generate more stack maps during native debugging.\n\nGenerate extra stack map at the start of each java statement.\nThe stack maps are later translated to DWARF which allows\nLLDB to set breakpoints and view local variables.\n\nChange-Id: If00ab875513308e4a1399d1e12e0fe8934a6f0c3\n" }, { "commit": "5f7b58ea1adfc0639dd605b65f59198d3763f801", "tree": "04556e673cdd3967cc967ff79931eab49e523956", "parents": [ "1201804d1813d7db0accead9721d67c40b3de564" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Nov 23 19:49:34 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Dec 23 09:59:07 2015 +0000" }, "message": "Rewrite HInstruction::Is/As\u003ctype\u003e().\n\nMake Is\u003ctype\u003e() and As\u003ctype\u003e() non-virtual for concrete\ninstruction types, relying on GetKind(), and mark GetKind()\nas PURE to improve optimization opportunities. This reduces\nthe number of relocations in libart-compiler.so\u0027s .rel.dyn\nsection by ~4K, or ~44%, and in .data.rel.ro by ~18K, or\n~65%. The file is 96KiB smaller for Nexus 5, including 8KiB\nreduction of the .text section.\n\nUnfortunately, the g++/clang++ __attribute__((pure)) is not\nstrong enough to avoid duplicated virtual calls and we would\nneed the C++ [[pure]] attribute proposed in n3744 instead.\nTo work around this deficiency, we introduce an extra\nnon-virtual indirection for GetKind(), so that the compiler\ncan optimize common expressions such as\n instruction-\u003eIsAdd() || instruction-\u003eIsSub()\nor\n instruction-\u003eIsAdd() \u0026\u0026 instruction-\u003eAsAdd()-\u003e...\nwhich contain two virtual calls to GetKind() after inlining.\n\nChange-Id: I83787de0671a5cb9f5b0a5f4a536cef239d5b401\n" }, { "commit": "14c4e90f67e71430dade7d4f20920e6352be386e", "tree": "2d376e0d6f833bb87348faae12ad7ed3bf15b95b", "parents": [ "6132a3884a912a704010f22ea2991f3d9d432af2", "f3e0ee27f46aa6434b900ab33f12cd3157578234" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 16:46:19 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Dec 17 16:46:19 2015 +0000" }, "message": "Merge \"Revert \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"\"" }, { "commit": "f3e0ee27f46aa6434b900ab33f12cd3157578234", "tree": "83d5a75bf26238ff1789569de62e4b72fb348119", "parents": [ "b4c137630fd2226ad07dfd178ab15725374220f1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 15:23:13 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Dec 17 15:23:13 2015 +0000" }, "message": "Revert \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"\n\nThis reverts commit b4c137630fd2226ad07dfd178ab15725374220f1.\n\nThe underlying issue was fixed by https://android-review.googlesource.com/188271 .\n\nBug: 26121945\nChange-Id: I58b08eb1a9f0a5c861f8cda93522af64bcf63920\n" }, { "commit": "d7d35383838c369a4a1ff5aa21e952f941718c48", "tree": "7d36f56c834e2b561ebc0359b9d11ad03d150cb2", "parents": [ "6b75bc08e8e2e5516a23350418bacef2cf982bd9", "b4c137630fd2226ad07dfd178ab15725374220f1" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 16 12:31:14 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Dec 16 12:31:14 2015 +0000" }, "message": "Merge \"Revert \"ART: Reduce the instructions generated by packed switch.\"\"" }, { "commit": "b4c137630fd2226ad07dfd178ab15725374220f1", "tree": "6f319089980073ffb2c20d36e367a944daa525c4", "parents": [ "59f054d98f519a3efa992b1c688eb97bdd8bbf55" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 16 12:06:39 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 16 12:07:01 2015 +0000" }, "message": "Revert \"ART: Reduce the instructions generated by packed switch.\"\n\nThis reverts commit 59f054d98f519a3efa992b1c688eb97bdd8bbf55.\n\nbug:26121945\n\nChange-Id: I8a5ad7ef1f1de8d44787c27528fa3f7f5c2e9cd3\n" }, { "commit": "351dddf4025f07477161209e374741f089d97cb4", "tree": "d35406fe1e975369acf8f103d0ad5e0cf2313431", "parents": [ "58dcb021c3bd45718d0103844f4e6d55754e6501" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Dec 11 16:34:46 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Dec 11 16:54:42 2015 +0000" }, "message": "Optimizing: Clean up after HRor.\n\nChange-Id: I96bd7fa2e8bdccb87a3380d063dad0dd57fed9d7\n" }, { "commit": "58dcb021c3bd45718d0103844f4e6d55754e6501", "tree": "b5ca917081eff52a98331b1234335069ead8bede", "parents": [ "66278646b5b332142d1474703ac7d945dfbf7c78", "40a04bf64e5837fa48aceaffe970c9984c94084a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Dec 11 16:14:56 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Dec 11 16:14:56 2015 +0000" }, "message": "Merge \"Replace rotate patterns and invokes with HRor IR.\"" }, { "commit": "40a04bf64e5837fa48aceaffe970c9984c94084a", "tree": "27aeff3b9492b396050155734d81aba3c57ffbb7", "parents": [ "763fd2d3d131898cad6295a19ae9a30e22ce5f2a" ], "author": { "name": "Scott Wakeling", "email": "scott.wakeling@linaro.org", "time": "Fri Dec 11 09:50:36 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Dec 11 16:13:44 2015 +0000" }, "message": "Replace rotate patterns and invokes with HRor IR.\n\nReplace constant and register version bitfield rotate patterns, and\nrotateRight/Left intrinsic invokes, with new HRor IR.\n\nWhere k is constant and r is a register, with the UShr and Shl on\neither side of a |, +, or ^, the following patterns are replaced:\n\n x \u003e\u003e\u003e #k OP x \u003c\u003c #(reg_size - k)\n x \u003e\u003e\u003e #k OP x \u003c\u003c #-k\n\n x \u003e\u003e\u003e r OP x \u003c\u003c (#reg_size - r)\n x \u003e\u003e\u003e (#reg_size - r) OP x \u003c\u003c r\n\n x \u003e\u003e\u003e r OP x \u003c\u003c -r\n x \u003e\u003e\u003e -r OP x \u003c\u003c r\n\nImplemented for ARM/ARM64 \u0026 X86/X86_64.\n\nTests changed to not be inlined to prevent optimization from folding\nthem out. Additional tests added for constant rotate amounts.\n\nChange-Id: I5847d104c0a0348e5792be6c5072ce5090ca2c34\n" }, { "commit": "917d01680714b2295f109f8fea0aa06764a30b70", "tree": "1da1b936fcc2318dced0d0aa9d2f987af1a05169", "parents": [ "d48015603a54b820d287d92709825765159615f0" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 24 18:25:35 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Dec 10 16:48:06 2015 +0000" }, "message": "Don\u0027t generate a slow path for strings in the dex cache.\n\nChange-Id: I1d258f1a89bf0ec7c7ddd134be9215d480f0b09a\n" }, { "commit": "59f054d98f519a3efa992b1c688eb97bdd8bbf55", "tree": "83d5a75bf26238ff1789569de62e4b72fb348119", "parents": [ "763fd2d3d131898cad6295a19ae9a30e22ce5f2a" ], "author": { "name": "Zheng Xu", "email": "zheng.xu@linaro.org", "time": "Mon Dec 07 17:17:03 2015 +0800" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Tue Dec 08 13:14:10 2015 -0500" }, "message": "ART: Reduce the instructions generated by packed switch.\n\nImplement Vladimir Marko\u0027s suggestion. The new compare/jump series\nreduce the number of instructions from (2*n+1) to (1.5*n+3).\n\nGenerate normal compare/jump series when numEntries \u003c\u003d 3.\nGenerate optimal compare/jump series when numEntries \u003c\u003d threshold.\nGenerate jump tables otherwise.\n\nChange-Id: I425547b6787057c7fa84e71f17c145b63b208633\n" }, { "commit": "e523423a053af5cb55837f07ceae9ff2fd581712", "tree": "6c2d9c570bf0d9a0e2cd056e052c0be618b03fc5", "parents": [ "08a84acc7adb1bb076595eb961bd4667896e5075" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 02 09:06:11 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 02 13:01:25 2015 +0000" }, "message": "Revert \"Revert \"Don\u0027t use the compiler driver for method resolution.\"\"\n\nThis reverts commit c88ef3a10c474045a3476a02ae75d07ddd3230b7.\n\nChange-Id: I0ed88a48b313a8d28bc39fae40631123aadb13ef\n" }, { "commit": "c88ef3a10c474045a3476a02ae75d07ddd3230b7", "tree": "cd23e1e0a3cea10cc9a9ae8269a01f75ada8ef0e", "parents": [ "4db0bf9c4db6a09716c3388b7d2f88d534470339" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 16:28:10 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 16:28:10 2015 +0000" }, "message": "Revert \"Don\u0027t use the compiler driver for method resolution.\"\n\nFails 425 in debuggable mode.\n\nThis reverts commit 4db0bf9c4db6a09716c3388b7d2f88d534470339.\n\nChange-Id: I346df8f75674564fc4fb241c60f23e250fc7f0a7\n" }, { "commit": "4db0bf9c4db6a09716c3388b7d2f88d534470339", "tree": "71feab1b20d4d773f881e0afc26dfcd236c177d1", "parents": [ "d1744d449cf2b56af7e0896b3729fac2a414e3af" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Nov 23 09:35:04 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 14:23:01 2015 +0000" }, "message": "Don\u0027t use the compiler driver for method resolution.\n\nThe compiler driver makes assumptions that don\u0027t hold for\nthe optimizing compiler, and will for example always go to\nslow path for an invoke-super when there\u0027s no verified method.\n\nAlso fix GenerateInvokeVirtual in the presence of intrinsics.\n\nNext change will address some of the TODOs in sharpening.cc.\n\nChange-Id: I2b0e543ee9b9bebcadb2d26de29e850c59ad58b9\n" }, { "commit": "3a581b45605b77fb40654d5d331d54df429cd2bd", "tree": "02853c17d6bef9576dd3bcff5f5ef18e92299803", "parents": [ "319362870b67f1bf19c432ff24d5bcc328e65994", "8626b741716390a0119ffeb88b5b9fcf08e13010" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 26 09:55:07 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 26 09:55:07 2015 +0000" }, "message": "Merge \"ARM64: Use the shifter operands.\"" }, { "commit": "92e997d1e6fc0774c177b490619f9acdf97a5bb7", "tree": "93279a55e4580eb093bd2caf132a8ba335e86029", "parents": [ "e8bc4ec44a855b2e4174ba3e0efd9b59c52064e4", "22ccc3a93d32fa6991535eaebb17daf5abaf4ebf" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Nov 25 17:05:40 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Nov 25 17:05:40 2015 +0000" }, "message": "Merge \"ARM64 read barrier support for concurrent GC in Optimizing.\"" }, { "commit": "8626b741716390a0119ffeb88b5b9fcf08e13010", "tree": "28d261dbb8fa3018cba8a5d829319604508ea0a1", "parents": [ "0c32fdeaeda2a1e388e280da12662d1d18c834a2" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Wed Nov 25 16:28:08 2015 +0000" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Wed Nov 25 16:28:08 2015 +0000" }, "message": "ARM64: Use the shifter operands.\n\nThis introduces architecture-specific instruction simplification.\nOn ARM64 we try to merge shifts and sign-extension operations into\narithmetic and logical instructions.\n\nFor example for the Java code\n\n int res \u003d a + (b \u003c\u003c 5);\n\nwe would generate\n\n lsl w3, w2, #5\n add w0, w1, w3\n\nand we now generate\n\n add w0, w1, w2, lsl #5\n\nChange-Id: Ic03bdff44a1c12e21ddff1b0513bd32a730742b7\n" }, { "commit": "42e372e5a34d0fef88007bc5f40dd0fc7c03b58b", "tree": "434618ad8deec85313335b6ca63c6519639b4959", "parents": [ "95f7bbcd991fbfaead438a2866354714eb32af38" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 24 15:48:56 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 24 17:57:26 2015 +0000" }, "message": "Optimize HLoadClass when we know the class is in the cache.\n\nChange-Id: Iaa74591eed0f2eabc9ba9f9988681d9582faa320\n" }, { "commit": "22ccc3a93d32fa6991535eaebb17daf5abaf4ebf", "tree": "974af8f7cf41d131234eeb60dc8a7c4831f4a97f", "parents": [ "51a354c747c8a76a4716a49a1f70bfd975d63787" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Nov 24 13:10:05 2015 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Nov 24 13:10:05 2015 +0000" }, "message": "ARM64 read barrier support for concurrent GC in Optimizing.\n\nThis first implementation uses slow paths to instrument heap\nreference loads and GC root loads for the concurrent copying\ncollector, respectively calling the artReadBarrierSlow and\nartReadBarrierForRootSlow runtime entry points.\n\nNotes:\n- This implementation does not instrument HInvokeVirtual\n nor HInvokeInterface instructions (for class reference\n loads), as the corresponding read barriers are not stricly\n required with the current concurrent copying collector.\n- Intrinsics which may eventually call (on slow path) are\n disabled when read barriers are enabled, as the current\n slow path infrastructure does not support this case.\n- When read barriers are enabled, the code generated for a\n HArraySet instruction always go into the array set slow\n path for object arrays (delegating the operation to the\n runtime), as we are lacking a mechanism to keep a\n temporary register live accross a runtime call (needed for\n the instrumentation of type checking code, which requires\n two successive read barriers).\n\nBug: 12687968\nChange-Id: Icfb74f67bf23ae80e7723ee6a0c9ff34ba325d48\n" }, { "commit": "888d067a67640e7d9fc349b0451dfe845acad562", "tree": "6fdbf0027e06b2f140ec9396b8a6d650a15c4e84", "parents": [ "51a354c747c8a76a4716a49a1f70bfd975d63787" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Nov 23 18:53:50 2015 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Nov 24 11:40:13 2015 +0000" }, "message": "Revamp art::CheckEntrypointTypes uses.\n\nChange-Id: I6e13e594539e766ed94524ac3282cec292ba91da\n" }, { "commit": "67e0ad6df9db9193fb1fb7115c249a39b1be6033", "tree": "0009e43936a25861848d909140accf26571c8cec", "parents": [ "349106d96cc56399ab594aaee0beed223ee0b8f8", "418318f4d50e0cfc2d54330d7623ee030d4d727d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Nov 23 17:35:55 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Nov 23 17:35:55 2015 +0000" }, "message": "Merge \"ARM64: Add support for multiply-accumulate.\"" }, { "commit": "01b88a2c8903954ca72067bab93471b2c6aca135", "tree": "0dbbc998527471123a96abb3f6b568c9329b1da2", "parents": [ "be0c2d91027929682fa754ae21943f52b4e111b7", "729645a937eb9f04a311b3c22471dcf3ebe9bcec" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Nov 23 08:51:44 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Nov 23 08:51:44 2015 +0000" }, "message": "Merge \"Explicitly add HLoadClass/HClinitCheck for HNewInstance.\"" }, { "commit": "729645a937eb9f04a311b3c22471dcf3ebe9bcec", "tree": "100c5d843a4d436b166d52e7a463ef6b283abc8c", "parents": [ "d846a2cc45aae5b1c84b5ac51cdd37a22b8447ff" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 19 13:29:02 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Nov 20 22:19:02 2015 +0000" }, "message": "Explicitly add HLoadClass/HClinitCheck for HNewInstance.\n\nbug:25735083\nbug:25173758\n\nChange-Id: Ie81cfa4fa9c47cc025edb291cdedd7af209a03db\n" }, { "commit": "418318f4d50e0cfc2d54330d7623ee030d4d727d", "tree": "46afabf57409a5208be4eebf31e1dcbf63dc8fde", "parents": [ "60c4c6ad2b892bb00a6016a147b1cc089ba6bcb5" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Fri Nov 20 15:55:47 2015 +0000" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Fri Nov 20 15:55:47 2015 +0000" }, "message": "ARM64: Add support for multiply-accumulate.\n\nChange-Id: I88dc313df520480f3fd16bbabda27f9435d25368\n" }, { "commit": "c53c0797a78a89d637e4230503cc1feb27e855a8", "tree": "194d9215590abf283d2b278adf39462d3b704c1b", "parents": [ "ee7d4a3d574d8789fb0d1860eba284ae5099f10d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 19 15:48:33 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 19 16:08:12 2015 +0000" }, "message": "Clean up the special input in HInvokeStaticOrDirect.\n\nChange-Id: I4042aefbdac1a8c236d00e2e7145349a64f6486b\n" }, { "commit": "3927c8b8361336f1b16aae6eb2ed7577b20560f4", "tree": "daa5ffabb2103980538200097b5fb97c5bc2193a", "parents": [ "cb6638ff664e3136ccfee3cffb9307e0d43ffbc1" ], "author": { "name": "Zheng Xu", "email": "zheng.xu@linaro.org", "time": "Wed Nov 18 17:46:25 2015 +0800" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Nov 18 16:11:25 2015 +0000" }, "message": "Opt compiler: Arm64 packed-switch jump tables.\n\nIn this patch, we set a rough threshold and only generate jump table\nwith limited number of HIRs in the graph. This is because current VIXL\ncan only handle Adr with label in the range of +/-1Mb.\n\nChange-Id: I42bff2095ec26caeacc5efc90afebe34e229b518\n" }, { "commit": "a04f57badca0a9211d45eb7bde44c1d1e8f159ff", "tree": "49a3e42024120ca21165277abff8e7dc0949376d", "parents": [ "9013bb031c1c3244e70ae246437604f2c094a671", "6dc01748c61a7ad41d4ab701d3e27897bd39a899" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Nov 17 17:40:57 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Nov 17 17:40:57 2015 +0000" }, "message": "Merge \"Minor fixes and cleaning of arm64 static and direct calls code.\"" }, { "commit": "0debae7bc89eb05f7a2bf7dccd223318fad7c88d", "tree": "3da9656dc77d271b12c1b02793e7d713ae3da790", "parents": [ "991842a5273d20695dd5f35eb9a9e28c386c5b4b" ], "author": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Thu Nov 12 18:37:00 2015 +0000" }, "committer": { "name": "David Brazdil", "email": "dbrazdil@google.com", "time": "Tue Nov 17 15:12:00 2015 +0000" }, "message": "ART: Refactor GenerateTestAndBranch\n\nEach code generator implements a method for generating condition\nevaluation and branching to arbitrary labels. This patch refactors\nit for better clarity but also to generate fewer jumps when the true\nbranch is the fallthrough successor.\n\nThis is preliminary work for implementing HSelect.\n\nChange-Id: Iaa545a5ecbacb761c5aa241fa69140cf6eb5952f\n" }, { "commit": "6dc01748c61a7ad41d4ab701d3e27897bd39a899", "tree": "4c536fc4ab19c3f99b8dddfa8bafbe11deaec0d7", "parents": [ "cff81076cbb4bbe3841942f14326f4401fa3c8df" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Thu Nov 12 14:44:19 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 12 17:58:50 2015 +0000" }, "message": "Minor fixes and cleaning of arm64 static and direct calls code.\n\nFixes:\nThe proper way to avoid the MacroAssembler to generate code before or\nafter an instruction is to block the pools (usually via\n`vixl::BlockPoolsScope`). Here we can use\n`vixl::SingleEmissionCheckScope`, that checks we generate only one\ninstruction and also blocks the pools.\nIn practice the current code would have worked fine because VIXL would\nnot have generated anything after `Bl()` or `Ldr()`, but that was not\nguaranteed.\n\nCleaning:\n- `XRegisterFrom()` returns an X register. Calling `.X()` is not\n required.\n- Since we are sure (after the previous fixes) that nothing will be\n emitted around the instructions we care about, update the code to\n bind labels before the instructions for simplicity.\n\nChange-Id: I42d49976721e380e66bcd7a5b345f1777009434a\n" }, { "commit": "0f7dca4ca0be8d2f8776794d35edf8b51b5bc997", "tree": "cb2d99a0e9b7c50eb853a64b477268baaa77c11b", "parents": [ "ce0f43b97ffb5e4d14c5df6607d8efb46a5dc9d2" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Nov 02 14:36:43 2015 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 12 10:43:47 2015 +0000" }, "message": "Optimizing/X86: PC-relative dex cache array addressing.\n\nAdd PC-relative dex cache array addressing for X86 and use\nit for better invoke-static/-direct dispatch. Also delay\nthe initialization to the PC-relative base until needed.\n\nChange-Id: Ib8634d5edce4920cd70172fd13211809cf6948d1\n" }, { "commit": "cbf3c0f4e8335b460ce2faba3877d4b24fe492a1", "tree": "2118db00ced221b5fe55e5bb37738a8535cfa574", "parents": [ "1af35996afc82bfecb501fc5ecdc0d3350d8a532", "dc151b2346bb8a4fdeed0c06e54c2fca21d59b5d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Oct 27 15:02:06 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Oct 27 15:02:06 2015 +0000" }, "message": "Merge \"Optimizing: Determine invoke-static/-direct dispatch early.\"" }, { "commit": "31f0e753a0a45a7085e55bfbbccc422e8989a787", "tree": "3e610720882ae20a5af51ee449ffb1e53d6df287", "parents": [ "fe97bfeabcf99d470e7d974a68ec6b6641648396", "e6dbf48d7a549e58a3d798bbbdc391e4d091b432" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 23 15:00:57 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 23 15:00:57 2015 +0000" }, "message": "Merge \"ARM64: Instruction simplification for array accesses.\"" }, { "commit": "dc151b2346bb8a4fdeed0c06e54c2fca21d59b5d", "tree": "391d8ccb44ff9e6fc1c8fa8975e534e20cc002ff", "parents": [ "823e693aa946ba75cd047429e1290011a2ed8729" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 15 18:02:30 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Oct 23 14:45:32 2015 +0100" }, "message": "Optimizing: Determine invoke-static/-direct dispatch early.\n\nDetermine the dispatch type of invoke-static/-direct in a\nspecial pass right after the type inference. This allows the\ninliner to pass the \"needs dex cache\" check and inline more.\nIt also allows the code generator to avoid requesting a\nregister location for the ArtMethod* for kDexCachePcRelative\nand direct methods.\n\nThe supported dispatch check handles also situations that\nthe CompilerDriver currently doesn\u0027t allow. The cleanup of\nthe CompilerDriver and required changes to Quick will come\nin a separate change.\n\nChange-Id: I3f8e903a119949e95871d8ab0a995f4731a13a07\n" }, { "commit": "f69f56e7d4a1e31dfce2a77558c9b7047f82092b", "tree": "30c394773a7544bf5296138f8e923b5d73dc5cb8", "parents": [ "a31e53f83cf7c773bd506bb4b7d28f73e92a391a", "bb245d199a5240b4c520263fd2c8c10dba79eadc" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Oct 19 18:42:59 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 19 18:42:59 2015 +0000" }, "message": "Merge \"Generalize codegen and simplification of deopt.\"" }, { "commit": "bb245d199a5240b4c520263fd2c8c10dba79eadc", "tree": "e16b37485e3e0e34c24e35a71cc8e6986d1e2e70", "parents": [ "d5a69fc429f57bf528aa061618d3ae94ee8deb24" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Oct 19 11:05:03 2015 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Oct 19 11:12:11 2015 -0700" }, "message": "Generalize codegen and simplification of deopt.\n\nRationale: the de-opt instruction is very similar to an if,\n so the existing assumption that it always has a\n conditional \"under the hood\" is very unsafe, since\n optimizations may have replaced conditionals with\n actual values; this CL generalizes handling of deopt.\n\nChange-Id: I1c6cb71fdad2af869fa4714b38417dceed676459\n" }, { "commit": "e6dbf48d7a549e58a3d798bbbdc391e4d091b432", "tree": "e9edbb884c0143a38e0b32350119999bc11b4dee", "parents": [ "45513eb694fe55cf02ca6e8f0884621a6c3f6268" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Mon Oct 19 10:10:41 2015 +0100" }, "committer": { "name": "Alexandre Rames", "email": "alexandre.rames@linaro.org", "time": "Mon Oct 19 10:10:41 2015 +0100" }, "message": "ARM64: Instruction simplification for array accesses.\n\nHArrayGet and HArraySet with variable indexes generate two\ninstructions on arm64, like\n\n add temp, obj, #data_offset\n ldr out, [temp, index LSL #shift_amount]\n\nWhen we have multiple accesses to the same array, the initial `add`\ninstruction is redundant.\n\nThis patch introduces the first instruction simplification in the\narm64-specific instruction simplification pass. It splits HArrayGet\nand HArraySet using the new arm64-specific IR HIntermediateAddress.\nAfter that we run GVN again to squash the multiple occurrences of\nHIntermediateAddress.\n\nChange-Id: I2e3d12fbb07fed07b2cb2f3f47f99f5a032f8312\n" }, { "commit": "4b8f1ecd3aa5a29ec1463ff88fee9db365f257dc", "tree": "d113f8a5c6b61c078256cf15c7cbb9f7c8de0390", "parents": [ "114873103db3d4d6e0da42ca02bad1ea8826443b" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Aug 26 18:34:03 2015 +0100" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Oct 15 12:22:39 2015 -0700" }, "message": "Use ATTRIBUTE_UNUSED more.\n\nUse it in lieu of UNUSED(), which had some incorrect uses.\n\nChange-Id: If247dce58b72056f6eea84968e7196f0b5bef4da\n" }, { "commit": "e9f37600e98ba21308ad4f70d9d68cf6c057bdbe", "tree": "ad7953f41a35eeee68a31b4b567a08c650647bba", "parents": [ "793e6fbdefb092d1dab50bca5618aed110c7e037" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Oct 09 11:15:55 2015 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Oct 14 13:38:22 2015 -0700" }, "message": "Added support for unsigned comparisons\n\nRationale: even though not directly supported in input graph,\n having the ability to express unsigned comparisons\n in HIR is useful for all sorts of optimizations.\n\nChange-Id: I4543c96a8c1895c3d33aaf85685afbf80fe27d72\n" }, { "commit": "ec7802a102d49ab5c17495118d4fe0bcc7287beb", "tree": "08649609604b9c96bc48ca071c48b0af5abb1a3f", "parents": [ "b2e436ffcda1d7a87e7bf9133d8ed878388c73c2" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 01 20:57:57 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 08 11:10:18 2015 +0100" }, "message": "Add DCHECKs to ArenaVector and ScopedArenaVector.\n\nImplement dchecked_vector\u003c\u003e template that DCHECK()s element\naccess and insert()/emplace()/erase() positions. Change the\nArenaVector\u003c\u003e and ScopedArenaVector\u003c\u003e aliases to use the new\ntemplate instead of std::vector\u003c\u003e. Remove DCHECK()s that\nhave now become unnecessary from the Optimizing compiler.\n\nChange-Id: Ib8506bd30d223f68f52bd4476c76d9991acacadc\n" }, { "commit": "580b609cd6cfef46108156457df42254d11e72a7", "tree": "64104e19b57cbb9df97c9349585cc4d1e9fdb3de", "parents": [ "b5c469357f8faf8fbaa05bc41d56903b300d0cd1" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 06 17:35:58 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 06 17:35:58 2015 +0100" }, "message": "Fix location summary for LoadClass\n\nDon\u0027t request a register for the current method if we\u0027re gonna call the\nruntime.\n\nChange-Id: I9760d15108bd95efb2a34e6eacd84b60841781d7\n" }, { "commit": "98893e146b0ff0e1fd1d7c29252f1d1e75a163f2", "tree": "a14bb10d039fcee10a7e0cacb494bb60d08b2039", "parents": [ "7b5c395e9a50f988ca2275a429df17b6abbcc475" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Oct 02 21:05:03 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 06 13:42:55 2015 +0100" }, "message": "Add support for unresolved classes in optimizing.\n\nChange-Id: I0e299a81e560eb9cb0737ec46125dffc99333b54\n" }, { "commit": "ecf680d5e1fe6fcdd57962334a7c7865720503cc", "tree": "a7b5fbcf2f37f1af47395e28debb67ce41de8f71", "parents": [ "c8fb997c694e3587f4b618b2a1727206b8d4a327" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 05 11:15:37 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 05 13:26:51 2015 +0100" }, "message": "Block callee save fp registers in debuggable.\n\nThis is a simple but conservative implementation. We could\nextend it by using the registers but still saving them before\na call and at method entry.\n\nbug: 21057237\n\nChange-Id: Ia2e9e0e2efae0b01625e0f4165d0535c4bf9ba62\n" }, { "commit": "c8fb997c694e3587f4b618b2a1727206b8d4a327", "tree": "527d6f1fbebf8c71444070229b86da1fb5b4977e", "parents": [ "8a50a4aa4636bdc3e0443ea94f5042db18c03ed2", "75d5b9bbd48edbe221d00dc85d25093977c6fa41" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 05 07:41:02 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 05 07:41:02 2015 +0000" }, "message": "Merge \"Revert \"Don\u0027t use floating point callee saves in debuggable.\"\"" }, { "commit": "75d5b9bbd48edbe221d00dc85d25093977c6fa41", "tree": "56f2beff6636ccdb60408eaa2e17910ab8d96814", "parents": [ "88a95ba893fcda974d492917dd77a9b11693dbf2" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 05 07:40:35 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 05 07:40:35 2015 +0000" }, "message": "Revert \"Don\u0027t use floating point callee saves in debuggable.\"\n\nbug:24602865\nbug:24605078\n\nThis reverts commit 88a95ba893fcda974d492917dd77a9b11693dbf2.\n\nChange-Id: Iba97eeab5c2ba725f66cc138f740dac337344828\n" }, { "commit": "e460d1df1f789c7c8bb97024a8efbd713ac175e9", "tree": "3511036fb18828dd0ee140d33a8bcd0535ebeab6", "parents": [ "25217af2a7cae96b32ba566aaf697288f3374c99" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Sep 29 04:52:17 2015 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Oct 02 02:25:18 2015 +0100" }, "message": "Revert \"Revert \"Support unresolved fields in optimizing\"\n\nThe CL also changes the calling convetion for 64bit static field set\nto use kArg2 instead of kArg1. This allows optimizing to keep\nthe asumptions:\n- arm pairs are always of form (even_reg, odd_reg)\n- ecx_edx is not used as a register on x86.\n\nThis reverts commit e6f49b47b6a4dc9c7684e4483757872cfc7ff1a1.\n\nChange-Id: I93159917565824084abc96775f31be1a4249f2f3\n" }, { "commit": "a8a0fe2283b2186198695a2e1c485c205cc12a73", "tree": "a16183dd20cdb92df4478e6ae83d306d6ed7d291", "parents": [ "b3577f0ab8f1765d3554f575d99adbc65bfaf1b6" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 01 15:50:27 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 01 18:40:46 2015 +0100" }, "message": "Fix another poisoning problem.\n\nWe were using the wrong temp.\n\nChange-Id: Id79d5079cc85f61eb1a45d741a67f24d33e8fa03\n" }, { "commit": "61b1dbe32e1066d112605c9199370fe88981f1bf", "tree": "94393f3f4735c2fac1480c60f051844d1c778b98", "parents": [ "59349e6a67c8c95e35439c2a8097846886ae5ced" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 01 10:27:52 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 01 10:27:52 2015 +0100" }, "message": "Fix poisoining bug in arm64.\n\nChange-Id: I30ca7f237009d81c9d83fabb6a4c76bf4c74d451\n" }, { "commit": "dc2ce636d6a98118a5998b93da161ef7840ec645", "tree": "02277004b63a2ffa18e2c7022aac93e72bbf9f40", "parents": [ "d1169045e978c8c9dde98315612c488c6bb153f4", "e0395dd58454e27fc47c0ca273913929fb658e6c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 01 07:34:40 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 01 07:34:40 2015 +0000" }, "message": "Merge \"Optimize ArraySet for x86/x64/arm/arm64.\"" }, { "commit": "0dbcaee559dc6005dec335119982b73692300e45", "tree": "8537357c1718c8b93ec42c3fd8192e2a3347849d", "parents": [ "a841bc3fb000a9cdbbb7b3cedf2cb7a11e2c82ce", "88a95ba893fcda974d492917dd77a9b11693dbf2" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 30 17:48:51 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Sep 30 17:48:51 2015 +0000" }, "message": "Merge \"Don\u0027t use floating point callee saves in debuggable.\"" }, { "commit": "88a95ba893fcda974d492917dd77a9b11693dbf2", "tree": "9914d3dee4b74e9f3afe39e1d0c714299ce8bf17", "parents": [ "6387821209a03c5d873cf9dc6fd11434918bbdf4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 30 17:18:14 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 30 18:44:46 2015 +0100" }, "message": "Don\u0027t use floating point callee saves in debuggable.\n\nThe runtime stubs don\u0027t save them, so GetVReg and SetVReg\nwon\u0027t work on them.\n\nNot having callee saves will increase code size and reduce\nperformance of fp-heavy methods. But we need to do it for\npropper debugging.\n\nChange-Id: I40354c29718af49b6b3adf61d724d3bb93680107\n" }, { "commit": "e0395dd58454e27fc47c0ca273913929fb658e6c", "tree": "a43acfddd08fe55858b752860b05a3e0a035777f", "parents": [ "6387821209a03c5d873cf9dc6fd11434918bbdf4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Sep 25 11:04:45 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 30 18:32:01 2015 +0100" }, "message": "Optimize ArraySet for x86/x64/arm/arm64.\n\nChange-Id: I5bc8c6adf7f82f3b211f0c21067f5bb54dd0c040\n" }, { "commit": "5233f93ee336b3581ccdb993ff6342c52fec34b0", "tree": "225dc0ab491263ef56362a8d0fe2926266bd5047", "parents": [ "de8a3f4dce1e9ff0e3be16956b06bafc8cd4f397" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 29 19:01:15 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 29 19:46:03 2015 +0100" }, "message": "Optimizing: Tag even more arena allocations.\n\nTag previously \"Misc\" arena allocations with more specific\nallocation types. Move some native heap allocations to the\narena in BCE.\n\nBug: 23736311\nChange-Id: If8ef15a8b614dc3314bdfb35caa23862c9d4d25c\n" }, { "commit": "225b6464a58ebe11c156144653f11a1c6607f4eb", "tree": "3f1c6067c3841c892edaa1a60a61af9c559cb4e4", "parents": [ "6a9984e62c08bcd78c8e49dd40b1f0f9d53513b7" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Sep 28 12:17:40 2015 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Sep 29 10:49:35 2015 +0100" }, "message": "Optimizing: Tag arena allocations in code generators.\n\nAnd completely remove the deprecated GrowableArray.\n\nReplace GrowableArray with ArenaVector in code generators\nand related classes and tag arena allocations.\n\nLabel arrays use direct allocations from ArenaAllocator\nbecause Label is non-copyable and non-movable and as such\ncannot be really held in a container. The GrowableArray\nnever actually constructed them, instead relying on the\nzero-initialized storage from the arena allocator to be\ncorrect. We now actually construct the labels.\n\nAlso avoid StackMapStream::ComputeDexRegisterMapSize() being\npassed null references, even though unused.\n\nChange-Id: I26a46fdd406b23a3969300a67739d55528df8bf4\n" }, { "commit": "33c0ed6cc26d07d4512a87a5d39d3412ee077020", "tree": "a1ac0376f982c7e3898ae13a2053a39a7aa155ce", "parents": [ "4ef16199765253bfe0ae1f02daf3b4f392d9ff67", "fe57faa2e0349418dda38e77ef1c0ac29db75f4d" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Sep 22 23:05:00 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Sep 22 23:05:00 2015 +0000" }, "message": "Merge \"[optimizing] Add basic PackedSwitch support\"" }, { "commit": "abfcf18fa2fe723bd683edcb685ed5058d9c7cf3", "tree": "98f8c9be7b4cb6bdcfd7ce7fc817f6a0750f30d5", "parents": [ "47d89c7376090a3a4b8eb114e2c861afe27d01d0" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 21 18:41:21 2015 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Sep 22 10:38:46 2015 +0100" }, "message": "Further refinements to checkcast/instanceof.\n\n- Use setcc when possible.\n- Do an exact check in the Object[] case before checking the\n component type.\n\nChange-Id: Ic11c60643af9b41fe4ef2beb59dfe7769bef388f\n" }, { "commit": "fe57faa2e0349418dda38e77ef1c0ac29db75f4d", "tree": "38ba7a406f8a86a1152bd6c9f2d0a6c677423211", "parents": [ "9e30c0e177adabaaf94a66c91130a19a7632fc7c" ], "author": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Fri Sep 18 09:26:15 2015 -0400" }, "committer": { "name": "Mark Mendell", "email": "mark.p.mendell@intel.com", "time": "Mon Sep 21 07:23:45 2015 -0400" }, "message": "[optimizing] Add basic PackedSwitch support\n\nAdd HPackedSwitch, and generate it from the builder. Code generators\nconvert this to a series of compare/branch tests. Better implementation\nin the code generators as a real jump table will follow as separate CLs.\n\nChange-Id: If14736fa4d62809b6ae95280148c55682e856911\nSigned-off-by: Mark Mendell \u003cmark.p.mendell@intel.com\u003e\n" }, { "commit": "85c7bab43d11180d552179c506c2ffdf34dd749c", "tree": "337976b69d3b2a35cc9f12284cda03c8eb2a58c7", "parents": [ "819a9c5638b6d6b579c89fe36df96acc1f378182" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Sep 18 13:40:46 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Sep 18 15:19:04 2015 +0100" }, "message": "Revert \"Revert \"Optimize code generation of check-cast and instance-of.\"\"\n\nThis reverts commit 7537437c6a2f89249a48e30effcc27d4e7c5a04f.\n\nChange-Id: If759cb08646e47b62829bebc3c5b1e2f2969cf84\n" }, { "commit": "6766eae2d91e894b4ceab9f29cc983900e7bc0c7", "tree": "4a3aac762e01c7933bcbffebb5277bde208e975b", "parents": [ "930761fb7a4db70fbd5e75faa1fca07e5b494ae9", "7537437c6a2f89249a48e30effcc27d4e7c5a04f" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 17 17:12:37 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Sep 17 17:12:37 2015 +0000" }, "message": "Merge \"Revert \"Optimize code generation of check-cast and instance-of.\"\"" }, { "commit": "7537437c6a2f89249a48e30effcc27d4e7c5a04f", "tree": "3f5f1d89f27d549cf40901f906ffab86bb05b520", "parents": [ "64acf303eaa2f32c0b1d8cfcbf044a822c5eec08" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 17 17:12:19 2015 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 17 17:12:19 2015 +0000" }, "message": "Revert \"Optimize code generation of check-cast and instance-of.\"\n\nFailures with libcore tests.\n\nThis reverts commit 64acf303eaa2f32c0b1d8cfcbf044a822c5eec08.\n\nChange-Id: Ie6f323fcf5d86bae5c334c1352bb21f1bad60a88\n" }, { "commit": "a201d5eeb0903408df925a1ed1686a55238a274c", "tree": "d59b87e3c0bddb1d244199e9fbcc9301cb7dc52f", "parents": [ "271d30dd847fb72d78d3178b8b3b225192c2d1c0", "64acf303eaa2f32c0b1d8cfcbf044a822c5eec08" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Sep 17 14:18:03 2015 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Sep 17 14:18:03 2015 +0000" }, "message": "Merge \"Optimize code generation of check-cast and instance-of.\"" }, { "commit": "e6f49b47b6a4dc9c7684e4483757872cfc7ff1a1", "tree": "6a5f45136832f73138ced75fcd3c6110b74116ea", "parents": [ "23a8e35481face09183a24b9d11e505597c75ebb" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Sep 17 14:04:33 2015 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Sep 17 14:04:33 2015 +0000" }, "message": "Revert \"Support unresolved fields in optimizing\"\nbreaks debuggable tests.\n\nThis reverts commit 23a8e35481face09183a24b9d11e505597c75ebb.\n\nChange-Id: I8e60b5c8f48525975f25d19e5e8066c1c94bd2e5\n" } ], "next": "64acf303eaa2f32c0b1d8cfcbf044a822c5eec08" }