)]}' { "log": [ { "commit": "e684fc5975d448d761a2123a79f8be9d30089e15", "tree": "7632c1ce85c0969f3a657429525a1d5208e16edc", "parents": [ "4e6cc7384f7c52d2fd9e13414696338c289d63f9" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 20 09:30:35 2021 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 22 08:20:28 2021 +0000" }, "message": "Add kryo785 as known variant.\n\nTest: m\nBug: 199569303\nChange-Id: I4c91bd1e8d5646ee1c46dc8dec8aa1a3ab602136\n" }, { "commit": "082659bcbf66c08e2ad9be88363c7ab88c50e114", "tree": "65394c78472c90aad96daa1d6b8105760f14bf31", "parents": [ "1776947f896652b232ccec3fc00a04fd7baf1d96" ], "author": { "name": "Peter Collingbourne", "email": "pcc@google.com", "time": "Thu Jun 24 10:17:39 2021 -0700" }, "committer": { "name": "Peter Collingbourne", "email": "pcc@google.com", "time": "Thu Jun 24 22:09:46 2021 +0000" }, "message": "Switch to an assembler macro for CFI_RESTORE_STATE_AND_DEF_CFA.\n\nNewer versions of clang reject multiple assembler directives\non the same line, which breaks the preprocessor macro\nCFI_RESTORE_STATE_AND_DEF_CFA. Fix it by making it an assembler\nmacro instead.\n\nBug: 191980979\nChange-Id: I823ff9c66336931249d2bac40280b24ecdebd0cf\n" }, { "commit": "f5958f8881e299c42ac923e4751f8f34d72db7f0", "tree": "db15e90ad9152c5cbd9515209841c7e71764a67f", "parents": [ "1282f3805b1b6f50761f3e136d569e85dbda7090" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jun 02 14:48:14 2021 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jun 24 07:54:05 2021 +0000" }, "message": "Add x86 implementation for nterp.\n\nBug: 112676029\nTest: test.py, run-libcore-tests, run-libjdwp-tests\nChange-Id: I06bd2c9dde6834f371f042fadda2ced23e02b7ed\n" }, { "commit": "977abde30ffe7a8c9a108498468f00b279191497", "tree": "90f4f97e939609f6835b09d19cb14f5e434c0d9b", "parents": [ "9ed2427971bcaf439afd12b8a1ec375ea78edd2b" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jun 07 14:29:05 2021 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jun 08 11:21:26 2021 +0000" }, "message": "Move code around in x86 assembly files.\n\nSo nterp x86 can use the helpers.\n\nTest: m\nBug: 112676029\nChange-Id: I570847e3e5ee0b49e951e05a118f8f4ec8753352\n" }, { "commit": "04c9f3a978f3e219e7d407f08f4063b3fbb53907", "tree": "5360195b36cb3d2976fd1601b23441e534c6aac5", "parents": [ "1e7faf706563593de8e9d47bb5ef366f68dce1a2" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 04 09:51:28 2021 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 07 08:09:55 2021 +0000" }, "message": "x86: Don\u0027t use the GOT to access art::Runtime::instance_.\n\nAnd also get the address of art_quick_instrumentation_exit\nwithout going through GOT.\n\nBecause ART is built with -fvisibility\u003dprotected, the\nlocation of these symbols can be statically resolved by the\nlinker, so there is no need to go via the GOT.\n\nAlso rewrite macros to avoid the __x86.get_pc_thunk.bx and\nuse a local `call +0` instead.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --32 --optimizing --interpreter\nBug: 112676029\nChange-Id: Ib63aa71518ab7c015626a99a0bbfc587032f4a76\n" }, { "commit": "e8efdaa09b7ff36d5a986f0320f29ac4a7563896", "tree": "5066cecab43006a7bf23f793aa911f74559c8017", "parents": [ "ae553e0e1b26d95006aa27df4675104bfb55d49d" ], "author": { "name": "Christian Wailes", "email": "chriswailes@google.com", "time": "Wed May 26 17:33:54 2021 +0000" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu May 27 19:28:16 2021 +0000" }, "message": "Revert \"Remove stack protector from some interpreter functions\"\n\nA performance regression was noticed in go/lem banchmarks for ART. This\nis likely caused by the no_stack_protector attribute preventing inlining\ninto hot functions.\n\nReason for revert: performance regression\nReverted Changes:\nIe0c81f97f:Remove stack protector from some interpreter funct...\nIaf565a374:Reset stack guard after fork from Zygote\n\nBug: 168258494\nChange-Id: I018d58759c3a5bb624ea8e7fe09b6b49c9b19b6a\n" }, { "commit": "abe7c69edb5ff8f9a4b8019d475caa2f35085aa7", "tree": "d8d86bf8c2264897eb9f7cf35be7c523f611688e", "parents": [ "571a6bea24452e9b288106f379c7510c380a7f61" ], "author": { "name": "Chris Wailes", "email": "chriswailes@google.com", "time": "Wed May 12 17:16:50 2021 -0700" }, "committer": { "name": "Christian Wailes", "email": "chriswailes@google.com", "time": "Tue May 25 17:47:38 2021 +0000" }, "message": "Remove stack protector from some interpreter functions\n\nThis CL removes stack protection from several functions in the\ninterpreter to allow us to re-set the stack protector cookie when new\nprocesses fork from any of the zygotes.\n\nTest: boot\nTest: atest KeyboardVisibilityControlTest\nBug: 168258494\nChange-Id: Ie0c81f97fedfcdde7afc1b6b4befa65524724194\n" }, { "commit": "81a6bd5a05ee3b2bb87ec4a0b471198dbbef3ce3", "tree": "e216bc4c698c259cfcfdac2d2f42ae3296955bfb", "parents": [ "36138acc671d7781840bc209033994fd34fbd0e7" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Sun May 09 22:03:07 2021 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed May 12 18:06:20 2021 +0000" }, "message": "Fix unwinding for art_quick_generic_jni_trampoline\n\nDELIVER_PENDING_EXCEPTION spills LR which is unused/garbage.\nThis breaks backtraces when the unwinder tries to follow it.\n\nAdd trivial call so that the LR is initialized.\n(spills at the start of method are expected and working)\n\nBug: 187632012\nTest: test.py -r --gcstress --all-run -t 1927 -t 178\nChange-Id: I151aa7595f9fd90169402187066a04efba5d54c9\n" }, { "commit": "9a5a2b817c53fe86b0ebbc9390a97e7c5acbb44e", "tree": "7f2c1532f1ba6317bdad718eb833125eed677d32", "parents": [ "9d00bf1e0a9441153e69ea26c4cf111690a6e6a8" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Sun May 09 21:37:02 2021 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon May 10 11:02:01 2021 +0000" }, "message": "Fix debug symbol for art_quick_throw_null_pointer_exception_from_signal\n\nMake sure the end and start symbol names match.\n\nTest: Fixes broken backtraces during gcstress\nChange-Id: I1fa57a94fba4f74cd56975f0e2adcd4e72972e3d\n" }, { "commit": "6f7e98ec2cd62ae31aefac88fc84216627b9071b", "tree": "1b3c96fabfeaea9888f46704f73cf44206dc6c9f", "parents": [ "cda3d47149b41d85c38d1f3ffbc312a930b147b2" ], "author": { "name": "Ryan Prichard", "email": "rprichard@google.com", "time": "Fri Apr 02 22:59:59 2021 -0700" }, "committer": { "name": "Ryan Prichard", "email": "rprichard@google.com", "time": "Tue Apr 06 21:43:31 2021 +0000" }, "message": "Add a __x86.get_pc_thunk.bx helper function\n\nCopied from bionic/libc/arch-x86/bionic/__x86.get_pc_thunk.S\n\nOrdinarily, GCC would emit this function into any object file that\ncalls it, but ART isn\u0027t necessarily linked against any GCC-compiled\ncode anymore on Android. Clang\u0027s way of doing this is to use a pattern\nlike:\n\n call 1f; 1: popl %ebx; 2: addl $_GLOBAL_OFFSET_TABLE_+(2b-1b), %ebx\n\n...but it seems fragile to use local labels buried under several macro\nexpansions. .altmacro\u0027s LOCAL directive seems like it would help with\nthe scoping, but LLVM doesn\u0027t have it yet.\n\nCurrently ART is probably calling one of the copies of this function in\nlibatomic.a, a prebuilt packaged with GCC. After removing libatomic.a,\nthis thunk needs to be defined somewhere else.\n\nBug: none\nTest: treehugger\nChange-Id: I0254932abcfa0bae3af5ebfb237b97d594c45d34\n" }, { "commit": "a746c63b5e68d94f807416d504a6249c3e044c82", "tree": "6c2a609a8ced583caaf9ff290628f07db5f827d6", "parents": [ "6df4511a2cf9ffae0294c1e5136c27ff84cfd1cb" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Feb 12 15:19:38 2021 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Feb 16 10:52:12 2021 +0000" }, "message": "Remove unsed artLookupResolvedMethod.\n\nTest: test.py\nChange-Id: I9485105760a4c3eab1e542a99ea617f3e0b4d0b1\n" }, { "commit": "55ab7e84c4682c492b6fa18375b87ffc5d0b23bb", "tree": "5fcc2567a1a4e6ae73dead2f70c69bc03b0a64bb", "parents": [ "ac27ac01490f53f9e2413dc9b66fbb2880904c96" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Apr 27 21:02:28 2020 +0100" }, "committer": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Fri Feb 05 11:34:38 2021 +0000" }, "message": "ARM64: Support SVE VL other than 128-bit.\n\nArm SVE register size is not fixed and can be a\nmultiple of 128 bits. To support that the patch\nremoves explicit assumptions on the SIMD register\nsize to be 128 bit from the vectorizer and code\ngenerators and enables configurable SVE vector\nlength autovectorization, e.g. extends SIMD register\nsave/restore routines.\n\nTest: art SIMD tests on VIXL simulator.\nTest: art tests on FVP (steps in test/README.arm_fvp.md)\n with FVP arg:\n -C SVE.ScalableVectorExtension.veclen\u003d[2,4]\n (SVE vector [128,256] bits wide)\n\nChange-Id: Icb46e7eb17f21d3bd38b16dd50f735c29b316427\n" }, { "commit": "8ba4de1a5684686447a578bdc425321fd3bccca6", "tree": "20c24450b24950266ccc235306e3ad2109c57497", "parents": [ "32bf6d39bc020cacfc655ce60630f4a0da3b45cf" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Wed Dec 04 21:10:23 2019 +0000" }, "committer": { "name": "Ulyana Trafimovich", "email": "skvadrik@google.com", "time": "Thu Feb 04 06:16:33 2021 +0000" }, "message": "ART: Implement predicated SIMD vectorization.\n\nThis CL brings support for predicated execution for\nauto-vectorizer and implements arm64 SVE vector backend.\n\nThis version passes all the VIXL simulator-runnable tests in\nSVE mode with checker off (as all VecOp CHECKs need to be\nadjusted for an extra input) and all tests in NEON mode.\n\nTest: art SIMD tests on VIXL simulator.\nTest: art tests on FVP (steps in test/README.arm_fvp.md)\n\nChange-Id: Ib78bde31a15e6713d875d6668ad4458f5519605f\n" }, { "commit": "50bbbf1ae5ee1c22d8f31e5f5dc14eab0258303e", "tree": "566cfc9e69d9e543cf652b00d36db214dfb2efe8", "parents": [ "4bf753dc70407589e0f0b5bccb0a88c276488058" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Dec 11 14:07:46 2020 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Dec 16 14:06:19 2020 +0000" }, "message": "arm/nterp: Refactor {i,s}{get,put} operations.\n\nMove the fast-path code to instruction handlers and use\n`add_helper` for slow paths. Do a few small improvements for\ncode reuse and instruction scheduling.\n\nRemove unnecessary `dmb ish` instructions. We do not need\nthe barrier before a volatile load and the arm32 Optimizing\ncode generator does not emit such barrier either. And the\niget-wide opcode also had an odd barrier after setting vregs.\n\nAlso move the code for check-cast, instance-of and\nnew-instance to instruction handlers with no changes\nother than indentation.\n\nAlso update some labels and a comment in arm64 nterp to\nalign with the arm changes.\n\nTest: testrunner.py --target --32 --interpreter --optimizing\nBug: 112676029\nChange-Id: I4133b3d362e1c9610558cba76f067d8923234c62\n" }, { "commit": "3d350a8ab8ca1fbc3e9fd3cab903fa777dfb329b", "tree": "d1ec9fe70b68423b28e69e3370c96c970fb39a0f", "parents": [ "2ecdbc45535f7594dc1684a06b47624aaeff8502" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Nov 18 14:14:27 2020 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Dec 01 15:04:38 2020 +0000" }, "message": "arm: Implement VarHandle CAS intrinsics.\n\nUsing benchmarks provided by\n https://android-review.googlesource.com/1420959\non blueline little cores with fixed frequency 1420800:\n before after\nCompareAndSetStaticFieldInt 26.452 0.031\nCompareAndSetStaticFieldString 31.672 0.037\nCompareAndSetFieldInt 29.569 0.033\nCompareAndSetFieldString 34.095 0.042\nWeakCompareAndSetStaticFieldInt 26.470 0.031\nWeakCompareAndSetStaticFieldString 31.604 0.038\nWeakCompareAndSetFieldInt 29.619 0.033\nWeakCompareAndSetFieldString 34.058 0.040\nWeakCompareAndSetPlainStaticFieldInt 26.508 0.026\nWeakCompareAndSetPlainStaticFieldString 31.675 0.031\nWeakCompareAndSetPlainFieldInt 29.635 0.028\nWeakCompareAndSetPlainFieldString 34.116 0.034\nWeakCompareAndSetAcquireStaticFieldInt 26.512 0.030\nWeakCompareAndSetAcquireStaticFieldString 31.661 0.035\nWeakCompareAndSetAcquireFieldInt 29.661 0.032\nWeakCompareAndSetAcquireFieldString 34.120 0.038\nWeakCompareAndSetReleaseStaticFieldInt 26.566 0.027\nWeakCompareAndSetReleaseStaticFieldString 31.659 0.034\nWeakCompareAndSetReleaseFieldInt 29.676 0.029\nWeakCompareAndSetReleaseFieldString 34.204 0.037\nCompareAndExchangeStaticFieldInt 25.550 0.031\nCompareAndExchangeStaticFieldString 31.219 0.039\nCompareAndExchangeFieldInt 28.923 0.032\nCompareAndExchangeFieldString 33.622 0.040\nCompareAndExchangeAcquireStaticFieldInt 25.559 0.029\nCompareAndExchangeAcquireStaticFieldString 31.177 0.037\nCompareAndExchangeAcquireFieldInt 28.807 0.031\nCompareAndExchangeAcquireFieldString 33.524 0.038\nCompareAndExchangeReleaseStaticFieldInt 25.481 0.027\nCompareAndExchangeReleaseStaticFieldString 31.132 0.036\nCompareAndExchangeReleaseFieldInt 28.825 0.029\nCompareAndExchangeReleaseFieldString 33.511 0.038\n\nOddly, this rewrite makes the Unsafe CAS benchmarks regress\na bit on this configuration. However, experiments show that\nadding useless CLZ+LSR operating on a temporary register\n(corresponding to the old code\u0027s result calculation) would\nrestore the performance to the old level. We prefer not to\nadd these useless instructions as the situation is likely\nto be reversed on different CPU cores.\n\nTest: Covered by existing tests.\nTest: testrunner.py --target --32 --optimizing\nTest: Repeat with ART_USE_READ_BARRIER\u003dfalse ART_HEAP_POISONING\u003dtrue.\nTest: Repeat with ART_READ_BARRIER_TYPE\u003dTABLELOOKUP.\nTest: run-gtests.sh\nBug: 71781600\nChange-Id: I591009d7494533cdf60a47be2f8826144e059ff5\n" }, { "commit": "dd406c3da681ad716a23890e8a95a82fef26e5b2", "tree": "509a0e90cf7a9a301a30eb09dfd42275040a395f", "parents": [ "d6bd107ed83502eb0bbaf66911ab036ecf74612d" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Sun Nov 22 22:53:18 2020 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 01 10:00:07 2020 +0000" }, "message": "Add an arm32 port of nterp.\n\nCurrently using arm32, will try thumb once this CL lands to compare\nperformance.\n\nTest: test.py, run-libcore-tests, device boots\nBug: 112676029\n\nChange-Id: I6535e2982a3ceed83eba6664fc8ba8609974bc08\n" }, { "commit": "cc5629c1480b3be6189391b335d17911c9ddb6ad", "tree": "8fe09ed193c0514e614ea6e3b3bc2a17f453d5ca", "parents": [ "2316b3a0779f3721a78681f5c70ed6624ecaebef" ], "author": { "name": "Hans Boehm", "email": "hboehm@google.com", "time": "Fri Oct 30 16:12:01 2020 -0700" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Sat Nov 14 21:55:00 2020 +0000" }, "message": "Clarify allocation entry point semantics\n\nTest: Treehugger\nBug: 171993478\nChange-Id: I03a95b7028ef98a5438011ce53b43de44f23bec8\n" }, { "commit": "b3ab635ecf561954336cc7b09d6f66a401d1d0fe", "tree": "4677f3db808f9a92374f12797a5027abecb4d43b", "parents": [ "6ebe40fce5927e3f40ec1d375590648d48d458f0" ], "author": { "name": "Daniel Riazanovskiy", "email": "riazanovskiy@google.com", "time": "Thu Oct 15 17:31:01 2020 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 16 10:50:19 2020 +0000" }, "message": "Revert \"Disable x86 FromCpuFeatures test\"\n\nThis reverts commit 0713ca0525579365ae927ac800797a7473d9267f.\n\nReason for revert: bug with simd extension not being detected on some CPUs is fixed in cpu_features (see https://android-review.googlesource.com/c/platform/external/cpu_features/+/1460885)\n\nBug: 169921883\nChange-Id: Ibce2c5ca923ec34f8b2350bae85fbe383952be25\n" }, { "commit": "8d34a182fea1b24f7b8361b55e930cb953cf3fb2", "tree": "4f5ed9d9ac417dfd69fd18f64412b2272c448e05", "parents": [ "8ecbc4e844fc3b73e6a5c5151eda914d53297180" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Sep 16 09:46:58 2020 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 07 08:32:52 2020 +0000" }, "message": "Change interface conflict stub to take the interface method.\n\nTo avoid doing dex cache lookup, pass the interface method instead. This\ncosts a few hundred KBs on speed compiled APKs (\u003c 0.5% code size), but\nimproves performance when hitting a conflict (as seen on dogfood data).\n\nFor nterp, we currently pass the conflict method instead of the\ninterface method. We need to handle default methods before optimizing\nit.\n\nThis removes our last use of dex cache in compiled code. A follow-up CL\nwill remove the NeedsDexCacheOfDeclaringClass from HInvokeInterface.\n\nTest: test.py\n\nChange-Id: I3cdd4543ad7d904b3e81950af46a48a48af6991a\n" }, { "commit": "0713ca0525579365ae927ac800797a7473d9267f", "tree": "47bdc9b541db6605af9bc3dbb4db42fed51f7b49", "parents": [ "9c1c042dd6916e040007ad60a44c6e4e410cedc6" ], "author": { "name": "Daniil Riazanovskiy", "email": "riazanovskiy@google.com", "time": "Fri Oct 02 13:46:47 2020 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 05 15:04:11 2020 +0000" }, "message": "Disable x86 FromCpuFeatures test\n\nTest: art_runtime_tests --no_isolate \"--gtest_filter\u003dInstructionSetFeaturesTest.*\"\n\nBug: 169921883\nChange-Id: I6b596c156c110cd8aafe5c82a42c63bf5c8250b1\n" }, { "commit": "9636062c4d4839bbb2fd979ee56b2f38d8615f1e", "tree": "2562080e05eed8104de13707c092aacb3556d572", "parents": [ "e2a9bb7175517c18ab0899ad54c730b272d9883c" ], "author": { "name": "Daniil Riazanovskiy", "email": "riazanovskiy@google.com", "time": "Wed Sep 16 23:26:52 2020 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Sep 29 13:32:59 2020 +0000" }, "message": "Integrate cpu_features external library\n\nTest: art_runtime_tests --no_isolate \"--gtest_filter\u003dInstructionSetFeaturesTest.*\"\nTest: Run `InstructionSetFeaturesTest` on device (Pixel 3) with this\n command:\n atest --all-abi ArtGtestsTargetInstallApex -- \\\n --test-arg com.android.tradefed.testtype.GTest:native-test-flag:\"--gtest_filter\u003d*InstructionSetFeaturesTest*\"\nBug: 128901000\nChange-Id: I49375eff2a28444af941610b750b3316bf18c7a7\n" }, { "commit": "faf5f3fed7e25b701720b39647911645a27994b4", "tree": "d3fcaacc2bfe343a16bae4270e2eb55c638a7940", "parents": [ "60d4abc813b209c309d00ae2334e6a57e1297b28" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jul 03 18:36:45 2020 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Jul 30 15:08:09 2020 +0000" }, "message": "Fix stack unwinding for nterp on arm64.\n\nThe callee save sizes (160) requires two bytes for uleb128 encoding.\n\nTest: 137-cfi\nBug: 112676029\nChange-Id: Ia5cb5f6622dd527f212ecb97da2c0fa23b7a3ff6\n" }, { "commit": "2d53643ca0e05e7c67894aa75eba899acbb9f287", "tree": "39299475c04303312f527bc00355bd9fd7a3fad8", "parents": [ "cefebc86af30522bf79d2a89a2bcf96f7f970ecb" ], "author": { "name": "Ian Pedowitz", "email": "ijpedowitz@google.com", "time": "Wed Jul 22 14:33:00 2020 -0700" }, "committer": { "name": "Ian Pedowitz", "email": "ijpedowitz@google.com", "time": "Fri Jul 24 00:41:56 2020 +0000" }, "message": "Update language to comply with Android’s inclusive language guidance\n\nSee https://source.android.com/setup/contribute/respectful-code for\nreference\n\nBug: 161896447\nBug: 161850439\nBug: 161336379\nTest: m -j checkbuild cts docs tests\nChange-Id: I32d869c274a5d9a3dac63221e25874fe685d38c4\n" }, { "commit": "aacf977a3b3af644a7e2eb58d8e56a23d1f3d215", "tree": "6a595bf88f3124e61c826bcd72520dd406664f1e", "parents": [ "4ef451aecd4008ccee2ebf6136a70ed6a5c14717" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Wed Jul 22 21:51:00 2020 +0100" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Jul 23 13:18:06 2020 +0000" }, "message": "Reword some comments to be more inclusive\n\nAlso corrects a typo s/He/We/.\n\nBug: 161336379\nBug: 161850439\nBug: 161896447\nTest: m\nChange-Id: Ie8e37310eb777b7ee41a13f8894e99795c29a98a\n" }, { "commit": "7400a5466a04f9a274d262c5cb1fd35ff496839a", "tree": "8e4d617b0e0fdfda2c089a6a30353d470c0fb2b3", "parents": [ "b461b53c926dae7f1959a309b0a2b109b6d3c4d3" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Jul 09 13:40:57 2020 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Jul 15 14:33:43 2020 +0000" }, "message": "Fixes for gtests in eng-prod\n\nBug: 147817558\nTest: art/art-host-gtest on forrest\nChange-Id: I0ecfbc81fe6998d4c8c69ce6fbeb35bdd5908b55\n" }, { "commit": "86c8752f64629325026945cd4eabd1dcea224acb", "tree": "9dc2be978f9e784a3ce16fa29d46941a94ac1c94", "parents": [ "f97a859e85f703644d897f0e3e1bc54315557aaa" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon May 11 16:55:55 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jun 19 08:26:46 2020 +0000" }, "message": "Direct calls to @CriticalNative methods.\n\nEmit direct calls from compiled managed code to the native\ncode registered with the method, avoiding the JNI stub.\n\nGolem results:\nart-opt-cc x86 x86-64 arm arm64\nNativeDowncallStaticCritical +12.5% +62.5% +75.9% +41.7%\nNativeDowncallStaticCritical6 +55.6% +87.5% +72.1% +35.3%\nart-opt x86 x86-64 arm arm64\nNativeDowncallStaticCritical +28.6% +85.6% +76.4% +38.4%\nNativeDowncallStaticCritical6 +44.6% +44.6% +74.6% +32.2%\n\nTest: Covered by 178-app-image-native-method.\nTest: m test-art-host-gtest\nTest: testrunner.py --host --debuggable --ndebuggable \\\n --optimizing --jit --jit-on-first-use\nTest: run-gtests.sh\nTest: testrunner.py --target --optimizing\nTest: testrunner.py --target --debuggable --ndebuggable \\\n --optimizing --jit --jit-on-first-use -t 178\nTest: aosp_cf_x86_phone-userdebug boots.\nTest: aosp_cf_x86_phone-userdebug/jitzygote boots.\nBug: 112189621\nChange-Id: I8b37da51e8fe0b7bc513bb81b127fe0416068866\n" }, { "commit": "ad3bbcd19d1586ee2e9734288ca4a550e634d1c9", "tree": "5e58685b0a9f9cf250c722f4291fd6a7ab89fe18", "parents": [ "6217fc20d342b62ae5d2f88896984339d1bddb34" ], "author": { "name": "Eric Holk", "email": "eholk@google.com", "time": "Wed May 13 21:25:43 2020 +0000" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu May 21 18:26:43 2020 +0000" }, "message": "Revert^2 \"Use CPP defines for default x86 and x86_64 ISA features\"\n\nThis reverts commit 12cde746b872c149a542ada0277040068af6606c.\n\nReason for revert: Fixing CL\n\nBug: 155324337\nTest: atest ArtGtestsTarget\nTest: m test-art-host-gtest\nChange-Id: I36774cd33266fa33af803a555612e93eb9eef764\n" }, { "commit": "4fc75697d88550df7dd2e3799ced2f01df60772b", "tree": "bf84a362512d6d663ac55a6d847c359895db73fe", "parents": [ "d1a421ff5cf2ffae07cd6b892dd31d51b09d3e71" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Jan 13 21:49:22 2020 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu May 21 08:54:55 2020 +0000" }, "message": "[nterp] Add arm64 implementation.\n\nBug: 112676029\nTest: test.py\n\nChange-Id: Ie693b1bb7b1f6b8a52818db964422d40ff818fbb\n" }, { "commit": "12cde746b872c149a542ada0277040068af6606c", "tree": "72384a7cea286012397611e3f82efb5b2d56cff9", "parents": [ "02ca05a5a6e3f5028c6c2987a81be481d07bc617" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 13 08:55:25 2020 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 13 08:56:55 2020 +0000" }, "message": "Revert \"Use CPP defines for default x86 and x86_64 ISA features\"\n\nThis reverts commit 5b0bbf33180bbf9e7fbe8c952eda16096c637f8c.\n\nReason for revert: Broke target tests.\n\nBug: 155324337\nChange-Id: I5e838294ce8ce72098e91d33ecb2cc090d28e6d7\n" }, { "commit": "5868adaefe72cc8bcdcd8325c40f712375a506d1", "tree": "a1d4328902c4e860fe69c4e4bb34052de2530df3", "parents": [ "5a62af5dc9e9bafeffcac7820e1a5b7586e58477" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 12 11:50:34 2020 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed May 13 08:00:22 2020 +0000" }, "message": "Move implementations from class_root.h to -inl.h .\n\nMake it possible to include the definition of enum ClassRoot\nwithout pulling in a lot of other headers.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: aosp_taimen-userdebug boots.\nChange-Id: Ic90fdd70bfe0c5428a5c9a0d7901ea7e15b03488\n" }, { "commit": "5b0bbf33180bbf9e7fbe8c952eda16096c637f8c", "tree": "6431e463c691ca4a1ef9ddabcc28deb84e164857", "parents": [ "968db3c09e5059e30044d69f1a5fd9bcd937392e" ], "author": { "name": "Eric Holk", "email": "eholk@google.com", "time": "Fri May 08 12:00:02 2020 -0700" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue May 12 15:30:45 2020 +0000" }, "message": "Use CPP defines for default x86 and x86_64 ISA features\n\nWe were previously getting a lot of warnings about mismatched\ninstruction set features when running on x86 architectures. Example\nwarning:\n\n Mismatch between dex2oat instruction set features to use\n\nThis change uses the CPP defines to get the default features in this\ncase so the mismatch will not be present anymore.\n\nBug: 155324337\nTest: run a Golem benchmark (e.g. LU), observe that warning is missing.\nTest: m test-art-host-gtest\nChange-Id: I07d6a25094830d8d50fd451959e8dfd310262471\n" }, { "commit": "ee2571618ec960659e1326b540dcd41610f9a277", "tree": "a650686a2dbf0b675c5ebff48a823c82a3459ba0", "parents": [ "30fd85157260c91327c6b5a0816d312dd505c0e0" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Feb 28 15:50:13 2020 +0000" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Mar 12 16:02:27 2020 +0000" }, "message": "Revert^2 \"Support ART\u0027s target gtests in atest.\"\n\nThis reverts commit 615212399037ea41987282800f077941d7ec9f54.\n\nTest: Run the test locally\nChange-Id: I257b0cb1e4210a1d4ec3060c4470c0f8af2ee45b\n" }, { "commit": "e42876fa5557cf3fe30238f7e7e70cafdbe50001", "tree": "650fce68339c95874abf6ba278003fb3a5ecf445", "parents": [ "e521eb041875fbaf99eca5e6d2b438e7040b1dd8" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Feb 28 16:43:06 2020 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Mar 05 10:11:51 2020 +0000" }, "message": "Minor improvements in JNI assemblers.\n\nAddress issues identified in\n https://android-review.googlesource.com/1246286\nand clean up a few other things.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: aosp_taimen-userdebug boots.\nTest: run-gtests.sh\nTest: testrunner.py --target --optimizing\nBug: 12189621\nChange-Id: I9ee1a9c113ef756d7aa3bd4d3f17ef1aaa4306f5\n" }, { "commit": "615212399037ea41987282800f077941d7ec9f54", "tree": "15089323ce0a197c4585f9ad002beb016a247a5a", "parents": [ "69efda0772090bd844ba5200e3be6c0bdf2c8aac" ], "author": { "name": "Paul Trautrim", "email": "paultrautrim@google.com", "time": "Thu Feb 27 01:58:43 2020 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Feb 27 13:02:06 2020 +0000" }, "message": "Revert \"Support ART\u0027s target gtests in atest.\"\n\nThis reverts commit eac404b341e40bb72f8d79ee1d1a7173862b438e.\n\nReason for revert: Debugging test failures (b/150282462)\n\nChange-Id: I3582eeb1f121d4850209768b3a7ae8a444f0379a\n" }, { "commit": "eac404b341e40bb72f8d79ee1d1a7173862b438e", "tree": "2681b43b60f8eec774e04b7200764f6bb885c8a5", "parents": [ "109039edbdcf1bc9eb0b0ced334041292746526c" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Feb 05 16:27:43 2020 +0000" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Feb 25 16:37:33 2020 +0000" }, "message": "Support ART\u0027s target gtests in atest.\n\nThis is first simple approach which relies on installing\nthe ART testing apex on the device and rebooting it.\nThis is not ideal if bugs prevent the device from booting.\n\nThe next goal is to run the tests in chroot without reboot.\nWe should also introduce dedicated ART gtest runner.\n\nTest: atest ArtGtestsTarget --rebuild-module-info\nTest: run on device using forrest\nBug: 147817606\nChange-Id: I3b7f66dc27a665a6971fc688f220103c6b842b57\n" }, { "commit": "fa458ac21af98b3bdde2c62ed86b9c192b994372", "tree": "5fa7543c9fd5edd0e950b19a70412002e10bba47", "parents": [ "99d91d18f9f73427eced2f22642520d50c3c3b83" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Feb 12 14:08:07 2020 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Feb 19 16:08:34 2020 +0000" }, "message": "Allow late lookup for @CriticalNative methods.\n\nTest: Add and enable tests in 178-app-image-native-method\nTest: Add and enable tests in jni_compiler_test\nTest: Manually step through the new stub in GDB and check\n that backtrace works at various points.\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: aosp_taimen-userdebug boots.\nTest: run-gtests.sh\nTest: testrunner.py --target --optimizing\nBug: 112189621\nChange-Id: If094e5062acbb99eefa88f2afb4815f93730cb82\n" }, { "commit": "41b605c5ad4b06ea127ac56c6e3a4c92e8913efd", "tree": "f7b28eb11051f3faada99c11dc594cccd34a5786", "parents": [ "30b38f8d01cdb4c80092638f23c61d73e0d287f4" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Feb 12 10:52:22 2020 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Feb 14 12:01:58 2020 +0000" }, "message": "Remove MIPS support from runtime/.\n\nTest: aosp_taimen-userdebug boots.\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nBug: 147346243\nChange-Id: If1fc8be94caa69f734438d7a1f4c715addfd8876\n" }, { "commit": "6e043bbc1d9abd1d1d3247040f6cdc82a79f47be", "tree": "02470465a0426e02d15525e171c6b3bbef3d60a6", "parents": [ "ac5ae3cf5dc4c5f87293c45a1d6999f8d1515b39" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Feb 10 16:56:54 2020 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Feb 12 13:21:28 2020 +0000" }, "message": "Rewrite GenericJNI frame setup.\n\nMove the handle scope out of the managed frame, move the\nregister values to load to the bottom of the reserved area\nand pass the hidden argument to @CriticalNative methods to\nprepare for implementing late lookup.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing --interp-ac\nTest: aosp_taimen-userdebug boots.\nTest: run-gtests.sh\nTest: testrunner.py --target --optimizing --interp-ac\nBug: 112189621\nChange-Id: I4672176f9627bcbebafebb3dda0d02b8108e1329\n" }, { "commit": "5c33d35bf3bd0d824e94784312fe3ddb823028d1", "tree": "a6056e5f6a9009da93355dd00fd73caf66f1f6fc", "parents": [ "b5a78564d66c903c0073e429d71241be60f51bdf" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Feb 10 12:29:13 2020 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Feb 10 15:48:15 2020 +0000" }, "message": "Reinstate exception check in GenericJni stubs.\n\nThe error check was erroneously removed in\n https://android-review.googlesource.com/1178884\nwhere we removed the native method lookup from the\nartQuickGenericJniTrampoline(). As the locking is now the\nonly remaining operation that can fail, update the comment\nfor the check. Regression test would be rather difficult to\nadd as we would need to force OOME during lock inflation.\n\nAlso clean up unlocking code in GenericJniMethodEnd().\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: aosp_taimen-userdebug boots.\nBug: 112189621\nChange-Id: I598d5f86a58c0b6171f0b2528504aba495f1b6d8\n" }, { "commit": "8adb3258b902306d7ba2933e20f7435aa384d85e", "tree": "4779de2b13aa4663cb40132fed9d149fb46325d8", "parents": [ "871ce22a54f258e49aaf41c9ca2145afbc7451ea" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Feb 05 16:51:54 2020 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Feb 06 08:36:32 2020 +0000" }, "message": "Move code from quick_entry_points_arm64.S to asm_support_arm64.S\n\nSo it can be shared, and be used by nterp.\n\nTest: test.py\nBug: 112676029\nChange-Id: Ic188f02910d8c8279a1ce79c93f05de5c3771451\n" }, { "commit": "b885d8b631ad0a72ade32cb6b07a2ddd062a664b", "tree": "3199b2df453cb6e904b29cf316eeff51b3ece1fb", "parents": [ "f676eb408593933c80fc336d9fd409015365fcb7" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jan 14 15:25:52 2020 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jan 15 11:08:43 2020 +0000" }, "message": "Surround MR uses with #if defined read barrier.\n\nMR is only defined in the baker read barrier configuration.\n\nTest: build with CMS configuration\nBug: 147094528\nChange-Id: Ief13c74ac6706f82c065c3612d251fd52dcbc92e\n" }, { "commit": "135b5c8fe69b27c5059a9f042c394a9d438c9788", "tree": "219f60abe61d1eabec640550b9d62a97ac8901ac", "parents": [ "786e1fe445821345ae895dac60a4dc7369dab522" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Jan 08 14:23:55 2020 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Jan 14 09:12:09 2020 +0000" }, "message": "Address checker tests around inline cache and the baseline compiler.\n\nI failed to repro b/147094528 locally, but there are known two sources\nof inline cache noises introduced by the baseline compiler:\n- ensureJitCompiled doesn\u0027t ensure the method is compile \u0027optimized\u0027.\n That\u0027s what the tests expect.\n- when the GC is marking, we can potentially create duplicate entries of\n the same class in the inline cache.\n\nBug: 147094528\nTest: test.py\nChange-Id: I5cd6e5874b2c7b3273a9f4c8cb0fca59263da034\n" }, { "commit": "00391824f4ee89f9fbed178a1ee32bc29fa77b3b", "tree": "aea6bc5e49801c5b4816257ab16a97181ef0d911", "parents": [ "001e5b33ba7065dde0b85450830b605733ae1685" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 10 10:17:23 2019 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 18 06:50:39 2019 +0000" }, "message": "Add an implementation of Nterp for x64.\n\nAnd enable it on x64 when runtime and ArtMethod requirements are met\n(see nterp.cc).\n\nTest: test.py\nBug: 112676029\nChange-Id: I772cd20a20fdc0ff99529df7495801d773091584\n" }, { "commit": "57cacb720e6f995aa1a42df6e2e6470a9ec57261", "tree": "bb73a113c94bc397cd7c99a4c64e033bf29b9803", "parents": [ "013d1ee96b928f3bda9031e94d4a69f827133ce6" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Sun Dec 08 22:07:08 2019 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 17 09:48:00 2019 +0000" }, "message": "Refactor OSR related code to prepare for \"true\" OSR.\n\n- Make the compiler restore all callee-save registers.\n- Make the compiler return any value in a core register: this simplifies\n the current stub, and will also avoid having to look at the return\n type (and reading the shorty) when returning to an nterp frame.\n- Add OsrData and offsets of its members to be used by nterp.\n\nTest: test.py\nBug: 27094810\nChange-Id: Ifa4f4877ab8b1f0c6a96feccea30c909942eb2fa\n" }, { "commit": "013d1ee96b928f3bda9031e94d4a69f827133ce6", "tree": "4e374c043330f123dc3888922b554fd1291349b4", "parents": [ "9ca8b2bf46978e3a5698f8a27b48aa7eff3514df" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 04 16:18:15 2019 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 17 09:43:08 2019 +0000" }, "message": "Introduce the notion of an nterp frame.\n\nSee comments in nterp_helpers.cc. An nterp frame follows the\ncalling conventions and exception handling of the compiler. There are\nno ManagedStack transitions, and the compiler and interpreter can\njust call each other directly.\n\nFor the stack walker, an nterp frame looks like a compiled frame.\n\nThis CL introduces an nterp frame, another CL will contain an\nimplementation for x64.\n\nBug: 119800099\nTest: test.py\nChange-Id: Ie9b691f58908b7f283b4cd63b84b651526155d27\n" }, { "commit": "a00b54b74bee06c006b8bebfbef85e2801de293c", "tree": "6edb2a96c1f89ae913e6b5f190b117cb290239e8", "parents": [ "e571a283b73fb4621c401811f523503b3266564b" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 03 14:36:42 2019 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Dec 04 12:04:36 2019 +0000" }, "message": "Helpers and refactorings to prepare for interpreter optimizations (x64)\n\n- Add data structure offsets that will be used in assembly code.\n- Be explicit about a stack overflow in a fault handler.\n- Move assembly helper code in asm_support so interpreter can use it.\n- Support putting literals in InterpreterCache.\n- Fix artHandleFillArrayDataFromCode for x64.\n\nBug: 119800099\nTest: test.py\nChange-Id: I2729f87fe5d09c04ae2e7081636f0cd89ac14c21\n" }, { "commit": "a59af8aeaad8fe7d68d8f8de63eab9cf85b6ab31", "tree": "83195c74b135731cc4555254763a8f449691c1b0", "parents": [ "5c8cc64b5f1580faf510f27527e7e22987174963" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 27 17:42:32 2019 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Dec 03 14:32:09 2019 +0000" }, "message": "JIT baseline: trigger optimized compilation on hotness threshold.\n\n- Add a new hotness count in the ProfilingInfo to not conflict with\ninterpreter hotness which may use it for OSR.\n- Add a baseline flag in the OatQuickMethodHeader to identify baseline\ncompiled methods.\n- Add a -Xusetieredjit flag to experiment and test.\n\nBug: 119800099\nTest: test.py with Xusetieredjit to true\n\nChange-Id: I8512853f869f1312e3edc60bf64413dee9143c52\n" }, { "commit": "08d0984bfeaff1a1bc2db2d51ecf45f2867b3bc4", "tree": "3c8c47aae746f4057d541448f873d6e287a092d6", "parents": [ "2d8b7f4ef7a305b98dd54d259e0c2b9f6aed4fd7" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Dec 02 12:38:49 2019 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Dec 02 15:44:20 2019 +0000" }, "message": "Allow late lookup for @FastNative methods.\n\nAvoid failing a runtime state assertion.\n\nTest: Enable tests in 178-app-image-native-method\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: aosp_taimen-userdebug boots.\nTest: run-gtests.sh\nTest: testrunner.py --target --optimizing\nBug: 112189621\nChange-Id: I3eb5c9fd239743732866e8ea0863a84bf85f7b20\n" }, { "commit": "e2a3aa988630b3c2952ac44943f03dde60454195", "tree": "acee7012af6e2b161c91e6cd8b7b4d12eb5aa927", "parents": [ "a2c4d61e482a15974e3e220bcd62a64043ee536f" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Nov 25 17:52:58 2019 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 27 14:04:43 2019 +0000" }, "message": "Baseline JIT: update inline caches in compiled code.\n\nIn trying to remove profiling from interpreter, to speed up\ninterpreter performance.\n\nBug: 119800099\nTest: test.py --baseline\nChange-Id: Ica1fa41a889b31262d9f5691b30a31fbcec01b34\n" }, { "commit": "af9ab6de388c14cc42166ab3fab30e2dac0b8693", "tree": "d654bb01f6e1408744d917ebb78beef6317a1fca", "parents": [ "688ff644f023e91cb50709306f4c8eb713632f64" ], "author": { "name": "Chuwei Xu", "email": "xucw@motorola.com", "time": "Tue Nov 05 22:06:01 2019 +0800" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Wed Nov 13 10:19:40 2019 +0000" }, "message": "art: extend the supported cpu_variant list for arm64\n\nadd kryo300 to the supported cpu_variant list\n\nBug: b/143929263\nChange-Id: I2eb4ec0e98f84f19270b8555696191ff1aa8ac0a\n" }, { "commit": "1ba7e8c10af4e270864a417044244d63db53ccf5", "tree": "5674e60920995f3520d85bf9e681f285ef87fbb6", "parents": [ "849439ac18cc36972c145fef2e0f54dea36ff131" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Sep 03 17:10:42 2019 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Sep 17 21:25:30 2019 +0000" }, "message": "Fix uses of DW_CFA_restore_state in assembly code.\n\nThe specification does not define how DW_CFA_restore_state affects the CFA.\nThere is no de-facto consensus on the expected behaviour between tools and\nsometimes even the same tool might differ for different architectures.\n\nTherefore we must always explicitly set the CFA after the state restore.\n\nBug: 31975598\nBug: 140407634\nTest: \"test.py -r --gcstress --optimizing --host\" + extra backtrace checks.\nTest: \"objdump -Wf\" and manually check that all restores match saves.\nChange-Id: Ic1547149f2159e77887d48dedd4afb7e000066e8\n" }, { "commit": "c6175610512141a7d70e3a50e09ffac1606c3097", "tree": "50484eaf702569bcd636cad0f61fec080a8b4f66", "parents": [ "e9455f61f7e45963c7056b51dbaf8bb42c47454a" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Fri Jul 05 19:50:52 2019 +0100" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Aug 16 19:05:23 2019 +0000" }, "message": "ART: Add support for SVE feature for ARM64.\n\nImplement basic ISA feature configuration for SVE.\n\nTest: instruction_set_features_test\nTest: instruction_set_features_arm64_test\nChange-Id: I84963c6f896c435ecfb898f7f251039dfed8878a\n" }, { "commit": "918e9af6a7259e7178ec10257f568a60e832a962", "tree": "1f56177ca84debc27f942db38821d7eae10a4985", "parents": [ "c94b44cee8376b86da85c2452e74edfe5ad4b2cf" ], "author": { "name": "Peter Collingbourne", "email": "pcc@google.com", "time": "Wed Aug 07 17:15:24 2019 -0700" }, "committer": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Aug 09 02:25:29 2019 +0000" }, "message": "Add assembly support for -fsanitize\u003dhwaddress tagged globals.\n\nAs of LLVM r368102, Clang will set a pointer tag in bits 56-63 of the\naddress of a global when compiling with -fsanitize\u003dhwaddress. This requires\nan adjustment to assembly code that takes the address of such globals: the\ncode cannot use the regular R_AARCH64_ADR_PREL_PG_HI21 relocation to refer\nto the global, since the tag would take the address out of range. Instead,\nthe code must use the non-checking (_NC) variant of the relocation (the\nlink-time check is substituted by a runtime check).\n\nThis change makes the necessary adjustment in all of the places where it is\nneeded when compiling with -fsanitize\u003dhwaddress. The __clang_major__ \u003e\u003d 10\nis temporary (required because prebuilt Clang doesn\u0027t support :pg_hi21_nc:)\nand we should be able to remove it once we update Clang past r368102.\n\nTest: walleye_hwasan-userdebug boots\nChange-Id: Ide7f513baac42fdeb637e95a7f7c1c083441884d\n" }, { "commit": "8e1106587f0273116302afe06956129b5d82784a", "tree": "e1869e8da9ab9a6bfdf89a34f4e8cedd44045005", "parents": [ "5a11036542fbd2c00de1896c0ae2477f655e8ed3" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jul 30 10:14:41 2019 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 01 08:35:08 2019 +0000" }, "message": "Use ClassStatus::kVisiblyInitialized for allocations.\n\nAnd move the \"intialized but not visibly initialized\" check\nto ClassLinker::EnsureIntialized().\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: aosp_taimen-userdebug boots.\nTest: run-gtests.sh\nTest: testrunner.py --target --optimizing\nBug: 36692143\nChange-Id: Ib5e19326b1149b2aef586b905ce89470c3a8e405\n" }, { "commit": "743600d5ae654817a5d81179fb480816e0cd139d", "tree": "b7d32337b7edda269d9ebc72b73551eff1b791f7", "parents": [ "bd613eced14bc56ece6beb276addab0f40337163" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jun 04 10:49:52 2019 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jun 04 14:58:29 2019 +0000" }, "message": "ARM/ARM64: Clean up artFindNativeMethod().\n\nPass the Thread::Current() as an argument just like we\ndo for other architectures.\n\nTest: aosp_taimen-userdebug boots.\nTest: testrunner.py --target --optimizing\nChange-Id: I1dfb019da1018f493ee55ff28bd20e2db2258eb9\n" }, { "commit": "552a13415573da19eafa46e1ac00fb0eb68f2b23", "tree": "8cae5f3602d8f8e65cd3cbc349af17d785128605", "parents": [ "0dda8c84938d6bb4ce5a1707e5e109ea187fc33d" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Oct 31 10:56:47 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 16 14:44:09 2019 +0000" }, "message": "ART: Optimize StringBuilder append pattern.\n\nRecognize appending with StringBuilder and replace the\nentire expression with a runtime call that perfoms the\nappend in a more efficient manner.\n\nFor now, require the entire pattern to be in a single block\nand be very strict about the StringBuilder environment uses.\nAlso, do not accept StringBuilder/char[]/Object/float/double\narguments as they throw non-OOME exceptions and/or require a\ncall from the entrypoint back to a helper function in Java;\nthese shall be implemented later.\n\nBoot image size for aosp_taimen-userdebug:\n - before:\n arm/boot*.oat: 19653872\n arm64/boot*.oat: 23292784\n oat/arm64/services.odex: 22408664\n - after:\n arm/boot*.oat: 19432184 (-216KiB)\n arm64/boot*.oat: 22992488 (-293KiB)\n oat/arm64/services.odex: 22376776 (-31KiB)\nNote that const-string in compiled boot image methods cannot\nthrow, but for apps it can and therefore its environment can\nprevent the optimization for apps. We could implement either\na simple carve-out for const-string or generic environment\npruning to allow this pattern to be applied more often.\n\nResults for the new StringBuilderAppendBenchmark on taimen:\n timeAppendLongStrings: ~700ns -\u003e ~200ns\n timeAppendStringAndInt: ~220ns -\u003e ~140ns\n timeAppendStrings: ~200ns -\u003e 130ns\n\nBug: 19575890\nTest: 697-checker-string-append\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nTest: aosp_taimen-userdebug boots.\nTest: run-gtests.sh\nTest: testrunner.py --target --optimizing\nTest: vogar --benchmark art/benchmark/stringbuilder-append/src/StringBuilderAppendBenchmark.java\nChange-Id: I51789bf299f5219f68ada4c077b6a1d3fe083964\n" }, { "commit": "956f9fadb33619edb3480d2fe1de144b56814b7e", "tree": "27cbc3202918948b500b22f2bb785186c193ffe7", "parents": [ "b4e65074f148214a61f94c12fed54f4d113c35d6" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Apr 25 18:25:56 2019 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Apr 29 11:46:49 2019 +0000" }, "message": "Save floating point registers in art_quick_osr_stub\n\nWe need to save callee save floating-point registers on ARM/ARM64.\nNo x86/x86-64 floating point registers are callee save.\n\nBug: 130313339\nTest: test.py -r --target -t 570-checker-osr\nChange-Id: I53dfd60edb136bd305389e3b4bd51b636875d429\n" }, { "commit": "51c655847f2f7d2a9127574d3aeda12755014608", "tree": "b46ad0067f5efb98a19764650a53e68cfc9d7182", "parents": [ "81dc7ab1df59021463757e06a95b2abc937a73db" ], "author": { "name": "Christopher Ferris", "email": "cferris@google.com", "time": "Tue Apr 23 13:59:28 2019 -0700" }, "committer": { "name": "Christopher Ferris", "email": "cferris@google.com", "time": "Thu Apr 25 19:05:59 2019 +0000" }, "message": "Add cfi instructions.\n\nBug: 131093040\n\nTest: Builds, step through function and verify unwinding works at every point.\nChange-Id: Ie213615bebe8dd3a091c4ddef561f2a609b8c4ec\n" }, { "commit": "20d1c942c0e841920eac92f68c6d3e7f2a2135b4", "tree": "931aed7f4639a4b0a6ab8e3cd7765295a1883be3", "parents": [ "d32f8aadd37aab5b89ffccc86f7d8d07447a213a" ], "author": { "name": "jaishank", "email": "jaishankar.rajendran@intel.com", "time": "Fri Mar 08 15:08:17 2019 +0530" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Apr 25 09:05:09 2019 +0000" }, "message": "Patch supports Intel(R) AVX/AVX2 MOV Instruction\n\nThis patch enhances the existing ART-Compiler\nto generate Intel(R) AVX/AVX2 MOV Instructions for\ndoing SIMD Operations on Intel(R) Architecture CPUs.\nIt also provides the framework for AVX/AVX2 Instruction\nencoding and dissassembly\n\nBUG: 127881558\nTest: run-test gtest\nChange-Id: I9386aecc134941a2d907f9ec6b2d5522ec5ff8b5\n" }, { "commit": "1eb5d8770a533b86269e503a842f6b45591e87cf", "tree": "222728b3902587c45ad7c294c7ba69393f8d7cfa", "parents": [ "9b70ee0fdb1969a9a5cad2052b35c2fa04509bc2" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Wed Apr 03 13:56:22 2019 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Apr 16 12:53:02 2019 +0000" }, "message": "Prefix entrypoints with 0xFF so we can do extra checks.\n\nAdd check to ensure we do not read method header from libart.so\n\nBug: 123510633\nTest: m -j40 cts \u0026\u0026 cts-tradefed run cts \\\n --test android.jvmti.cts.JvmtiHostTest1927#testJvmti \\\n --module CtsJvmtiRunTest1927HostTestCases\nChange-Id: Ic3e42e3bd4fbda3b11c7e265ed114770139151b9\n" }, { "commit": "dfc0de7696a50a9aeee95dcf74dac036e3334314", "tree": "20a6edd33cca852f8e65ce8d20a85949b566904c", "parents": [ "9ef308da0ea8d1df2edf65d4957599fafcc56aeb" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Apr 01 10:57:55 2019 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Apr 02 07:57:27 2019 +0000" }, "message": "Partially ObjPtr\u003c\u003e-ify Object, fix stale ref in test.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nBug: 31113334\nChange-Id: I0c0bc669c0ab8d99185e662a2fec16f32a42a0a2\n" }, { "commit": "179b7c61ea6769b99f70c80a7a89cbb212423ec2", "tree": "06130898bfb2d8c3f71f4fe181277f20e1942726", "parents": [ "c8b7d445e02b752a68d824e2bc69658dfb76288a" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Mar 22 13:38:57 2019 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Mar 25 16:54:37 2019 +0000" }, "message": "ObjPtr\u003c\u003e-ify String allocations, fix stale refs.\n\nObjPtr\u003c\u003e-ify String allocation functions and related code\nand remove some unnecessary calls to ObjPtr\u003c\u003e::Ptr(). Fix\nstale reference uses in reference_table_test and stub_test.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nBug: 31113334\nChange-Id: I42927fb8b7240e5132188f73318b2ccb218748fd\n" }, { "commit": "7909e1e4cc741b38b25328e2f9077beb7ecd018b", "tree": "b59583aa7e9d865d46c5bc8dec00729c649d4756", "parents": [ "ca3c6d9231aa8e4a9ca7c9040398d57f130441a0", "7f88c1a269754001bfcaf311b378cf1cc71acf84" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Feb 05 12:50:51 2019 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Feb 05 12:50:51 2019 +0000" }, "message": "Merge \"ART: Enable ISA features run-time detection for ARM64\"" }, { "commit": "b87eedcec661cb2e3d4d4fb359f764f187580cac", "tree": "41116f0a5ad831fe7b4881a8f311a0b123165f1f", "parents": [ "53a41ac9305f3c435cbb975d773bbdb5490d8321" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jan 31 16:58:51 2019 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jan 31 17:45:46 2019 +0000" }, "message": "x86/x86-64: Fix IMT conflict trampoline for obsolete methods.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nBug: 123693178\nChange-Id: I06c08151fc3045824610d3d2e177cc13243b7e0a\n" }, { "commit": "7f88c1a269754001bfcaf311b378cf1cc71acf84", "tree": "147bb988929e8bd8827c4b148f28da4c28c0ea70", "parents": [ "5247113f3277fd679e3e1beeb6fbfb30797aa481" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Tue Nov 06 11:42:41 2018 +0000" }, "committer": { "name": "Evgeny Astigeevich", "email": "evgeny.astigeevich@linaro.org", "time": "Wed Jan 30 14:09:25 2019 +0000" }, "message": "ART: Enable ISA features run-time detection for ARM64\n\nOn a target run-time detected ISA features can be more accurate than\ninstruction set features based on a build-time information such as an\ninstruction set variant or C++ defines. Build-time based features can\nbe too generic and do not include all features a target CPU supports.\n\nThis CL enables instruction feature run-time detection in the JIT/AOT\ncompilers:\n\n- The value \"runtime\" to the option \"--instruction-set-features\" to try\nto detect CPU features at run time. If a target does not support run-time\ndetection it has the same effect as the value \"default\".\n- Runtime uses \"--instruction-set-features\u003druntime\" if run-time detection is\nsupported.\n\nThe CL also cleans up how an instruction set feature string is processed\nby InstructionSetFeatures::AddFeaturesFromString. It used to make redundant\nuses of Trim in subclasses. The calls are replaced with DCHECKs\nverifying that feature names are already trimmed.\n\nTest: m test-art-target-gtest\nTest: m test-art-host-gtest\nTest: art/test.py --target --optimizing --interpreter --jit\nTest: art/test.py --host --optimizing --interpreter --jit\nTest: Pixel 3 UI booted\n\nChange-Id: I223d5bc968d589dba5c09f6b03ee8c25987610b0\n" }, { "commit": "639b2b1f3a675135d443fc380323fbc48639a7eb", "tree": "0aba54938e712e5dd95b525c92f836c59cca49c6", "parents": [ "8764dc3b3eda7f6f13ed7b584475503fe5bedd59" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Jan 08 10:32:50 2019 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Jan 09 12:38:30 2019 -0800" }, "message": "ART: Remove instruction_set.h from thread.h\n\nMove the function definitions relying on it to the -inl. Some\nfollow-up transitive-include cleanup, as well as some more\nforward-declarations.\n\nBug: 119869270\nTest: mmma art\nChange-Id: I820f395e6cb8343a4bb9bf02da271fbec067109f\n" }, { "commit": "8764dc3b3eda7f6f13ed7b584475503fe5bedd59", "tree": "e8f6e3a4a2596595ffdc8a517daaf37030482eae", "parents": [ "49b74a8c685acfe43dd33e3f51a24c486388bee1" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Jan 07 15:20:12 2019 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Jan 09 12:38:30 2019 -0800" }, "message": "ART: Use iosfwd more\n\nUse iosfwd where an include of ostream is unnecessary. Also move\ncallee_save_type.h to runtime.\n\nBug: 119869270\nTest: mmma art\nChange-Id: Id8995d6f524e4c491eb6f57fdffb940cf35d291f\n" }, { "commit": "5a0430d0239481f4efb252d60ec9641703b8d456", "tree": "cd7bdb45d94e7af3aa3e1bbb5958f930bcee29f6", "parents": [ "b9b995738c8f53d68446d14553c1befd487877e7" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Jan 04 14:33:57 2019 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Jan 09 12:38:20 2019 -0800" }, "message": "ART: Introduce runtime_globals\n\nSplit libartbase\u0027s globals.h into actual globals, and runtime-\ndependent globals which should live in runtime.\n\nBlanket-convert all runtime/ inclusions.\n\nIn future CLs, the number of global constants should be reduced.\nFor example, GC types are only relevant to GC/alloc functionality.\n\nBug: 119869270\nTest: mmma art\nChange-Id: I2d8cd32e0e7ab4084d2f2e96864b5338a78da94e\n" }, { "commit": "11a250b0bcd130b5fd3f925d912f86f2e45067cc", "tree": "fdcf24e780186e3d1e8c70676124e66ca02be86d", "parents": [ "883931d0cc9c48573c13836b80fbad465bdaa0c9" ], "author": { "name": "Haibo Huang", "email": "hhb@google.com", "time": "Tue Dec 04 20:42:34 2018 -0800" }, "committer": { "name": "Haibo Huang", "email": "hhb@google.com", "time": "Fri Dec 07 01:58:25 2018 +0000" }, "message": "Remove denver from art\n\nTest: build\nChange-Id: If301a4ce0f1a6db7f42c64c97c07ac7f51dfcf9d\n" }, { "commit": "7fbc4a59ba2e60d869313d7961662430df83b2cb", "tree": "59520285df8d2075412ddc566a0d4d96d4c7e109", "parents": [ "7cc45fd1dbcf5704e442d0443e437aa2ae3fe21b" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Nov 28 08:26:47 2018 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Dec 06 11:37:19 2018 -0800" }, "message": "ART: Move to using locks.h instead of mutex.h\n\nWhen only annotating lock requirements, use locks.h.\n\nBug: 119869270\nTest: mmma art\nChange-Id: I1608b03254712feff0072ebad012c3af0cc3dda4\n" }, { "commit": "b06fbf7dfdb360885a1791b61c8943200c77e4e6", "tree": "b596912a9e13fa9125400f9b4daa17d289bb3e85", "parents": [ "f2970cd870948a6ee1c8ecd30c9c3147d05aa0be" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Thu Nov 22 19:51:36 2018 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Nov 30 16:07:36 2018 +0000" }, "message": "ART: Support kryo385 CPU.\n\nQualcomm Kryo385 CPU supports up Armv8.2-a features: atomics,\nfp16, crc32.\n\nRelated change:\nhttps://android-review.googlesource.com/c/platform/build/soong/+/831260\n\nTest: builds Pixel 3.\nBug: 119564566\nChange-Id: Iede5830093497abe753a34df3bc4913468be39d0\n" }, { "commit": "5c89c5791233f759b8ae093e5cd9f63cef7cf05b", "tree": "fa8bf74c16412146cc82660cde455e5ddee536f5", "parents": [ "97d40f9c7b1157783d09861ce76d3a0b3da73cbe" ], "author": { "name": "Yi Kong", "email": "yikong@google.com", "time": "Wed Oct 31 14:10:32 2018 -0700" }, "committer": { "name": "Yi Kong", "email": "yikong@google.com", "time": "Wed Oct 31 14:10:32 2018 -0700" }, "message": "Do not clobber reserved register X18\n\nX18 is now a reserved register for Android. Explicit clobbering of this\nregister causes compile error in Clang 8.0.\n\nTest: m checkbuild\nBug: 111759196\nChange-Id: Icecba52c31b3fbb100aaed5f18a28fa4e27a7028\n" }, { "commit": "70f5fd0770adbef645950895309a2a63c3bde7c0", "tree": "d9794484e83858cf7e33551eb8a108e07f46b18c", "parents": [ "52ecb65ae9e1ad6fe7f58beecc88cdc08e08f0c4" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Oct 24 19:58:37 2018 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Oct 26 08:44:12 2018 -0700" }, "message": "ART: Add class-alloc-inl.h\n\nIn an effort to reduce the (transitive) proliferation of heap-inl\nadd a specific inline header for class instance allocation.\n\nBug: 118385392\nTest: mmma art\nTest: m test-art-host\nChange-Id: I32529f0221a836452c58687330a91ac0d5fde162\n" }, { "commit": "52ecb65ae9e1ad6fe7f58beecc88cdc08e08f0c4", "tree": "7a8ee84cad0df34ab33bdcb0115fc0c79d6c83be", "parents": [ "c2099b0b0c052dd61137b9cf5f9f8b30bab1a7a8" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Oct 24 15:18:21 2018 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Oct 26 08:44:12 2018 -0700" }, "message": "ART: Add object-array-alloc-inl.h\n\nIn an effort to reduce the (transitive) proliferation of heap-inl\nadd a specific inline header for object array allocation.\n\nBug: 118385392\nTest: mmma art\nTest: m test-art-host\nChange-Id: I0d7c40ed53708d4c759190961b40f0cac3fe696d\n" }, { "commit": "fe89f170fd454188902ae0b80e08c0888158c60e", "tree": "3862cd1e16d25696505da841c127f13e0e08fdfd", "parents": [ "5314caec5a2c61fa96a2d6ee134706c085c18b11", "bd8e10c586fca1c99f29eff27f66d483a18b0ccf" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Oct 25 11:51:43 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 25 11:51:43 2018 +0000" }, "message": "Merge \"Block the platform register, x18.\"" }, { "commit": "98ea9d9d82ab078ca10fa7f8e02eddda94cf1d98", "tree": "a848b7e41ff227a2d3d4d6795ec11089f39cb6ca", "parents": [ "02338775e33b553be51d44ff60bb1ef8e527bd94" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Fri Oct 19 14:06:15 2018 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Oct 23 15:19:55 2018 -0700" }, "message": "ART: Refactor for bugprone-argument-comment\n\nHandles runtime.\n\nBug: 116054210\nTest: WITH_TIDY\u003d1 mmma art\nChange-Id: Ibc0d5086809d647f0ce4df5452eb84442d27ecf0\n" }, { "commit": "60c5bc1a273c3dc8828088c4336b410516e846d6", "tree": "67948b596d446bc92f819d05072c744d43a7d47b", "parents": [ "df7c2a6ac8c49156c45e2c69c0dae5bddd67801f" ], "author": { "name": "Shalini Salomi Bodapati", "email": "shalini.salomi.bodapati@intel.com", "time": "Tue Oct 23 11:15:33 2018 +0530" }, "committer": { "name": "Shalini Salomi Bodapati", "email": "shalini.salomi.bodapati@intel.com", "time": "Tue Oct 23 06:06:47 2018 +0000" }, "message": "Add a new cpu variant named kabylake\n\nThis is needed to perform instruction simplification\non cpus that support AVX2 feature flag.\n\nTest: ./test.py --host --64, test-art-host-gtest\nChange-Id: I3e300dff56b8ec5d6f170f3c3840faafa87c3dd6\nSigned-off-by: Shalini Salomi Bodapati \u003cshalini.salomi.bodapati@intel.com\u003e\n" }, { "commit": "50b47432f8df853b8479179154382ef30bdf30c9", "tree": "ec702341b889cc43cc75625ddad8c1bebeff3c2f", "parents": [ "f06ca50f0aff5167f767b09f624c60186290a623" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Oct 18 12:26:34 2018 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Thu Oct 18 12:43:06 2018 +0100" }, "message": "Move cpp-define related static_assert to runtime.\n\nThe runtime is build with both debug and non-debug configs,\nso checking it there covers more cases.\n\nTest: Check this caches cases which previously passed.\nChange-Id: I543547e517b79289438b19ed9e18f5a6d0b74172\n" }, { "commit": "43c6653eaba28031c30350284806c28e89a1b9ea", "tree": "7d933567c1bd4619765de190ca9b3b1327d720b7", "parents": [ "c926e2623d15150171f08558adfde9837571f77d" ], "author": { "name": "Haibo Huang", "email": "hhb@google.com", "time": "Wed Oct 10 13:39:02 2018 -0700" }, "committer": { "name": "Haibo Huang", "email": "hhb@google.com", "time": "Mon Oct 15 13:58:59 2018 -0700" }, "message": "Add support for A76 in art\n\nBug: 117125298\nTest: run art unit tests\nChange-Id: Ie07861be29c18b9bd5405d2d2fdda790cf57c97e\n" }, { "commit": "3cf0a3e7223dc9792e92e7cace1ab165ba30ef7c", "tree": "092c5b78ffdda2415b44b153a2f101931a9dbc75", "parents": [ "8db807252e1d4d0bab7785be231e20a1e5fd8e74", "1032f9bc6808c95da6ce4614b591c461268f05b1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 15 16:52:17 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 15 16:52:17 2018 +0000" }, "message": "Merge \"ART: Add support for ARMv8.x features for ARM64.\"" }, { "commit": "766e74f58312af149219473a691c6f2d9bcca428", "tree": "4c216f5ebd128075f20d0857afb383d31da20c5a", "parents": [ "0adf4d80ca1c673e5f7c5249faabadccdc1ddbbd" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Tue Oct 02 17:12:24 2018 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Oct 12 03:22:29 2018 +0100" }, "message": "Cleanup the cpp-define-generator definitions.\n\nTest: test-art-host-gtest-arch_test\nChange-Id: Ifda7a51d19156b1eb62bc39b16ec559d609744e5\n" }, { "commit": "0adf4d80ca1c673e5f7c5249faabadccdc1ddbbd", "tree": "0c4f88f1fa6ab56fd1b24426c75f17836a6bd81d", "parents": [ "78940f2254354373c6b311c759c43f51d3ad77f1" ], "author": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Mon Oct 01 18:17:45 2018 +0100" }, "committer": { "name": "David Srbecky", "email": "dsrbecky@google.com", "time": "Fri Oct 12 03:22:29 2018 +0100" }, "message": "Rewrite cpp-define-generator\n\nThe new method works by generating temporary per-architecture\nhuman-readable object file with the constants embedded in it.\nPython script extracts those values and generates the header.\n\nThis means the values can now implicitly depend on pointer size,\ncompile time flags, or ABI specific object layout with no hacks.\n\nTest: test-art-host-gtest-arch_test\nChange-Id: Id6e8c77c01f9d6c49cd6d40e3487b56fa4777349\n" }, { "commit": "1032f9bc6808c95da6ce4614b591c461268f05b1", "tree": "45558c4b037a86fc8570c35e7acd47205c91ed13", "parents": [ "26f048f48cdb1e884aab2b6fddf26d58346d29ad" ], "author": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Fri Jul 13 15:03:14 2018 +0100" }, "committer": { "name": "xueliang.zhong", "email": "xueliang.zhong@linaro.org", "time": "Mon Sep 24 14:05:59 2018 +0100" }, "message": "ART: Add support for ARMv8.x features for ARM64.\n\nAdd support for cortex-a76 CPU.\nAdd support for ARMv8.x in instruction set features.\n\nTest: instruction_set_features_test\nTest: instruction_set_features_arm64_test\n\nChange-Id: I3ae9db34507a3bb740fc0b7ceb335486dccdf460\n" }, { "commit": "bd8e10c586fca1c99f29eff27f66d483a18b0ccf", "tree": "ac228db5c0a3cbcc82c665bd2c1653d7e351c09e", "parents": [ "4613c8a3a549213240f3ffc46514b600d872938e" ], "author": { "name": "Peter Collingbourne", "email": "pcc@google.com", "time": "Thu Apr 12 16:39:55 2018 -0700" }, "committer": { "name": "Peter Collingbourne", "email": "pcc@google.com", "time": "Thu Sep 06 01:18:33 2018 +0000" }, "message": "Block the platform register, x18.\n\nBug: 77982665\nTest: run-libcore-tests.sh, sailfish boots\nChange-Id: I5bc4c77f76bb6747a002bff2e16d83c679beeb32\n" }, { "commit": "0ed1eaba4f5bd56fd2fba621e71aa8484397ef0e", "tree": "eae7804933e011bb98af0875d5832ac313934671", "parents": [ "213f895897c85bf98ebc65c8d8d0605d228ed3e8" ], "author": { "name": "Peter Collingbourne", "email": "pcc@google.com", "time": "Tue Aug 28 18:21:28 2018 -0700" }, "committer": { "name": "Peter Collingbourne", "email": "pcc@google.com", "time": "Tue Aug 28 18:24:39 2018 -0700" }, "message": "arm64: Don\u0027t use the GOT to access art::Runtime::instance_.\n\nBecause ART is built with -fvisibility\u003dprotected, the location of\nthis symbol can be statically resolved by the linker, so there is no\nneed to go via the GOT.\n" }, { "commit": "213f895897c85bf98ebc65c8d8d0605d228ed3e8", "tree": "0e6430e688cf1420ff1133dbde7ea4ac53a9d297", "parents": [ "96b81658dd2726a8cfa5f7e5323cdb6a073e7ff1", "9b7656d4dfc89d918264db4cb4b54b1383008140" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Aug 28 21:50:04 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Aug 28 21:50:04 2018 +0000" }, "message": "Merge \"HWASan support in ART.\"" }, { "commit": "9b7656d4dfc89d918264db4cb4b54b1383008140", "tree": "632b92d791a02ea1f082c7445b7389ec6e2c1c8c", "parents": [ "19759b28bc9dad1581c207d76227eb74fc8eebcb" ], "author": { "name": "Evgenii Stepanov", "email": "eugenis@google.com", "time": "Tue Aug 21 15:18:49 2018 -0700" }, "committer": { "name": "Evgenii Stepanov", "email": "eugenis@google.com", "time": "Tue Aug 28 13:03:19 2018 -0700" }, "message": "HWASan support in ART.\n\nTwo small tweaks:\n* The highest 8 bits of a pointer in hwasan contain a random tag which needs to\n be removed before comparing _unrelated_ pointers.\n* Annotate DoLongJump. HWASan needs to re-tag the newly unallocated stack space\n to match SP. This is similar to ASan annotation (__asan_handle_noreturn), but\n more precise - HWASan needs to know the destination SP address because it can\n not conservatively \"unpoison\" the entire stack like ASan does.\n\nBug: 112438058\nTest: mmm SANITIZE_TARGET\u003dhwaddress\n\nChange-Id: I9f9d92495b3a4b2637e48c7af1b614e8d1db8ea0\n" }, { "commit": "f73cacaae3d8f89327d8886b37792a849cabd9ac", "tree": "79047e31d512d065db47af7e68fa155c1f638f11", "parents": [ "bbc6e7edb5fca4a61ac53dd9bce79cb4f0bb3403" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Aug 24 17:19:07 2018 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Aug 28 11:09:40 2018 +0100" }, "message": "Remove superfluous \u0027virtual\u0027 specifiers in ART.\n\nRemove \u0027virtual\u0027 specifier on methods already bearing the \u0027override\u0027\nspecifier.\n\nTest: mmma art\nChange-Id: I114930969a5ca048d88de9ecd18e2c6403593e31\n" }, { "commit": "bbc6e7edb5fca4a61ac53dd9bce79cb4f0bb3403", "tree": "0fbce767bc383358cf4cd65aafc74140e1850982", "parents": [ "19379b58bd433da91230e4fe6cd96e7416d16adc" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Aug 24 16:58:47 2018 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Aug 28 11:06:07 2018 +0100" }, "message": "Use \u0027final\u0027 and \u0027override\u0027 specifiers directly in ART.\n\nRemove all uses of macros \u0027FINAL\u0027 and \u0027OVERRIDE\u0027 and replace them with\n\u0027final\u0027 and \u0027override\u0027 specifiers. Remove all definitions of these\nmacros as well, which were located in these files:\n- libartbase/base/macros.h\n- test/913-heaps/heaps.cc\n- test/ti-agent/ti_macros.h\n\nART is now using C++14; the \u0027final\u0027 and \u0027override\u0027 specifiers have\nbeen introduced in C++11.\n\nTest: mmma art\nChange-Id: I256c7758155a71a2940ef2574925a44076feeebf\n" }, { "commit": "dd509acc6d916df7cff91c51ad0666f60b75dfc0", "tree": "4516c4413f9c23464567984f40dc794c07dda7c8", "parents": [ "f345404c725330914b8313d2c1af17226c5b92ca" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 21 13:59:26 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 21 16:08:03 2018 +0100" }, "message": "ARM/ARM64: Rewrite art_quick_do_long_jump.\n\nAvoid accessing memory below SP.\nAvoid using a deprecated instruction on ARM.\n\nLoad all registers except IP on ARM and IP0, IP1 on ARM64.\nWe previously didn\u0027t load r1 on ARM (where obsolete\ncomments described it as a return value) and x1 on ARM64\nbut it\u0027s preferable to restore these properly, clobbering\ninterprocedural scratch registers instead. This may be\nuseful if we eventually decide to allocate dex registers\nto physical registers for catch handlers in compiled code.\n\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --optimizing\nChange-Id: I273ac79bf36c999e937a164a88b7075b24f930c5\n" }, { "commit": "d887ed8228ea2f8dfd3a178a0d0923275402e1fd", "tree": "371d9baee8747966818904962fc99d5834a489c6", "parents": [ "d7a0192ffa9c9015f0980b1aaa694e914a37d57f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 14 13:52:12 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 15 15:50:39 2018 +0100" }, "message": "Revert^2 \"ARM: Reimplement the UnsafeCASObject intrinsic.\"\n\nThis reverts commit f28be439b97623ebad540f7a1e3f9f1e3436b001.\n\nThe regression test for the revert reason was added in\n https://android-review.googlesource.com/731508 .\nWe fix the problem by introducing a specialized entrypoint\nfor the UnsafeCASObject intrinsic introspection marking\nwhere we read the destination register from the right bits.\n\nChange-Id: I1838abe05474be009d0fd96125efebd7f6dd9c59\nTest: m test-art-host-gtest\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --optimizing --32\nTest: ART_HEAP_POISONING\u003dtrue testrunner.py --target --optimizing --32\nBug: 36141117\n" }, { "commit": "94796f8e1b1d920c6107ffddf4efdabcf85e1da4", "tree": "e6c068b622bc60b1570eb1c54d3ddeea4972b1a2", "parents": [ "248141f724cbb9d436f13181b5301172c4385cc2" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Aug 08 15:15:33 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Aug 14 16:36:39 2018 +0100" }, "message": "ARM64: Reimplement the UnsafeCASObject intrinsic.\n\nFor the UnsafeCASObject with Baker read barriers, drop the\nold code updating the field. Perform the main path CAS loop\nand redirect the flow for failure to a slow path that marks\nthe old value and compares it with the expected value (if\nnot marking, this is just a few instructions to determine\nthat they differ). If it\u0027s the same, the old value is known\nto be the from-space reference to the expected object and\nthe slow path performs a modified CAS loop checking for both\nexpected object references (from-space and to-space).\n\nTest: Already covered by the 160-read-barrier-stress.\nTest: m test-art-host-gtest\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --optimizing --64\nTest: ART_HEAP_POISONING\u003dtrue testrunner.py --target --optimizing --64\nBug: 36141117\nChange-Id: I175806dbc003640c9bb6759be6788311bcc9310c\n" }, { "commit": "9d479254d0dc4043a15ab26205f40439eca15493", "tree": "af8a9c9c6f2c28e723a971c9d39c9d1cebd1f814", "parents": [ "ca20fb6cc4dda392e63bdc8ec9de54d89793373e" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jul 24 11:35:20 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Aug 03 11:43:30 2018 +0000" }, "message": "Rename type resolution entrypoints.\n\nRename the InitializeType and InitializeTypeAndVerifyAccess\nentrypoints to Resolve* to better match their semantics.\nKeep the InitializeStaticStorage name for now as the most\nappropriate name InitializeType would clash with the old\nname of the ResolveType entrypoint.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nChange-Id: Ide55b58c490d085ab37d8536f90699f7ed571d59\n" }, { "commit": "a9f303c089aa2b2fc82d97201352945678ef54ae", "tree": "0df0eb5294a3ee72aea8ca670762c02ca9ffa8dd", "parents": [ "1bfd891d06e276d602b4a6ccf1a9f70967195218" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jul 20 16:43:56 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Aug 02 17:41:21 2018 +0100" }, "message": "Rewrite Class init entrypoint to take a Class arg.\n\nFixes invalid type index being passed to the entrypoint for\nclass init check across dex files when the target type does\nnot have a TypeId in the compilation unit\u0027s DexFile.\n\nThe size of the aosp_taimen-userdebug prebuilts:\n - before:\n arm/boot*.oat: 16782748\n arm64/boot*.oat: 19764400\n oat/arm64/services.odex: 20162432\n - after:\n arm/boot*.oat: 16811692 (+28.3KiB, +0.17%)\n arm64/boot*.oat: 19801032 (+35.8KiB, +0.19%)\n oat/arm64/services.odex: 20232208 (+68.1KiB, +0.35%)\nThis increase comes from doing two runtime calls instead of\none for HLoadClass/kBssEntry that MustGenerateClinitCheck().\n\nTest: Additional test in 476-clinit-inline-static-invoke\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing --jit\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --optimizing --jit\nTest: testrunner.py --jvm\nBug: 111433619\nChange-Id: I2fccd6944480ab4dac514f60d38e72c1014ae7b2\n" }, { "commit": "bd39d145e4986217bcb8dce1d4a9631d926a2781", "tree": "52dfd3307ab5279e960f9a1bf6e474e47440a3d8", "parents": [ "6f4cf6e8fa15de2f9bf7c6a649ea7a2fabef886a" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jul 19 11:14:42 2018 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jul 19 11:37:05 2018 -0700" }, "message": "ART: Clean up unused using declarations\n\nMake tidy happy, and enable checking.\n\nTest: mmma art\nChange-Id: I9e18e80b3f37dd2aeb8ecd1c25abe4d5cf2f1c45\n" }, { "commit": "cdfc942e60032622b5a4379d0dd5ca914ba6393a", "tree": "823e767f6eba6fb2831f69753936bc0c35eea84e", "parents": [ "ec1f1a91328f44d93cfc16e39160dbdfce2f7b9a", "f5f56c791c5853f43a2a9781c98d5776c7dd5a59" ], "author": { "name": "Hans Boehm", "email": "hboehm@google.com", "time": "Fri Jul 13 16:35:30 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jul 13 16:35:30 2018 +0000" }, "message": "Merge \"Revert \"Emit vector mulitply and accumulate instructions for x86.\"\"" }, { "commit": "f5f56c791c5853f43a2a9781c98d5776c7dd5a59", "tree": "ed8270e3a5d0161ebe5bec0606a24cd5e3123e59", "parents": [ "61908880e6565acfadbafe93fa64de000014f1a6" ], "author": { "name": "Hans Boehm", "email": "hboehm@google.com", "time": "Fri Jul 13 00:05:27 2018 +0000" }, "committer": { "name": "Hans Boehm", "email": "hboehm@google.com", "time": "Fri Jul 13 00:05:27 2018 +0000" }, "message": "Revert \"Emit vector mulitply and accumulate instructions for x86.\"\n\nThis reverts commit 61908880e6565acfadbafe93fa64de000014f1a6.\n\nReason for revert: By failing to round multiply results, it does not follow Java rounding rules.\n\nChange-Id: Ic0ef08691bef266c9f8d91973e596e09ff3307c6\n" }, { "commit": "1a2b9bec01f21e28be31db1bc241c2256057c4f9", "tree": "f1fe2d1d6c013bb34c56435995b0b853050a39ea", "parents": [ "1206a149b440dcf2c3c45d775009816ca908fbce", "955f0ba247863be4b2b506420f6dfe4b0fa99e4f" ], "author": { "name": "Chih-hung Hsieh", "email": "chh@google.com", "time": "Tue Jul 10 20:57:09 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jul 10 20:57:09 2018 +0000" }, "message": "Merge \"Use clang integrated assembler.\"" }, { "commit": "955f0ba247863be4b2b506420f6dfe4b0fa99e4f", "tree": "6f8e52f1b0cff324adddcd054050458400d201ee", "parents": [ "e824cfdcfd41d400237a806ff93caca7f2e51878" ], "author": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Thu Jun 28 19:01:50 2018 -0700" }, "committer": { "name": "Chih-Hung Hsieh", "email": "chh@google.com", "time": "Tue Jul 10 09:41:44 2018 -0700" }, "message": "Use clang integrated assembler.\n\n* Remove dependency on GNU assembler.\n Avoid bug that produces non-deterministic code for mterp_arm.S.\n\n* Replace arm assembly code syntax to compile with clang assembler.\n * change old/obselete syntax: s/subgts/subsgt/\n * change old/obselete syntax\n adrl lr, artMterpAsmInstructionStart + (${opnum} * 128) @ Addr of primary handler.\n to equivalent\n adr lr, .L_ALT_${opcode}\n sub lr, lr, #(.L_ALT_${opcode} - .L_${opcode}) @ Addr of primary handler.\n\n* Remove duplicated .Lmark_introspection_unmarked\\label_suffix label;\n clang assembler treated it as an error.\n\nBug: 110953818\nTest: compare disassembled .o files from GNU and clang assemblers.\nChange-Id: I33ae305b5a6d4d7bd9efa0ad43b7f9b1509328b9\n" }, { "commit": "d109e30eab8ba25f8d89be2a83d9036e2d541af2", "tree": "24df91603efe9ce8c4a2efd09ac402aceb10df4e", "parents": [ "c916736ca1e375c276df251446baf2ac8ff3eb13" ], "author": { "name": "Alex Light", "email": "allight@google.com", "time": "Wed Jun 27 10:25:41 2018 -0700" }, "committer": { "name": "Alex Light", "email": "allight@google.com", "time": "Tue Jul 10 08:44:51 2018 -0700" }, "message": "Don\u0027t use StringFactory.newEmptyString in compiled code\n\nWhen compiling debuggable code we would compile a new-instance String\ninstruction into a StringFactory.newEmptyString invoke. This\nadditional invoke could be observed using tracing and is inconsistent\nwith the interpreter, where the string is simply allocated directly.\nIn order to bring these two modes into alignment we added a new\nAllocStringObject quick entrypoint that will be used instead of the\nnormal AllocObject\u003c...\u003e entrypoints when allocating a string. This\nentrypoint directly allocates a new string in the same manner the\ninterpreter does.\n\nNeeds next CL for test to work.\n\nBug: 110884646\nTest: ./test/testrunner/testrunner.py --host --runtime-option\u003d-Xjitthreshold:0 --jit\nTest: Manual inspection of compiled code.\nChange-Id: I7b4b084bcf7dd9a23485c0e3cd2cd04a04b43d3d\n" } ], "next": "61908880e6565acfadbafe93fa64de000014f1a6" }