)]}'
{
  "log": [
    {
      "commit": "12e097c84cef710fa4f254b1811ff70b876e9e9a",
      "tree": "d8044470b0006a5ff22207ae589a8b05829dfdfa",
      "parents": [
        "ba6b679bd34449ec56508966706ca1b8d5e7cb17"
      ],
      "author": {
        "name": "Artem Serov",
        "email": "artem.serov@linaro.org",
        "time": "Mon Aug 08 15:13:26 2016 +0100"
      },
      "committer": {
        "name": "Artem Serov",
        "email": "artem.serov@linaro.org",
        "time": "Fri Aug 19 15:52:58 2016 +0100"
      },
      "message": "ARM: VIXL32: Implement VIXL-based assembler.\n\nThis patch introduces new ARM assembler (Thumb2) based on VIXL and\nARM VIXL JNI Macro Assembler. Both are turned off by default (JNI\none will be turned on in the following patch).\n\nChange-Id: I5f7eb35da5318d7170b3c7e8553364ebe29cc991\n"
    },
    {
      "commit": "ac6ac10a0801fa6eb95e0ab0c72b2ed562210b34",
      "tree": "3758a1903dbdd273c35d4bae4ee0e820857946c0",
      "parents": [
        "1201804d1813d7db0accead9721d67c40b3de564"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Dec 17 12:14:00 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Dec 22 11:51:33 2015 +0000"
      },
      "message": "Optimizing/ARM: Fix CmpConstant().\n\nCMN updates flags based on addition of its operands.\nDo not confuse the \"N\" suffix with bitwise inversion\nperformed by MVN.\n\nAlso add more special cases analogous to AddConstant()\nand use CmpConstant() more in code generator.\n\nChange-Id: I0d4571770a3f0fdf162e97d4bde56814098e7246\n"
    },
    {
      "commit": "f5c09c3ed5bca4c34d8476dd9ed2714106fafbcf",
      "tree": "6521df348c2fd8d692bb751ed8dffdf70c8f6051",
      "parents": [
        "7f3b38cc23b638ab84ac01a94e90f0456da3b688"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Dec 17 12:08:08 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Dec 17 15:13:39 2015 +0000"
      },
      "message": "Optimizing/ARM: Fix AddConstant() to adhere to set_cc.\n\nAnd improve it to use shorter code sequences.\n\nBug: 26121945\n\nChange-Id: Ia4f1688652c195a7ca19af36d919388a550e2841\n"
    },
    {
      "commit": "b4536b7de576b20c74c612406c5d3132998075ef",
      "tree": "5265c07b51b4d79b2fd64c63d9b78d38b7601a8f",
      "parents": [
        "883ef45b5d5a2e4005914c7b339881900976b6e7"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Nov 24 13:45:23 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Dec 01 11:38:03 2015 +0000"
      },
      "message": "Optimizing/ARM: Implement kDexCachePcRelative dispatch.\n\nChange-Id: I0fe2da50a30a3f62bec8ea01688dd1fec84b1831\n"
    },
    {
      "commit": "f180af0fc0d0bd981dd6356848df2ba237e1a227",
      "tree": "bea248023c5823bbb28a1864655e3afce9226400",
      "parents": [
        "97cd5bb34ca97e7e87a030b2e1acec004fd26275",
        "f9d741e32c6f1629ce70eefc68d3363fa1cfd696"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Nov 23 11:20:35 2015 +0000"
      },
      "committer": {
        "name": "Gerrit Code Review",
        "email": "noreply-gerritcodereview@google.com",
        "time": "Mon Nov 23 11:20:35 2015 +0000"
      },
      "message": "Merge \"Optimizing/ARM: Improve long shifts by 1.\""
    },
    {
      "commit": "f9d741e32c6f1629ce70eefc68d3363fa1cfd696",
      "tree": "409005e5b1d01d2830c20421f8466125e110d6af",
      "parents": [
        "beb709a2607a00b5df33f0235f22ccdd876cee22"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Nov 20 15:08:11 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Nov 20 16:18:39 2015 +0000"
      },
      "message": "Optimizing/ARM: Improve long shifts by 1.\n\nImplement long\n    Shl(x,1) as LSLS+ADC,\n    Shr(x,1) as ASR+RRX and\n    UShr(x,1) as LSR+RRX.\n\nRemove the simplification substituting Shl(x,1) with\nADD(x,x) as it interferes with some other optimizations\ninstead of helping them. And since it didn\u0027t help 64-bit\narchitectures anyway, codegen is the correct place for it.\nThis is now implemented for ARM and x86, so only mips32 can\nbe improved.\n\nChange-Id: Idd14f23292198b2260189e1497ca5411b21743b3\n"
    },
    {
      "commit": "6fd0ffe8da212723a3ac0256ce350b5872cc61d4",
      "tree": "122c89d874460662d3feba523cb9f2553fb78bd3",
      "parents": [
        "beb709a2607a00b5df33f0235f22ccdd876cee22"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Nov 19 21:13:52 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri Nov 20 11:55:49 2015 +0000"
      },
      "message": "Optimizing/Thumb2: Improve load/store for large offsets.\n\nThis reduces the boot.oat size on Nexus 5 by 568KiB (0.8%).\n\nAlso change 32-bit ADD/SUB immediate to use the recommended\nencoding T3 when both T3 and T4 are available.\n\nChange-Id: I174382bda2b22da70560b947f5536acf8c1814a9\n"
    },
    {
      "commit": "d2b4ca2d02c86b1ce1826fd2b35ce6c9c58c1ff1",
      "tree": "dab4cdfacd3e7cb529f3b0de931c8a173039571f",
      "parents": [
        "fb11bab9bc96ff05dcb12f43abf58df256b7c7aa"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Sep 14 15:13:26 2015 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Oct 14 12:20:59 2015 +0100"
      },
      "message": "Improve Thumb2 bitwise operations.\n\nAllow embedding constants in AND, ORR, EOR. Add ORN to\nassembler, use BIC and ORN for AND and ORR when needed.\n\nChange-Id: I24d69ecc7ce6992b9c5eb7a313ff47a942de9661\n"
    },
    {
      "commit": "73cf0fb75de2a449ce4fe329b5f1fb42eef1372f",
      "tree": "d5b0957414c355254babfcd1a797ce87a0eb85a2",
      "parents": [
        "9ee5d6cdc14ac94b64ea1961bf221bad48746929"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Jul 30 15:07:22 2015 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Sep 01 10:10:37 2015 +0100"
      },
      "message": "ART: Add 16-bit Thumb2 ROR, NEGS and CMP for high registers.\n\nAlso clean up the usage of set_cc flag. Define a SetCc\nenumeration that specifies whether to set or keep condition\ncodes or whether we don\u0027t care and a 16-bit instruction\nshould be selected if one exists.\n\nThis reduces the size of Nexus 5 boot.oat by 44KiB (when\ncompiled with Optimizing which is not the default yet).\n\nChange-Id: I047072dc197ea678bf2019c01bcb28943fa9b604\n"
    },
    {
      "commit": "cf93a5cd9c978f59113d42f9f642fab5e2cc8877",
      "tree": "55162627fcbf2cb7913a735c7ed89e8e4b5e84d7",
      "parents": [
        "db40ea768bd914125c3754dacb9b6f534a2e2399"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Jun 16 11:33:24 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Wed Jun 17 09:43:51 2015 +0100"
      },
      "message": "Revert \"Revert \"ART: Implement literal pool for arm, fix branch fixup.\"\"\n\nThis reverts commit fbeb4aede0ddc5b1e6a5a3a40cc6266fe8518c98.\n\nAdjust block label positions. Bad catch block labels were the\nreason for the revert.\n\nChange-Id: Ia6950d639d46b9da6b07f3ade63ab46d03d63310\n"
    },
    {
      "commit": "fbeb4aede0ddc5b1e6a5a3a40cc6266fe8518c98",
      "tree": "76ab28cf259def4dccec529df217fd760f27d2aa",
      "parents": [
        "f38caa68cce551fb153dff37d01db518e58ed00f"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Jun 16 11:32:01 2015 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Jun 16 11:32:01 2015 +0000"
      },
      "message": "Revert \"ART: Implement literal pool for arm, fix branch fixup.\"\n\nThis reverts commit f38caa68cce551fb153dff37d01db518e58ed00f.\n\nChange-Id: Id88b82cc949d288cfcdb3c401b96f884b777fc40\nReason: broke the tests.\n"
    },
    {
      "commit": "f38caa68cce551fb153dff37d01db518e58ed00f",
      "tree": "723612f20666f429b7c67321f0353d57425b1c63",
      "parents": [
        "bd8c725e465cc7f44062745a6f2b73248f5159ed"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Fri May 29 15:50:18 2015 +0100"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Mon Jun 15 15:13:28 2015 +0100"
      },
      "message": "ART: Implement literal pool for arm, fix branch fixup.\n\nChange-Id: Iecc91418bb4ee1c957f42fefb737d0ee2ba960e7\n"
    },
    {
      "commit": "d56376cce54e7df976780ecbd03228f60d276433",
      "tree": "5a523ff4a1589a4462207f4c75fad921870a62a2",
      "parents": [
        "aa49c23d47e5fdfcf51380550ee864e9d30d082b"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Thu May 21 12:32:34 2015 +0000"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri May 22 15:06:45 2015 +0100"
      },
      "message": "Revert \"Revert \"Introduce a NearLabel in thumb2.\"\"\n\nThis reverts commit 1f277e3cef6c33cd35e91123978491d83338d2ad.\n\n- Fix CompareAndBranch to not use cbz/cbnz with high registers.\n- Add a test for CompareAndBranch with the *inc file, as the\n  other assembler test infrastructure does not handle labels.\n\nChange-Id: If552bf1112b96caa3b9bb6c73c4b40bb90a33db7\n"
    },
    {
      "commit": "5bc561c31d119a964e54cf73b475f8eac044d905",
      "tree": "d8a7ad92f49cf2af6e5569ae2da99b709be612a9",
      "parents": [
        "7587082c370ef1a90797baf2371ee8e472b2adb8"
      ],
      "author": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Tue Dec 16 17:41:59 2014 +0000"
      },
      "committer": {
        "name": "Vladimir Marko",
        "email": "vmarko@google.com",
        "time": "Thu Dec 18 14:03:05 2014 +0000"
      },
      "message": "Fix Thumb2 assembler to emit 16-bit add/sub SP, #imm.\n\nAlso allow 16-bit add rN, SP, #imm.\n\nChange-Id: I50100ad0b0e19a1c855a2319615e86d7a2b66a69\n"
    },
    {
      "commit": "3c7bb98698f77af10372cf31824d3bb115d9bf0f",
      "tree": "1cd4cc18babfbb16ab908f23929fa88d7678f06b",
      "parents": [
        "98cc1e552c2ccbe5d51bc81d49e79119280f5416"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Wed Jul 23 16:04:16 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jul 28 15:44:28 2014 +0100"
      },
      "message": "Implement array get and array put in optimizing.\n\nAlso fix a couple of assembler/disassembler issues.\n\nChange-Id: I705c8572988c1a9c4df3172b304678529636d5f6\n"
    },
    {
      "commit": "96f89a290eb67d7bf4b1636798fa28df14309cc7",
      "tree": "ca2b484a18107f8253aa7774cde304586a31bc60",
      "parents": [
        "4436e926aa8e64ac7e4c4afb81f2a59b2477045a"
      ],
      "author": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Fri Jul 11 10:57:49 2014 +0100"
      },
      "committer": {
        "name": "Nicolas Geoffray",
        "email": "ngeoffray@google.com",
        "time": "Mon Jul 21 09:54:20 2014 +0100"
      },
      "message": "Add assembly operations with constants in optimizing compiler.\n\nChange-Id: I5bcc35ab50d4457186effef5592a75d7f4e5b65f\n"
    },
    {
      "commit": "0bb9ade51635559f991259a7ac90d8570ad886aa",
      "tree": "b8fc0e1a304eeefac2b7d8f46c8ff8aee5b0435e",
      "parents": [
        "fee5586dac3bf22a31dbbffe7b4ca7e978e53185"
      ],
      "author": {
        "name": "Dave Allison",
        "email": "dallison@google.com",
        "time": "Thu Jun 26 17:57:36 2014 -0700"
      },
      "committer": {
        "name": "Dave Allison",
        "email": "dallison@google.com",
        "time": "Thu Jun 26 18:14:50 2014 -0700"
      },
      "message": "Fix off-by-one errors in limit checking for ldr/str instructions.\n\nThe LDR/STR encoder in the thumb assembler had an off-by-one\nerror for limit checking for immediates.  This resulted in an\nassertion failure for things like \u0027ldr rx,[ry,#128]\u0027\n\nBug: 15876206\n\nChange-Id: Ic866212e2feae94e0bd4c753724898d84f5cb944\n"
    },
    {
      "commit": "45fdb93f04b981f70f7b6d98949ab3986b7331f8",
      "tree": "8233265f998fdd9d4de38acb5ed56a663b10c26e",
      "parents": [
        "1528b02c4d5241e785bb680f13de70c355e67429"
      ],
      "author": {
        "name": "Dave Allison",
        "email": "dallison@google.com",
        "time": "Wed Jun 25 12:37:10 2014 -0700"
      },
      "committer": {
        "name": "Dave Allison",
        "email": "dallison@google.com",
        "time": "Thu Jun 26 10:46:19 2014 -0700"
      },
      "message": "Support additional instructions in ARM and thumb assemblers\n\nThis adds the following support for the ARM and thumb assemblers:\n\n1. Shifting by a register.\n2. LDR/STR with a register offset, possibly shifted.\n3. LDR(literal).\n4. STR PC relative.\n\nAlso adds tests for them in the thumb assembler gtest.\n\nChange-Id: Ie467e3c1d06b699cacbdef3482ed9a92e4f1809b\n"
    },
    {
      "commit": "65fcc2cf3c5cd97b84330c094908f3a6a7a8d4e7",
      "tree": "fc0ce77d446477be37f0ec8c86d67df4941cac9b",
      "parents": [
        "e3b5cb502371aff7e7b7291facfc27b092e7803e"
      ],
      "author": {
        "name": "Dave Allison",
        "email": "dallison@google.com",
        "time": "Mon Apr 28 13:45:27 2014 -0700"
      },
      "committer": {
        "name": "Dave Allison",
        "email": "dallison@google.com",
        "time": "Thu Jun 05 12:45:20 2014 -0700"
      },
      "message": "Thumb2 assembler for JNI compiler and optimizing compiler\n\nThis provides a programmatic assembler for the thumb2 instruction set for\nARM.  The interface is the same as the ARM assembler and the ARM assembler has\nbeen moved into Arm32Assembler.  The assembler handles most 16 and 32 bit instructions\nand also allows relocations due to branch expansion.  It will also rewrite cbz/cbnz\ninstructions if they go out of range.\n\nIt also changes the JNI compiler to use the thumb2 assembler as opposed\nto forcing it to use ARM32.  The trampoline compiler still uses ARM due to the\nway it returns the address of its generated code.  A trampoline in thumb2 is the\nsame size as that in ARM anyway (8 bytes).\n\nProvides gtest for testing the thumb2 instruction output.  This gtest only runs\non the host as it uses arm-eabi-objdump to disassemble the generated code.  On the\ntarget the output is not checked but the assembler will still be run to perform\nall its checks.\n\nChange-Id: Icd9742b6f13541bec5b23097896727392e3a6fb6\n"
    }
  ]
}