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gerrit.witaqua.org / art / e7197bf7d58c705a048e13e241d7ca320502cd40 / compiler / optimizing / code_generator_vector_arm64.cc
  1. a1633a7 Merge "Min/max SIMDization support." by Aart Bik · 9 years ago
  2. c8e93c7 Min/max SIMDization support. by Aart Bik · 9 years ago
  3. e1811ed ARM64: Share address computation across SIMD LDRs/STRs. by Artem Serov · 9 years ago
  4. 472821b Enable string "array get" vectorization. by Aart Bik · 9 years ago
  5. 0225b77 ARM64: Improve SIMD LDR/STR. by Artem Serov · 9 years ago
  6. f34dd20 ARM64: Support MultiplyAccumulate for SIMD. by Artem Serov · 9 years ago
  7. f3e61ee Implement halving add idiom (with checker tests). by Aart Bik · 9 years ago
  8. b31f91f ARM64: Support vectorization for double and long. by Artem Serov · 9 years ago
  9. d4bccf1 ARM64: Support 128-bit registers for SIMD. by Artem Serov · 9 years ago
  10. 6daebeb Implemented ABS vectorization. by Aart Bik · 9 years ago
  11. f8f5a16 ART vectorizer. by Aart Bik · 9 years ago