)]}' { "log": [ { "commit": "0f00db73c6e0ea423b4c9e871b5bb06d9627e3b0", "tree": "ff56c25633459e27a7740c77d4af83c2f0b3e71d", "parents": [ "f55996d6b4a672e09fbe3a3563646a7682719b4a" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 06 18:19:23 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 06 18:19:23 2014 +0000" }, "message": "Fixed BuildCheckedDiv signature\n\nThe second_reg might actually be a constant.\n\nChange-Id: I08cecc41e3d65ab73b41eba2aca702dea8e1ed95\n" }, { "commit": "adc3e13db74c193302ac9d56735924cad32083cc", "tree": "738db270af4fbf33a6dfa1a025edc1b1c640848a", "parents": [ "9b6c62b82e3d40d70d541920d5f7f81ad517bc01", "3dbcb38a8b2237b0da290ae35dc0caab3cb47b3d" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 06 17:33:06 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 06 17:33:06 2014 +0000" }, "message": "Merge \"Support float \u0026 double negation in the optimizing compiler.\"" }, { "commit": "9b6c62b82e3d40d70d541920d5f7f81ad517bc01", "tree": "c75397fca9adddde7f6d3ab0fbc30bdaa7e443c4", "parents": [ "e257d2c27f5565fb55de9122e093371ea2671271", "865fc88fdfd006ce0362c2c0d55c66a7bffdab61" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 06 17:28:21 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 06 17:28:22 2014 +0000" }, "message": "Merge \"[optimizing compiler] Add DIV_INT_2ADDR\"" }, { "commit": "865fc88fdfd006ce0362c2c0d55c66a7bffdab61", "tree": "35670296d924c9619a18a4149134e069de6ae48d", "parents": [ "d375fabd9e8cbb805fd12a33d94aa0729432ff3a" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 06 17:09:03 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 06 17:21:16 2014 +0000" }, "message": "[optimizing compiler] Add DIV_INT_2ADDR\n\nChange-Id: I38fc7e216f820d8ccc8bbf8b8e7a67b75fb9de87\n" }, { "commit": "e257d2c27f5565fb55de9122e093371ea2671271", "tree": "0fc16707d24fdc258533cd03956bb879b3ab3234", "parents": [ "38efdf51947eaec866059e62626f2409ef4c19db", "55dcfb5e0dd626993bb2b7b9f692c1b02b5d955f" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 06 17:19:08 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 06 17:19:08 2014 +0000" }, "message": "Merge \"Add support for not-long on ARM64 in the optimizing compiler.\"" }, { "commit": "de58ab2c03ff8112b07ab827c8fa38f670dfc656", "tree": "c872bfbcad1e90845008140bbddcc43e56dc19d2", "parents": [ "3ed86e4e98dfe1b05c9a03aa2aee42c145a018c3" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Nov 05 12:46:03 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 06 16:49:52 2014 +0000" }, "message": "Implement try/catch/throw in optimizing.\n\n- We currently don\u0027t run optimizations in the presence of a try/catch.\n- We therefore implement Quick\u0027s mapping table.\n- Also fix a missing null check on array-length.\n\nChange-Id: I6917dfcb868e75c1cf6eff32b7cbb60b6cfbd68f\n" }, { "commit": "3dbcb38a8b2237b0da290ae35dc0caab3cb47b3d", "tree": "98ed87e77213fc36fd72b2dbab71156f9176d4ee", "parents": [ "55dcfb5e0dd626993bb2b7b9f692c1b02b5d955f" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 28 17:30:07 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 06 16:40:59 2014 +0000" }, "message": "Support float \u0026 double negation in the optimizing compiler.\n\n- Add support for the neg-float and neg-double Dex\n instructions in the optimizing compiler.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n float and double HNeg nodes.\n- Add related tests to test/415-optimizing-arith-neg.\n\nChange-Id: I29739a86e13dbe6f64e191641d01637c867cba6c\n" }, { "commit": "55dcfb5e0dd626993bb2b7b9f692c1b02b5d955f", "tree": "ee7bce7035220b6a1b630b54dfe743bbfc8941d8", "parents": [ "3ed86e4e98dfe1b05c9a03aa2aee42c145a018c3" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 24 18:09:09 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 06 16:40:59 2014 +0000" }, "message": "Add support for not-long on ARM64 in the optimizing compiler.\n\nChange-Id: I3e98ff411ba358d92774def18a12daccdc4f558f\n" }, { "commit": "cd2de0c1c7f1051a2f7bdb0e827dd6057f3bafcd", "tree": "e692ffff75418c935538ac7bf403f324204e4f13", "parents": [ "f746cd9bb573b6b4b8c6dcdcf819c0203a186822" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 06 15:59:38 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 06 16:01:03 2014 +0000" }, "message": "Fix failures after div support.\n\n- We need to special case divide by -1 because of x86.\n- Disable div test on arm64, which does not support div yet.\n\nChange-Id: I07e137cb555a958b02a6c4070f296503b7e30bae\n" }, { "commit": "f746cd9bb573b6b4b8c6dcdcf819c0203a186822", "tree": "8b97dcffd157ad7c07a27cf4fd7a6290551fcd89", "parents": [ "803ad870017503849a22ef4fcb702847c18201c0", "d375fabd9e8cbb805fd12a33d94aa0729432ff3a" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 06 15:04:02 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 06 15:04:02 2014 +0000" }, "message": "Merge \"Fix build.\"" }, { "commit": "d375fabd9e8cbb805fd12a33d94aa0729432ff3a", "tree": "b33d92eeefbbf93d60d174ee0b5a6e7988a3cfee", "parents": [ "d0d4852847432368b090c184d6639e573538dccf" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 06 15:03:23 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 06 15:03:23 2014 +0000" }, "message": "Fix build.\n\nBuildCheckedDiv doesn\u0027t handle 12x instruction correctly.\n\nChange-Id: I59571397cfb1b7ee89538e8e0b57725b863b0ee1\n" }, { "commit": "803ad870017503849a22ef4fcb702847c18201c0", "tree": "26d7d8af0edd7fc3d40f30b3cf15b051f33a9ee7", "parents": [ "863b844e206cddbcd18c77d356766a5fd4e5df22", "d0d4852847432368b090c184d6639e573538dccf" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 06 14:49:23 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 06 14:49:24 2014 +0000" }, "message": "Merge \"[optimizing compiler] Add div-int and exception handling.\"" }, { "commit": "d0d4852847432368b090c184d6639e573538dccf", "tree": "47e31fe860ff1c3ace2f3f5945aa69689d42d998", "parents": [ "a88b7b93e28ea86969dd3ec6a6bf6929d697fc31" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Nov 04 16:40:20 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Nov 06 14:42:58 2014 +0000" }, "message": "[optimizing compiler] Add div-int and exception handling.\n\n- for backends: arm, x86, x86_64\n- fixed a register allocator bug: the request for a fixed register for\nthe first input was ignored if the output was kSameAsFirstInput\n- added divide by zero exception\n- more tests\n- shuffle around some code in the builder to reduce the number of lines\nof code for a single function.\n\nChange-Id: Id3a515e02bfbc66cd9d16cb9746f7551bdab3d42\n" }, { "commit": "e8469ac1ac8a2f65774e2fe53e3a195f6357d660", "tree": "6b21faad695cf475ff74e0a9a310715822e5cd70", "parents": [ "a88b7b93e28ea86969dd3ec6a6bf6929d697fc31", "44b819e8d2ac48f1f66915ec1fab36ad247eb4d9" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 06 13:50:29 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Nov 06 13:50:30 2014 +0000" }, "message": "Merge \"Don\u0027t use R4 for suspend check.\"" }, { "commit": "44b819e8d2ac48f1f66915ec1fab36ad247eb4d9", "tree": "40710d90f3ae82e14e6acb376f6a0d78069c97be", "parents": [ "508368cc013f146b4348793d72d66d4f0e96f07c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 06 12:00:54 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Nov 06 12:14:21 2014 +0000" }, "message": "Don\u0027t use R4 for suspend check.\n\nChange-Id: I57ccfaa527e2676f21339860b28955468a87adfe\n" }, { "commit": "ed9b1958371952f5cdcc040bec8997da462edba7", "tree": "94c493f72bdaa9035b31996ec64a9f1843c2c86d", "parents": [ "508368cc013f146b4348793d72d66d4f0e96f07c" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 06 11:10:17 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Nov 06 11:10:17 2014 +0000" }, "message": "Fix ART build issues.\n\n- Use ATTRIBUTE_UNUSED to avoid a warning about an unused\n argument in compiler/optimizing/nodes.h instead of\n simply commenting it out.\n- Disable run test 002-sleep on ARM64.\n\nChange-Id: I96911904289b73611e0fc168e7b597a9a2df8141\n" }, { "commit": "dff1f2812ecdaea89978c5351f0c70cdabbc0821", "tree": "5305173d341263ad32deb98c0299ee8bad03baa9", "parents": [ "5e5632ff1651adbf95faaf8fb3239a36f9f61124" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Nov 05 14:15:05 2014 +0000" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Nov 05 16:51:59 2014 +0000" }, "message": "Support int-to-long conversions in the optimizing compiler.\n\n- Add support for the int-to-float Dex instruction in the\n optimizing compiler.\n- Add a HTypeConversion node type for control-flow graphs.\n- Generate x86, x86-64 and ARM (but not ARM64) code for\n int-to-float HTypeConversion nodes.\n- Add a 64-bit \"Move doubleword to quadword with\n sign-extension\" (MOVSXD) instruction to the x86-64\n assembler.\n- Add related tests to test/422-type-conversion.\n\nChange-Id: Ieb8ec5380f9c411857119c79aa8d0728fd10f780\n" }, { "commit": "78a3233313260665fe82ba56257855e043bca3d4", "tree": "46622bf088b3f30d2c6d8a5b548519137c88c867", "parents": [ "fe50a0f644bf57a92612d08ad21dc4ea5a2f652a", "277ccbd200ea43590dfc06a93ae184a765327ad0" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Nov 05 02:42:56 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Nov 05 02:42:56 2014 +0000" }, "message": "Merge \"ART: More warnings\"" }, { "commit": "277ccbd200ea43590dfc06a93ae184a765327ad0", "tree": "d89712e93da5fb2748989353c9ee071102cf3f33", "parents": [ "ad17d41841ba1fb177fb0bf175ec0e9f5e1412b3" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Nov 03 21:36:10 2014 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Nov 04 18:40:08 2014 -0800" }, "message": "ART: More warnings\n\nEnable -Wno-conversion-null, -Wredundant-decls and -Wshadow in general,\nand -Wunused-but-set-parameter for GCC builds.\n\nChange-Id: I81bbdd762213444673c65d85edae594a523836e5\n" }, { "commit": "424f676379f2f872acd1478672022f19f3240fc1", "tree": "bdd8fbb9c2401465d9a0536e94dec74acc8b4f3b", "parents": [ "793d1023785f81eb8e29a3eb67fec17d7ee7dcbe" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Nov 03 14:51:25 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Nov 04 11:23:08 2014 +0000" }, "message": "Implement CONST_CLASS in optimizing compiler.\n\nChange-Id: Ia8c8dfbef87cb2f7893bfb6e178466154eec9efd\n" }, { "commit": "ad17d41841ba1fb177fb0bf175ec0e9f5e1412b3", "tree": "e3bf8fb6a51eed07d4cd3e2d007acbb8723ed6df", "parents": [ "8851cbaeb75f5a89ec88cbf4b26d6f846bbf6411", "785d2f2116bb57418d81bb55b55a087afee11053" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Nov 04 07:51:34 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Nov 04 07:51:34 2014 +0000" }, "message": "Merge \"ART: Replace COMPILE_ASSERT with static_assert (compiler)\"" }, { "commit": "785d2f2116bb57418d81bb55b55a087afee11053", "tree": "34e7ea4f2c7473c8fe173c64451b4153fc909cd7", "parents": [ "07f09809c0575e985249450843b06f266b831fe1" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Nov 03 22:57:30 2014 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Nov 03 23:40:41 2014 -0800" }, "message": "ART: Replace COMPILE_ASSERT with static_assert (compiler)\n\nReplace all occurrences of COMPILE_ASSERT in the compiler tree.\n\nChange-Id: Icc40a38c8bdeaaf7305ab3352a838a2cd7e7d840\n" }, { "commit": "6a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866f", "tree": "9df58b57af13240a93a6da4eefcf03f70cce9ad9", "parents": [ "c6e0955737e15f7c0c3575d4e13789b3411f4993" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Fri Oct 31 00:33:20 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Mon Nov 03 20:01:04 2014 -0800" }, "message": "Remove -Wno-unused-parameter and -Wno-sign-promo from base cflags.\n\nFix associated errors about unused paramenters and implict sign conversions.\nFor sign conversion this was largely in the area of enums, so add ostream\noperators for the effected enums and fix tools/generate-operator-out.py.\nTidy arena allocation code and arena allocated data types, rather than fixing\nnew and delete operators.\nRemove dead code.\n\nChange-Id: I5b433e722d2f75baacfacae4d32aef4a828bfe1b\n" }, { "commit": "c6e0955737e15f7c0c3575d4e13789b3411f4993", "tree": "84a0b42a5d722e4e485834a218bd32d607a4eedc", "parents": [ "9aee6fc7f23ca4c23d11b8b269da02a383d8debb", "296bd60423e0630d8152b99fb7afb20fbff5a18a" ], "author": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Tue Nov 04 00:21:46 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Nov 04 00:21:46 2014 +0000" }, "message": "Merge \"Some improvement to reg alloc.\"" }, { "commit": "296bd60423e0630d8152b99fb7afb20fbff5a18a", "tree": "384aa7659763bb77a038a67c27f7cf6059632570", "parents": [ "57b4d1c44e246dfd4aaef2d23b20a696a0c5e57e" ], "author": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Mon Oct 06 16:47:28 2014 -0700" }, "committer": { "name": "Mingyao Yang", "email": "mingyao@google.com", "time": "Mon Nov 03 16:16:50 2014 -0800" }, "message": "Some improvement to reg alloc.\n\nChange-Id: If579a37791278500a7e5bc763f144c241f261920\n" }, { "commit": "2810f92d099ac7442f661abbfa73734835a58e25", "tree": "197012940ef5af52c9c802396f1c2d3b5a5742bd", "parents": [ "a9014f977ae90373f5bad4cf812c2bda810b10f8" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 31 14:27:37 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 31 14:56:00 2014 +0000" }, "message": "Disable kNoOutputOverlap optimization.\n\nFound a case where it does not work. Need to think more about it\nas well as write a regression test.\n\nChange-Id: I2abe05c84f2c608d622fbe6d373b6dcdb68f4162\n" }, { "commit": "a9014f977ae90373f5bad4cf812c2bda810b10f8", "tree": "40f4bc76cb5e7cf9c95fced70b1ad5c2c2d39f4e", "parents": [ "8b557af85871e5086589afd2b3a17089d0f67df8", "b5f62b3dc5ac2731ba8ad53cdf3d9bdb14fbf86b" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 31 14:24:05 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 31 14:24:06 2014 +0000" }, "message": "Merge \"Support for CONST_STRING in optimizing compiler.\"" }, { "commit": "b5f62b3dc5ac2731ba8ad53cdf3d9bdb14fbf86b", "tree": "fb2d33e43de1476af33112f263fd3c3a775917d0", "parents": [ "29ce77f654412dbb5fb3d5949da4053952917101" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 30 10:58:41 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 31 12:21:53 2014 +0000" }, "message": "Support for CONST_STRING in optimizing compiler.\n\nChange-Id: Iab8517bdadd1d15ffbe570010f093660be7c51aa\n" }, { "commit": "26dcecb0ef620fb225cd5dd39f6e41b07e34c83d", "tree": "5f4d8b1584059dc9570be48030fe4c6aad82457b", "parents": [ "29ce77f654412dbb5fb3d5949da4053952917101", "3c03503d66df3b4440f851ae7d0c4fae5e7872df" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 30 18:20:07 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 30 18:20:07 2014 +0000" }, "message": "Merge \"Follow-up CL after hard float changes.\"" }, { "commit": "0a6c459f713ff61769a02204cd736167e062bf4c", "tree": "6e55afea5e0fd39eb4970b2ce3e689c4c0439857", "parents": [ "d8e231c0f3f7349c89b2323af6313384353e4cc5" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 30 16:37:57 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 30 16:41:36 2014 +0000" }, "message": "Fix for long parameter passed both in stack and register.\n\nFix for long parameter passed both in stack and register\non 32bits architectures.\nThe move to hard float ABI makes it so that the\nregister index does not necessarily match the stack index anymore.\n\nChange-Id: I26b483f68ac86d336b4a37d94c38b04917668659\n" }, { "commit": "42d641bfd9ef3c03c68177b2a429b20056670d86", "tree": "8b19599c5c293ac1a7b8a6d5d9b56c8e7385c2fe", "parents": [ "560473c74cc3755b652f86a61039e4a12c08afe2" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@arm.com", "time": "Mon Oct 27 14:00:51 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 29 19:21:54 2014 +0000" }, "message": "Opt compiler: Add ARM64 support for the Mul IR.\n\nAlso disable compilation and use of the boot image with\nthe optimizing compiler: this won\u0027t work with the way\nwe\u0027re bringing up arm64 and we need to find a better\nsolution.\n\nBug: 18147756\n\nChange-Id: I6ec0de73681f9226d095bc3db92338dbd46499aa\n" }, { "commit": "19a19cffd197a28ae4c9c3e59eff6352fd392241", "tree": "265b971afd0e33afc8986317aea2f5a6fe817aec", "parents": [ "7c049c1f34220b0dc1a7f68f3b30f388bae7bdb9" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 22 16:07:05 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 29 13:01:48 2014 +0000" }, "message": "Add support for static fields in optimizing compiler.\n\nChange-Id: Id2f010589e2bd6faf42c05bb33abf6816ebe9fa9\n" }, { "commit": "7c4954d429626a6ceafbf05be41bf5f840894e44", "tree": "9d4a088cc2e259235819f105a21e5a3d58bd0139", "parents": [ "4816ecfc1b2d544685ec5edcdeaad6870f6bfd7e" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 28 16:57:40 2014 +0000" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 28 17:53:33 2014 +0000" }, "message": "[optimizing compiler] Add division for floats and doubles\n\nbackends: x86, x86_64, arm.\n\nAlso:\n- ordered instructions based on their name.\n- add missing kNoOutputOverlap to add/sub/mul.\n\nChange-Id: Ie47cde3b15ac74e7a1660c67a2eed1d7871f0ad0\n" }, { "commit": "3c03503d66df3b4440f851ae7d0c4fae5e7872df", "tree": "6f10a0da8e1a06d4a0a88e015db091a824aec7fb", "parents": [ "d3271e8a48768ed53bfa2515474b57245e7d9a41" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 28 10:46:40 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 28 10:46:40 2014 +0000" }, "message": "Follow-up CL after hard float changes.\n\nAddressing comments from Zheng Xu.\n\nChange-Id: I8c599cdfab03373e82a1b90b711005c490bc6ca0\n" }, { "commit": "705664321a5cc1418255172f92d7d7195cf60a7b", "tree": "bdb7a60edff3e13c9bb6658d9ba20d3541a9c50d", "parents": [ "2deace28b16d3161ccd6a85a2c577e83f4b25364" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 24 16:20:17 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 27 17:33:47 2014 +0000" }, "message": "Add long bitwise not instruction in the optimizing compiler.\n\n- Add support for the not-long (long integer one\u0027s\n complement negation) instruction in the optimizing\n compiler.\n- Add a 64-bit NOT instruction (notq) to the x86-64\n assembler.\n- Generate ARM, x86 and x86-64 code for long HNot nodes.\n- Gather not-related tests in test/416-optimizing-arith-not.\n\nChange-Id: I2d5b75e9875664d6032d04f8401b2bbb84506948\n" }, { "commit": "1ba0f596e9e4ddd778ab431237d11baa85594eba", "tree": "c1d51616adf4d98aab3ebccf47ad5146635cb87f", "parents": [ "1ef3495abfa2a858b3cc7a1844383c8e7dff0b60" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 27 15:14:55 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 27 17:20:35 2014 +0000" }, "message": "Support hard float on arm in optimizing compiler.\n\nAlso bump oat version, needed after latest hard float switch.\n\nChange-Id: Idf5acfb36c07e74acff00edab998419a3c6b2965\n" }, { "commit": "5667fdbb6e441dee7534ade18b628ed396daf593", "tree": "a06fe0a79b3465571556d13f509daf1f664fc614", "parents": [ "b62ff579cd870b0bf213765b07d7b404d15ece7b" ], "author": { "name": "Zheng Xu", "email": "zheng.xu@arm.com", "time": "Thu Oct 23 18:29:55 2014 +0800" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Fri Oct 24 16:27:22 2014 -0700" }, "message": "ARM: Use hardfp calling convention between java to java call.\n\nThis patch default to use hardfp calling convention. Softfp can be enabled\nby setting kArm32QuickCodeUseSoftFloat to true.\n\nWe get about -1 ~ +5% performance improvement with different benchmark\ntests. Hopefully, we should be able to get more performance by address the left\nTODOs, as some part of the code takes the original assumption which is not\noptimal.\n\nDONE:\n1. Interpreter to quick code\n2. Quick code to interpreter\n3. Transition assembly and callee-saves\n4. Trampoline(generic jni, resolution, invoke with access check and etc.)\n5. Pass fp arg reg following aapcs(gpr and stack do not follow aapcs)\n6. Quick helper assembly routines to handle ABI differences\n7. Quick code method entry\n8. Quick code method invocation\n9. JNI compiler\n\nTODO:\n10. Rework ArgMap, FlushIn, GenDalvikArgs and affected common code.\n11. Rework CallRuntimeHelperXXX().\n\nChange-Id: I9965d8a007f4829f2560b63bcbbde271bdcf6ec2\n" }, { "commit": "64727aeef8f4243f2058a19a43a937248a60dae1", "tree": "9bf09ff29bb49d4be382e49822300668913f18e5", "parents": [ "8bde036ebd74ce94477e65077bed6dea9c29616b", "2e07b4f0a84a7968b4690c2b1be2e2f75cc6fa8e" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 24 10:48:38 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 24 10:48:39 2014 +0000" }, "message": "Merge \"Revert \"Revert \"Implement long negate instruction in the optimizing compiler.\"\"\"" }, { "commit": "32da24bb26885a9877adcef5b53f283d44b622d2", "tree": "eae9d56de1bb0c156f5ea310b83a7aa7027515e2", "parents": [ "02567379e7099682345fd59d45a23e17711c9ddd", "8d6ae524ed5d2fed1f9e789d6de9764d374afa43" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 24 10:44:50 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 24 10:44:51 2014 +0000" }, "message": "Merge \"Fix wrong unsigned to signed conversions.\"" }, { "commit": "2e07b4f0a84a7968b4690c2b1be2e2f75cc6fa8e", "tree": "2fc5c75594b2cf8be1d6bd295d36c627af1651fe", "parents": [ "02567379e7099682345fd59d45a23e17711c9ddd" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 18:12:09 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 24 11:22:59 2014 +0100" }, "message": "Revert \"Revert \"Implement long negate instruction in the optimizing compiler.\"\"\n\nThis reverts commit 30ca3d847fe72cfa33e1b2473100ea2d8bea4517.\n\nChange-Id: I188ca8d460d55d3a9966bcf31e0588575afa77d2\n" }, { "commit": "8d6ae524ed5d2fed1f9e789d6de9764d374afa43", "tree": "3283f899900f19ecca8540b680755f44d5d70d1c", "parents": [ "46fdec13b6dcaf932aa9fb1338f32df01aa0d959" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 23 18:32:13 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 23 18:32:13 2014 +0100" }, "message": "Fix wrong unsigned to signed conversions.\n\nThe HIntConstant node takes an int32_t, so we have to keep things signed.\n\nChange-Id: Ib3fa50e87f99118d320cbb381f619d5be9287530\n" }, { "commit": "b4e1a4d3156528d3e2b863f08c24793310a5b6bc", "tree": "e4725e899495329639e01ca816f9436f71b75407", "parents": [ "be8c0217c858dcabc13cefecdeced8610e3e9d6f", "927307433af0a9322e8ba77eda37168512a73683" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 23 17:28:50 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 23 17:28:50 2014 +0000" }, "message": "Merge \"ART: Add basic tests for materialized conditions.\"" }, { "commit": "30ca3d847fe72cfa33e1b2473100ea2d8bea4517", "tree": "a66582c2cb6026be2f59ba66ff437429b67bbe44", "parents": [ "46fdec13b6dcaf932aa9fb1338f32df01aa0d959" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 18:07:44 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 18:07:44 2014 +0100" }, "message": "Revert \"Implement long negate instruction in the optimizing compiler.\"\n\nThis reverts commit 66ce173a40eff4392e9949ede169ccf3108be2db.\n" }, { "commit": "927307433af0a9322e8ba77eda37168512a73683", "tree": "6166be9b846cb8a639121e6977abda177e7ffb01", "parents": [ "46fdec13b6dcaf932aa9fb1338f32df01aa0d959" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@arm.com", "time": "Wed Oct 01 12:55:56 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 23 17:36:52 2014 +0100" }, "message": "ART: Add basic tests for materialized conditions.\n\nChange-Id: I4acef30cc6a48b5fe07d55db6b9cf0d093b326ee\n" }, { "commit": "66ce173a40eff4392e9949ede169ccf3108be2db", "tree": "552bc6275388c3bc6ecd4f549ffcd1422c020f82", "parents": [ "e2b2cbf8bffdf9ee3ece487fde9ac78652b4abaf" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 16:38:33 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 17:08:48 2014 +0100" }, "message": "Implement long negate instruction in the optimizing compiler.\n\n- Add support for the neg-long (long integer two\u0027s\n complement negate) instruction in the optimizing compiler.\n- Add a 64-bit NEG instruction (negq) to the x86-64\n assembler.\n- Generate ARM, x86 and x86-64 code for integer HNeg nodes.\n- Put neg-related tests into test/415-optimizing-arith-neg.\n\nChange-Id: I1fbe9611e134408a6b8745d1df20ab6ffa5e50f2\n" }, { "commit": "096cc029451f4d48a79361ec206b6a7f3f58dd7c", "tree": "cf6b316e3a9500355fbb32b89befddcdde8a1e72", "parents": [ "46de37a6a314368cc5fc52743095e48a864ed9b5" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 17:01:13 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 17:01:13 2014 +0100" }, "message": "[optimizing compiler] Handle SUB_FLOAT/DOUBLE nodes\n\nAlso add 414-optimizing-arith-sub to\nTEST_ART_BROKEN_OPTIMIZING_ARM64_RUN_TESTS.\n\nChange-Id: Ia1b7ff7857bc0e488b9b8ed8a36efb1a3a9bad36\n" }, { "commit": "1135168a1a9e2a6493657be8c5e91d67e5f224a7", "tree": "02d16c2aaaf0d0a3a31e47e9b219509b4840b3d6", "parents": [ "e833b110876fa8fe34a08f06d2521c74488180bb" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 15:38:15 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 16:25:09 2014 +0100" }, "message": "[optimizing compiler] Add float/double subtraction\n\n- for arm, x86, x86_64\n- add tests\n- a bit of clean up\n\nChange-Id: I3761b0d908aca3e3c5d60da481fafb423ff7c9b9\n" }, { "commit": "5319defdf502fc4569316473846b83180ec08035", "tree": "909c6b29f065c79c8368a283946947cbb582d1c7", "parents": [ "37a7188810e865a1ee0a7bdc2d01d62c1f1ea49e" ], "author": { "name": "Alexandre Rames", "email": "alexandre.rames@arm.com", "time": "Thu Oct 23 10:03:10 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 23 13:44:42 2014 +0100" }, "message": "ART: optimizing compiler: initial support for ARM64.\n\nThe ARM64 port uses VIXL for code generation, to which it defers work\nlike label binding and branch resolving, register type coherency\nchecking, and immediate values handling.\n\nChange-Id: I0a44508c0c991f472a63e67b3469cdd878fe1a68\nSigned-off-by: Serban Constantinescu \u003cserban.constantinescu@arm.com\u003e\nSigned-off-by: Alexandre Rames \u003calexandre.rames@arm.com\u003e\n" }, { "commit": "039b6e2fd3bfadbd1ee8583002f673d6ccba5b7e", "tree": "1c42d51799207bb7c4ced079fce4878274fa8e81", "parents": [ "1e4dc259b4242c1a03415b5b5f4aed7a23e53f79" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 12:32:11 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Thu Oct 23 12:47:38 2014 +0100" }, "message": "Remove obsolete TODOs from codegen tests\n\nThe features are already exercised by the art test 411-optimizing-arith.\n\nChange-Id: Id008931e0ed8206ced11ecc85a80a7e4aef3e68e\n" }, { "commit": "1122c7fc277130814dd1d47b5e8be3ac35b1a5fc", "tree": "06e7b8f42b392fa7077d0612da94d4696e3c6a6e", "parents": [ "fd9e95619d94608687af201bb296b807716cc7c3", "1cc5f251df558b0e22cea5000626365eb644c727" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 09:17:41 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 23 09:17:42 2014 +0000" }, "message": "Merge \"Implement int bit-wise not operation in the optimizing compiler.\"" }, { "commit": "1cc5f251df558b0e22cea5000626365eb644c727", "tree": "5e65a32366261646edce02283a185928adba79b5", "parents": [ "b08f4dcf90215ed49e0b796ab3e609bd605be8ba" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 22 18:06:21 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 23 10:12:06 2014 +0100" }, "message": "Implement int bit-wise not operation in the optimizing compiler.\n\n- Add support for the not-int (integer one\u0027s complement\n negate) instruction in the optimizing compiler.\n- Extend the HNot control-flow graph node type and make it\n inherit from HUnaryOperation.\n- Generate ARM, x86 and x86-64 code for integer HNeg nodes.\n- Exercise these additions in the codegen_test gtest, as there\n is not direct way to assess the support of not-int from a\n Java source. Indeed, compiling a Java expression such as\n `~a\u0027 using javac and then dx generates an xor-int/lit8 Dex\n instruction instead of the expected not-int Dex instruction.\n This is probably because the Java bytecode has an `ixor\u0027\n instruction, but there\u0027s not instruction directly\n corresponding to a bit-wise not operation.\n\nChange-Id: I223aed75c4dac5785e04d99da0d22e8d699aee2b\n" }, { "commit": "cf7f19135f0e273f7b0136315633c2abfc715343", "tree": "ffa4d9efd9c45f4b6789acc1f534bb9327052b7e", "parents": [ "aea6888b056be21adf762e066c7f33b8939b8a06" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Wed Oct 22 22:06:39 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Wed Oct 22 22:21:57 2014 -0700" }, "message": "C++11 related clean-up of DISALLOW_..\n\nMove DISALLOW_COPY_AND_ASSIGN to delete functions. By no having declarations\nwith no definitions this prompts better warning messages so deal with these\nby correcting the code.\nAdd a DISALLOW_ALLOCATION and use for ValueObject and mirror::Object.\nMake X86 assembly operand types ValueObjects to fix compilation errors.\nTidy the use of iostream and ostream.\nAvoid making cutils a dependency via mutex-inl.h for tests that link against\nlibart. Push tracing dependencies into appropriate files and mutex.cc.\nx86 32-bit host symbols size is increased for libarttest, avoid copying this\nin run-test 115 by using symlinks and remove this test\u0027s higher than normal\nulimit.\nFix the RunningOnValgrind test in RosAllocSpace to not use GetHeap as it\nreturns NULL when the heap is under construction by Runtime.\n\nChange-Id: Ia246f7ac0c11f73072b30d70566a196e9b78472b\n" }, { "commit": "aea6888b056be21adf762e066c7f33b8939b8a06", "tree": "bfa17655ed3060b41e1cfd1583e590e9d9042f0a", "parents": [ "b08f4dcf90215ed49e0b796ab3e609bd605be8ba", "c7dd295a4e0cc1d15c0c96088e55a85389bade74" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Wed Oct 22 19:10:23 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Oct 22 19:10:24 2014 +0000" }, "message": "Merge \"Tidy up logging.\"" }, { "commit": "c7dd295a4e0cc1d15c0c96088e55a85389bade74", "tree": "0c08a2236bc9ba5d9a4dc75d4dd0ed2d76f8f1c6", "parents": [ "94e5af8602150efa95bde35cc9be9891ddf30135" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Tue Oct 21 23:31:19 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Wed Oct 22 12:06:23 2014 -0700" }, "message": "Tidy up logging.\n\nMove gVerboseMethods to CompilerOptions. Now \"--verbose-methods\u003d\" option to\ndex2oat rather than runtime argument \"-verbose-methods:\".\nMove ToStr and Dumpable out of logging.h, move LogMessageData into logging.cc\nexcept for a forward declaration.\nRemove ConstDumpable as Dump methods are all const (and make this so if not\ncurrently true).\nMake LogSeverity an enum and improve compile time assertions and type checking.\nRemove log_severity.h that\u0027s only used in logging.h.\nWith system headers gone from logging.h, go add to .cc files missing system\nheader includes.\nAlso, make operator new in ValueObject private for compile time instantiation\nchecking.\n\nChange-Id: I3228f614500ccc9b14b49c72b9821c8b0db3d641\n" }, { "commit": "48dee04f4e4214b0fdd8acd0587ef6b08d3d2456", "tree": "aa50172b03bce73ba8d3ef535696c7684d047445", "parents": [ "b5bfa96ff20e86316961327dec5c859239dab6a0" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Oct 22 15:54:12 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Oct 22 15:54:12 2014 +0100" }, "message": "Minor fix in codegen tests.\n\nChange-Id: I9b843536353d4f820b969895d5f75ee9b679aff0\n" }, { "commit": "b5bfa96ff20e86316961327dec5c859239dab6a0", "tree": "c37c4260f59a5eb79b33e3a81142eefc7bc49390", "parents": [ "46bf5e0759e80bbe69130d6731a95fd07e10507c" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 21 18:02:24 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Wed Oct 22 15:20:25 2014 +0100" }, "message": "Add multiplication for floats/doubles in optimizing compiler\n\nChange-Id: I61de8ce1d9e37e30db62e776979b3f22dc643894\n" }, { "commit": "a3d05a40de076aabf12ea284c67c99ff28b43dbf", "tree": "acbe183e7637a333bdaaf0910731b053f2be0f26", "parents": [ "2da28f2a9e79a09a4044521dc4d00320fcdcd041" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 20 17:41:32 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 22 13:49:47 2014 +0000" }, "message": "Implement array creation related DEX instructions.\n\nImplement new-array, filled-new-array, and fill-array-data.\n\nChange-Id: I405560d66777a57d881e384265322617ac5d3ce3\n" }, { "commit": "965ac7e0e6b83dc8bfe3f27305d7029d2febac79", "tree": "876ca908761e59807eecdb668902a38e03a7e55f", "parents": [ "70f4b9929048e71c4231d7976080be6277c3374b", "b762d2ebf9dc604561d9915c96b377235c94960c" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 22 09:16:53 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Oct 22 09:16:54 2014 +0000" }, "message": "Merge \"Various fixes related to integer negate operations.\"" }, { "commit": "b762d2ebf9dc604561d9915c96b377235c94960c", "tree": "aa6060b282db511651908d232a6b16ecbb22b755", "parents": [ "4ff20eba94a2519e5bac57b5f92e04741ea90141" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 22 10:11:06 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 22 10:11:06 2014 +0100" }, "message": "Various fixes related to integer negate operations.\n\n- Emit an RSB instruction for HNeg nodes in the ARM code\n generator instead of RSBS, as we do not need to update the\n condition code flags in this case.\n- Simply punt when trying to statically evaluate a long\n unary operation, instead of aborting.\n- Move a test case to the right place.\n\nChange-Id: I35eb8dea58ed35258d4d8df77181159c3ab07b6f\n" }, { "commit": "1f897b98e19a9b0192a373ee9d3c2fcb4a9463f4", "tree": "d857ca02dec553b30a6fd8d5d39ca88b2ece95ab", "parents": [ "4ff20eba94a2519e5bac57b5f92e04741ea90141" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 17:14:05 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 17:14:05 2014 +0100" }, "message": "Fix register_allocator_test after reg alloc changes.\n\nChange-Id: Ieaf5daf35efaff6685720a93a442cd7a152f1567\n" }, { "commit": "c8147a76ed2f440f38329dc08ff889d393b5c535", "tree": "bc5b83636edd6c7c6fb170dd8bddc776deefe43f", "parents": [ "8d2c23e0a2d1b449448675e0ba822953cee52b18" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 16:06:20 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 16:51:50 2014 +0100" }, "message": "Fix off by one errors in linear scan register allocator.\n\nChange-Id: I65eea3cc125e12106a7160d30cb91c5d173bd405\n" }, { "commit": "102cbed1e52b7c5f09458b44903fe97bb3e14d5f", "tree": "cb0a433c8f284021298c8a0c4dd0da97ca9d198a", "parents": [ "07f5c5edb7ef24ac35364e6ef9a8107a44e6564e" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 15 18:31:05 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 16:03:51 2014 +0100" }, "message": "Implement register allocator for floating point registers.\n\nAlso:\n- Fix misuses of emitting the rex prefix in the x86_64 assembler.\n- Fix movaps code generation in the x86_64 assembler.\n\nChange-Id: Ib6dcf6e7c4a9c43368cfc46b02ba50f69ae69cbe\n" }, { "commit": "07f5c5edb7ef24ac35364e6ef9a8107a44e6564e", "tree": "5d185a5e8c9b9b07e2ec8a9d0048dd12e0df4eff", "parents": [ "fdc31730353f0b3d3064cdf8b6aacabea26eb4f7", "9240d6a2baa9ed1e18ee08744b461fe49a1ee269" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 21 13:34:59 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Oct 21 13:34:59 2014 +0000" }, "message": "Merge \"Constant folding on unary operations in the optimizing compiler.\"" }, { "commit": "fdc31730353f0b3d3064cdf8b6aacabea26eb4f7", "tree": "26a7a5f64a5e82c10ba7536952bbb9841f6b3a54", "parents": [ "41aae699515430c10ab662945657d98c0febd578", "88cb1755e1d6acaed0f66ce65d7a2a4465053342" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 21 13:28:20 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Oct 21 13:28:21 2014 +0000" }, "message": "Merge \"Implement int negate instruction in the optimizing compiler.\"" }, { "commit": "9240d6a2baa9ed1e18ee08744b461fe49a1ee269", "tree": "0adc27979a1c30defa16de4142b1d54fac6f93dc", "parents": [ "88cb1755e1d6acaed0f66ce65d7a2a4465053342" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 20 16:47:04 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 21 13:48:41 2014 +0100" }, "message": "Constant folding on unary operations in the optimizing compiler.\n\nChange-Id: I4b77afa2a89f5ad2eedd4d6c0c6c382585419349\n" }, { "commit": "88cb1755e1d6acaed0f66ce65d7a2a4465053342", "tree": "6ffdd07aa75a38eae9376bd95d0991a789cd624c", "parents": [ "1e642b5e5b2958ffc1653f5f42f2d091bbd8549e" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 20 16:36:47 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 21 13:48:32 2014 +0100" }, "message": "Implement int negate instruction in the optimizing compiler.\n\n- Add support for the neg-int (integer two\u0027s complement\n negate) instruction in the optimizing compiler.\n- Add a HNeg node type for control-flow graphs and an\n intermediate HUnaryOperation base class.\n- Generate ARM, x86 and x86-64 code for integer HNeg nodes.\n\nChange-Id: I72fd3e1e5311a75c38a8cb665a9211a20325a42e\n" }, { "commit": "8e3964b766652a0478e8e0e303e8556c997675f1", "tree": "ebae22017d3d3c872642cbc56610f67ff32a861d", "parents": [ "5830247c351a1c40f37666584d6c390f32c31957" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 17 11:06:38 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 21 11:47:54 2014 +0100" }, "message": "Remove the notion of dies at entry.\n\n- Instead, explicitly say that the output does not overlap.\n- Inputs that must be in a fixed register do die at entry,\n as we know they have a location that others can not take.\n- There is also no need to differentiate between an input move\n and a connecting sibling move - those can be put in the\n same parallel move instruction.\n\nChange-Id: I1b2b2827906601f822b59fb9d6a21d48e43bae27\n" }, { "commit": "6c82d40eb142771086f5531998de2273ba5cc08c", "tree": "31eb699ae915d2c58603417eff8a4b71f585070a", "parents": [ "75be28332b278cff9039b54bfb228ac72f539ccc" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 13 16:10:27 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 17 17:11:44 2014 +0100" }, "message": "Have HInstruction::StrictlyDominates compute strict dominance.\n\nChange-Id: I3a4fa133268615fb4ce54a0bcb43e0c2458cc865\n" }, { "commit": "75be28332b278cff9039b54bfb228ac72f539ccc", "tree": "a01829ba0412d0f6637a833b41694f0d757d8f43", "parents": [ "ffb078ee815a38123581e706099a3bed65a6cb24" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 17 17:02:00 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 17 17:11:43 2014 +0100" }, "message": "Revert \"Revert \"Introduce a class to implement optimization passes.\"\"\n\nThis reverts commit 1ddbf6d4b37979a9f11a203c12befd5ae8b65df4.\n\nChange-Id: I110a14668d1564ee0604dc958b91394b40da89fc\n" }, { "commit": "34bacdf7eb46c0ffbf24ba7aa14a904bc9176fb2", "tree": "e8ed8e40c5f7896a9ac01bf7dcc2e56f40cfc804", "parents": [ "7f758228f7904d2f65f06bfbd2b8ecbb8e8c6a9d" ], "author": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Tue Oct 07 20:23:36 2014 +0100" }, "committer": { "name": "Calin Juravle", "email": "calin@google.com", "time": "Fri Oct 17 11:46:45 2014 +0100" }, "message": "Add multiplication for integral types\n\nThis also fixes an issue where we could allocate a pair register even if\none of its parts was already blocked.\n\nChange-Id: I4869175933409add2a56f1ccfb369c3d3dd3cb01\n" }, { "commit": "b3f18cf7466f85e15c6b7f005f544867a4d6847a", "tree": "62035f08dc38038b74c9796118ae0bab0e7608fb", "parents": [ "cb142101f29a4f1e097f03a220db3da6d4bd679f", "6f3dbbadf4ce66982eb3d400e0a74cb73eb034f3" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Fri Oct 17 02:29:32 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 17 02:29:32 2014 +0000" }, "message": "Merge \"Make ART compile with GCC -O0 again.\"" }, { "commit": "6f3dbbadf4ce66982eb3d400e0a74cb73eb034f3", "tree": "f7a20779e4d665f948c5fbcd26dac0071dafb8d4", "parents": [ "2df6840f68dd18d7dd8dbf53f8b6181bbfdc4fc4" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Tue Oct 14 17:41:57 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Thu Oct 16 19:27:28 2014 -0700" }, "message": "Make ART compile with GCC -O0 again.\n\nTidy up InstructionSetFeatures so that it has a type hierarchy dependent on\narchitecture.\nAdd to instruction_set_test to warn when InstructionSetFeatures don\u0027t agree\nwith ones from system properties, AT_HWCAP and /proc/cpuinfo.\nClean-up class linker entry point logic to not return entry points but to\ntest whether the passed code is the particular entrypoint. This works around\nimage trampolines that replicate entrypoints.\nBug: 17993736\n\nChange-Id: I5f4b49e88c3b02a79f9bee04f83395146ed7be23\n" }, { "commit": "dc43794b146283b2ba588db83d1fac1f8a3af6d3", "tree": "7b6befbdfe47071ebfde5b627edae339fe9ab6f3", "parents": [ "ec2ea6ff6e3d7816df889454866a28b58ce6e6f5", "92a73aef279be78e3c2b04db1713076183933436" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 16 14:20:58 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 16 14:20:59 2014 +0000" }, "message": "Merge \"Don\u0027t use assembler classes in code_generator.h.\"" }, { "commit": "92a73aef279be78e3c2b04db1713076183933436", "tree": "e73b214fb7d740588f5d065b2e4ff3eb8c527e34", "parents": [ "5c5efc253507eb43265997c9afcd778f72b6cef4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 16 11:12:52 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 16 15:17:44 2014 +0100" }, "message": "Don\u0027t use assembler classes in code_generator.h.\n\nThe arm64 backend uses its own assembler and does not share\nthe same classes as the other backends. To avoid conflicts\nor unnecessary mappings, just don\u0027t use those classes in the\nshared part of the code generator.\n\nChange-Id: I9e5fa40c1021d2e83a4ef14c52cd1ccd03f2f73d\n" }, { "commit": "633021e6ff6b9a57a374a994e74cfd69275ce100", "tree": "78755b7e5d90f1374b317cea2193605de9bdd2d9", "parents": [ "a8069ce1c3caa4f9b1651988986f3732152c186d" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 01 14:12:25 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 14 14:44:16 2014 +0100" }, "message": "Implement default traversals in CFG \u0026 SSA graph checkers.\n\n- Check CFG graphs using an insertion order traversal.\n- Check SSA form graphs using a reverse post-order traversal.\n\nChange-Id: Ib9062599bdbf3c17b9f213b743274b2d71a9fa90\n" }, { "commit": "a8069ce1c3caa4f9b1651988986f3732152c186d", "tree": "bfeaeefaec1aae17905bb9df72959193a539ca75", "parents": [ "e161a2a60c0325793f04be42a0f05228955ecfdd" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 01 10:48:29 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 14 14:44:16 2014 +0100" }, "message": "Improve art::SSAChecker::VisitInstruction.\n\nActually inspect the uses of an instruction to ensure the\nlatter dominates all of the former, instead of browsing the\ninputs of this instruction (to ensure they dominate the\ninstruction).\n\nAlso check instruction domination with respect to environment\nuses.\n\nChange-Id: I967f34a45f48930607bf9683180d02e7c27b4e06\n" }, { "commit": "e161a2a60c0325793f04be42a0f05228955ecfdd", "tree": "426167496f383ec4343902f01ce0745d4dd1874d", "parents": [ "3a3fd0f8d3981691aa2331077a8fae5feee08dd1" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 03 12:45:18 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 14 14:44:16 2014 +0100" }, "message": "Do not remove NullChecks \u0026 BoundsChecks in HDeadCodeElimination.\n\nRemoving a NullCheck or a BoundsCheck instruction may change\nthe behavior of a program.\n\nChange-Id: Ib2c9beff0cc98c382210e7cc88b1fa9af3c61887\n" }, { "commit": "3a3fd0f8d3981691aa2331077a8fae5feee08dd1", "tree": "7fc5bb817010f0b77c109d8c645c7ec4f6b2e467", "parents": [ "b8f2480853aeca1db33ed623b9a9b2648954906e" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 10 13:56:31 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Oct 14 14:44:16 2014 +0100" }, "message": "Turn constant conditional jumps into unconditional jumps.\n\nIf a condition (input of an art::HIf instruction) is\nconstant (an art::HConstant object), evaluate it at\ncompile time and generate an unconditional branch\ninstruction if it is true (in lieu of a conditional jump).\n\nChange-Id: I262e43ffe66d5c25dbbfa98092a41c8b3c4c75d6\n" }, { "commit": "f8e28f575b1382e984edb2e8c9846a27a1bdea10", "tree": "12506af9dc858d842061843570a939e74822b517", "parents": [ "f659bec20db45c809a891ff528fb6aecf2c76149", "476df557fed5f0b3f32f8d11a654674bb403a8f8" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 13 11:36:10 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 13 11:36:11 2014 +0000" }, "message": "Merge \"Use Is*() helpers to shorten code in the optimizing compiler.\"" }, { "commit": "71175b7f19a4f6cf9cc264feafd820dbafa371fb", "tree": "5370e7c7c9f7d1edf148a00548cb1334d5118f8d", "parents": [ "b76c5495c4879fcfa0866b1490031a3123baf9ee" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 09 22:13:55 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 10 11:36:03 2014 +0000" }, "message": "Cleanup baseline register allocator.\n\n- Use three arrays for blocking regsters instead of\n one and computing offsets in that array.]\n- Don\u0027t pass blocked_registers_ to methods, just use the field.\n\nChange-Id: Ib698564c31127c59b5a64c80f4262394b8394dc6\n" }, { "commit": "b76c5495c4879fcfa0866b1490031a3123baf9ee", "tree": "06180f586f6a3de4398091d96cf5d907c4b65a3a", "parents": [ "4471609d86b7e846b26bebe3373707a10c222e71", "360231a056e796c36ffe62348507e904dc9efb9b" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Oct 10 11:22:50 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Oct 10 11:22:50 2014 +0000" }, "message": "Merge \"Fix code generation of materialized conditions.\"" }, { "commit": "fc787ecd91127b2c8458afd94e5148e2ae51a1f5", "tree": "ef48c0f511ee9bf4ed85607cc4d530bace7e6cae", "parents": [ "8fa8c904f7c783204a1dc9438429391d256658da" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Thu Oct 09 21:56:44 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Thu Oct 09 22:22:46 2014 -0700" }, "message": "Enable -Wimplicit-fallthrough.\n\nFalling through switch cases on a clang build must now annotate the fallthrough\nwith the FALLTHROUGH_INTENDED macro.\nBug: 17731372\n\nChange-Id: I836451cd5f96b01d1ababdbf9eef677fe8fa8324\n" }, { "commit": "13735955f39b3b304c37d2b2840663c131262c18", "tree": "0a731ac42b8230f9929172fa3e3d8051874e2b18", "parents": [ "25b18bbdaa36ff936eb44f228f0518d4223e9d52" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Wed Oct 08 12:43:28 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Thu Oct 09 16:05:58 2014 -0700" }, "message": "stdint types all the way!\n\nChange-Id: I4e4ef3a2002fc59ebd9097087f150eaf3f2a7e08\n" }, { "commit": "476df557fed5f0b3f32f8d11a654674bb403a8f8", "tree": "0ca72785e60b3b1152bca0908e6d134c0a30f631", "parents": [ "9e878d50567f624094f3c4940ac3aedbc5eff3b9" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 09 17:51:36 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 09 17:59:50 2014 +0100" }, "message": "Use Is*() helpers to shorten code in the optimizing compiler.\n\nChange-Id: I79f31833bc9a0aa2918381aa3fb0b05d45f75689\n" }, { "commit": "9e878d50567f624094f3c4940ac3aedbc5eff3b9", "tree": "3b4f118d07fcdd8d64308e847e0140c0115448bf", "parents": [ "51205042343fa4852e01919de01fdcf261af510b", "0279ebb3efd653e6bb255470c99d26949c7bcd95" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Thu Oct 09 15:52:50 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 09 15:52:51 2014 +0000" }, "message": "Merge \"Tidy ELF builder.\"" }, { "commit": "0279ebb3efd653e6bb255470c99d26949c7bcd95", "tree": "d58b29754f7b3c88616e6e4d6c19346821d244ae", "parents": [ "f1f05d303988a5c071c87b760056be8358276c94" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Wed Oct 08 17:27:48 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Thu Oct 09 08:25:34 2014 -0700" }, "message": "Tidy ELF builder.\n\nDon\u0027t do \"if (ptr)\". Use const. Use DISALLOW_COPY_AND_ASSIGN. Avoid public\nmember variables.\nMove ValueObject to base and use in ELF builder.\nTidy VectorOutputStream to not use non-const reference arguments.\n\nChange-Id: I2c727c3fc61769c3726de7cfb68b2d6eb4477e53\n" }, { "commit": "360231a056e796c36ffe62348507e904dc9efb9b", "tree": "a62ff73c11eaa6694649c98e4c2d872e89149b0c", "parents": [ "2072c465cfff077da257bdf14f1f1b2690c946c8" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 08 21:07:48 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 09 15:21:57 2014 +0100" }, "message": "Fix code generation of materialized conditions.\n\nMove the logic for knowing if a condition needs to be materialized\nin an optimization pass (so that the information does not change\nas a side effect of another optimization).\n\nAlso clean-up arm and x86_64 codegen:\n- arm: ldr and str are for power-users when a constant is\n in play. We should use LoadFromOffset and StoreToOffset.\n- x86_64: fix misuses of movq instead of movl.\n\nChange-Id: I01a03b91803624be2281a344a13ad5efbf4f3ef3\n" }, { "commit": "56b9ee6fe1d6880c5fca0e7feb28b25a1ded2e2f", "tree": "34e5163967f59a98e64f2c89489ed7b76334b48a", "parents": [ "a3c4d72210de174552f47b2d117b1946f274af1e" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 09 11:47:51 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Thu Oct 09 14:42:13 2014 +0100" }, "message": "Stop converting from Location to ManagedRegister.\n\nNow the source of truth is the Location object that knows\nwhich register (core, pair, fpu) it needs to refer to.\n\nChange-Id: I62401343d7479ecfb24b5ed161ec7829cda5a0b1\n" }, { "commit": "7e70b002c4552347ed1af8c002a0e13f08864f20", "tree": "79d5ee5444a5be70130d9a75dd51831c4b15687b", "parents": [ "edc34c88b8f8abd04f9c4668787403608cf0b2d4" ], "author": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Wed Oct 08 11:47:24 2014 -0700" }, "committer": { "name": "Ian Rogers", "email": "irogers@google.com", "time": "Wed Oct 08 11:57:59 2014 -0700" }, "message": "Header file clean up.\n\nRemove runtime.h from object.h.\nMove TypeStaticIf to its own header file to avoid bringing utils.h into\nallocator.h.\nMove Array::DataOffset into -inl.h as it now has a utils.h dependency.\nFix include issues arising from this.\n\nChange-Id: I4605b1aa4ff5f8dc15706a0132e15df03c7c8ba0\n" }, { "commit": "93445689c714e53cabf347da4321ecf3023e926c", "tree": "459c38b3c12b335358278b745f431e68c18d0824", "parents": [ "50940ea8fe668a80c15920d98cae228851ceb990" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Oct 06 19:24:02 2014 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 08 15:25:11 2014 +0100" }, "message": "Fix and improve static evaluation of constant expressions.\n\n- Fix the definition of art::HSub::Evaluate.\n- Qualify Evaluate methods as OVERRIDE.\n- Evaluate comparisons in a deterministic way: if a\n comparison is true, always return 1 (instead of letting\n the compiler return any non-null value).\n- Better exercise static evaluation of constant expressions\n in compiler/optimizing/constant_propagation_test.cc.\n\nChange-Id: I13d0862e5f4eba1275016fb8c3c17e9aff54408b\n" }, { "commit": "01ef345767ea609417fc511e42007705c9667546", "tree": "8a3cf1b5a576caf212ef31db966b97b6d23aaf98", "parents": [ "a9f2904263581f606a5704f2bb74efcecf7e9f97" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 01 11:32:17 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 07 21:25:27 2014 +0100" }, "message": "Add trivial register hints to the register allocator.\n\n- Add hints for phis, same as first input, and expected registers.\n- Make the if instruction accept non-condition instructions.\n\nChange-Id: I34fa68393f0d0c19c68128f017b7a05be556fbe5\n" }, { "commit": "7fb49da8ec62e8a10ed9419ade9f32c6b1174687", "tree": "8b1bec67452b84809cecd5645543e1f885ccbd44", "parents": [ "4a1b4679cda2f0d2893b8e3f910c21231849291c" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 06 09:12:41 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 07 20:19:47 2014 +0100" }, "message": "Add support for floats and doubles.\n\n- Follows Quick conventions.\n- Currently only works with baseline register allocator.\n\nChange-Id: Ie4b8e298f4f5e1cd82364da83e4344d4fc3621a3\n" }, { "commit": "191c4b1372aef7c0272f8fa3985b55513029e728", "tree": "ea8a2eb84a64b6f808f782ada9ea66ef69e8e764", "parents": [ "41abdb6ec97978df7c6d79abce4efb664c994ce8" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 07 14:14:27 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 07 16:26:48 2014 +0100" }, "message": "Inserting a node must also update its inputs users.\n\nChange-Id: I55357564b81efcc0cf52fffdf23289696fe27dd1\n" }, { "commit": "41abdb6ec97978df7c6d79abce4efb664c994ce8", "tree": "ec341468d5881c62251a354f31c8081b57e08687", "parents": [ "e9da5d17fb6e8fde383c943c184905d63ed0c644", "7adfcc8cfdf5fe3a8a0aefa08bfc3249fca55c8b" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 07 11:29:10 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Oct 07 11:29:11 2014 +0000" }, "message": "Merge \"Do not use kDiesAtEntry when inputs must be in specific reg.\"" }, { "commit": "7adfcc8cfdf5fe3a8a0aefa08bfc3249fca55c8b", "tree": "51f231854e404edcd2019afa393697a6a08ee9cf", "parents": [ "9800e55b059d4a0fdc0ceebd5652a53f7a8d837a" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 07 12:24:52 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Oct 07 12:24:52 2014 +0100" }, "message": "Do not use kDiesAtEntry when inputs must be in specific reg.\n\nThe way the register allocator blocks registers currently\ndoes not handle these cases. Since it only applies to x86 for now,\njust ensure such requests cannot happen.\n\nChange-Id: Idfa25532b9b4996a192d05800f56c6e44edd3a8a\n" }, { "commit": "26a25ef62a13f409f941aa39825a51b4d6f0f047", "tree": "aa0ed991cfcea17297e85f74624a44e32e8913cf", "parents": [ "17b1c174dddb1d83018740c2084ab42daa812fff" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Sep 30 13:54:09 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 06 18:52:56 2014 +0100" }, "message": "Add a prepare for register allocation pass.\n\n- Currently the pass just changes the uses of checks to the\n actual values.\n- Also optimize array access, now that inputs can be constants.\n- And fix another bug in the register allocator reveiled by\n this change.\n\nChange-Id: I43be0dbde9330ee5c8f9d678de11361292d8bd98\n" }, { "commit": "9ae0daa60c568f98ef0020e52366856ff314615f", "tree": "e74b9ee49af0b1b202444fdaaca4b39620d962dd", "parents": [ "2d4e89e97812aeca16ff058d7286f29b7549c43a" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Tue Sep 30 22:40:23 2014 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Oct 06 16:36:49 2014 +0100" }, "message": "Add support for inputs dying at entry of instructions.\n\n- Start using it in places where it makes sense.\n- Also improve suspend check on arm to use subs directly.\n\nChange-Id: I09ac0589f5ccb9b850ee757c76dcbcf35ee8cd01\n" }, { "commit": "d25cee7088d03881265fe3d04c09ec2f798860f5", "tree": "e37953f590f924e06b9905f922407559a3661cb6", "parents": [ "bff187b5079631a18288cd78d3dddafba9ca94e7", "1ddbf6d4b37979a9f11a203c12befd5ae8b65df4" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 01 14:59:51 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Oct 01 14:59:51 2014 +0000" }, "message": "Merge \"Revert \"Introduce a class to implement optimization passes.\"\"" }, { "commit": "1ddbf6d4b37979a9f11a203c12befd5ae8b65df4", "tree": "2bc48925657e791441aa947d4d629994a0696e78", "parents": [ "bf9cd7ba2118a75f5aa9b56241c4d5fa00dedeb8" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 01 14:59:23 2014 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Wed Oct 01 14:59:23 2014 +0000" }, "message": "Revert \"Introduce a class to implement optimization passes.\"\n\nThis reverts commit bf9cd7ba2118a75f5aa9b56241c4d5fa00dedeb8.\n\nChange-Id: I0a483446666c9c24c45925a5fc199debdefd8b3e\n" }, { "commit": "bff187b5079631a18288cd78d3dddafba9ca94e7", "tree": "ea1eab47ce7f5a125b7da602a221371215755194", "parents": [ "439bfb95c06080ed921409a4b8aad33d0da86c16", "bf9cd7ba2118a75f5aa9b56241c4d5fa00dedeb8" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 01 14:38:10 2014 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Wed Oct 01 14:38:10 2014 +0000" }, "message": "Merge \"Introduce a class to implement optimization passes.\"" } ], "next": "bf9cd7ba2118a75f5aa9b56241c4d5fa00dedeb8" }