1. f3e61ee Implement halving add idiom (with checker tests). by Aart Bik · 9 years ago
  2. b31f91f ARM64: Support vectorization for double and long. by Artem Serov · 9 years ago
  3. d4bccf1 ARM64: Support 128-bit registers for SIMD. by Artem Serov · 9 years ago
  4. 6daebeb Implemented ABS vectorization. by Aart Bik · 9 years ago
  5. f8f5a16 ART vectorizer. by Aart Bik · 9 years ago