)]}' { "log": [ { "commit": "bd39d145e4986217bcb8dce1d4a9631d926a2781", "tree": "52dfd3307ab5279e960f9a1bf6e474e47440a3d8", "parents": [ "6f4cf6e8fa15de2f9bf7c6a649ea7a2fabef886a" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jul 19 11:14:42 2018 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jul 19 11:37:05 2018 -0700" }, "message": "ART: Clean up unused using declarations\n\nMake tidy happy, and enable checking.\n\nTest: mmma art\nChange-Id: I9e18e80b3f37dd2aeb8ecd1c25abe4d5cf2f1c45\n" }, { "commit": "cdfc942e60032622b5a4379d0dd5ca914ba6393a", "tree": "823e767f6eba6fb2831f69753936bc0c35eea84e", "parents": [ "ec1f1a91328f44d93cfc16e39160dbdfce2f7b9a", "f5f56c791c5853f43a2a9781c98d5776c7dd5a59" ], "author": { "name": "Hans Boehm", "email": "hboehm@google.com", "time": "Fri Jul 13 16:35:30 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jul 13 16:35:30 2018 +0000" }, "message": "Merge \"Revert \"Emit vector mulitply and accumulate instructions for x86.\"\"" }, { "commit": "f5f56c791c5853f43a2a9781c98d5776c7dd5a59", "tree": "ed8270e3a5d0161ebe5bec0606a24cd5e3123e59", "parents": [ "61908880e6565acfadbafe93fa64de000014f1a6" ], "author": { "name": "Hans Boehm", "email": "hboehm@google.com", "time": "Fri Jul 13 00:05:27 2018 +0000" }, "committer": { "name": "Hans Boehm", "email": "hboehm@google.com", "time": "Fri Jul 13 00:05:27 2018 +0000" }, "message": "Revert \"Emit vector mulitply and accumulate instructions for x86.\"\n\nThis reverts commit 61908880e6565acfadbafe93fa64de000014f1a6.\n\nReason for revert: By failing to round multiply results, it does not follow Java rounding rules.\n\nChange-Id: Ic0ef08691bef266c9f8d91973e596e09ff3307c6\n" }, { "commit": "d109e30eab8ba25f8d89be2a83d9036e2d541af2", "tree": "24df91603efe9ce8c4a2efd09ac402aceb10df4e", "parents": [ "c916736ca1e375c276df251446baf2ac8ff3eb13" ], "author": { "name": "Alex Light", "email": "allight@google.com", "time": "Wed Jun 27 10:25:41 2018 -0700" }, "committer": { "name": "Alex Light", "email": "allight@google.com", "time": "Tue Jul 10 08:44:51 2018 -0700" }, "message": "Don\u0027t use StringFactory.newEmptyString in compiled code\n\nWhen compiling debuggable code we would compile a new-instance String\ninstruction into a StringFactory.newEmptyString invoke. This\nadditional invoke could be observed using tracing and is inconsistent\nwith the interpreter, where the string is simply allocated directly.\nIn order to bring these two modes into alignment we added a new\nAllocStringObject quick entrypoint that will be used instead of the\nnormal AllocObject\u003c...\u003e entrypoints when allocating a string. This\nentrypoint directly allocates a new string in the same manner the\ninterpreter does.\n\nNeeds next CL for test to work.\n\nBug: 110884646\nTest: ./test/testrunner/testrunner.py --host --runtime-option\u003d-Xjitthreshold:0 --jit\nTest: Manual inspection of compiled code.\nChange-Id: I7b4b084bcf7dd9a23485c0e3cd2cd04a04b43d3d\n" }, { "commit": "2258c2ef5f6cb25ff12a1dc6dfac1f868892c226", "tree": "48c98b4e03899ec555062b0affd7d7e8bdcb2383", "parents": [ "ad78fb294dbf8bae52835f98cc3e38a6f217781f", "35d5b8a2c5d2fce03be59aa003c3bf3c1b481be0" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jul 03 11:47:17 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jul 03 11:47:17 2018 +0000" }, "message": "Merge \"ART: Do not use std::\u003ccontainer\u003e::at().\"" }, { "commit": "35d5b8a2c5d2fce03be59aa003c3bf3c1b481be0", "tree": "7665f6d1527be61af13c8ef53f10833dd4200cfd", "parents": [ "b28683f43231e65860ecf91c96a8c0234542c019" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jul 03 09:18:32 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jul 03 09:18:32 2018 +0100" }, "message": "ART: Do not use std::\u003ccontainer\u003e::at().\n\nThese functions are specified as throwing std::out_of_range\nand we do not use exceptions.\n\nTest: m\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nChange-Id: I67c365ed6d779c101a18b9f386c751c48ca76e16\n" }, { "commit": "61908880e6565acfadbafe93fa64de000014f1a6", "tree": "40b535db9175f3d959364d5bc30eaab4e2c4b4c4", "parents": [ "b5271dd44a30f498689e503340d3c8d01bf31f07" ], "author": { "name": "Gupta Kumar, Sanjiv", "email": "sanjiv.kumar.gupta@intel.com", "time": "Fri Jun 29 13:06:35 2018 +0530" }, "committer": { "name": "Gupta Kumar, Sanjiv", "email": "sanjiv.kumar.gupta@intel.com", "time": "Mon Jul 02 15:37:38 2018 +0530" }, "message": "Emit vector mulitply and accumulate instructions for x86.\n\nThis patch adds a new cpu vaiant named kabylake and performs\ninstruction simplification to generate VectorMulitplyAccumulate.\n\nTest: ./test.py --host --64\n\nChange-Id: Ie6cc882dadf1322dd4d3ae49bfdb600b0c447765\nSigned-off-by: Gupta Kumar, Sanjiv \u003csanjiv.kumar.gupta@intel.com\u003e\n" }, { "commit": "54159c6c6fe529a55ef3d15a3c8418362d5a43fb", "tree": "2ec461de8ec15383134f4c6e209f4b8a33854277", "parents": [ "44217b253bf4e5990de7051129ecda34f94d7f25" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Jun 20 14:30:08 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Jun 21 13:46:50 2018 +0100" }, "message": "Use HashSet\u003cstd::string\u003e instead of unordered_set\u003c\u003e.\n\nChange the default parameters for HashSet\u003cstd::string\u003e to\nallow passing StringPiece as a key, avoiding an unnecessary\nallocation. Use the HashSet\u003cstd::string\u003e instead of\nstd::unordered_set\u003cstd::string\u003e. Rename HashSet\u003c\u003e functions\nthat mirror std::unordered_multiset\u003c\u003e to lower-case.\n\nFix CompilerDriver::LoadImageClasses() to avoid using\ninvalidated iterator.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nChange-Id: I7f8b82ee0b07befc5a0ee1c420b08a2068ad931e\n" }, { "commit": "4c8e12e66968929b36fac6a2237ca4b04160161e", "tree": "d8bbfd72a978c69ef2eef98c37e7869673c52295", "parents": [ "20c64f8d802cc575cc9a1a1f6c493a611b23e2ee" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Fri May 18 08:33:20 2018 +0100" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Mon Jun 11 10:57:17 2018 +0100" }, "message": "ART: Adds an entrypoint for invoke-custom\n\nAdd support for the compiler to call into the runtime for\ninvoke-custom bytecodes.\n\nBug: 35337872\nTest: art/test.py --host -r -t 952\nTest: art/test.py --target --64 -r -t 952\nTest: art/test.py --target --32 -r -t 952\nChange-Id: I821432e7e5248c91b8e1d36c3112974c34171803\n" }, { "commit": "d3083dd15af1cb4ffc13d87a7d2c3be2edb9199d", "tree": "88dd2599ad89da5a4f2668a2c9debd0335669cd0", "parents": [ "6623bc389c43efc87668ce7465e19b195e765e22" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 17 08:43:47 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 22 14:38:14 2018 +0100" }, "message": "Refactor runtime callee save frame info.\n\nAnd avoid storing the info in Runtime.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing --jit\nTest: Pixel 2 XL boots.\nTest: testrunner.py --target --optimizing --jit\nChange-Id: Ib14853fc06c420753993e1f9e82a1b01f5e35e8c\n" }, { "commit": "dbaa5c7ba8935cf87ceb40a4054f9842929e9a51", "tree": "5037625c80cb97a0e13026dc450db28e59ff72ca", "parents": [ "51dda39549033b3c50a7fce5522ffc81325db54b" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Thu May 10 08:22:46 2018 +0100" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Fri May 11 11:55:30 2018 +0100" }, "message": "ART: Compiler support for const-method-handle\n\nImplemented as a runtime call.\n\nBug: 66890674\nTest: art/test.py --target -r -t 979\nTest: art/test.py --target --64 -r -t 979\nTest: art/test.py --host -r -t 979\nChange-Id: I67f461c819a7d528d7455afda8b4a59e9aed381c\n" }, { "commit": "18259d7fb7164a5e029df4f883b3a79ccc2403e8", "tree": "ba378bfdef4127bb0607215186e3b150fd38bcdf", "parents": [ "922501b4bbf724e4259477a27764291684eedffb" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Thu Apr 12 11:18:23 2018 +0100" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Thu May 10 15:04:09 2018 +0100" }, "message": "ART: Compiler support for const-method-type\n\nImplemented as a runtime call.\n\nBug: 66890674\nTest: art/test.py --target -r -t 979\nTest: art/test.py --target --64 -r -t 979\nTest: art/test.py --host -r -t 979\nChange-Id: I4b3d3969d455d0198cfe122eea8abd54e0ea20ee\n" }, { "commit": "1b19877e78f58ff3f676845380ec1280791d9500", "tree": "b4069e7022aeb9758c8fefcc13521341c67e57ac", "parents": [ "d94a00cdf0519ff92dff1ee59a5a42234a391ddd", "9a6ca9f645c76e9081d8de39e6d98377e208a650" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue May 08 09:32:14 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue May 08 09:32:14 2018 +0000" }, "message": "Merge \"MIPS: Skip output verification for assembler tests.\"" }, { "commit": "9a6ca9f645c76e9081d8de39e6d98377e208a650", "tree": "3e24ee038d1cb87811ca5b3836172ab4e538d581", "parents": [ "9926e4615d75cb6c9371e1766a14b0a80089ae18" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri May 04 13:06:55 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri May 04 13:06:55 2018 +0100" }, "message": "MIPS: Skip output verification for assembler tests.\n\nThese tests were taking too much time, skipping the output\nverification brings it down from ~60s to ~10s per test.\n\nTest: m test-art-host-gtest\nBug: 73903608\nChange-Id: Ifd55c8013dea92de631e7c033111959a794759f2\n" }, { "commit": "d1fa440902e55b6b032a2c5c06a356558e882007", "tree": "1775bf1d2d3640a0bf5e7dac0ea7c9b10d7951ca", "parents": [ "9926e4615d75cb6c9371e1766a14b0a80089ae18" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu May 03 15:43:13 2018 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri May 04 09:22:48 2018 +0100" }, "message": "ARM: Remove VIXL dependency from ArmManagedRegister.\n\nAlso remove unnecesary DWARF includes.\n\nMotivation: Preparing to move JNI calling conventions\nto runtime/ to unify the GenericJNI frame creation with\nthe JNI compiler.\n\nTest: Rely on TreeHugger.\nChange-Id: If8afc4a4fa41e41f0242962bb225b36633c1c153\n" }, { "commit": "1979c64214bd505c013d573bc8729ee94f7bdea5", "tree": "9b4b2298b8b9d15cd6ca0a1e06e3771f3db2163f", "parents": [ "5a87e19e4bf1b6719c2aad3effde1b38d2c3085c" ], "author": { "name": "David Sehr", "email": "sehr@google.com", "time": "Thu Apr 26 14:41:18 2018 -0700" }, "committer": { "name": "David Sehr", "email": "sehr@google.com", "time": "Thu Apr 26 15:08:49 2018 -0700" }, "message": "Clean up include paths\n\nRemove runtime/globals.h and make clients point to the right globals.h\n(libartbase/base/globals.h). Also make within-libartbase includes\nrelative rather than using base/, etc.\n\nBug: 22322814\nTest: make -j 40 checkbuild\nChange-Id: I99de63fc851d48946ab401e2369de944419041c7\n" }, { "commit": "1ce2b3b76d121a765212d69399241843951973ae", "tree": "6f2bb0191c869e79891df3151d6faba3a297b9a8", "parents": [ "281c99864f635ef4fd005dba4ba0c750cb9a6143" ], "author": { "name": "David Sehr", "email": "sehr@google.com", "time": "Thu Apr 05 11:02:03 2018 -0700" }, "committer": { "name": "David Sehr", "email": "sehr@google.com", "time": "Thu Apr 05 11:07:59 2018 -0700" }, "message": "Move remaining runtime/base stuff to libartbase\n\nMove the remainder of the Arena stuff, plus dumpable and\nruntime/*memory_region* to libartbase. More preparation to build\nprofiling library.\n\nBug: 22322814\nTest: make -j 50 checkbuild\nChange-Id: Iaf26d310c89bc58846553281576c18102f5e4122\n" }, { "commit": "3215fff7ef8fa3c2250b91158560eacc613a4671", "tree": "50d6fe7aff3f8fae31dcf2ca020f5079f49a592f", "parents": [ "6371249ce05032db5d8c4c7ec96bf7fd7264c42f" ], "author": { "name": "David Sehr", "email": "sehr@google.com", "time": "Tue Apr 03 17:10:12 2018 -0700" }, "committer": { "name": "David Sehr", "email": "sehr@google.com", "time": "Wed Apr 04 14:47:57 2018 -0700" }, "message": "Separate Malloc and MemMap ArenaPools\n\nMake ArenaPool an abstract base class and leave MallocArenaPool\nimplementation with it. This enables arena_allocator to be free\nof MemMap, Mutex, etc., in preparation to move the remaining collections\nout of runtime/base to libartbase/base.\n\nBug: 22322814\nTest: make -j 50 test-art-host\n build and boot\n\nChange-Id: Ief84dcbfb749165d9bc82000c6b8f96f93052422\n" }, { "commit": "871bf39030406129af6fbce09f3d4f09af292653", "tree": "82aa2a5a95a01136d33a69286942fedc640741eb", "parents": [ "68c506c7c7dd12d9c23bcfe264889677225a16c2" ], "author": { "name": "Hans Boehm", "email": "hboehm@google.com", "time": "Wed Mar 28 17:44:09 2018 -0700" }, "committer": { "name": "Hans Boehm", "email": "hboehm@google.com", "time": "Thu Mar 29 16:07:28 2018 +0000" }, "message": "Make Remove() atomic, as expected\n\nBug: 31023171\nTest: m -j28 test-art-host\n\nChange-Id: I0d9a4b19f1b307d98f01ec76a47e4748f713437c\n" }, { "commit": "88591fe82f499de10591f5b77efac71f8954eae2", "tree": "bfa126ad55ee091e3b615bd3bb60d5f8cfb6e37a", "parents": [ "e8a4e378c5a928d5de07bee6db99150a57dabcd8" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Tue Mar 06 13:35:43 2018 +0000" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Fri Mar 23 15:01:15 2018 +0000" }, "message": "ART: Simplify atomic.h\n\nPrefer std::atomic operations over wrappers in atomic.h. Exceptions\nare cases that relate to the Java data memory operations and CAS\noperations.\n\nBug: 71621075\nTest: art/test.py --host -j32\nTest: art/test.py --target --64 -j4\nChange-Id: I9a157e9dede852c1b2aa67d22e3e604a68a9ef1c\n" }, { "commit": "312f3b2fd0094c028a7d243b116947a35a745806", "tree": "3d7ec049ded98c489098c87250c75e3f711f8290", "parents": [ "0a3d5eb2ff9e70fa5785638da938439835d0337e" ], "author": { "name": "David Sehr", "email": "sehr@google.com", "time": "Mon Mar 19 08:39:26 2018 -0700" }, "committer": { "name": "David Sehr", "email": "sehr@google.com", "time": "Mon Mar 19 11:02:48 2018 -0700" }, "message": "Move some remaining dex utilities\n\nThere were several utilities related to building/walking/testing dex\nfiles that were not in libdexfile. This change consolidates these.\n\nBug: 22322814\nTest: make -j 50 test-art-host\nChange-Id: Id76e9179d03b8ec7d67f7e0f267121f54f0ec2e0\n" }, { "commit": "bd72ae0a2ab82388dbe90bca652786e52a452798", "tree": "71034473754dbb10c2d7ac239849396d1cb31452", "parents": [ "45677e57ad3fb4e73865f401d3eb91d421b63a53", "4ca17350c0c0f7582d909d2776cc3d5f99b4b18a" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Mar 08 19:19:26 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Mar 08 19:19:26 2018 +0000" }, "message": "Merge \"Saturation arithmetic instructions for X86 and X86_64.\"" }, { "commit": "d395e73e9ed7c3fb5e8a48c3f3141a8997d4a82b", "tree": "f060fc37b00fa4e19b1f556c7fba1adb064ff841", "parents": [ "04bd682576416ef7c3bfb0ab6a74ec60beac724b", "0d2cab5c15215eb7a7b9af0ce11f176dcbd69559" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Mar 08 13:16:38 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Mar 08 13:16:38 2018 +0000" }, "message": "Merge \"MIPS: Use PCNT to implement VisitIntegerBitCount() and VisitLongBitCount()\"" }, { "commit": "4ca17350c0c0f7582d909d2776cc3d5f99b4b18a", "tree": "7c50ef16f527d8675beb3d2e156760a40c56b35d", "parents": [ "e62555560677f90b909dfa65ae8ac161099e600c" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Mar 07 15:47:39 2018 -0800" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Mar 07 15:58:31 2018 -0800" }, "message": "Saturation arithmetic instructions for X86 and X86_64.\n\nRationale:\nSaturation arithmetic? It is coming!\n\nBug: b/74026074\n\nTest: assember_x86[_64]_test\nChange-Id: I6084161683c5f83ccf632a2ad0280913cec84931\n" }, { "commit": "0d2cab5c15215eb7a7b9af0ce11f176dcbd69559", "tree": "dd4a6564190fe6af52bb968e142deb53a27de6f3", "parents": [ "7a79ebbd7183cc0fda43512a0add884765fd2bf1" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@mips.com", "time": "Tue Mar 06 15:20:45 2018 +0100" }, "committer": { "name": "Lena Djokic", "email": "Lena.Djokic@mips.com", "time": "Wed Mar 07 11:37:28 2018 +0100" }, "message": "MIPS: Use PCNT to implement VisitIntegerBitCount() and VisitLongBitCount()\n\nTest: ./testrunner.py --target --optimizing in QEMU\nTest: mma test-art-host-gtest\nChange-Id: I6ce5bdc86f951094f656c2f81ae8fc836d7a0b5c\n" }, { "commit": "c431b9dc4b23cc950eb313695258df5d89f53b22", "tree": "422273559c3ae52caff0c6b1cf1a62a8312f0e26", "parents": [ "f46f46cf5bd32788d5252b7107628a66594a5e98" ], "author": { "name": "David Sehr", "email": "sehr@google.com", "time": "Fri Mar 02 12:01:51 2018 -0800" }, "committer": { "name": "David Sehr", "email": "sehr@google.com", "time": "Mon Mar 05 13:58:20 2018 -0800" }, "message": "Move most of runtime/base to libartbase/base\n\nEnforce the layering that code in runtime/base should not depend on\nruntime by separating it into libartbase. Some of the code in\nruntime/base depends on the Runtime class, so it cannot be moved yet.\nAlso, some of the tests depend on CommonRuntimeTest, which itself needs\nto be factored (in a subsequent CL).\n\nBug: 22322814\nTest: make -j 50 checkbuild\n make -j 50 test-art-host\n\nChange-Id: I8b096c1e2542f829eb456b4b057c71421b77d7e2\n" }, { "commit": "67bf42e89592c3a1c648f927f2ce3ccb189a1161", "tree": "054d5b7adf7cc62d4d2a2118a70c0fbdd1751610", "parents": [ "d961043ff1dd6fddb68aa90c1f939cfafec24219" ], "author": { "name": "David Sehr", "email": "sehr@google.com", "time": "Mon Feb 26 16:43:04 2018 -0800" }, "committer": { "name": "David Sehr", "email": "sehr@google.com", "time": "Wed Feb 28 15:08:21 2018 -0800" }, "message": "Header library to remove dependence on runtime/\n\nAdd a new header library to remove libdexfile and others\u0027 dependence on\nruntime (typically runtime/base) includes in libdexfile. Also a small step\nto tease dexlayout and profman away from relying on these as well.\n\nBug: 22322814\nTest: make -j 50 checkbuild\n make -j 50 test-art-host-gtest\n\nChange-Id: I38e2fe399a75f4bc6318c77a71954c00ea73ec2b\n" }, { "commit": "29a8d8478ee4a3386b715c2a1086b190c57f0aa4", "tree": "3a6ae60ce31b47723b73e2fb369301a7d88666cd", "parents": [ "522c5ce170796bac858bcfbd84158e621d61d40e" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Feb 13 13:46:15 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Feb 13 14:03:55 2018 +0000" }, "message": "x86/x86-64: Fix cmpw() for 9-16 bit immediates.\n\nTest: assembler_x86_test assembler_x86_64_test\nBug: 71853552\nChange-Id: I0d05a5f461557122fffa89a1ba054886dd70ef12\n" }, { "commit": "279e3a3499d208daf467a1690b111dfb06f3e96e", "tree": "74c7d6d860bea25aabae47dc0ca95bafb0571f8e", "parents": [ "ca6f1c0cb7655e90237583c1b6b771d3c8aae95d" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Wed Jan 24 18:17:55 2018 -0800" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Feb 05 13:38:20 2018 -0800" }, "message": "Enable code item deduping\n\nDedupe code items if they have the same contents, this is safe\nbecause of the fixed quickening logic.\n\nRemoved duplicate code items in ManyMethods that caused the startup\nmethods section to be empty in dex2oat_test.\n\nTo avoid errors related to quickening and compilation of shared code\nitems, quickening is currently disabled for shared code items.\n\nBug: 63756964\nTest: test-art-host\n\nChange-Id: I7c62eb746785d787c5269effd396f7be4859d3a6\n" }, { "commit": "ded559460a2c1059e7f6232bb6c0ff954c9d0cf5", "tree": "c8f7baa791b377b62cba53a1a6c57b13b4605e29", "parents": [ "3d2680b40f2ce2b726c2442d6163100aa1237651" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jan 26 16:33:41 2018 +0000" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Jan 26 16:33:41 2018 +0000" }, "message": "Add addw support to x86 and x64.\n\nTest: assembler_x86_64_test assembler_x86_test\nChange-Id: I2cfb815f15fa3df393bbeb4043ec208b3bdd9081\n" }, { "commit": "4d17987da58d9411adbed1a18203d76d6119612d", "tree": "f2953a0eb3ebc3f8533d22c14f4a09d7f0d4168d", "parents": [ "e57043081e6b091a9fd23a84043373148ae72f1f" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Jan 19 14:50:10 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jan 22 18:35:16 2018 +0000" }, "message": "ART: Add entrypoint and intrinsic for Math.pow().\n\nMathBenchmarks.java#timePow results on taimen\u0027s little cores\nfixed at frequency 1401600 with forced JIT compilation:\n - before:\n - X32: 356.33 (@FastNative), 315.39 (@CriticalNative)\n - X64: 357.31 (@FastNative), 315.37 (@CriticalNative)\n - after (LICM defeats the benchmark):\n - X32: 2.88\n - X64: 2.87\n - after but with kAllSideEffects to prevent LICM:\n - X32: 275.42\n - X64: 275.67\n\nTest: Rely on TreeHugger.\nBug: 70727450\nChange-Id: Iaa31f70acabbd57c163cfeafe02eed67c1348861\n" }, { "commit": "013fd8073f3ece22b0bba1853d3f3430c8a9e4bd", "tree": "d1fb1ce709d4927a8b5f5d7fc673b6932ca4977a", "parents": [ "a7e4a15ba7b40fbe1ecd76ce0d99de90aa42201f" ], "author": { "name": "David Sehr", "email": "sehr@google.com", "time": "Thu Jan 11 22:55:24 2018 -0800" }, "committer": { "name": "David Sehr", "email": "sehr@google.com", "time": "Fri Jan 12 12:47:13 2018 -0800" }, "message": "Create an ART-independent DexFileLoader\n\nOpening DEX files should not rely on instantiating a runtime or having a\nlarge number of dependencies on runtime components. This CL makes\nDexFileLoader a stub class that is independent of ART, and introduces a\nsubclass ArtDexFileLoader that contains the current implementations.\n\nBug: 22322814\nTest: make -j 50 test-art-host\nChange-Id: Ia6e92ae93c347057ea0c10455525239cbbe42c03\n" }, { "commit": "f0a6a1d0536958ebb5bcaef02a0f0cda929b457b", "tree": "5bd80e63136ca017742a3b0fb2ca8a088a2d0cf0", "parents": [ "30f54cc45bd338f9d9079786dae96ea13ab9f163" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jan 08 14:23:56 2018 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jan 08 14:44:51 2018 +0000" }, "message": "ARM: Replace arm::SetCc with vixl32::FlagsUpdate.\n\nAnd delete obsolete test header file.\n\nTest: Rely on TreeHugger.\nChange-Id: I15858b8462198098f21956685a2ad77908b8a186\n" }, { "commit": "30f54cc45bd338f9d9079786dae96ea13ab9f163", "tree": "542b2e8afa185ee3fdeb17fa1637579c110cc2c6", "parents": [ "4cb6347613e37c98bf40d8bb5e6583ac81f4d856", "672b9c1e95beed861a63d4a4c273114387f035a6" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Jan 08 12:37:05 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jan 08 12:37:05 2018 +0000" }, "message": "Merge \"ARM: Fix breaking changes from recent VIXL update.\"" }, { "commit": "9e734c7ab4599d7747a05db0dc73c7b668cb6683", "tree": "dce1d1993734a947fb2e6f626eb1b425cb72143b", "parents": [ "b496af808eaf3af5ebac50aef4fbec33323b5016" ], "author": { "name": "David Sehr", "email": "sehr@google.com", "time": "Thu Jan 04 17:56:19 2018 -0800" }, "committer": { "name": "David Sehr", "email": "sehr@google.com", "time": "Fri Jan 05 11:07:19 2018 -0800" }, "message": "Create dex subdirectory\n\nMove all the DexFile related source to a common subdirectory dex/ of\nruntime.\n\nBug: 71361973\nTest: make -j 50 test-art-host\nChange-Id: I59e984ed660b93e0776556308be3d653722f5223\n" }, { "commit": "4abc0012a4d9dfe1074b904462b96bc9c71b5f3a", "tree": "ddc9aa77d480d4c7e346036612c78d3509dc625a", "parents": [ "3165bb09dc04b61abd04bf8e263dd85d610694e4", "a556e6ba500ba54d1ca90d6a947dd962d9c287c7" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Jan 04 14:01:34 2018 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Jan 04 14:01:34 2018 +0000" }, "message": "Merge \"MIPS: InstructionCodeGeneratorMIPS*::DivRemByPowerOfTwo()\"" }, { "commit": "a556e6ba500ba54d1ca90d6a947dd962d9c287c7", "tree": "f9e747c6218ca741c7b0783a9d10dedf22dd36b3", "parents": [ "b0ddceb337f614dc2600d19b82fb4a6596aa7d4c" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@mips.com", "time": "Wed Dec 13 12:09:42 2017 +0100" }, "committer": { "name": "Lena Djokic", "email": "Lena.Djokic@mips.com", "time": "Wed Jan 03 17:40:01 2018 +0100" }, "message": "MIPS: InstructionCodeGeneratorMIPS*::DivRemByPowerOfTwo()\n\nReplace [d]sll+[d]srl with [d]ins on R2+.\n\nChange-Id: I7587e46c47c8ce413d81a5c6c29d91e32a14d855\n" }, { "commit": "4557b3858a66aa20e42bce937e1f0620aad880a2", "tree": "8f34d8f014b11f17c6351bb955fcc74c940b8d16", "parents": [ "90f20973356900e340998e8e2b34230e5c4c8fb0" ], "author": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Wed Jan 03 11:47:54 2018 +0000" }, "committer": { "name": "Orion Hodson", "email": "oth@google.com", "time": "Wed Jan 03 12:45:40 2018 +0000" }, "message": "ART: Rename Atomic::CompareExchange methods\n\nRenames Atomic::CompareExchange methods to Atomic::CompareAndSet\nequivalents. These methods return a boolean and do not get the witness\nvalue. This makes space for Atomic::CompareAndExchange methods in a\nlater commit that will return a boolean and get the witness value.\n\nThis is pre-work for VarHandle accessors which require both forms.\n\nBug: 65872996\nTest: art/test.py --host -j32\nChange-Id: I9c691250e5556cbfde7811381b06d2920247f1a1\n" }, { "commit": "672b9c1e95beed861a63d4a4c273114387f035a6", "tree": "4bee8c0fe1794213fdd5502ad57dcb1ebfeaae7a", "parents": [ "a43a89470597a1d34a403add4f82cfc155e7bc33" ], "author": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Tue Dec 05 18:04:07 2017 +0000" }, "committer": { "name": "Artem Serov", "email": "artem.serov@linaro.org", "time": "Mon Dec 18 13:48:42 2017 +0000" }, "message": "ARM: Fix breaking changes from recent VIXL update.\n\nTest: test-art-target, test-art-host\n\nChange-Id: I31de1e2075226542b9919f6ca054fd5bf237e690\n" }, { "commit": "57943810cfc789da890d73621741729da5feaaf8", "tree": "367677a982a45af98ffe3e79543615875e8550b4", "parents": [ "d5153627778e71ef68b510ce03c77467fa4d85bd" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Dec 06 21:39:13 2017 -0800" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Dec 07 16:26:11 2017 -0800" }, "message": "ART: Replace base/logging with android-base/logging\n\nReplace wherever possible. ART\u0027s base/logging is now mainly VLOG\nand initialization code that is unnecessary to pull in and makes\nchanges to verbose logging more painful than they have to be.\n\nTest: m test-art-host\nChange-Id: I3e3a4672ba5b621e57590a526c7d1c8b749e4f6e\n" }, { "commit": "71d26020570127ea584ca39df64d1506c0982387", "tree": "69ef5b02c51d85fe093f5aee93a636cbce17dfe8", "parents": [ "f4e284fa81141f8c125981ae5d169affd1181fcb", "a247dea6612156deaf17e4ab099e8ba2b2d30536" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon Dec 04 23:01:32 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Dec 04 23:01:32 2017 +0000" }, "message": "Merge \"MIPS32: Fix and refactor in/out reg mask code\"" }, { "commit": "a247dea6612156deaf17e4ab099e8ba2b2d30536", "tree": "8fb57db9dafd8bbac0b04d8971bf3545c4c839e6", "parents": [ "01354124bcc2d4d4707429cccf241e858f7fcf40" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@mips.com", "time": "Fri Nov 03 18:43:04 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@mips.com", "time": "Mon Dec 04 10:56:02 2017 -0800" }, "message": "MIPS32: Fix and refactor in/out reg mask code\n\nThis is mostly for clarity and future work.\n\nThis fixes the following:\n- aui has an out reg, not an in/out reg\n- maddv.df, msubv.df, fmadd.df, fmsub.df have an\n in/out reg, not a simply out reg\n\nThis also ensures consistent marking of even-numbered 32-bit\nFPRs used by FPR load and store instructions (odd-numbered\n32-bit FPRs remain unmarked as if there are no paired FPRs;\nwe don\u0027t use odd-numbered 32-bit FPRs to hold single-precision\nvalues).\n\nTest: test-art-host-gtest\nTest: booted MIPS32R2 in QEMU\nTest: booted MIPS64R6 in QEMU\nTest: testrunner.py --target --optimizing --32\n (on CI20 and MIPS32R6)\nTest: test-art-target-gtest32\n (on CI20 and MIPS32R6)\n\nChange-Id: I408b8ac063c9b1cc6f036dda095d1e3e1e2e1ef1\n" }, { "commit": "5573c37e795668eca81a8488078f798d977685c3", "tree": "5e7675d6c1ca9ed1c31834e52282bfb9f73dc2a4", "parents": [ "1598a77ca3559c8a59902f26ee887504b8159859" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Thu Nov 16 13:34:30 2017 -0800" }, "committer": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Thu Nov 16 14:42:49 2017 -0800" }, "message": "cpplint: Remove many unnecessary NOLINT\n\nNow that we updated to upstream cpplint, a lot of these NOLINTs are no\nlonger necessary.\n\nBug: 68951293\nChange-Id: If8ed5ffe89727f313f907a214b6d8fd2a2eddbad\n" }, { "commit": "2ffb703bf431d74326c88266b4ddaf225eb3c6ad", "tree": "0552c3c76a42b18f9e7460d501fb71a6dc2e7f33", "parents": [ "c4b6f3116f15c8e4fdf2e4f604ababdee12d8923" ], "author": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Wed Nov 08 13:35:21 2017 -0800" }, "committer": { "name": "Igor Murashkin", "email": "iam@google.com", "time": "Wed Nov 08 15:15:52 2017 -0800" }, "message": "cpplint: Cleanup errors\n\nCleanup errors from upstream cpplint in preparation\nfor moving art\u0027s cpplint fork to upstream tip-of-tree cpplint.\n\nTest: cd art \u0026\u0026 mm\nBug: 68951293\nChange-Id: I15faed4594cbcb8399850f8bdee39d42c0c5b956\n" }, { "commit": "72aba71d00dd0c420a6ff196066e9378339d46d8", "tree": "ebe2840351820f536b11f1c0f4628205cd6c1251", "parents": [ "3b7ce4ecc6994ea73022c1c4d2df7a3f4fc7471c" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@mips.com", "time": "Mon Oct 30 15:47:20 2017 +0100" }, "committer": { "name": "Lena Djokic", "email": "Lena.Djokic@mips.com", "time": "Wed Nov 08 10:12:18 2017 +0100" }, "message": "MIPS: Add asub_s/u.df\n\nThese instructions are needed for implementing Sum-of-Abs-Differences\nvisitor.\n\nTest: mma test-art-host-gtest\nChange-Id: Ie708f30a450b0558215f59f21bb49b68c852f247\n" }, { "commit": "33bff25bcd7a02d35c54f63740eadb1a4833fc92", "tree": "553db4f60878acf2a0fa7036a739d406df9a29b7", "parents": [ "321b3ca9a36d769283c64d4bdee0798db80af524" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Nov 01 14:35:42 2017 +0000" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Nov 02 10:11:02 2017 +0000" }, "message": "ART: Make InstructionSet an enum class and add kLast.\n\nAdding InstructionSet::kLast shall make it easier to encode\nthe InstructionSet in fewer bits using BitField\u003c\u003e. However,\nintroducing `kLast` into the `art` namespace is not a good\nidea, so we change the InstructionSet to an enum class.\nThis also uncovered a case of InstructionSet::kNone being\nerroneously used instead of vixl32::Condition::None(), so\nit\u0027s good to remove `kNone` from the `art` namespace.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host --optimizing\nChange-Id: I6fa6168dfba4ed6da86d021a69c80224f09997a6\n" }, { "commit": "715f43e1553330bc804cea2951be195473dc343d", "tree": "55e143005efe10e8448c91eff6b88a635af2a3f6", "parents": [ "9e842d3e7d6102d964178e36e5d596ca91895147" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Mon Oct 23 11:00:32 2017 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Mon Oct 23 11:00:32 2017 -0700" }, "message": "MIPS32: Improve stack alignment, use sdc1/ldc1, where possible.\n\n- Ensure that SP is a multiple of 16 at all times, and\n- Use ldc1/sdc1 to load/store FPU registers from/to 8-byte-aligned\n locations wherever possible.\n\nUse `export ART_MIPS32_CHECK_ALIGNMENT\u003dtrue` when building Android\nto enable the new runtime alignment checks.\n\nTest: Boot \u0026 run tests on 32-bit version of QEMU, and CI-20.\nTest: test/testrunner/testrunner.py --target --optimizing --32\nTest: test-art-host-gtest\nTest: test-art-target-gtest\n\nChange-Id: Ia667004573f419fd006098fcfadf5834239cb485\n" }, { "commit": "3309c01e55821f693e3b9cec0ef24969edf2528f", "tree": "cacb4a3775166297b1c9bb9e6236ab901ad725d4", "parents": [ "24276374dcaf95bfc52be2b8193eb4e337de62e4" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Fri Oct 13 14:34:32 2017 +0200" }, "committer": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Thu Oct 19 11:24:55 2017 +0200" }, "message": "MIPS: Introduce a few MSA instructions\n\nThese instructions are needed for SIMD reduction.\nAlso added assembler tests for each instruction.\n\nTest: mma test-art-host-gtest\n\nChange-Id: I0f02618a14b4cbcc3b81ce51dd2586fa4cdbfd18\n" }, { "commit": "3b8c82f4864624da8a1efd09f02bfec754413a20", "tree": "175a5835f4f62f539b5ae457a9e62ec3dcb91d13", "parents": [ "26d46e51a8c387d26e7971857e26f4582b936204" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Oct 10 23:01:34 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Mon Oct 16 17:06:21 2017 -0700" }, "message": "MIPS32R2: Enable table-based switch in presence of irreducible loops\n\nTest: test-art-host-gtest\nTest: booted MIPS32R2 in QEMU\nTest: testrunner.py --target --optimizing --32\nTest: repeat all of the above with suppressed generation\n of HMipsPackedSwitch\n\nChange-Id: Ic8a27d88cd2d7eebaf5826ce8fd1a5607a024844\n" }, { "commit": "292567ee71a20bfc59513c6af290495e4b92b2cb", "tree": "6f2fb5ed3caec12b2193b179864dcd87578d2f52", "parents": [ "b95f45e67a3e4a14aab63b19f101547658d7514b" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Thu Oct 12 13:24:38 2017 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Thu Oct 12 13:48:31 2017 -0700" }, "message": "Rename NativeDexFile -\u003e StandardDexFile\n\nMotivation: The new name is cleaner.\n\nBug: 63756964\nTest: test-art-host\nChange-Id: I0e52015dbd929fe247305070cef03d86bcdeb54b\n" }, { "commit": "0284f43d625f0776ee0586a7cc321e11f5405e8c", "tree": "983c86ff79f2a5a089bfa44ec27a5f2c5d6206b6", "parents": [ "128acd4b5b34cdd51328de03df085deaa040b864", "52d52f5dc3e005829926e68c656fb27e8b008ae9" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 12 09:05:08 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Oct 12 09:05:08 2017 +0000" }, "message": "Merge changes I4bbb21bf,Ie79b46cd,Ia50aafc8\n\n* changes:\n Use ScopedArenaAllocator in GVN.\n Use ScopedArenaAllocator for Phi elimination pass.\n Use ScopedArenaAllocator for building HGraph.\n" }, { "commit": "79c87da9d4698ec58ece65af0065eebd55a1cfe0", "tree": "399797f37712da9d20829d5b5059b6c84943cb02", "parents": [ "656e97f949df4081fba908113406b32915174502" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Tue Oct 10 11:54:29 2017 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Wed Oct 11 14:47:06 2017 -0700" }, "message": "Add DexFileLoader class\n\nAdded DexFileLoader class, moved functionality from DexFile there:\n- Multidex loading logic\n- DexFile opening logic for Zip and etc\n- Some other helpers\n\nBug: 63756964\nTest: test-art-host\n\nChange-Id: Ic3dfa458947d4b69912dea5cdd836e7e8f55061c\n" }, { "commit": "7b074bf1ce559541d0c19ef793d9702a415ff74d", "tree": "acaf022c330649de7a1a4b372308132f44091c70", "parents": [ "432d91004b79c79deebeee6f6197e43adf6caafd" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Sep 25 16:22:36 2017 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Wed Oct 11 11:30:11 2017 -0700" }, "message": "Add a shared interface for different types of dex files\n\nRepurposed DexFile to be the shared API. Will be used for abstracting\naccesses to original dex files and CompactDex files.\n\nAs implementation diverges, functionality will be moved from DexFile\naccordingly.\n\nWill consider renaming DexFile -\u003e IDexFile in a follow up CL.\n\nBug: 63756964\nTest: test-art-host\n\nChange-Id: Iad2508c2b9a7b6e0669fca5f7d10299a9b1541a2\n" }, { "commit": "69d310e0317e2fce97bf8c9c133c5c2c0332e61d", "tree": "fba05a1530e6fc4a2e6950303c1f7c6b0ffbb936", "parents": [ "e764d2e50c544c2cb98ee61a15d613161ac6bd17" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 09 14:12:23 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Wed Oct 11 09:44:26 2017 +0100" }, "message": "Use ScopedArenaAllocator for building HGraph.\n\nMemory needed to compile the two most expensive methods for\naosp_angler-userdebug boot image:\n BatteryStats.dumpCheckinLocked() : 21.1MiB -\u003e 20.2MiB\n BatteryStats.dumpLocked(): 42.0MiB -\u003e 40.3MiB\nThis is because all the memory previously used by the graph\nbuilder is reused by later passes.\n\nAnd finish the \"arena\"-\u003e\"allocator\" renaming; make renamed\nallocator pointers that are members of classes const when\nappropriate (and make a few more members around them const).\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nBug: 64312607\nChange-Id: Ia50aafc80c05941ae5b96984ba4f31ed4c78255e\n" }, { "commit": "0967cd94860178a5809a9678d005b18c20c24707", "tree": "f9e0c97fc7efbdbd8236b1f280227f1c9457d089", "parents": [ "464f8cd7385a9958c3171e2feaa93c726043bbf8", "e764d2e50c544c2cb98ee61a15d613161ac6bd17" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 09 12:58:04 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 09 12:58:04 2017 +0000" }, "message": "Merge \"Use ScopedArenaAllocator for register allocation.\"" }, { "commit": "464f8cd7385a9958c3171e2feaa93c726043bbf8", "tree": "3ad72d1411c91c68361a1179581decc0e4d96f03", "parents": [ "e4c00b3af3ccf460e4b0332a04dc9eaeffee5c7a", "ca6fff898afcb62491458ae8bcd428bfb3043da1" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Mon Oct 09 10:24:27 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Oct 09 10:24:27 2017 +0000" }, "message": "Merge \"ART: Use ScopedArenaAllocator for pass-local data.\"" }, { "commit": "e764d2e50c544c2cb98ee61a15d613161ac6bd17", "tree": "112aa7ca459d2edb4f800897060a2407fcc622c7", "parents": [ "ca6fff898afcb62491458ae8bcd428bfb3043da1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Thu Oct 05 14:35:55 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Oct 09 10:39:22 2017 +0100" }, "message": "Use ScopedArenaAllocator for register allocation.\n\nMemory needed to compile the two most expensive methods for\naosp_angler-userdebug boot image:\n BatteryStats.dumpCheckinLocked() : 25.1MiB -\u003e 21.1MiB\n BatteryStats.dumpLocked(): 49.6MiB -\u003e 42.0MiB\nThis is because all the memory previously used by Scheduler\nis reused by the register allocator; the register allocator\nhas a higher peak usage of the ArenaStack.\n\nAnd continue the \"arena\"-\u003e\"allocator\" renaming.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nBug: 64312607\nChange-Id: Idfd79a9901552b5147ec0bf591cb38120de86b01\n" }, { "commit": "ca6fff898afcb62491458ae8bcd428bfb3043da1", "tree": "195a6b16d3a4b34acc2faf91ce56f448efb15e07", "parents": [ "aa7273e56fbafc2692c8d20a31b50d2f4bdd2aa1" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Oct 03 14:49:14 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Fri Oct 06 17:53:50 2017 +0100" }, "message": "ART: Use ScopedArenaAllocator for pass-local data.\n\nPasses using local ArenaAllocator were hiding their memory\nusage from the allocation counting, making it difficult to\ntrack down where memory was used. Using ScopedArenaAllocator\nreveals the memory usage.\n\nThis changes the HGraph constructor which requires a lot of\nchanges in tests. Refactor these tests to limit the amount\nof work needed the next time we change that constructor.\n\nTest: m test-art-host-gtest\nTest: testrunner.py --host\nTest: Build with kArenaAllocatorCountAllocations \u003d true.\nBug: 64312607\nChange-Id: I34939e4086b500d6e827ff3ef2211d1a421ac91a\n" }, { "commit": "a820ff736a2907b6e7421ca2a26e6d7af9a7c84d", "tree": "c350e7bcddf36f2aef9cdba26b4de028a2ce829f", "parents": [ "aa7273e56fbafc2692c8d20a31b50d2f4bdd2aa1" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Oct 05 19:18:25 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Oct 06 16:38:01 2017 +0100" }, "message": "Instrument code generated by JNI compiler to check the Marking Register.\n\nGenerate run-time code in the JNI compiler checking that the\nMarking Register\u0027s value matches `self.tls32_.is_gc_marking` in\ndebug mode (on target; and on host with AOT when compiling the\ncore image). If a check fails, abort.\n\nTest: m test-art-target\nTest: m test-art-target with tree built with ART_USE_READ_BARRIER\u003dfalse\nTest: ARM64 device boot test\nTest: ARM64 device boot test with libartd.\nBug: 37707231\nChange-Id: I6494b5f34a1b43d7b0102c52fd8e4a7c9f32b34f\n" }, { "commit": "0d127e10de0b06ec22d8e855d1d62773c4ede101", "tree": "9ae3f93e78303272785b8321279226c1009854b0", "parents": [ "9c0a6ce0a41eaf78f3fc3224fc34195601b6e0b3" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Jul 05 17:01:11 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Wed Oct 04 19:49:51 2017 +0100" }, "message": "Do not refresh the Marking Register in CriticalNative methods.\n\nCriticalNative methods shall not be suspended and hence do not\nrequire MR to be refreshed in compiled JNI code.\n\nThis change is for ARM and ARM64 only.\n\nImpact on Critical Native benchmarks times (median of 10 runs,\nlower is better):\n\n* angler-userdebug - ARMv7\n\n** All cores\n\n NativeDowncallStaticCritical -2.78%\n NativeDowncallStaticCritical6 -1.79%\n\n** Little cores only\n\n NativeDowncallStaticCritical -1.66%\n NativeDowncallStaticCritical6 -1.27%\n\n** Big cores only\n\n NativeDowncallStaticCritical -2.66%\n NativeDowncallStaticCritical6 -1.70%\n\n* angler-userdebug - ARMv8\n\n** All cores\n\n NativeDowncallStaticCritical -3.52%\n NativeDowncallStaticCritical6 -1.79%\n\n** Little cores only\n\n NativeDowncallStaticCritical -1.63%\n NativeDowncallStaticCritical6 -1.27%\n\n** Big cores only\n\n NativeDowncallStaticCritical -3.87%\n NativeDowncallStaticCritical6 -1.75%\n\nTest: m test-art-target\nTest: m test-art-target with tree built with ART_USE_READ_BARRIER\u003dfalse\nTest: m test-art-host-gtest\nTest: ARM64 device boot test\nTest: ARM device boot test\nBug: b/37707231\nChange-Id: I95d61b9ecde0afffdd5fd44763b19caa06025ec8\n" }, { "commit": "956dac258797a22ebe970be424cbf77a471a4d54", "tree": "1af918328817eb0e72b638bbef684edd7eab9428", "parents": [ "2a7b84ba85caa95f6bdb9ad5be3f93b2c742d366" ], "author": { "name": "Rahul Chaudhry", "email": "rahulchaudhry@google.com", "time": "Wed Sep 27 16:33:40 2017 -0700" }, "committer": { "name": "Rahul Chaudhry", "email": "rahulchaudhry@google.com", "time": "Wed Sep 27 16:33:40 2017 -0700" }, "message": "assembler_thumb_test: use \u0027objdump -D -M force-thumb\u0027 to disassemble.\n\nNewer version of objcopy cannot strip \u0027$d\u0027 from an object file, as it is\nimplicitly marked as \u0027precious\u0027. This is intentional, introduced in the\nupstream binutils repository by this commit:\n- https://sourceware.org/git/?p\u003dbinutils-gdb.git;a\u003dcommit;h\u003dfca2a38fdb391f810e309a12d5279047d4edac34\n\nSince stripping of \u0027$d\u0027 was being done only so we can disassemble\nthe object file with \u0027objdump -d\u0027, switch to using \u0027objdump -D -M\nforce-thumb\u0027 to force disassembly as thumb instructions.\n\nBug: None\nTest: m test-art-host-gtest-assembler_thumb_test\nChange-Id: I815f9f3a7949bdc49d872c9b726c87b3199b66ca\n" }, { "commit": "f7754e861f0dec2d4772d61102fa93252258f672", "tree": "fdd1a2b81468a8310eae93c070b0ad2a6e290767", "parents": [ "b407afe983f8b106a5007d07aa2523ffc6525018" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Sep 20 10:33:06 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Sep 20 10:35:21 2017 -0700" }, "message": "Add more repeat support and register views.\n\nRationale:\nThis enables exhaustive testing of instructions\nthat use various memory addressing modes and\nregister views (full, half, quarter, etc.).\n\nBug: 18380245\nBug: 18380559\nBug: 18380348\n\nTest: assembler_x86[_64]_test\nChange-Id: I598c3e35a4791166ab629479ccb969ef3c6494b8\n" }, { "commit": "09659c22dc2f2c85a0ade965d1fc5160944b8692", "tree": "66fd5729395d27569c4d9d255a5ce9b44cb000bf", "parents": [ "4d159807a4854caa6396b708a38bbd6fa49d736f" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Sep 18 18:23:32 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Sep 19 10:26:51 2017 -0700" }, "message": "ART: Remove heap poisoning from globals.h\n\nRemove mostly-unused include and move it to its users.\n\nTest: m\nChange-Id: Ibb40f919db64a490290c6e18cf1123aaf44199fc\n" }, { "commit": "fc8b422c286501346b5b797420fb616aaa5e952a", "tree": "61c857a895cdad9ce387a899f92824701259df32", "parents": [ "7090dfe84f78b1928fcbdfd664d0dd9ea52633ff" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Sun Sep 17 13:44:24 2017 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Sep 18 10:57:06 2017 -0700" }, "message": "Clean up AtomicDexRefMap\n\nMake ClassReference, TypeReference, and MethodReference extend\nDexFileReference. This enables using all of these types as the key\nfor AtomicDexRefMap.\n\nTest: test-art-host\nBug: 63851220\nBug: 63756964\n\nChange-Id: Ida3c94cadb53272cb5057e5cebc5971c1ab4d366\n" }, { "commit": "fe712a8b9c247d66df013f2b4b6faa6009d745bb", "tree": "45897680a8f1897b6d33c3bccfad859bb6d9abe0", "parents": [ "3597f51c4af8d5e32c21789ea7b7cd75dc078120", "486dda03900a215650f71a9068759978aa77c699" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 18 08:28:15 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Sep 18 08:28:15 2017 +0000" }, "message": "Merge \"Add support for registering classpath classes status.\"" }, { "commit": "caa31e732bc9bb0007c39c504b109a4867ee5dd9", "tree": "1ed4201e4b76f52b2354c0186c58c693093dacdc", "parents": [ "5809417697955005751d60498964f6d4bd4a096f" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Thu Sep 14 17:08:50 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Sep 15 11:05:56 2017 -0700" }, "message": "Add repeat support for memory addresses.\n\nRationale:\nThis enables exhaustive testing of instructions\nthat use memory addresses. First use case of\nthe generics is x86.\n\nBug: 18380245\nBug: 18380559\nBug: 18380348\n\nTest: assembler_x86[_64]_test\n\nChange-Id: Ib0ad6fa65477b0c6fc04642ff980a4b9543d16d5\n" }, { "commit": "486dda03900a215650f71a9068759978aa77c699", "tree": "1f2a1331d3ec474c979db5f9a35dd11f453abc25", "parents": [ "b072ec25f8a71420ee77b068a28a2669420f6150" ], "author": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Mon Sep 11 14:15:52 2017 +0100" }, "committer": { "name": "Nicolas Geoffray", "email": "ngeoffray@google.com", "time": "Fri Sep 15 12:45:28 2017 +0100" }, "message": "Add support for registering classpath classes status.\n\nBy doing class unloading after each dex file compilation, we are loosing\naway verification done on classpath classes.\n\nThis change introduces a new table for keeping around class status of\nclasspath classes.\n\nMultidex quickening compilation improved by ~5% by not re-verifying classpath\nclasses.\n\nBug: 63467744\n\ntest: test.py\ntest: golem successfully compiles FB\nChange-Id: I629c0a7d86519bbc516f5e59f7cd92ca6ca842eb\n" }, { "commit": "5dafb3c796b16718ff0599ea46277f291aee190d", "tree": "18f82de4ebfc982db30796607ec4949bbd5a663b", "parents": [ "6b411fc9fd94da3c552d8b96cee14f6414e7b734" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Sep 13 13:10:12 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Wed Sep 13 14:12:18 2017 -0700" }, "message": "Test assembler driver utilities.\n\nRationale:\nQuis custodiet ipsos custodes?\n\nTherefore, it is good to make sure that the drivers\nused to test the assembler are doing what is expected.\nThis also prepares some upcoming improvements wrt.\naddressing modes and different register sizes.\n\nBug: 18380245\nBug: 18380559\nBug: 18380245\n\nTest: assembler_x86[_64]_test\n\nChange-Id: Iadc269c14cb9e15941ec66c362d59d42e9017001\n" }, { "commit": "8859cec306080a078f67fbe4511b9ca20edf736e", "tree": "aa4aabd37496ff984f6bc60cf82c3b4d16c442fb", "parents": [ "9af08e64d061f12d486b88c2545d8ddde9d08bf0" ], "author": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Wed Aug 30 16:40:02 2017 -0700" }, "committer": { "name": "Chris Larsen", "email": "chris.larsen@imgtec.com", "time": "Thu Sep 07 14:34:24 2017 -0700" }, "message": "MIPS64: Ease test for using \"Lui + Dinsu\" to load 64-bit constants.\n\nTest was unnecessarily flagging some negative \"Low32Bits(value)\"\nvalues as requiring 3 instructions to load the 64-bit constant\n\"value\" when those values really only require 2 instructions. This\nprevents minimizing the corresponding instruction sequence created\nby LoadConst64().\n\nTest: mma test-art-host-gtest\n\nChange-Id: Ib1490000ca15f5e0a23ad3e57d8ede90fd0d8f53\n" }, { "commit": "ae53f10531e559fbbdbe390316b092c6a9c5df39", "tree": "14abcc3ef1b8232c662a095736707765b2359ad5", "parents": [ "b28118c74a61b8d1ff9432e753f1f11a72ce049c", "a663d9d5b32a525794a2b98fa43da54dd7c79e3b" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Sat Aug 19 11:52:43 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Sat Aug 19 11:52:43 2017 +0000" }, "message": "Merge \"MIPS32: Allow some patched instructions in delay slots\"" }, { "commit": "a663d9d5b32a525794a2b98fa43da54dd7c79e3b", "tree": "88c643ca5ebfb0dfe11f45a9b232f9a2592fb043", "parents": [ "b9463674919ba91fe131e65785ad67b4202e86b9" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Mon Jul 31 18:43:18 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Fri Aug 18 15:29:31 2017 -0700" }, "message": "MIPS32: Allow some patched instructions in delay slots\n\nTest: test-art-host-gtest\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-gtest32\nTest: testrunner.py --target --optimizing --32\nTest: same tests as above on CI20\nTest: booted MIPS32R2 in QEMU\n\nChange-Id: I7e1ba59993008014d0115ae20c56e0a71fef0fb0\n" }, { "commit": "5011149cbb1dddf7161ef294b8ed265862ae6d91", "tree": "e420ba6336d69308e73ead7ff7984d4c08e7bcf8", "parents": [ "65ee0f086581a8fbaa18473e8bac7ff9372cff0a", "2dec927e60395210946e5b9dbaa03111dad2466a" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Aug 18 11:59:14 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Aug 18 11:59:14 2017 +0000" }, "message": "Merge \"MIPS64: Implement HSelect\"" }, { "commit": "f708c9a39240716eb3df024ec67bbcb9b3883f61", "tree": "00d78ed6994c79e08c829416fe0ea03dc145b6f0", "parents": [ "2ade881db8642f10007c1c46b5e7f073d463c2d3", "0cab65610a6a984a94ef4c3f232fe0273e78d95b" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Thu Aug 17 14:40:46 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Thu Aug 17 14:40:46 2017 +0000" }, "message": "Merge \"MIPS: Eliminate hard-coded offsets in branches\"" }, { "commit": "1f219fcd311f8c3fece9bbea57e608048fec1e8d", "tree": "706bb0607b636015207b6c39f99ca7027b84e5da", "parents": [ "72fe7ea30afb03307c05f473cb8e1dc1da21a4da", "3332db8345de39eb5067d99987fcae140184672b" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Aug 14 14:19:24 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Aug 14 14:19:24 2017 +0000" }, "message": "Merge \"Bunch of SIMD for x86 and x86_64\"" }, { "commit": "3332db8345de39eb5067d99987fcae140184672b", "tree": "411e0be297cb288b18511bef5f4cb11c52fde546", "parents": [ "73de4a8f0936bfb8b74db0465f277a2b68d16905" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Aug 11 15:10:30 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Aug 11 15:10:30 2017 -0700" }, "message": "Bunch of SIMD for x86 and x86_64\n\nRationale:\nFew instructions needed to implement SIMD reductions.\n\nTest: assembler_x86_[64_]test\nBug: 64091002\nChange-Id: I785acfc6c8c4ad4f290ddeab32da9b767f944e24\n" }, { "commit": "5daa4950038a4329ac745059f1ad0927d4a60166", "tree": "48fdf4d85953e931bd455ede290e769979e3906c", "parents": [ "2b03a1f24600c8c9558fb13d3f8bca1ef0f8ee40" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Mon Jul 03 17:23:56 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Aug 11 11:44:50 2017 +0100" }, "message": "Instrument ARM generated code to check the Marking Register.\n\nGenerate run-time code in the Optimizing compiler checking that\nthe Marking Register\u0027s value matches `self.tls32_.is.gc_marking`\nin debug mode (on target; and on host with JIT, or with AOT when\ncompiling the core image). If a check fails, abort.\n\nTest: m test-art-target\nTest: m test-art-target with tree built with ART_USE_READ_BARRIER\u003dfalse\nTest: ARM device/emulator boot test with libartd\nBug: 37707231\nChange-Id: I903f44d385d66ff74d65aa09d7113aa9cb7b9f24\n" }, { "commit": "2b03a1f24600c8c9558fb13d3f8bca1ef0f8ee40", "tree": "4d5fb728acd7f98f8949c84364375a804ff0ba63", "parents": [ "461ec567f16039374dff35e2f3b808986c100249" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jun 06 16:09:59 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Aug 10 18:17:47 2017 +0100" }, "message": "Instrument ARM64 generated code to check the Marking Register.\n\nGenerate run-time code in the Optimizing compiler checking that\nthe Marking Register\u0027s value matches `self.tls32_.is.gc_marking`\nin debug mode (on target; and on host with JIT, or with AOT when\ncompiling the core image). If a check fails, abort.\n\nTest: m test-art-target\nTest: m test-art-target with tree built with ART_USE_READ_BARRIER\u003dfalse\nTest: ARM64 device boot test with libartd.\nBug: 37707231\nChange-Id: Ie9b322b22b3d26654a06821e1db71dbda3c43061\n" }, { "commit": "2dec927e60395210946e5b9dbaa03111dad2466a", "tree": "2c983497c7dc23c02f08f6c302ee99a2cb992a9b", "parents": [ "4a9ab7d61f3933cbe26f01d7dc5bda1e65dcd567" ], "author": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Wed Aug 02 11:41:26 2017 +0200" }, "committer": { "name": "Goran Jakovljevic", "email": "Goran.Jakovljevic@imgtec.com", "time": "Thu Aug 03 07:34:07 2017 +0200" }, "message": "MIPS64: Implement HSelect\n\nTest: mma test-art-host-gtest\nTest: mma test-art-target-gtest in QEMU (MIPS64R6)\nTest: ./testrunner.py --target --optimizing in QEMU (MIPS64R6)\n\nChange-Id: I633fc479e0ca61b7d49b4c36fbe5db9a94da535d\n" }, { "commit": "0cab65610a6a984a94ef4c3f232fe0273e78d95b", "tree": "669fa607f4cd9ad8eef9223bb124fb72265a06b3", "parents": [ "2e53f8f69f8c4175085e337445ec42aa045a2f7f" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Tue Jul 25 15:19:36 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sun Jul 30 20:09:26 2017 -0700" }, "message": "MIPS: Eliminate hard-coded offsets in branches\n\nThe bulk of the change is in the assemblers and their\ntests.\n\nThe main goal is to introduce \"bare\" branches to labels\n(as opposed to the existing bare branches with relative\noffsets, whose direct use we want to eliminate).\nThese branches\u0027 delay/forbidden slots are filled\nmanually and these branches do not promote to long (the\nbranch target must be within reach of the individual\nbranch instruction).\n\nThe secondary goal is to add more branch tests (mainly\nfor bare vs non-bare branches and a few extra) and\nrefactor and reorganize the branch test code a bit.\n\nThe third goal is to improve idiom recognition in the\ndisassembler, including branch idioms and a few others.\n\nFurther details:\n- introduce bare branches (R2 and R6) to labels, making\n R2 branches available for use on R6\n- make use of the above in the code generators\n- align beqz/bnez with their GNU assembler encoding to\n simplify and shorten the test code\n- update the CFI test because of the above\n- add trivial tests for bare and non-bare branches\n (addressing existing debt as well)\n- add MIPS32R6 tests for long beqc/beqzc/bc (debt)\n- add MIPS64R6 long beqzc test (debt)\n- group branch tests together\n- group constant/literal/address-loading tests together\n- make the disassembler recognize:\n - b/beqz/bnez (beq/bne with $zero reg)\n - nal (bltzal with $zero reg)\n - bal/bgezal (bal \u003d bgezal with $zero reg)\n - move (or with $zero reg)\n - li (ori/addiu with $zero reg)\n - dli (daddiu with $zero reg)\n- disassemble 16-bit immediate operands (in andi, ori,\n xori, li, dli) as signed or unsigned as appropriate\n- drop unused instructions (bltzl, bltzall, addi) from\n the disassembler as there are no plans to use them\n\nTest: test-art-host-gtest\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-gtest\nTest: testrunner.py --target --optimizing\nTest: same tests as above on CI20\nTest: booted MIPS32R2 in QEMU\n\nChange-Id: I62b74a6c00ce0651528114806ba24a59ba564a73\n" }, { "commit": "b3d79e430a4c0a447121890514cdee48e4675df4", "tree": "ebc0f5fc16d5caf009f59550407abadbc40415ff", "parents": [ "03ce1df8f9b1b8d207fc685fd084b96697a50182" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Tue Jul 25 11:20:52 2017 +0200" }, "committer": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Tue Jul 25 14:27:30 2017 +0200" }, "message": "MIPS: Add maddv/msubv MSA instructions\n\nAdded maddv.df, msubv.df, fmadd.df and fmsub.df MSA instructions\nin assembler, disassembler and tests.\n\nThese instructions are needed for multiplyaccumulate support in\nART Vectorizer.\n\nTest: mma test-art-host-gtest\n\nChange-Id: Idef7faaeed47f1fef83fa58676ce664afe24ffe8\n" }, { "commit": "acae6dbe80d07a26a973587b6f838198e13e66c3", "tree": "d97499be4cad9a785304fac065be8dab4b0fa2b0", "parents": [ "e88c2d244c4d6359f731f6fab0d09aec218a1a46", "6005a87fa5524bd44c36f4dd6adca92e2d4bc9b1" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Tue Jul 25 02:11:20 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jul 25 02:11:20 2017 +0000" }, "message": "Merge \"Added a few idiomatic x86 SSE instructions.\"" }, { "commit": "6005a87fa5524bd44c36f4dd6adca92e2d4bc9b1", "tree": "48a809ead7eed14899ffc1845e656df9bde92b41", "parents": [ "194cf5f7db9762c17a0f2c91308cb060db08f571" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Jul 24 13:33:39 2017 -0700" }, "committer": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Mon Jul 24 17:11:08 2017 -0700" }, "message": "Added a few idiomatic x86 SSE instructions.\n\nTest: test-art-host-gtest-assembler_x86[_64]_test\nChange-Id: I4f98cb6c9be82f1cb62276ee9331734b86111b5c\n" }, { "commit": "8cf9cb386cd9286d67e879f1ee501ec00d72a4e1", "tree": "88e86e214b425e444760fe4e0ffeee677e1558a2", "parents": [ "914b7b6a6c9f399b26b41e9160e9871ef749e0db" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Jul 19 09:28:38 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Mon Jul 24 16:07:10 2017 -0700" }, "message": "ART: Include cleanup\n\nLet clang-format reorder the header includes.\n\nDerived with:\n\n* .clang-format:\n BasedOnStyle: Google\n IncludeIsMainRegex: \u0027(_test|-inl)?$\u0027\n\n* Steps:\n find . -name \u0027*.cc\u0027 -o -name \u0027*.h\u0027 | xargs sed -i.bak -e \u0027s/^#include/ #include/\u0027 ; git commit -a -m \u0027ART: Include cleanup\u0027\n git-clang-format -style\u003dfile HEAD^\n manual inspection\n git commit -a --amend\n\nTest: mmma art\nChange-Id: Ia963a8ce3ce5f96b5e78acd587e26908c7a70d02\n" }, { "commit": "4147fcc43c2ee019a06e55384985e3eaf82dcb8c", "tree": "11ec92efbfddf7736bbc74ed35fcfb3756bfcfb0", "parents": [ "e8f48da635c4d07bbe431e5819da8e1fad91a8ef" ], "author": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Sat Jun 17 19:57:27 2017 -0700" }, "committer": { "name": "Alexey Frunze", "email": "Alexey.Frunze@imgtec.com", "time": "Wed Jul 19 15:03:10 2017 -0700" }, "message": "MIPS: Reduce Baker read barrier code size overhead\n\nTest: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU\nTest: test-art-target-gtest\nTest: testrunner.py --target --optimizing\nTest: same tests as above on CI20\nTest: booted MIPS32 and MIPS64 in QEMU with poisoning\n in configurations:\n - with Baker read barrier thunks\n - without Baker read barrier thunks\n - ART_READ_BARRIER_TYPE\u003dTABLELOOKUP\n\nChange-Id: I79f320bf8862a04215c76cfeff3118ebc87f7ef2\n" }, { "commit": "24ff0235ab631baccd49fb491197d86d1ef97279", "tree": "d999768a0cf955044a4a771fa802b30034dee234", "parents": [ "252eda65ae216ff36a4eca2195d1ec3b29612035", "c043d006845afef99b17aeab8bb6d6da1a42ad37" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Tue Jul 18 09:54:47 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Tue Jul 18 09:54:47 2017 +0000" }, "message": "Merge \"Remove the old ARM assemblers from ART.\"" }, { "commit": "93764b8ee58d54118904b8f4473628451e568893", "tree": "729758b4420920b7bb7070dbdac1ecd86810b2a8", "parents": [ "d317295ed07384c69d5890d6b17b80d57139a082" ], "author": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Jul 17 14:51:53 2017 -0700" }, "committer": { "name": "Mathieu Chartier", "email": "mathieuc@google.com", "time": "Mon Jul 17 18:01:17 2017 -0700" }, "message": "Generalize atomic_method_ref_map to support dex references\n\nGeneralize atomic method ref map to support dex references instead\nof only method references.\n\nThe goal is to use this in a future CL to replace compiled_classes_.\n\nTest: test-art-host\n\nChange-Id: Ic6d1e619584f790eea68f5160fa0fcd664524cd7\n" }, { "commit": "c043d006845afef99b17aeab8bb6d6da1a42ad37", "tree": "756ce3caca2a7ff62a169c003639657bd7124d2f", "parents": [ "9983e302384c12a975c8d2d5ae239f79fd8e1996" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jul 14 16:39:16 2017 +0100" }, "committer": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jul 17 18:00:40 2017 +0100" }, "message": "Remove the old ARM assemblers from ART.\n\nNow that the old ARM code generator for ART\u0027s Optimizing\ncompiler is gone, these assemblers no longer have users;\nretiring them.\n\nTest: test.py\nBug: 63316036\nChange-Id: Iaea42432a9e0d3288b71615f85c58846c0336944\n" }, { "commit": "9983e302384c12a975c8d2d5ae239f79fd8e1996", "tree": "4e4d269fe1a3d4f0f1b93cd972adab9f17aab8e0", "parents": [ "bac2bd1c2fbdd94f4d4dfe83d8451f655e875e36" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jul 14 14:34:22 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jul 14 17:25:39 2017 +0100" }, "message": "Remove the old ARM code generator from ART\u0027s Optimizing compiler.\n\nThe AArch32 VIXL-based code generator has been the default\nARM code generator in ART for some time now. The old ARM\ncode generator does not compile anymore; retiring it.\n\nTest: test.py\nBug: 63316036\nChange-Id: Iab8fbc4ac73eac2c1a809cd7b22fec6b619755db\n" }, { "commit": "bac2bd1c2fbdd94f4d4dfe83d8451f655e875e36", "tree": "58ba3b1d28348da478a44234820ab6c485f5ed37", "parents": [ "06410c093de2b8a21bdbd7dfd9ce324fd4e95c3f", "6d729a789d3d7771e13d9445ee0be1d9d48a81b5" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jul 14 10:28:42 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jul 14 10:28:42 2017 +0000" }, "message": "Merge \"Introduce a Marking Register in ARM code generation.\"" }, { "commit": "6d729a789d3d7771e13d9445ee0be1d9d48a81b5", "tree": "360b9af68920f411be5fe6753aaf7ab4976385ea", "parents": [ "8cfbbb826a3ab7bb680cfcd8a8148570b165d620" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Fri Jun 30 18:34:01 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu Jul 13 16:41:07 2017 +0100" }, "message": "Introduce a Marking Register in ARM code generation.\n\nWhen generating code for ARM, maintain the status of\nThread::Current()-\u003eGetIsGcMarking() in register R8,\ndubbed MR (Marking Register), and check the value of that\nregister (instead of loading and checking a read barrier\nmarking entrypoint) in read barriers.\n\nTest: m test-art-target\nTest: m test-art-target with tree built with ART_USE_READ_BARRIER\u003dfalse\nTest: m test-art-host-gtest\nTest: ARM device boot test\nBug: 37707231\nChange-Id: I30b44254460d0bbb9f1b2adc65eca52ca3de3f53\n" }, { "commit": "51765b098301fff1897361b2d1a21af356d9d6d8", "tree": "5d35468c9ecd428803fe7e4339fb8e251b6ed926", "parents": [ "e63a91111d13f33028c2988ded53a4659140ca2e" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Thu Jun 22 13:49:59 2017 +0200" }, "committer": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Thu Jul 13 10:34:27 2017 +0200" }, "message": "MIPS32: ART Vectorizer\n\nMIPS32 implementation which uses MSA extension.\n\nNote: Testing is done with checker parts of tests 640, 645, 646 and\n 651, locally changed to cover MIPS32 cases. These changes can\u0027t\n be included in this patch since MSA is not a default option.\n\nTest: ./testrunner.py --target --optimizing -j1 in QEMU (mips32r6)\nChange-Id: Ieba28f94c48c943d5444017bede9a5d409149762\n" }, { "commit": "97c46466aea25ab63a99b3d1afc558f0d9f55abb", "tree": "afd225f51d28a77329bc2590a025400e088f260c", "parents": [ "00cca3a275562d110a8b35094b9b12fac37f67ab" ], "author": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Thu May 11 14:04:03 2017 +0100" }, "committer": { "name": "Roland Levillain", "email": "rpl@google.com", "time": "Tue Jul 11 17:43:27 2017 +0100" }, "message": "Introduce a Marking Register in ARM64 code generation.\n\nWhen generating code for ARM64, maintain the status of\nThread::Current()-\u003eGetIsGcMarking() in register X20,\ndubbed MR (Marking Register), and check the value of that\nregister (instead of loading and checking a read barrier\nmarking entrypoint) in read barriers.\n\nTest: m test-art-target\nTest: m test-art-target with tree built with ART_USE_READ_BARRIER\u003dfalse\nTest: ARM64 device boot test\nBug: 37707231\nChange-Id: Ibe9bc5c99a2176b0a0476e9e9ad7fcc9f745017b\n" }, { "commit": "2e0a7e5047fde08ddd220aaa1a0e64d44ecbb420", "tree": "7c541176dc1b44cc927272f9b38fab4ce7ac9e85", "parents": [ "209b4c7141d7da61790844cd58bd0a9bab2951d8" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Thu Jul 06 11:55:24 2017 +0200" }, "committer": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Thu Jul 06 14:04:01 2017 +0200" }, "message": "MIPS32: Adds changes neccessary for saving 128 bits of data\n\nTest: mma test-art-host-gtest\nTest: ./testrunner.py --optimizing --target in QEMU (MIPS)\n\nChange-Id: I90b7baa1d5f910887bcc3ab80a1a48391ba80c45\n" }, { "commit": "69489fad1e34c005fbe110bfae2a3c6bff879d4e", "tree": "23c50305c52cf076cedd3bfd496a2adf0d1e46b3", "parents": [ "8979f71079ec18fa8d3c0915549ec03ee1fbadf5" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 08 18:03:25 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Wed Jun 21 21:30:59 2017 -0700" }, "message": "ART: Fix old warnings\n\nFix Wconstant-conversion warnings.\n\nPartially reverts commit df53be273509dd43725870fb20a2c7d71f7fbfd3.\n\nBug: 28149048\nBug: 29823425\nTest: m\nTest: m test-art-host\nChange-Id: Ib377150690c0f2c2142e4b91f2144e2bcaa020ef\n" }, { "commit": "c0fe9db1af30a162448ca5ccd386e970a8d31f83", "tree": "6dbb5549f249b61337f1e70f1911ea1902d2d8fa", "parents": [ "53ac3130edd9c9273f95e3ba0bc5e80f6d2b3f2d", "82b0740f03b1a6acab4558214d3edc362e27e238" ], "author": { "name": "Vladimir Marko", "email": "vmarko@google.com", "time": "Mon Jun 12 09:09:09 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Mon Jun 12 09:09:11 2017 +0000" }, "message": "Merge \"Use IntrusiveForwardList\u003c\u003e for Env-/UsePosition.\"" }, { "commit": "58794c5c23f46a7476a58e5a10dbeebb6321aa90", "tree": "948368dd8d8376a50fe996da0438abe10da1322d", "parents": [ "73321bfdd7e96e3ce62042c9e5be567ed0db1985", "5678db5b3a0275d04bc610236f89fac9f76b5b1e" ], "author": { "name": "Treehugger Robot", "email": "treehugger-gerrit@google.com", "time": "Fri Jun 09 18:00:41 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 09 18:00:43 2017 +0000" }, "message": "Merge \"ART: Refactor bit_utils and stl_util\"" }, { "commit": "05ae67444e15c9281582ef1fc45c4558d286040e", "tree": "c4c1bb45e81be3367dbfb36af1646f9a5d434078", "parents": [ "ca333f4093648f275b71121121a7c72f99fc11af", "0758ae7c12df9f857b8609e1eab6ad5dfa0e517d" ], "author": { "name": "Aart Bik", "email": "ajcbik@google.com", "time": "Fri Jun 09 16:07:38 2017 +0000" }, "committer": { "name": "Gerrit Code Review", "email": "noreply-gerritcodereview@google.com", "time": "Fri Jun 09 16:07:40 2017 +0000" }, "message": "Merge \"Introduce a number of MSA instructions for MIPS32\"" }, { "commit": "5678db5b3a0275d04bc610236f89fac9f76b5b1e", "tree": "efc4ffe5d59a0c6c5f4c15a886459962d24de4aa", "parents": [ "83b140474aa1759739c8ee4464bf226c4fa0f6d7" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 08 14:11:18 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 08 14:11:18 2017 -0700" }, "message": "ART: Refactor bit_utils and stl_util\n\nMove iterator code from bit_utils.h into bit_utils_iterator.h. Move\nIdentity into stl_util_identity.h. Remove now unnecessary includes,\nand fix up transitive users.\n\nTest: m\nChange-Id: Id1ce9cda66827c5d00584f39ed310b6b37629906\n" }, { "commit": "3b7dc35f4e5c4d86c73b6784b7ee0df701c68ec2", "tree": "1e3a56846ec63148142ac6fb1fef214129f4a05e", "parents": [ "8228cdf4ad6322ec8133564aaa51f966d36c0f17" ], "author": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Tue Jun 06 20:02:03 2017 -0700" }, "committer": { "name": "Andreas Gampe", "email": "agampe@google.com", "time": "Thu Jun 08 13:13:20 2017 -0700" }, "message": "ART: Clean up allocator.h\n\nMove the single-use typedefs to their users. Remove now-unused\nincludes. Fix up transitive includes.\n\nTest: m\nChange-Id: I953d774b28f1e4f3191f96943e3a69ce66aa398a\n" }, { "commit": "0758ae7c12df9f857b8609e1eab6ad5dfa0e517d", "tree": "cbceef23999bd640e36c052ce2accbab0a81dc22", "parents": [ "4d3df9131c4098828f889b9470c82880efdc91be" ], "author": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Tue May 23 11:06:23 2017 +0200" }, "committer": { "name": "Lena Djokic", "email": "Lena.Djokic@imgtec.com", "time": "Thu Jun 08 10:56:46 2017 +0200" }, "message": "Introduce a number of MSA instructions for MIPS32\n\nAdded a number of MSA (The MIPS SIMD Architecture) instructions.\nAdded assembler tests for each instruction.\n\nTest: mma test-art-host-gtest\n\nChange-Id: I1d499309fc08923484f64d1883b9c3f95eadd3be\n" } ], "next": "658263ec2fdc7758dd73c41cdcf0babcdef1e48d" }