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gerrit.witaqua.org / art / 28a2ff0bd6c30549f3f6465d8316f5707b1d072f / compiler / optimizing
  1. 28a2ff0 Revert "ARM64 Baker's read barrier fast path implementation." by Mathieu Chartier · 10 years ago
  2. c8f1df9 ARM64 Baker's read barrier fast path implementation. by Roland Levillain · 10 years ago
  3. 955d24c Merge "ART: Remove Baseline compiler" by David Brazdil · 10 years ago
  4. 58282f4 ART: Remove Baseline compiler by David Brazdil · 10 years ago
  5. ae9f99e Merge "Optimizing: Improve floating point comparisons on arm and arm64." by Vladimir Marko · 10 years ago
  6. 7c0f2e5 Do HFieldGet first to avoid explicit null check. by Nicolas Geoffray · 10 years ago
  7. d6e069b Optimizing: Improve floating point comparisons on arm and arm64. by Vladimir Marko · 10 years ago
  8. c903b6a Move --dump-cfg and dump-cfg-append to CompilerOptions. by Nicolas Geoffray · 10 years ago
  9. cd3d0fb Do not use HArm64IntermediateAddress with read barriers. by Roland Levillain · 10 years ago
  10. 2894346 Merge "ART: Remove incorrect HFakeString optimization" by David Brazdil · 10 years ago
  11. 947cb4f Merge "Implement irreducible loop support in optimizing." by Nicolas Geoffray · 10 years ago
  12. 15db4dc Merge "Update `ValidateInvokeRuntime()` and HDivZeroCheck." by Roland Levillain · 10 years ago
  13. 6de1938 ART: Remove incorrect HFakeString optimization by David Brazdil · 10 years ago
  14. 15bd228 Implement irreducible loop support in optimizing. by Nicolas Geoffray · 10 years ago
  15. 8422edd Merge "MIPS32: don't use R2+ instructions (mthc1, mfhc1) on MIPS32R1 or with 32-bit FPUs." by Roland Levillain · 10 years ago
  16. da88e57 Merge "Don't encode a DexRegisterMap if there is no live register." by Nicolas Geoffray · 10 years ago
  17. 8e6b237 Merge "MIPS: Improve conversion between ints and floats." by Roland Levillain · 10 years ago
  18. bb9863a MIPS32: don't use R2+ instructions (mthc1, mfhc1) on MIPS32R1 or by Alexey Frunze · 10 years ago
  19. baf60b7 MIPS: Improve conversion between ints and floats. by Alexey Frunze · 10 years ago
  20. 0d9150b MIPS: HRor clean-up by Alexey Frunze · 10 years ago
  21. 08d3ab5 Merge "Fixed bug with hoisting/deopting in taken-block instead of preheader. With a fail-before pass-after regression test." by Aart Bik · 10 years ago
  22. f96c43e Merge "Reduce code size by sharing slow paths." by Aart Bik · 10 years ago
  23. 55b14df Fixed bug with hoisting/deopting in taken-block instead of preheader. by Aart Bik · 10 years ago
  24. 86e4278 Add DWARF type information generation. by Tamas Berghammer · 10 years ago
  25. 5cc349f Report DWARF debug information for JITed code. by David Srbecky · 10 years ago
  26. 780aece Update `ValidateInvokeRuntime()` and HDivZeroCheck. by Alexandre Rames · 10 years ago
  27. 1cde058 HDeoptimize can also trigger GC. by Nicolas Geoffray · 10 years ago
  28. 185be57 Merge "Fix memory fences in the ARM64 UnsafeCas intrinsics." by Roland Levillain · 10 years ago
  29. bb3a8bd Merge "Set side effects to HNullCheck and HBoundsCheck." by Nicolas Geoffray · 10 years ago
  30. 1af564e Set side effects to HNullCheck and HBoundsCheck. by Nicolas Geoffray · 10 years ago
  31. 67fcbd4 Merge "MIPS: Implement HRor" by Vladimir Marko · 10 years ago
  32. 42249c3 Reduce code size by sharing slow paths. by Aart Bik · 10 years ago
  33. a3eca2d Do not leave intermediate addresses across Java calls. by Nicolas Geoffray · 10 years ago
  34. 3da15f8 Merge "Optimizing/ARM: Fix CmpConstant()." by Vladimir Marko · 10 years ago
  35. 4bedb38 Fix memory fences in the ARM64 UnsafeCas intrinsics. by Roland Levillain · 10 years ago
  36. 8566a91 Merge "Generate Nops to ensure that debug stack maps have distinct PC." by David Srbecky · 10 years ago
  37. f871d46 Merge "Don't use std::abs on INT_MIN/LONG_MIN, it's undefined." by Nicolas Geoffray · 10 years ago
  38. b7070a2 Generate Nops to ensure that debug stack maps have distinct PC. by David Srbecky · 10 years ago
  39. 68f6289 Don't use std::abs on INT_MIN/LONG_MIN, it's undefined. by Nicolas Geoffray · 10 years ago
  40. 012fc4e Don't encode a DexRegisterMap if there is no live register. by Nicolas Geoffray · 10 years ago
  41. 363910e Merge "Add a missing implicit null check in the ARM codegen." by Roland Levillain · 10 years ago
  42. 80e6709 Small implicit null checks refactoring in the ARM codegen. by Roland Levillain · 10 years ago
  43. 1407ee7 Add a missing implicit null check in the ARM codegen. by Roland Levillain · 10 years ago
  44. c928591 ARM Baker's read barrier fast path implementation. by Roland Levillain · 10 years ago
  45. 0580d96 Fix a crash with unresolved classes. by Nicolas Geoffray · 10 years ago
  46. 744a1c6 ART: Don't set initial RTI for BoundType if input untyped by David Brazdil · 10 years ago
  47. 15693bf ART: Resolve ambiguous ArraySets by David Brazdil · 10 years ago
  48. f555258 ART: Create BoundType for CheckCast early by David Brazdil · 10 years ago
  49. fd2140f ART: Make opt inliner a little bit cleaner/faster by Andreas Gampe · 10 years ago
  50. 92d9060 MIPS: Implement HRor by Alexey Frunze · 10 years ago
  51. d87f3ea ART: Use Primitive::Is64BitType in SsaBuilder::TypePhiFromInputs by David Brazdil · 10 years ago
  52. f196a43 Merge "X86: templatize GenerateTestAndBranch and friends" by David Brazdil · 10 years ago
  53. 06856d3 Merge "Detect phi cycles." by Nicolas Geoffray · 10 years ago
  54. a3f0bf3 Merge "Revert "Revert "Tweak inlining heuristics.""" by Nicolas Geoffray · 10 years ago
  55. 5949fa0 Revert "Revert "Tweak inlining heuristics."" by Nicolas Geoffray · 10 years ago
  56. 5f332cb Merge "MIPS32: improvements in code generation (mostly 64-bit ALU ops)" by Nicolas Geoffray · 10 years ago
  57. b7371a5 Merge "Remove bogus DCHECK in induction analysis." by Nicolas Geoffray · 10 years ago
  58. 152408f X86: templatize GenerateTestAndBranch and friends by Mark Mendell · 10 years ago
  59. b35302b Remove bogus DCHECK in induction analysis. by Nicolas Geoffray · 10 years ago
  60. 295abc1 ART: Set RTI of HArm64IntermediateAddress by David Brazdil · 10 years ago
  61. 4833f5a ART: Refactor SsaBuilder for more precise typing info by David Brazdil · 10 years ago
  62. 5d75afe Improved side-effects/can-throw information on intrinsics. by Aart Bik · 10 years ago
  63. fa0dc72 Merge "On x64, cmpl can never take a int64 immediate." by Nicolas Geoffray · 10 years ago
  64. 6ce0173 On x64, cmpl can never take a int64 immediate. by Nicolas Geoffray · 10 years ago
  65. 1c421aa Merge "Fix code generation for String.<init> on x64." by Nicolas Geoffray · 10 years ago
  66. 7f59d59 Fix code generation for String.<init> on x64. by Nicolas Geoffray · 10 years ago
  67. e6d0d8d ART: Disable Math.round intrinsics by Andreas Gampe · 10 years ago
  68. 095b1df Revert "Make Math.round consistent on arm64." by Andreas Gampe · 10 years ago
  69. 40041c9 Make Math.round consistent on arm64. by Nicolas Geoffray · 10 years ago
  70. dcdc85b Dex2oat support for multiple oat file and image file outputs. by Jeff Hao · 11 years ago
  71. 0cf4493 Generate more stack maps during native debugging. by David Srbecky · 10 years ago
  72. 5f7b58e Rewrite HInstruction::Is/As<type>(). by Vladimir Marko · 11 years ago
  73. ac6ac10 Optimizing/ARM: Fix CmpConstant(). by Vladimir Marko · 10 years ago
  74. 9865bde Rename NullHandle to ScopedNullHandle by Mathieu Chartier · 10 years ago
  75. 803cbb9 For LSE, further optimize stores for singleton references. by Mingyao Yang · 11 years ago
  76. 280a65b Merge "MIPS64: Fuse long and FP compare & condition in Optimizing." by Roland Levillain · 10 years ago
  77. ecf52df ART: Fix bug in LSE by David Brazdil · 10 years ago
  78. 2739411 Merge "Disable the UnsafeCASObject intrinsic with read barriers." by Roland Levillain · 10 years ago
  79. 391b866 Disable the UnsafeCASObject intrinsic with read barriers. by Roland Levillain · 10 years ago
  80. 570a920 Merge "Revert "Revert "X86: Use locked add rather than mfence""" by Aart Bik · 10 years ago
  81. 299a939 MIPS64: Fuse long and FP compare & condition in Optimizing. by Alexey Frunze · 10 years ago
  82. 14c4e90 Merge "Revert "Revert "ART: Reduce the instructions generated by packed switch.""" by Vladimir Marko · 10 years ago
  83. f3e0ee2 Revert "Revert "ART: Reduce the instructions generated by packed switch."" by Vladimir Marko · 10 years ago
  84. 3e3e4a7 Fix braino in parallel move resolver. by Nicolas Geoffray · 10 years ago
  85. 17077d8 Revert "Revert "X86: Use locked add rather than mfence"" by Mark P Mendell · 10 years ago
  86. 5c7aed3 MIPS32: improvements in code generation (mostly 64-bit ALU ops) by Alexey Frunze · 11 years ago
  87. 1c70f18 Merge "Revert "X86: Use locked add rather than mfence"" by Aart Bik · 10 years ago
  88. 0da3b91 Revert "X86: Use locked add rather than mfence" by Aart Bik · 10 years ago
  89. c3ca1e6 Merge "X86: Use locked add rather than mfence" by Aart Bik · 10 years ago
  90. 698fa97 Remove spurious references to kEmitCompilerReadBarrier in MIPS. by Roland Levillain · 10 years ago
  91. cbf8af8 Merge "MIPS32: Fuse long and FP compare & condition in Optimizing." by Roland Levillain · 10 years ago
  92. 4741516 Merge "Revert "Revert "Introduce support for hardware simulators, starting with ARM64""" by Roland Levillain · 10 years ago
  93. d7d3538 Merge "Revert "ART: Reduce the instructions generated by packed switch."" by Nicolas Geoffray · 10 years ago
  94. f5f64ef Detect phi cycles. by Nicolas Geoffray · 10 years ago
  95. b4c1376 Revert "ART: Reduce the instructions generated by packed switch." by Nicolas Geoffray · 10 years ago
  96. 96f721d Merge "Revert "ART: Set RTI of Arm64IntermediateAddress"" by Nicolas Geoffray · 10 years ago
  97. dce90b9 Revert "ART: Set RTI of Arm64IntermediateAddress" by Nicolas Geoffray · 10 years ago
  98. 68289a5 Revert "ART: Refactor SsaBuilder for more precise typing info" by Alex Light · 10 years ago
  99. cd7b0ee MIPS32: Fuse long and FP compare & condition in Optimizing. by Alexey Frunze · 11 years ago
  100. 7b3e4f9 X86: Use locked add rather than mfence by Mark Mendell · 11 years ago